JP2006042565A - Power switching circuit, power converter and driving method of power semiconductor switching device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress overvoltage when turning a power semiconductor switching device off surely by eliminating control lag. <P>SOLUTION: The power switching circuit comprises a control drive means provided with a section for storing data indicative of the operational state of a power semiconductor switching device when turning off sequentially as time series data, and a drive signal generating section for predicting the operational state of the power semiconductor switching device when turning off based on the operational state data prestored in an operational state storage section and setting next turn off voltage to reduce overshoot based on the prediction results. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power switching circuit, a power conversion device, and a method for driving a power semiconductor switching element.

As is well known, a power conversion device is a device that performs power conversion by switching input power using a power semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor). In such a power conversion device, a technique for protecting a power semiconductor switching element from an overvoltage caused by an overshoot that occurs when the power semiconductor switching element switches from an ON state to an OFF state (at the time of turn-off) (overvoltage protection method) ) Is an active gate control system. For example, the following publicly known documents disclose various modifications of the active gate control system.
"Overvoltage protection when connecting Snavales IGBTs in series" (National Congress of the Institute of Electrical Engineers of Japan, 2000) JP 2002-44934 A

  By the way, in the above active gate control system, the control voltage (gate voltage in the case of IGBT) of the power semiconductor switching element at the turn-off time is the voltage between the main terminals of the power semiconductor switching element (collector-emitter voltage in the case of IGBT). This is a technology that suppresses the overvoltage of the voltage between the main terminals by performing feedback control based on the control, i.e., since it is essentially feedback control, a control delay inevitably occurs, so for example when the switching frequency is increased. It is difficult to suppress overvoltage.

  The present invention has been made in view of the above-described circumstances, and an object of the present invention is to eliminate the control delay and reliably suppress the overvoltage when the power semiconductor switching element is turned off.

  In order to achieve the above object, according to the present invention, a power semiconductor switching element that switches power applied to a pair of main terminals by repeating turn-on and turn-on, and a turn-on for turning on the power semiconductor switching element. A drive signal including a voltage, a turn-off voltage for turning off, and a correction voltage generated based on an inter-terminal voltage (main-terminal voltage) of the main terminal added to the turn-off voltage, and a turn-on voltage and a turn-off voltage And a control driving means for reducing overshoot of the voltage between the main terminals at the time of turn-off by adding a correction voltage to the turn-off voltage and switching driving the power semiconductor switching element by the control driving means. Turn off An operation state storage unit that sequentially stores operation state data indicating an operation state of the power semiconductor switching element in the time series data, and power at the next turn-off based on the operation state data stored in advance in the operation state storage unit And a drive signal generation unit that predicts an operating state of the semiconductor switching element and sets a next turn-off voltage so as to reduce overshoot based on the prediction result.

  According to the present invention, the operation state of the power semiconductor switching element at the time of the next turn-off is predicted based on the operation state data stored in advance, and the next turn-off voltage is reduced so as to reduce the overshoot based on the prediction result. In other words, since the next turn-off voltage is set in advance in a feedforward manner based on past operating state data, it is possible to more reliably reduce overshoot, and thus the overvoltage of the power semiconductor switching element. Can be suppressed more reliably than before.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a circuit diagram of a power switching circuit according to the first embodiment of the present invention.
In this circuit diagram, reference numeral 1 is a switching signal generating circuit, 2 is an E / O converter, 3 is an O / E converter, 4 is a gate power supply (control drive means), 5 is an IGBT (power semiconductor switching element), 6 is a resistor voltage divider, 7 is a current detector, R1 to R3 are resistors, and D1 is a diode.

  The switching signal generation circuit 1 generates a switching signal that defines the switching timing of the IGBT 5 and supplies it to the E / O converter 2. The E / O converter 2 is a phototransistor, for example, and photoelectrically converts the switching signal into an optical switching signal and outputs the optical switching signal to the O / E converter 3. The O / E converter 3 is, for example, a photodiode, and reproduces the switching signal by photoelectrically converting the optical switching signal to output it to the gate power supply 4. Here, the E / O converter 2 and the O / E converter 3 are insulating means for electrically insulating the switching signal generating circuit 1 from other circuit systems.

  The gate power supply 4 includes an operation state storage unit 4a and a gate signal generation unit 4b. The switching signal input from the O / E converter 3, the detection voltage Vk and the current input from the resistance voltage divider 6 are provided. Based on the collector current Ic input from the detector 7, a gate signal (drive signal) for driving the IGBT 5 is generated. The details of the operation state storage unit 4a and the gate signal generation unit 4b will be described later for convenience of explanation.

  The resistor R3 is a gate resistor interposed between the output terminal of the gate power supply 4 (that is, the output terminal of the gate signal generator 4b) and the gate terminal Tg of the IGBT 5. The gate signal output from the gate power supply 4 is input to the gate terminal Tg (control terminal) of the IGBT 5 through the gate resistor R3.

  The IGBT 5 is a power semiconductor switching element that switches AC or DC power applied between the collector terminal Tc, which is the main terminal, and the emitter terminal Te. That is, the IGBT 5 switches the power applied between the main terminals Tc and Te by alternately repeating the turn-on and the turn-off based on the gate signal input to the gate terminal Tg.

  The resistance voltage divider 6 divides the collector-emitter voltage Vce of the IGBT 5 by resistance and outputs the divided voltage to the gate power supply correction voltage generator 4 as the detection voltage Vk. That is, the resistor voltage divider 6 is composed of two resistors R1 and R2 connected in series between the main terminal of the IGBT 5, that is, the collector terminal Tc, and the emitter terminal Te. The detection voltage Vk divided by the resistance values of the resistors R1 and R2 is output. This detection voltage Vk naturally changes according to the change of the collector-emitter voltage Vce, and can be considered to be equivalent to the collector-emitter voltage Vce. The current detector 7 detects a collector current Ic (main terminal current) flowing through the emitter terminal Te (main terminal) as shown in the figure and outputs it to the operation state storage unit 4a.

  The operation state storage unit 4a receives the switching signal, the detection voltage Vk, the collector current Ic, and the correction voltage Vh included in the gate signal output from the gate signal generation unit 4b. The operation state storage unit 4a samples the collector current Ic at the time of turn-off based on the switching signal, as one of operation state data indicating the operation state of the IGBT 5, and the peak voltage of the detection voltage Vk, that is, the collector-emitter voltage. The peak value of the correction voltage Vh corresponding to the voltage peak value Vp between the main terminals (correction voltage peak value Vhp) corresponding to the peak value of the overshoot at Vce (voltage peak value Vp between the main terminals) as one of the operation state data. Are sequentially stored as one of the operation state data in time series. The operation state storage unit 4a outputs the operation state data stored by itself to the gate signal generation unit 4b.

  FIG. 2 is a table (operation state table) of operation state data stored in the operation state storage unit 4a. As shown in this figure, the operation state table includes main terminal voltage peak values Vp0 to Vpn, correction voltage peak values Vhp0 to Vhpn, and collector currents Ic0 to Icn at the turn-off times t0, t1, t2,. Are stored as time-series data regarding (n + 1) turn-off times. Note that the operation state data stored in the operation state table is sequentially overwritten and updated from the old data.

  The gate signal generation unit 4b includes a turn-on voltage Von for turning on the IGBT 5, a turn-off voltage Voff for turning off the IGBT 5, and a peak value in an overshoot of the collector-emitter voltage Vce at the time of turning off the IGBT 5, that is, a voltage between main terminals. In order to reduce the peak value Vp, a gate signal composed of the correction voltage Vh superimposed on the turn-off voltage Voff is generated and output. The gate signal generation unit 4b sets the repetition timing of the turn-on voltage Von and the turn-off voltage Voff based on the switching signal, and generates the correction voltage Vh based on the detection voltage Vk.

  Further, the gate signal generation unit 4b feeds the turn-off voltage Voff at the next turn-off as a characteristic function based on the operation state data (past time series data) stored in the operation state storage unit 4a. It also has a function to set to.

  Next, the operation of the power switching circuit configured as described above will be described in detail with reference to FIG.

  As described above, the gate signal generation unit 4b generates and outputs a gate signal in which the turn-on voltage Von and the turn-off voltage Voff are alternately repeated based on the switching signal input from the O / E converter. Then, the gate signal is supplied to the gate terminal via the gate resistor R3, whereby the IGBT 5 switches the power applied to the main terminals Tc and Te by alternately turning on and off.

  FIG. 3 is a waveform diagram showing a change in the voltage of the gate signal (gate voltage Vg) and a change in the collector-emitter voltage Vce corresponding to the change in the gate voltage Vg. When the IGBT 5 is turned off (time t0), the gate voltage Vg changes (decreases) stepwise from the turn-on voltage Von to the turn-off voltage Voff. As a result of this turn-off, the collector-emitter voltage Vce of the IGBT 5 rapidly rises and converges to the steady voltage Edc. This collector-emitter voltage Vce has an overshoot as an excessive phenomenon, and its peak value, that is, the main voltage. The terminal voltage peak value Vp exceeds the steady voltage Edc.

  The gate signal generator 4b generates a correction voltage Vh having a magnitude corresponding to the detection voltage Vk, that is, the magnitude of the collector-emitter voltage Vce and adds it to the turn-off voltage Voff as shown in the figure, thereby The voltage peak value Vp is reduced. That is, after the gate voltage Vg changes stepwise from the turn-on voltage Von to the turn-off voltage Voff, it rises according to the magnitude of the collector-emitter voltage Vce and peaks at the time tp of the main terminal voltage peak value Vp ( That is, the correction voltage peak value Vhp) is obtained, and thereafter, the turn-off voltage Voff is restored.

  Here, FIG. 4 is a waveform diagram showing, as an example, changes in the overshoot (voltage peak value Vp between main terminals) of the collector-emitter voltage Vce according to the magnitude of the collector current Ic. As shown in this figure, the peak voltage Vp between the main terminals depends on the magnitude of the collector current Ic at the turn-off time, and becomes larger as the collector current Ic is larger.

  Such a peak voltage Vp between the main terminals is sufficiently reduced by the correction voltage Vh generated based on the detection voltage Vk when the switching frequency is relatively low, but is not sufficiently reduced when the switching frequency is increased. That is, since the correction voltage Vh is feedback-controlled based on the detection voltage Vk, a control delay inevitably occurs, and therefore, when the switching frequency is relatively high, the main terminal voltage peak value Vp is reliably reduced. I can't.

  However, this power switching circuit dynamically adjusts and sets the turn-off voltage Voff at the next turn-off as shown in FIG. Although the turn-off voltage Voff is conventionally set as a fixed voltage, in this power switching circuit, the turn-off voltage at the next turn-off is determined according to the magnitude of the past collector current Ic stored in the operation state storage unit 4a as the operation state data. By variably adjusting the voltage Voff in a feedforward manner, the main-terminal voltage peak value Vp is reliably reduced even when the switching frequency is relatively high.

  That is, the gate signal generation unit 4b acquires the collector currents Ic0 to Icn (time series data) at the past turn-off times t0, t1, t2,..., Tn by searching the operation state table of the operation state storage unit 4a. The collector current Icn + 1 at the next turn-off time tn + 1 is estimated based on the collector currents Ic0 to Icn as the time series data, and the next turn-off voltage Voffn + 1 is set based on the estimated value.

  Various algorithms for predicting future values based on past time-series data are known. As the simplest algorithm, an extrapolation method using linear interpolation is conceivable. That is, the collector current Icn + 1 at the next turn-off time tn + 1 is estimated as a value on a straight line connecting the collector currents Icn-1 and Icn at the two latest turn-off times tn-1 and tn from the current time. The main terminal voltage peak value at the next turn-off time tn + 1 as the value on the extension line of the straight line connecting the main terminal voltage peak values Vpn-1 and Vpn at the two most recent turn-off times tn-1 and tn from the current time Estimate Vpn + 1.

  The gate signal generator 4b corresponds to the collector current Ic and the main terminal voltage peak value Vp that are closest to the estimated values of the collector current Icn + 1 and the main terminal voltage peak value Vpn + 1 thus obtained. The correction voltage peak value Vhp to be obtained is obtained by searching the operation state table, and the next turn-off voltage Voffn + 1 is set as the correction voltage peak value Vhp. The gate voltage Vg shown at the bottom of FIG. 4 shows the change in the turn-off voltage Voff that is dynamically variably set in this way by the feedforward method.

  According to the present embodiment as described above, the turn-off voltage Voff at the next turn-off is dynamically variably set by a feed-forward method, and then the magnitude corresponding to the magnitude of the detection voltage Vk, that is, the collector-emitter voltage Vce. Since the correction voltage Vh is set, the voltage peak value Vp between the main terminals, that is, the overvoltage can be surely reduced even when the switching frequency is relatively high.

  Here, the power switching circuit applies the corrected voltage peak value Vhp specified by searching the operation state table based on the estimated value of the collector current Icn + 1 and the estimated value of the voltage across the main terminals Vpn + 1. The turn-off voltage Voffn + 1 is set to the next turn-off voltage Voffn + 1 using the correction voltage peak value Vhp, and a method as shown in FIG. 5 is also conceivable.

  That is, at the time ta when the collector-emitter voltage Vce exceeds the steady voltage Edc, for example, the turn-off voltage Voffn + 1 fixed at -15 V is changed to the correction voltage peak value Vhp in a stepwise manner. Even by such a method, the main terminal voltage peak value Vp, that is, the overvoltage can be reliably reduced. The timing at which the turn-off voltage Voffn + 1 is changed to the correction voltage peak value Vhp in a stepwise manner is not limited to the time ta when the collector-emitter voltage Vce exceeds the steady voltage Edc, but the collector-emitter voltage. It may be the time when Vce approaches the steady voltage Edc, for example, the time when the collector-emitter voltage Vce rises to about 80% of the steady voltage Edc.

Next, a power converter using such a power switching circuit will be described with reference to FIG.
This power conversion apparatus converts, for example, 60 Hz three-phase AC power (that is, AC power of AC system A) into 50 Hz three-phase AC power (that is, AC power of AC system B), and 60 Hz three-phase AC power. A total of ten converter circuits K1 to K10 that convert electric power into DC power and a total of ten inverter circuits M1 to M10 that convert this DC power into three-phase AC power of 50 Hz. That is, in this power converter, a total of ten converter circuits K1 to K10 having the same performance are connected in parallel, and a total of ten inverter circuits M1 to M10 having the same performance are connected in parallel to thereby convert the power conversion capacity. Is improved to about 300 MW, for example.

  Focusing on one converter circuit K1 or inverter circuit M1, the converter circuit K1 and the inverter circuit M1 have switch arms corresponding to each phase of the three-phase alternating current, that is, a total of six switch arms as shown in the figure. Each switch arm is configured by connecting a total of 100 IGBTs in series. Each IGBT corresponds to the above-described power switching circuit, and is set so that the peak voltage and settling time of the overshoot in the collector-emitter voltage become a desired value.

  According to the power converter configured as described above, the peak voltage and settling time of the overshoot in the collector-emitter voltage of each IGBT is set to a desired value, so that the switching frequency can be increased. Therefore, accurate power conversion control can be realized.

In addition, this invention is not limited to the said embodiment, For example, the following modifications can be considered.
(1) In the above description, the case where an IGBT is used as the semiconductor switching element has been described. However, the present invention is not limited to the IGBT but can be applied to other semiconductor switching elements.

(2) In the above description, the correction voltage peak value Vhp corresponding to the collector current Ic and the main terminal voltage peak value Vp closest to the respective estimated values of the collector current Icn + 1 and the main terminal voltage peak value Vpn + 1 is operated. Although it was described that the correction voltage peak value Vhp is obtained by searching the state table and the correction voltage peak value Vhp is set to the next turn-off voltage Voffn + 1, the correction voltage peak value Vhp is searched only by the estimated value of the collector current Icn + 1. You may make it do.

(3) Moreover, the power switching circuit described above includes a power conversion device that converts the AC power described above into other AC power, a converter circuit that converts AC power into DC power, and an inverter circuit that converts DC power into AC power. In addition, the present invention can be applied to a chopper circuit that converts DC power to other DC power.

It is a circuit diagram which shows the structure of the power switching circuit concerning one Embodiment of this invention. It is a schematic diagram of the operation | movement state table in one Embodiment of this invention. It is a 1st waveform diagram which shows operation | movement of the power switching circuit concerning one Embodiment of this invention. It is a 2nd waveform diagram which shows operation | movement of the power switching circuit concerning one Embodiment of this invention. It is a wave form diagram which shows the operation | movement modification of the power switching circuit concerning one Embodiment of this invention. It is a circuit diagram which shows the structure of the power converter device using the power switching circuit concerning one Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Switching signal generation circuit, 2 ... E / O converter, 3 ... O / E converter, 4 ... Gate power supply (control drive means), 4a ... Operation state memory | storage part, 4b ... Gate signal generation part, 5 ... IGBT (Semiconductor switching element for electric power), 6 ... resistance voltage divider, 7 ... current detector, R1 to R3 ... resistor, D1 ... diode

Claims (11)

A power semiconductor switching element for switching power applied to a pair of main terminals by repeating turn-on and turn-on, a turn-on voltage for turning on the power semiconductor switching element, a turn-off voltage for turning off, and the turn-off voltage And a drive signal including a correction voltage generated based on the inter-terminal voltage (main-terminal voltage) of the main terminal is generated, and the power semiconductor switching element is switched and driven by the turn-on voltage and the turn-off voltage. And a control driving means for reducing overshoot of the voltage between the main terminals at the time of turn-off by adding the correction voltage to the turn-off voltage,
The control driving means includes
An operation state storage unit that sequentially stores operation state data indicating the operation state of the power semiconductor switching element at the time of turn-off as time-series data;
The operation state of the power semiconductor switching element at the next turn-off is predicted based on the operation state data stored in advance in the operation state storage unit, and the next turn-off is performed so that the overshoot is reduced based on the prediction result. A power switching circuit comprising: a drive signal generation unit that sets a voltage. The operation state storage unit sequentially stores operation state data consisting of a main terminal current flowing through the main terminal at the time of turn-off and a peak value of the correction voltage immediately after the turn-off as time series data,
The drive signal generation unit estimates the main terminal current when the power semiconductor switching element is next turned off based on the time series data, and searches the time series data for the peak value of the correction voltage that matches the estimated value. 2. The power switching circuit according to claim 1, wherein the power switching circuit is set to a next turn-off voltage.   3. The power switching circuit according to claim 1, wherein the semiconductor switching element is an IGBT (Insulated Gate Bipolar Transistor).   A power converter comprising: one or more of the power switching circuits according to any one of claims 1 to 3 connected in series to form one switch arm, and a combination of the plurality of switch arms.   5. The power converter according to claim 4, wherein the power converter is an inverter circuit that converts DC power into AC power.   The power converter according to claim 4, wherein the power converter is a converter circuit that converts AC power into DC power.   5. The power converter according to claim 4, wherein the power converter is a chopper circuit that converts DC power into another DC power.   The power conversion device according to claim 4, wherein the power conversion device is an AC conversion circuit configured by a converter circuit and an inverter circuit and converting AC power into other AC power. A power semiconductor switching element in which power is applied to a pair of main terminals is switched using a turn-on voltage for turning on and a turn-off voltage for turning off, and the voltage between the main terminals (between the main terminals) And a correction voltage generated based on the voltage) is added to the turn-off voltage to reduce the overshoot of the voltage between the main terminals at the time of turn-off,
The operation state data indicating the operation state of the power semiconductor switching element at the time of turn-off is sequentially stored as time series data,
Predicting the operating state of the power semiconductor switching element at the next turn-off based on the pre-stored operating state data, and setting the next turn-off voltage so as to reduce the overshoot based on the prediction result. A method for driving a power semiconductor switching element. The operating state data are the main terminal current flowing through the main terminal at the time of turn-off and the peak value of the correction voltage immediately after the turn-off,
Based on the stored main terminal current, the main terminal current when the power semiconductor switching element is next turned off is estimated, and the peak value of the correction voltage corresponding to the estimated value is searched from the time series data, and the next The method for driving a power semiconductor switching element according to claim 9, wherein the turn-off voltage is set. 11. The method for driving a power semiconductor switching element according to claim 9, wherein the semiconductor switching element is an IGBT (Insulated Gate Bipolar Transistor).

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