JP2005340640A - Al base alloy wiring forming method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for forming wiring for a reliable semiconductor device which stably exhibits high quality such as low electric resistance and excellent denseness and adhesion to an insulating film. <P>SOLUTION: Wiring of a semiconductor device is formed by forming a thin film 5 of Al or Al alloy (hereinafter, Al base metal) by sputtering on the surface of an insulating film 2 comprising a recess 3 formed on a substrate, and then applying high-temperature and high-pressure process so that the Al base metal is packed in the recess. The above sputtering is performed under conditions of 0.5-1.1 mTorr sputtering gas pressure, 3-15 W/cm<SP>2</SP>discharge power density, and 100-300°C substrate temperature. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for forming an Al-based alloy wiring of a semiconductor device. In particular, an Al-based alloy is embedded in a recess such as a via or a trench formed in an insulating film by a high-pressure reflow method, for example, ULSI (ultra-large scale). The present invention relates to a method for forming an Al-based alloy wiring such as a Si semiconductor device represented by an integrated circuit).

  In recent years, design rules have been steadily reduced to meet the demands for higher integration of LSIs (Large Scale Integrated Circuits) and high-speed signal propagation, and the reduction of wiring pitch, wiring width, and distance between wirings is increasingly accelerated. Has been. These are mainly aimed at increasing the speed of devices, but in recent years, attempts to use low-resistance wiring materials have become active as a technique for increasing the speed. That is, Cu-based wiring is formed using a Cu-based material as a wiring material capable of reducing electric resistance as compared with a conventional Al-based wiring material.

  In order to realize high integration and high performance, the Cu-based wiring is made to have a multilayer structure, and damascene wiring technology is used as means for realizing the multilayer structure (for example, Patent Document 1). In this method, an insulating film such as silicon oxide or silicon nitride is formed on a semiconductor substrate according to a conventional method, and a wiring groove such as a trench for a buried wiring or a via hole or an interlayer connection hole is formed in the insulating film. A film is formed while embedding a wiring material such as Cu inside the substrate, and polishing is performed by a chemical mechanical polishing (CMP) method to remove unnecessary wiring material deposited on portions other than the wiring groove. In this method, the wiring material is left only inside and used as wiring. The wiring grooves and interlayer connection holes in this multilayer wiring have an increased aspect ratio (ratio of depth / hole diameter) as the degree of integration increases.

  When forming Cu-based wiring by the above-mentioned damascene wiring technology, at present, Cu-based metal is formed by embedding a Cu-based metal in a previously formed via trench by electrolytic plating, but LSI wiring is miniaturized according to the road map. The electrolytic plating method makes it difficult to embed. In particular, when the wiring rule is 0.1 μm or less, the size of the via / trench is reduced and the aspect ratio is increased, so that it is difficult to completely bury the Cu-based material.

  For Cu-based wiring, in addition to the above-mentioned complete embedding, low electrical resistivity (ρ ≦ 3.0 μΩcm), connection reliability (reliable contact formation), wiring reliability (resistance to disconnection due to stress migration [SM resistance] And resistance to disconnection due to electromigration [EM resistance] is required, but the current damascene wiring technology using the electrolytic plating method forms a Cu-based wiring having the same characteristics as those of a bulk Cu material. Therefore, it is difficult to realize a Cu-based wiring satisfying all these characteristics.

  Further, in Cu-based wiring, the free electron mean free path (λ) at 0 ° C. is 421 mm, which is larger than that in the case of Al-based wiring (300 mm). When the influence of electron scattering due to electron collision at the interface / side surface becomes large and the wiring rule becomes fine wiring of 0.1 μm or less, the electrical resistivity of the Cu-based wiring exceeds the electrical resistivity of the Al-based wiring (electricity There is a concern that a resistivity reversal phenomenon) occurs.

  For these reasons, the use of Cu-based wiring is now widespread in semiconductor devices, but if the wiring rules are further reduced in the future, wiring that exhibits good characteristics will be realized when Cu-based materials are used. Since it is difficult to do so, it is considered that there is a possibility that the Al-based wiring is used again mainly on the local wiring.

  Many multi-layer wiring structures using Al-based wiring are also used in current LSIs, but there are few examples of forming the Al-based wiring using the damascene wiring technology. In particular, as a ULSI (silicon semiconductor device) wiring, a method of forming an Al-based wiring by a damascene wiring technique has not been put into practical use yet, and there are research examples. According to this research example, it has been reported that in order to embed an Al thin film in a via trench (wiring connection hole / wiring groove), a high temperature and high pressure condition of temperature: 400 ° C. or higher and pressure: 60 MPa or higher may be used. (For example, Non-Patent Document 1, Non-Patent Document 2, Non-Patent Document 3). However, if the via size is less than 0.2 μm in diameter, it may be difficult to completely embed.

  Al-based multilayer wiring formed so far is made of Al alloy (Al-1.0% Si-0.5% Cu alloy, Al-0.5% Cu alloy) as field wiring by sputtering method, and via (interlayer connection) A film in which a W (tungsten) film is formed in the hole) by a CVD method has been proposed.

The reason why the W film is formed in the via by the above technique is that the CVD method can be employed to selectively form the W film in the via portion. However, the following problems remain in such a wiring structure.
(A) Since the high specific resistance W is used for the via, the effective electrical resistivity of the wiring increases.
(B) Contact resistance is generated at the connection portion (interface between Al and W) between the field wiring (Al) and W filled in the via, and the effective electrical resistivity of the wiring increases.
(C) WF ₆ which is a film forming raw material gas for the W film is expensive.

  In the above technique, it is necessary to form a film with an Al alloy and a W film, and the increase in the number of processes and the complexity of the processes cause a decrease in throughput and an increase in cost.

  As a method for solving such a problem, in the production of a multilayer wiring structure using Al-based wiring, field wiring and vias (interlayer connection holes) are made of Al or Al alloy (hereinafter referred to as “Al”) using damascene wiring technology. If it is formed at the same time with a single type of metal), the effective electrical resistivity of the wiring can be reduced, and the number of processes can be reduced compared to the conventional method described above, and the cost can be reduced. . That is, a semiconductor device that exhibits high characteristics such as high integration and high speed can be realized at low cost.

  However, when forming an Al alloy wiring by using the damascene wiring technology, it cannot be formed by the electrolytic plating method like the Cu wiring described above. As a forming method, after sputtering the Al alloy wiring material at a high temperature, It is considered effective to perform a high-temperature and high-pressure reflow method (for example, Patent Document 2 and Patent Document 3).

In this method, as shown in FIG. 1A, the recesses are bridged on the surface of the insulating film 1 formed in advance such as vias (wiring connection holes) 3 and trenches (wiring grooves) 6. After forming a thin film made of an Al-based metal by sputtering, as shown in FIG. 1 (b), it is pressurized perpendicularly and isotropically to the surface of the thin film (for example, normal pressure as described in Patent Document 4). And pressurizing with a hydrostatic pressure exceeding the pressure) and pushing the Al alloy into the recess. However, this method still has the following problems. That is, if the formed Al alloy thin film is not continuous and airtight, even if the high temperature and high pressure reflow method is carried out, it will not be pushed in sufficiently, and if the Al-based metal thin film is deformed and fractured, it will not be embedded further. There is a problem. Furthermore, in order to improve the high-temperature reflow property (high-temperature fluidity) of Al-based metal and to embed the metal by plastic deformation, it is necessary to be in a high temperature and high pressure state. In order to completely embed, it is necessary to set a higher temperature and pressure state, but at present, such a temperature and pressure cannot be realized.
Japanese Patent Laid-Open No. 10-79428 JP-A-10-116898 JP-A-9-36230 Japanese Patent Laid-Open No. 5-21238 GADixit et al. IEDM'94 Technical Digest (1994) p.105-108 PJHoluerson et al. Proceedings 1995 VMIC Conference Asian Session (1995) p.537-543 GADixit et al. Semiconductor International August 1995 (1995) p.79

  The present invention has been made paying attention to the above-described circumstances, and the purpose thereof is to fill an indentation such as a hole or a groove with an Al-based metal without gaps in the manufacture of a semiconductor manufacturing apparatus, so that the electrical resistivity is reduced. An object of the present invention is to provide a method for easily realizing an Al-based metal wiring that is low and has excellent film density and adhesion to an insulating film.

The method of forming a wiring of a semiconductor device according to the present invention that has solved the above-mentioned problem is that an Al-based metal (Al or Al alloy) is formed on the surface of an insulating film having a recess (hole or groove) formed on a substrate. After forming a thin film comprising a sputtering method, a method of forming a wiring of a semiconductor device by performing high-temperature and high-pressure treatment to fill the recess with the Al-based metal, where the sputtering is performed under the following conditions: Has characteristics.
Sputtering gas pressure: 0.5 to 1.1 mTorr
Discharge power density: 3 to 15 W / cm ²
Substrate temperature: 100-300 ° C

The sputtering is preferably performed by controlling the above conditions within the following range, since the Al-based metal can be more reliably embedded in the recess.
Sputtering gas pressure: 0.5 to 1.0 mTorr
Discharge power density: 5-10 W / cm ²
Substrate temperature: 100-200 ° C

In addition, it is preferable to perform the high-temperature and high-pressure treatment under the following conditions because the Al-based metal can be reliably embedded in the recess.
Processing temperature (atmosphere temperature): 400-600 ° C
Processing pressure: 100-150 MPa
Processing time: 15 minutes or more

  According to the present invention, in the manufacture of a semiconductor device (for example, a Si semiconductor device), a recess such as a wiring connection hole or a connection groove is filled with an Al-based metal without a gap so that the electrical resistivity is low, the film is dense, An embedded Al metal wiring having excellent adhesion to the insulating film can be easily realized, and can contribute to the promotion of higher integration and higher performance of integrated circuits.

  In order to solve the above problems, the present inventors formed a thin film made of an Al-based metal on the surface of an insulating film having a recess such as a hole or a groove formed on a substrate by sputtering, and then performed high-temperature and high-pressure treatment. In the method of forming the wiring of the semiconductor device by filling the Al-based metal in the recess, the Al-based that stably exhibits excellent characteristics by embedding the thin film in the recess formed in the insulating film without any gap. As a result of diligent research on a method for easily realizing metal wiring, it was found that it is effective to control the sputtering conditions, and the present invention has been conceived.

  That is, there are various conditions such as voltage, gas flow rate, pressure, and substrate temperature for forming a thin film made of an Al-based metal by sputtering (film formation parameters). It has been found that the discharge power density and the substrate temperature may be controlled. The reason why each condition is specified will be described in detail below.

<Sputtering gas pressure: 0.5 to 1.1 mTorr>
If the sputtering gas pressure is too low, it is difficult to generate gas plasma, arc discharge becomes discontinuous, and it becomes difficult to obtain an Al-based metal film having a uniform film thickness. Therefore, the sputtering gas pressure needs to be 0.5 mTorr or more, preferably 0.8 mTorr or more. On the other hand, if the sputtering gas pressure is too high, the Al-based metal cannot be completely embedded in the recesses by a high-temperature and high-pressure process that is a subsequent process. Therefore, the sputtering gas pressure needs to be suppressed to 1.1 mTorr or less, preferably 1.0 mTorr or less.

  In the present invention, the type of the gas is not limited, but rare gases such as Ar, Kr, and Xe are preferably used.

<Discharge power density: 3 to 15 W / cm ² >
When the discharge power density is too low, the reflow property at the time of the high-temperature and high-pressure treatment is lowered, and the Al-based metal is not sufficiently embedded in the recess by the high-temperature and high-pressure treatment. Therefore, the discharge power density needs to be 3 W / cm ² or more. Preferably it is 5 W / cm ² or more. On the other hand, even if the discharge power density is too high, the reflow property at the time of the high-temperature and high-pressure treatment is lowered, and also in this case, the Al-based metal film is difficult to be embedded in the recess by the high-temperature and high-pressure treatment. Therefore, the discharge power density is suppressed to 15 W / cm ² or less. Preferably it is 10 W / cm ² or less.

<Substrate temperature: 100 to 300 ° C.>
If the substrate temperature is too low, the crystal grains of the Al thin film become finer and the yield stress increases, so that even if high-temperature and high-pressure treatment is performed thereafter, the Al-based metal cannot be sufficiently embedded in the recesses. Therefore, the substrate temperature is increased to 100 ° C. or higher. Preferably it is 150 degreeC or more. On the other hand, if the substrate temperature is raised too much, not only will the substrate be deformed, but it will be thermally damaged, and defects in the crystal grains will be reduced and the plastic deformability will be reduced. Can not be embedded sufficiently. Therefore, the substrate temperature should be suppressed to 300 ° C. or lower, and preferably 200 ° C. or lower.

  Other conditions in the sputtering are not particularly limited, and conditions in a general sputtering method can be employed. As the sputtering method, it is preferable to adopt the DC magnetron sputtering method because of high film forming efficiency.

  The thickness of the Al-based alloy film formed by sputtering is a matter determined by device design, and is not particularly limited. Further, the composition of the Al-based alloy film is not particularly limited, and an Al-based alloy having an arbitrary composition other than pure Al can be used for sputtering as long as it has appropriate conductivity.

  Also, there is no particular limitation on the method of forming an insulating film on the semiconductor substrate that is the base of the Al-based alloy film, and the method of forming a trench for embedded wiring or a connection hole in the insulating film, and a known method is adopted. Just do it. As the insulating film, silicon oxide, silicon nitride, BSG (Boro-Silicate Glass), PSG (Phospho-Silicate Glass), BPSG (Boro-Phospho-Silicate Glass), or the like can be used.

  Furthermore, a barrier layer can be formed on the insulating film in which the buried wiring trench or connection hole is formed as shown in FIG. As described above, the barrier layer is a film that prevents Al in the Al-based metal formed on the barrier layer from diffusing into the insulating film. As the film, a TaN film, a TiN film, or the like is formed. be able to. In the examples described later, tantalum nitride (TaN) is formed as the barrier layer. TaN is a ceramic, which is preferable because it hardly reacts with Al, and Al diffusion into the TaN film hardly occurs even when a high temperature treatment of, for example, about 700 ° C. is performed. A method for forming the barrier layer on the insulating film is not particularly limited, and examples thereof include a sputtering method (for example, a DC magnetron sputtering method) and a chemical vapor deposition method (CVD method).

  When the barrier layer is formed, the thickness of the barrier layer is not limited as long as Al can be prevented from diffusing into the insulating film, and can be, for example, about 5 to 50 nm. However, it is not preferable to excessively increase the thickness of the barrier layer because it is negative for downsizing of the semiconductor device.

  In the present invention, it is necessary to form a thin film made of an Al-based metal by a sputtering method that satisfies the above conditions, and then to perform a high-temperature and high-pressure treatment. However, other detailed processes are not specified. The lamination process including the steps C to C can be performed any number of times, and the high temperature and high pressure treatment can be performed after each C step or at least after the final C step.

A process: a process of forming an insulating film having a buried wiring trench or a connection hole on a semiconductor substrate.
B step: a step of forming a barrier layer on the insulating film.
C step: a step of forming an Al-based metal film on the barrier layer.

  In the present invention, by controlling the conditions of the high-temperature and high-pressure treatment in addition to the film-forming conditions at the time of sputtering, the Al-based metal film can be more reliably embedded in the wiring trench, and a high-quality semiconductor device wiring Can be realized. Hereinafter, conditions for the high-temperature and high-pressure treatment will be described in detail.

<Processing temperature: 400 to 600 ° C.>
If the processing temperature during the high-temperature and high-pressure processing is too low, the high-temperature fluidity of the Al-based metal film does not increase, and it is difficult to reliably embed the Al-based metal film inside the wiring trench. Therefore, it is desirable to increase the processing temperature during the high-temperature and high-pressure processing to 400 ° C. or higher, and more preferably 450 ° C. or higher. On the other hand, even if the processing temperature is too high, improvement in high-temperature fluidity cannot be expected beyond a certain level, and there is a possibility of causing characteristic deterioration or deformation of the insulating film. More preferably, it is 550 degrees C or less.

<Processing pressure: 100 to 150 MPa>
In order to increase the fluidity of the Al-based metal film and more reliably embed it in the wiring groove, it is effective to set the temperature to a high temperature and a high pressure as described above. I found out that I should do it. More preferably, it is 120 MPa or more. On the other hand, even if the treatment pressure is increased too much, the high temperature fluidity is not improved so much, and excessive high pressure treatment increases the cost, so it is suppressed to 150 MPa or less.

<Processing time: 15 minutes or more>
The high temperature and high pressure treatment time may be determined in consideration of the treatment pressure and the treatment temperature. However, in order to completely embed the Al-based metal film in the wiring trench, it is preferable to hold at least the high temperature and high pressure state for 15 minutes. This is because if the holding time at the temperature and pressure is too short, the processing may end without the Al-based metal film being sufficiently embedded in the wiring trench. More preferably, hold for 30 minutes or more. On the other hand, since the productivity of the semiconductor device is lowered even if the holding time in the high temperature / high pressure state is too long, the holding time is preferably suppressed to 120 minutes or less.

  The high-temperature and high-pressure treatment can be performed on the semiconductor substrate by performing the lamination process including the A step, the B step, and the C step any number of times, and after each C step or at least after the final C step. That is, when the lamination process is performed once to form a single layer, it is sufficient to perform high-temperature and high-pressure treatment under the above conditions after Step C. When the lamination process is performed twice or more to form a multilayer structure, After the C step, the high temperature and high pressure treatment may be performed under the above conditions, or after the lamination process including the A to C steps is repeated, the high temperature and high pressure treatment may be performed under the above conditions after the final C step.

  After the high-temperature and high-pressure treatment is performed in this way, a buried wiring is formed on the semiconductor substrate by polishing the surface. However, the detailed conditions and the like of the polishing method are not limited and generally A chemical mechanical polishing method or the like employed in the semiconductor manufacturing field can be employed.

  Hereinafter, the present invention will be described in more detail with reference to specific examples, but the present invention is not limited to the following examples as a matter of course, and modifications may be made within a range that can meet the gist of the preceding and following descriptions. Are all included in the technical scope of the present invention.

<Example 1>
Wiring formation in the semiconductor device was performed in the order of steps in the schematic cross-sectional explanatory diagram shown in FIG. That is, in practice, as schematically shown in FIG. 2A, an insulating film (TEOS film: SiOF film) 2 formed on a silicon wafer 1 having a diameter of 8 inches is provided with a diameter: 0.18 μm and a pitch: 450 nm. The evaluation element (TEG) provided with a large number of vias 3 (only one is shown in FIG. 2A) was used. A TaN thin film is formed on the surface of the TEG by reactive sputtering in a gas atmosphere using a pure Ta target in an (Ar + N ₂ ) gas atmosphere, and a barrier layer (TaN thin film) 4 having a thickness of 50 nm is formed on the bottom and side surfaces of the via 3. It formed [FIG.2 (b)].

Subsequently, an Al thin film (film thickness: 7500 mm) 5 is formed on the TEG by sputtering in a Ar gas atmosphere using a pure Al target, and the opening of the via 3 is formed in the Al thin film as shown in FIG. 5 for complete bridging. The Al thin film 5 was formed by changing the discharge power density and the substrate temperature to the following constant values and changing the Ar gas pressure in the range of 0.5 to 20 mTorr.
Discharge power density: 5 W / cm ²
Substrate temperature: 100 ° C

  Next, the high temperature and high pressure treatment was applied to the TEG in which the opening of the via 3 was bridged with the Al thin film 5 in this way. Specifically, using a high-temperature and high-pressure treatment apparatus “HiPA HIP mini-820” manufactured by Kobe Steel, the treatment pressure is 100 MPa, the treatment temperature is 500 ° C., and the treatment time is 15 minutes. High temperature and high pressure treatment was applied. Ar gas was used for pressurization.

  Thus, it was confirmed that Al was embedded in the via in the sample that had been subjected to the high-temperature and high-pressure treatment. On the other hand, in the case of a sample in which the TEG via opening was completely bridged with an Al thin film and not subjected to high-temperature and high-pressure treatment, it was confirmed by cross-sectional observation that Al was hardly embedded in the via. .

  Then, the TEG after the high-temperature and high-pressure treatment is cut with a dicing saw so that the cross-sections of 15 or more via portions are exposed, and the cut surface is processed to be smooth with an FIB apparatus. Observation was performed with a SIM image of the FIB apparatus, and the state of Al filling in the via portion was examined.

  In order to quantitatively evaluate the embedding characteristic, the cross-section SIM image of the via portion is subjected to image analysis, and the embedding rate (%) is obtained by calculating the ratio of the cross-sectional area in which Al is embedded to the cross-sectional area of the via. ) (Hereinafter, simply referred to as “Al filling rate”) was used as an evaluation index, and an average value of Al filling rates of 15 via portions was obtained.

  As a result of the experiment, FIG. 3 shows the relationship between the Al gas pressure (sputtering gas pressure) and the Al filling rate. From FIG. 3, the Al filling rate depends on the Ar gas pressure (sputtering gas pressure) at the time of sputtering, and Al is completely buried inside the via by forming the film at Ar gas pressure: 1.0 mTorr or less. I understand. When the Ar gas pressure was less than 0.5 mTorr, Ar plasma was not continuously generated and the glow discharge was easily interrupted, and the film formation could not be performed stably.

<Example 2>
After a 50 nm-thickness barrier layer (TaN thin film) is formed on the bottom and side surfaces of the TEG via 3 by the same method as described in Example 1, a pure Al thin film (thickness: 7500 mm) 5 is sputtered. The opening of the via 3 was completely bridged with the Al thin film 5. The Al thin film 5 was formed by changing the Ar gas pressure and the substrate temperature to the following constant values and changing the discharge power density in the range of 1 to 10 W / cm ² .
Ar gas pressure: 0.8 mTorr
Substrate temperature: 100 ° C

Next, this TEG was subjected to a high-temperature and high-pressure treatment in the same manner as in Example 1, and the Al filling rate in the via 3 was obtained. FIG. 4 shows the relationship between the discharge power density and the Al filling rate. From FIG. 4, the Al filling rate depends on the discharge power density at the time of film formation, and Al is almost completely buried in the via if the discharge power density is controlled in the range of ³ to 10 W / cm ^2. I understand.

<Example 3>
After a barrier layer (TaN thin film) 4 having a film thickness of 50 nm is formed on the bottom and side surfaces of the via 3 by the same method as described in the first embodiment, a pure Al thin film (film thickness: 7500 mm) 5 is sputtered. The opening of the via 3 was completely bridged with the Al thin film 5. The Al thin film 5 was formed by changing the Ar gas pressure and the discharge power density to the following constant values and changing the substrate temperature in the range of room temperature to 300 ° C.
Ar gas pressure: 0.8 mTorr
Discharge power density: 5 W / cm ²

  Next, this TEG was subjected to a high-temperature and high-pressure treatment in the same manner as in Example 1, and the Al filling rate in the via 3 was obtained. FIG. 5 shows the relationship between the substrate temperature and the Al burying rate when forming the Al thin film. As can be seen from FIG. 5, the Al filling rate depends on the substrate temperature at the time of film formation, and if the substrate temperature is controlled in the range of 100 to 300 ° C., Al is almost completely buried in the via.

<Example 4>
After a barrier layer (TaN thin film) 4 having a film thickness of 50 nm is formed on the bottom and side surfaces of the via 3 by the same method as described in the first embodiment, a pure Al thin film (film thickness: 7500 mm) 5 is sputtered. The opening of the via 3 was completely bridged with the Al thin film 5. The Al thin film 5 was formed with the Ar gas pressure, the discharge power density, and the substrate temperature fixed as follows.
Ar gas pressure: 0.8 mTorr
Discharge power density: 5 W / cm ²
Substrate temperature: 100 ° C

  Next, this TEG was subjected to high-temperature and high-pressure treatment under the following conditions. That is, high temperature and high pressure treatment was performed in the same manner as in Example 1 except that the temperature was changed in the range of room temperature to 500 ° C. and the pressure in the range of 0 to 200 MPa, and the Al embedding rate of the TEG after the treatment was determined. The results are shown in Table 1 [note that the numerical values in Table 1 indicate the Al embedding rate (%)].

  From Table 1 above, when the high temperature and high pressure treatment is performed on the Al thin film formed under the specified conditions of the present invention, the treatment condition is that the treatment temperature is 400 ° C. or more and the treatment pressure is 100 MPa or more. Al can be completely embedded in the via 3.

  In addition, as a comparative example, an experimental result in the case where the Al thin film is formed under unspecified conditions is shown below.

After a barrier layer (TaN thin film) 4 having a film thickness of 50 nm is formed on the bottom and side surfaces of the via 3 by the same method as described in the first embodiment, a pure Al thin film (film thickness: 7500 mm) 5 is sputtered. The opening of the via 3 was completely bridged with the Al thin film 5. The Al thin film 5 was formed at a constant Ar gas pressure, discharge power density, and substrate temperature as follows. In addition, the following film-forming conditions are conditions generally employed when forming an Al thin film by sputtering.
Ar gas pressure: 2.0 mTorr
Discharge power density: 2.5 W / cm ²
Substrate temperature: room temperature

  Next, the TEG on which the Al thin film was formed was subjected to high temperature and high pressure treatment under the following conditions. That is, high temperature and high pressure treatment was performed in the same manner as in Example 1 except that the temperature was changed in the range of room temperature to 500 ° C. and the pressure in the range of 0 to 200 MPa, and the Al embedding rate of the TEG after the treatment was determined. The results are shown in Table 2 [note that the numerical values in Table 2 indicate the Al embedding rate (%)].

  From Table 2, when the high temperature and high pressure treatment is applied to the Al thin film formed under the conditions other than specified, in order to completely embed Al, the processing temperature is 400 ° C. or higher and the processing pressure is 150 MPa or higher. It can be seen that the condition range during the high-temperature and high-pressure treatment is narrower than when the Al thin film is formed.

<Example 5>
After a barrier layer (TaN thin film) 4 having a film thickness of 50 nm is formed on the bottom and side surfaces of the via 3 in the same manner as in Example 4, a pure Al thin film (film thickness: 7500 mm) 5 is formed by sputtering. The opening of the via 3 was completely bridged with the pure Al thin film 5.

The pure Al thin film 5 was formed with the Ar gas pressure, the discharge power density, and the substrate temperature fixed as follows.
Ar gas pressure: 0.8 mTorr
Discharge power density: 5 W / cm ²
Substrate temperature: 100 ° C

  Next, the TEG on which the Al thin film was formed was subjected to high temperature and high pressure treatment under the following conditions. That is, high-temperature and high-pressure treatment was performed in the same manner as in Example 1 except that the treatment temperature was 500 ° C., the treatment pressure was 100 MPa, and the treatment time was changed in the range of 0 to 120 minutes. Squeeze rate. FIG. 6 shows the relationship between the processing time and the Al filling rate. From FIG. 6, it can be seen that when high-temperature and high-pressure treatment is performed using an Al thin film formed under the conditions satisfying the above-mentioned provisions of the present invention, Al is completely buried if the treatment time is 15 minutes or longer.

It is a conceptual diagram which shows the formation method of the wiring which concerns on this invention. It is a schematic cross-sectional explanatory drawing which shows an example of the manufacturing method of a semiconductor device in order of a process. 4 is a graph showing the relationship between Ar gas pressure and Al filling rate during film formation in Example 1. 6 is a graph showing the relationship between the discharge power density and the Al burying rate during film formation in Example 2. 6 is a graph showing the relationship between the substrate temperature during film formation and the Al filling rate in Example 3. It is a graph which shows the relationship between the process time at the time of the high temperature / high pressure process in Example 5, and Al embedding rate.

Explanation of symbols

1 Semiconductor substrate (silicon wafer)
2 Insulating film 3 Via 4 Barrier layer 5 Al metal film (pure Al thin film)
6 Trench

Claims (3)

A thin film made of Al or an Al alloy (hereinafter referred to as “Al-based metal”) is formed on the surface of the insulating film having a recess formed on the substrate by sputtering, and then subjected to a high-temperature and high-pressure treatment to form the Al-based metal. A method for forming a wiring of a semiconductor device by filling the recess, wherein the sputtering is performed under the following conditions.
Sputtering gas pressure: 0.5 to 1.1 mTorr
Discharge power density: 3 to 15 W / cm ²
Substrate temperature: 100-300 ° C The method for forming an Al-based alloy wiring of a semiconductor device according to claim 1, wherein the sputtering is performed under the following conditions.
Sputtering gas pressure: 0.5 to 1.0 mTorr
Discharge power density: 5-10 W / cm ²
Substrate temperature: 100-200 ° C The method for forming an Al-based alloy wiring of a semiconductor device according to claim 1 or 2, wherein the high-temperature and high-pressure treatment is performed under the following conditions.
Processing temperature: 400-600 ° C
Processing pressure: 100-150 MPa
Processing time: 15 minutes or more

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