JP2005340280A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device where an influence of a parasitic transistor is suppressed while the resistance of a gate insulating film is improved, and to provide a manufacturing method of the device. <P>SOLUTION: The semiconductor device is provided with a glass substrate 1, a semiconductor film which is formed on the glass substrate 1 through an SiN film 2 and an SiO<SB>2</SB>film 3, includes source and drain regions 4 and 5 and a channel region 6, and has an inclination part 16A at a peripheral edge, a gate electrode 10 formed on the semiconductor film through SiO<SB>2</SB>films 7 and 8 (gate insulating films), an interlayer insulating film 9 covering the SiO<SB>2</SB>film 8 and the gate electrode 10, plugs 11A and 12A installed to reach the source and drain regions 4 and 5 from above the interlayer insulating film 9, and source and drain electrodes 11 and 12 which are formed on the interlayer insulating film 9 and are connected to the source and drain regions 4 and 5 by the plugs 11A and 12A. The thickness of the gate insulating film on the inclination part 16A of the semiconductor film is larger than that of a gate insulating film on the center 16B of the semiconductor film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device such as a thin film transistor (TFT) used for a display device and a manufacturing method thereof.

  Conventionally, a thin film transistor formed using a semiconductor such as polycrystalline silicon is known.

For example, in Japanese Patent Laid-Open No. 2001-147446 (conventional example 1), a gate electrode formed on a polycrystalline silicon semiconductor layer formed on an insulating substrate via a gate insulating film, and formed on the insulating film. And a source / drain electrode connected to the polycrystalline silicon semiconductor layer through a contact hole formed in the insulating film, and the irregularities on the surface of the polycrystalline silicon semiconductor layer are A thin film transistor (liquid crystal display device) having a thickness of about 10% or less of the layer thickness is disclosed.
JP 2001-147446 A

  However, the semiconductor device as described above has the following problems.

  In Conventional Example 1, the idea of forming an insulating film layer (such as a gate insulating film) formed on a polycrystalline silicon semiconductor layer (hereinafter referred to as a semiconductor layer) in a stacked structure is not disclosed.

  Therefore, when the insulating film is formed so as to cover the semiconductor layer, the coverage of the insulating film layer is not sufficient in the vicinity of the stepped portion (inclined portion) where the peripheral portion of the semiconductor layer and the insulating substrate (underlying layer) are in contact with each other. As a result, the breakdown voltage may decrease.

  On the other hand, it can be considered that the angle (inclination angle) formed between the side surface and the bottom surface of the semiconductor layer is reduced to prevent the insulating film layer on the inclined portion from being thinned, but this inclination angle is too small. As a result, the influence of the parasitic transistor formed on both sides of the effective portion of the transistor becomes large, and there may be a problem that, for example, leakage current increases or improvement in accuracy of threshold voltage control is suppressed.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device in which the influence of a parasitic transistor is suppressed while improving the resistance of a gate insulating film, and a manufacturing method thereof. It is in.

  A semiconductor device according to the present invention includes an insulating substrate, a semiconductor film that is formed on the insulating substrate, includes a channel region and source / drain regions, and has an inclined portion at a peripheral portion thereof, and an insulating film on the semiconductor film via the insulating film. The thickness of the insulating film on the inclined portion is larger than the thickness of the insulating film on the central portion of the semiconductor film.

  A method of manufacturing a semiconductor device according to the present invention includes a step of forming a semiconductor layer on an insulating substrate, a step of crystallizing the semiconductor layer by irradiating the semiconductor film with a laser, and patterning the semiconductor layer to form the semiconductor film. Forming a first insulating film by oxidizing the surface of the semiconductor film, forming a second insulating film so as to cover the first insulating film, and a gate electrode on the second insulating film And a step of forming source / drain regions on both sides of the gate electrode in the semiconductor film.

  According to the present invention, in a semiconductor device such as a thin film transistor, the influence of a parasitic transistor can be suppressed while improving the resistance of a gate insulating film.

  Embodiments of a semiconductor device and a manufacturing method thereof according to the present invention will be described below with reference to FIGS.

(Embodiment 1)
FIG. 1 is a cross-sectional view showing the semiconductor device according to the first embodiment. Moreover, FIG. 2 is the II-II cross section in FIG.

The semiconductor device according to the present embodiment is a thin film transistor (TFT) used for a display device or the like, and includes a glass substrate 1 (insulating substrate) and a SiN film 2 as shown in FIGS. And a semiconductor film formed on glass substrate 1 via SiO ₂ film 3 (underlying film), including source / drain regions 4, 5 and channel region 6, and having inclined portion 16A at the peripheral edge thereof, and semiconductor film Gate electrode 10 formed thereon via SiO ₂ films 7 and 8, interlayer insulating film 9 so as to cover SiO ₂ film 8 and gate electrode 10, and source / drain regions 4 and 5 from above interlayer insulating film 9 Plugs 11A, 12A provided so as to reach the source and drain insulating layers 9 formed on the interlayer insulating film 9 and connected to the source / drain regions 4, 5 by the plugs 11A, 12A / And a drain electrode 11. Here, the SiO ₂ films 7 and 8 function as a gate insulating film.

As the glass substrate 1, for example, 1737 glass manufactured by Corning is used. The SiN film 2 and the SiO ₂ film 3 as base films are provided in order to suppress diffusion of impurities in the glass substrate 1 into the semiconductor film. The material constituting the base film is not limited to SiN and SiO ₂ , and other materials such as SiON, SiC, AlN, Al ₂ O ₃ are applicable. In addition, the base film may have a single-layer structure or a stacked structure of three or more layers. Furthermore, it is possible to provide a semiconductor film directly on the glass substrate 1 without providing a base film.

  The semiconductor film including the source / drain regions 4 and 5 and the channel region 6 is formed of, for example, polycrystalline silicon. The thickness (t) of the semiconductor film in FIGS. 1 and 2 is about 25 nm to 200 nm. By setting the thickness of the semiconductor film (polycrystalline silicon) within the above range, the occurrence of leakage in the vicinity of the inclined portion 16A can be suppressed without inhibiting crystallization.

1 and 2, the thickness of the gate insulating film on the inclined portion 16A of the semiconductor film (the total thickness of the SiO ₂ films 7 and 8) is the thickness of the gate insulating film on the central portion 16B of the semiconductor film. Greater than.

  By the way, in the conventional thin film transistor, the coverage of the gate insulating film formed on the inclined portion in the peripheral portion of the semiconductor film is not good, and the source / drain regions 4 and 5 (semiconductor film) and the gate electrode 10 are formed in this portion. There may be a leak between the two. Here, if the inclination angle of the inclined portion is made gentle in order to improve the coverage of the gate insulating film, the influence of the parasitic transistor formed outside the source / drain region (opposite the channel region) becomes large.

  In contrast, in the semiconductor device according to the present embodiment, the above-described leakage occurs in the portion by forming a relatively thick gate insulating film on the inclined portion in the peripheral portion of the semiconductor film. Can be suppressed.

  Next, a method for manufacturing the semiconductor device shown in FIGS. 1 and 2 will be described.

  3 to 6 are sectional views showing first to fourth steps in the manufacturing process of the semiconductor device shown in FIGS. 3 to 6 show cross sections in the same direction as the cross section shown in FIG.

Referring to FIG. 3, SiN film 2 (100 nm) and SiO ₂ film 3 (100 nm) are deposited on glass substrate 1.

Thereafter, an amorphous silicon film is provided on the SiO ₂ film 3. Next, the amorphous silicon film is heat-treated in vacuum to remove unnecessary hydrogen. Further, the amorphous silicon film is irradiated with an excimer laser, and the amorphous silicon film is polycrystallized.

  A resist mask is formed on the polycrystallized silicon film by photolithography. Next, by performing dry etching, the polycrystalline silicon film is patterned, and an island-shaped polycrystalline silicon film 16 is formed. In FIG. 3, the angle (θ1) formed between the side surface and the bottom surface of the polycrystalline silicon film 16 is about 20 degrees.

  An excimer laser used for crystallizing an amorphous silicon film is easily absorbed in the vicinity of the surface portion of the silicon film. Therefore, by performing crystallization of the above-described silicon film using an excimer laser, in the polycrystalline silicon film 16, the first portion 16D and the region on the first portion 16D and surrounded by the inclined portion 16C are first. A second portion 16E having higher crystallinity than the portion 16D is formed.

  The method of forming the first and second portions 16D and 16E described above is not limited to the above method. For example, the silicon film is multi-layered, and the lower silicon film is made relatively amorphous (crystals). The same structure can also be realized by relatively polycrystallizing (higher crystallinity) the upper silicon film. In this case, a YAG (Yttrium-Aluminum-Garnet) laser or the like can be used instead of the excimer laser.

Next, the resist mask is removed by ashing and chemical treatment, high-pressure steam annealing is performed on the polycrystalline silicon film 16, and the surface of the polycrystalline silicon film 16 including the inclined portion 16C is oxidized, as shown in FIG. A SiO ₂ film 7 is formed. The shape of the polycrystalline silicon film 16 shown in FIG. 4 corresponds to the shape of the source / drain regions 4 and 5 and the channel region 6 in FIG.

Here, in the inclined portion 16C including the first portion 16D having relatively low crystallinity, the oxidation rate is compared with the central portion of the polycrystalline silicon film 16 including the second portion 16E having relatively high crystallinity. Is relatively large. Therefore, as shown in FIG. 4, the thickness of the SiO ₂ film 7 formed by oxidizing the polycrystalline silicon film 16 is relatively larger on the inclined portion 16A than on the central portion 16B. Become. Further, the angle (θ2 = 60 degrees) formed between the bottom surface and the side surface of the polycrystalline silicon film 16 in FIG. 4 is larger than the angle (θ1 = 20 degrees) in FIG. The angle (θ2) is preferably not less than 40 degrees and not more than 90 degrees, and the width (B) of the inclined portion 16A is preferably not more than the thickness (t) of the polycrystalline silicon film 16. Thereby, the influence of the parasitic transistor formed outside the source / drain regions 4 and 5 (see FIG. 1) can be reduced.

  As a method for oxidizing the surface of the polycrystalline silicon film 16, in addition to the above high-pressure steam annealing, oxidation treatment by UV irradiation, oxygen plasma treatment, oxidation treatment by high-pressure oxygen, oxidation by an oxidizing liquid such as sulfuric acid. Treatment, oxidation treatment using a solution in which ozone gas is dissolved, and the like are applicable.

Referring to FIG. 5, SiO ₂ film 8 is formed on SiO ₂ film 7 by plasma CVD. For example, TEOS (Tetra Ethyl Ortho Silicate) and O ₂ are used as raw materials for the plasma CVD method, but SiH ₄ or Si ₂ H ₆ may also be used as raw materials.

Next, a conductive film containing, for example, chromium is deposited on the SiO ₂ film 8. Thereafter, the conductive film is patterned by photolithography, and the gate electrode 10 and the gate wiring are formed as shown in FIG. Impurity ions are implanted using gate electrode 10 as a mask, and source / drain regions 4 and 5 are formed on both sides of gate electrode 10. A channel region 6 is formed between the source / drain regions 4 and 5. Here, when forming a complementary metal oxide semiconductor (CMOS) having an NMOS (N-Channel MOS) and a PMOS (P-Channel MOS), the portions to be N-type / P-type MOS are alternately covered with a mask material. However, ion implantation is repeated.

Next, an interlayer insulating film 9 is formed on the SiO ₂ film 8, and plugs 11A and 12A are provided so as to reach the source / drain regions 4 and 5 from the interlayer insulating film 9. Further, source / drain electrodes 11 and 12 are formed on the interlayer insulating film 9. Source / drain electrodes 11 and 12 are connected to source / drain regions 4 and 5 through plugs 11A and 12A, respectively. Through the above steps, the thin film transistor shown in FIGS. 1 and 2 is obtained.

  The manufacturing method of the above-described thin film transistor (semiconductor device) is summarized as follows.

In the method for manufacturing a semiconductor device according to the present embodiment, an amorphous silicon film (semiconductor layer) is formed on a glass substrate 1 (insulating substrate), and a laser (for example, excimer laser) is irradiated on the silicon film. Then, the step of crystallizing the silicon film, the step of patterning the crystallized silicon film to form the polycrystalline silicon film 16 (semiconductor film) (FIG. 3 above), the surface of the polycrystalline silicon film 16 The step of forming the SiO ₂ film 7 (first insulating film) by oxidizing (FIG. 4) and the step of forming the SiO ₂ film 8 (second insulating film) so as to cover the SiO ₂ film 7 (FIG. 5). And a step of forming gate electrode 10 on SiO ₂ film 8 and a step of forming source / drain regions 4 and 5 on both sides of gate electrode 10 in polycrystalline silicon film 16 (FIG. 6).

  In the present embodiment, a thin film transistor (semiconductor device) in which the influence of the parasitic transistor is suppressed while the resistance of the gate insulating film is improved is obtained with the above-described configuration.

(Embodiment 2)
FIG. 7 is a cross-sectional view showing the semiconductor device according to the second embodiment. Moreover, FIG. 8 is a VIII-VIII cross section in FIG.

The semiconductor device according to the present embodiment is a modification of the semiconductor device according to the first embodiment. As shown in FIGS. 7 and 8, source / drain regions 4 and 5, channel region 6, and gate electrode 10. The insulating film located between the first and second insulating films 13 and 14 on the inclined portion 16A, and the second insulating film 14 only on the central portion 16B of the semiconductor film. It is characterized by Here, the first and second insulating films 13 and 14 are, for example, SiO ₂ films formed by a plasma CVD method. The first and second insulating films 13 and 14 function as gate insulating films in the thin film transistors shown in FIGS.

7 and 8, also in the present embodiment, the thickness of the gate insulating film on the inclined portion 16A (the total thickness of the SiO ₂ films 7 and 8) is the same as in the first embodiment. It is larger than the thickness of the gate insulating film (the thickness of the SiO ₂ film 7) on the central portion 16B of the film.

  Next, a method for manufacturing the semiconductor device shown in FIGS. 7 and 8 will be described.

  9 to 15 are cross-sectional views showing first to seventh steps in the manufacturing process of the semiconductor device shown in FIGS. 9 to 15 show cross sections in the same direction as the cross section shown in FIG. FIG. 15 shows a state corresponding to FIG.

Referring to FIG. 9, island-shaped polycrystalline silicon film 16 is formed on glass substrate 1 with SiN film 2 (100 nm) and SiO ₂ film 3 (100 nm) interposed therebetween.

Next, as shown in FIG. 10, an insulating film layer 13A is formed so as to cover the polycrystalline silicon film 16 from the SiO ₂ film 3. Thereafter, as shown in FIG. 11, a patterned resist mask 15 is formed on the insulating film layer 13A. The resist mask 15 covers a region on the central portion 16B side by at least 2 μm from the boundary between the inclined portion 16A and the flat portion of the semiconductor film. Further, as shown in FIG. 12, the insulating film layer 13 </ b> A is patterned to form the first insulating film 13. Then, as shown in FIG. 13, the second insulating film 14 is formed on the first insulating film 13.

  Next, a conductive film is deposited on the second insulating film 14, and the gate electrode 10 and the gate wiring are formed as shown in FIG. Then, source / drain regions 4 and 5 are formed on both sides of the gate electrode 10. A channel region 6 is formed between the source / drain regions 4 and 5.

  Next, an interlayer insulating film 9 is formed on the second insulating film 14, and plugs 11A and 12A are provided so as to reach the source / drain regions 4 and 5 from the interlayer insulating film 9. Further, source / drain electrodes 11 and 12 are formed on the interlayer insulating film 9. Source / drain electrodes 11 and 12 are connected to source / drain regions 4 and 5 through plugs 11A and 12A, respectively. Thereby, the thin film transistor shown in FIG. 15 (FIG. 7) is obtained.

  The manufacturing method of the above-described thin film transistor (semiconductor device) is summarized as follows.

  In the method for manufacturing a semiconductor device according to the present embodiment, an amorphous silicon film (semiconductor layer) is formed on a glass substrate 1 (insulating substrate), and the silicon film is irradiated with a laser. , A step of patterning the crystallized silicon film to form the polycrystalline silicon film 16 (see FIG. 9), and a first insulating film 13 on the periphery of the polycrystalline silicon film 16. Step of forming (FIGS. 10 to 12) and step of forming the second insulating film 14 so as to cover the first insulating film 13 and the polycrystalline silicon film 16 not covered by the first insulating film (see FIG. 13), a step of forming gate electrode 10 on second insulating film 14, and a step of forming source / drain regions 4 and 5 on both sides of gate electrode 10 in polycrystalline silicon film 16 (FIG. 14). Prepare.

  Also in this embodiment, with the above-described configuration, a thin film transistor (semiconductor device) in which the influence of the parasitic transistor is suppressed while the resistance of the gate insulating film is improved is obtained as in the first embodiment.

  In the present embodiment, detailed description of the same matters as in the first embodiment described above will not be repeated.

  Although the embodiments of the present invention have been described above, it is planned from the beginning to appropriately combine the characteristic portions of the above-described embodiments. Moreover, it should be thought that embodiment disclosed this time is an illustration and restrictive at no points. The scope of the present invention is defined by the terms of the claims, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention. It is II-II sectional drawing in FIG. It is the figure which showed the 1st process in the manufacturing process of the semiconductor device which concerns on Embodiment 1 of this invention. It is the figure which showed the 2nd process in the manufacturing process of the semiconductor device which concerns on Embodiment 1 of this invention. It is the figure which showed the 3rd process in the manufacturing process of the semiconductor device which concerns on Embodiment 1 of this invention. It is the figure which showed the 4th process in the manufacturing process of the semiconductor device which concerns on Embodiment 1 of this invention. It is sectional drawing which showed the semiconductor device which concerns on Embodiment 2 of this invention. It is VIII-VIII sectional drawing in FIG. It is the figure which showed the 1st process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention. It is the figure which showed the 2nd process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention. It is the figure which showed the 3rd process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention. It is the figure which showed the 4th process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention. It is the figure which showed the 5th process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention. It is the figure which showed the 6th process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention. It is the figure which showed the 7th process in the manufacturing process of the semiconductor device which concerns on Embodiment 2 of this invention.

Explanation of symbols

1 glass substrate, 2 SiN layer, 3 SiO ₂ layer, 4,5 source / drain region, 6 channel forming region, 7,8 SiO ₂ layer, 9 interlayer insulating film, 10 gate electrode, 11,12 source / drain electrode, 11A, 12A plug, 13 first insulating film, 13A insulating film layer, 14 second insulating film, 15 resist mask, 16 polycrystalline silicon film, 16A, 16C inclined portion, 16B central portion, 16D first portion, 16E second portion.

Claims (12)

An insulating substrate;
A semiconductor film formed on the insulating substrate, including a channel region and source / drain regions, and having an inclined portion at a peripheral portion thereof;
A gate electrode formed on the semiconductor film via an insulating film,
A semiconductor device in which the thickness of the insulating film on the inclined portion is larger than the thickness of the insulating film on the central portion of the semiconductor film. An insulating substrate;
A semiconductor film formed on the insulating substrate, including a channel region and source / drain regions, and having an inclined portion at a peripheral portion thereof;
A gate electrode formed on the semiconductor film via an insulating film,
The semiconductor device has a stacked structure including first and second insulating films on the inclined portion, and the semiconductor device includes the second insulating film on the central portion of the semiconductor film.   The semiconductor device according to claim 1, wherein an angle formed between a bottom surface and a side surface of the semiconductor film is 40 degrees or greater and 90 degrees or less.   The semiconductor device according to claim 1, wherein a thickness of the semiconductor film is 25 nm or more and 200 nm or less.   The semiconductor device according to claim 1, wherein a width of the inclined portion is equal to or less than a thickness of the semiconductor film.   The semiconductor device according to claim 1, wherein the semiconductor film is formed of polycrystalline silicon.   The semiconductor film includes a first portion and a second portion having a higher crystallinity than the first portion in a region on the first portion and surrounded by the inclined portion. The semiconductor device according to any one of the above.   2. The semiconductor film includes a first portion and a second portion having a crystal structure in which an oxidation rate is lower than that of the first portion in a region on the first portion and surrounded by the inclined portion. The semiconductor device according to claim 6.   The semiconductor device according to claim 1, wherein the semiconductor film is formed on the insulating substrate through an insulating base film. Forming a semiconductor layer on an insulating substrate;
Irradiating the semiconductor film with a laser to crystallize the semiconductor layer;
Forming a semiconductor film by patterning the semiconductor layer;
Forming a first insulating film by oxidizing the surface of the semiconductor film;
Forming a second insulating film so as to cover the first insulating film;
Forming a gate electrode on the second insulating film;
Forming a source / drain region on both sides of the gate electrode in the semiconductor film.   The method for manufacturing a semiconductor device according to claim 10, wherein the semiconductor layer is crystallized using an excimer laser. Forming a semiconductor layer on an insulating substrate;
Irradiating the semiconductor film with a laser to crystallize the semiconductor layer;
Forming a semiconductor film by patterning the semiconductor layer;
Forming a first insulating film on the periphery of the semiconductor film;
Forming a second insulating film so as to cover the first insulating film and the semiconductor film not covered by the first insulating film;
Forming a gate electrode on the second insulating film;
Forming a source / drain region on both sides of the gate electrode in the semiconductor film.

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