JP2005333614A - Data processor, decoder, wireless device, data processing method and data processing program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data processor which is capable of reducing memories in storage capacity, reducing its power consumption, and furthermore increasing its processing in throughput as a whole, and to provide a wireless device, a decoder, a data processing method and a data processing program. <P>SOLUTION: The data processor 500 is equipped with a transposition pattern storage 530, an address generating part 540, and a control 560. Address values are generated in the address generating part 540, resting on transposition patterns stored in the transposition pattern storage 530 and used for de-interleave processing and constellation numbers stored in the control 560 to indicate de-constellation rearrangement processing methods. Processing target data corresponding to the above address values are read out from a first data storage 510, temporarily stored in a temporary data storage, and then stored in a second data storage 520. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a data processing device, a decoding device, a wireless device, a data processing method, and a data processing program, and particularly to a data processing device, a decoding device, a wireless device, a data processing method, and a data processing program suitable for a mobile communication system.

  In a mobile communication system, an error on a transmission path of a transmission data sequence encoded at the time of transmission by a mobile communication terminal or base station apparatus tends to occur in a burst (local) rather than randomly (average) . When a burst error occurs, if the error exceeds the error correction capability, an uncorrectable error remains.

  On the other hand, considering the case where the modulation scheme is a high-order modulation scheme such as 16QAM (Quadrature Amplitude Modulation), specifically, when the number of bits carried by a modulation symbol exceeds 2 bits, There are the following major drawbacks. The reliability of the bits in the soft-combined symbol is a constant ratio in all retransmissions. In other words, when the reliability of previously received transmission data is low, the reliability of the transmission data received in further retransmission is low. Similarly, when the reliability of previously received transmission data is high, the reliability of the transmission data received in further retransmissions is high.

  In order to prevent such a problem, it is necessary to disperse errors in transmission data generated in the transmission path and rearrange the signal constellation used for modulation when transmitting data is retransmitted. Here, the rearrange refers to converting a bit arrangement in a symbol and inverting a logical bit value with respect to a specific signal constellation as a reference.

  Therefore, in the base station apparatus, interleave processing using two interleave processing circuits is performed on the transmission data sequence obtained by encoding transmission data at the time of transmission, and constellation / rearrangement processing is subsequently performed. Yes. The interleaving process is a process for rearranging the transmission data series. In a mobile communication terminal, deconstellation and rearrangement processing is performed on received transmission data, and two deinterleave processing circuits are used so that burst errors can be converted into random errors. Deinterleaving is performed. As a result, in the mobile communication system, it is possible to improve the reliability of transmission data and improve the decoding processing performance.

  A general implementation method of interleave processing and constellation rearrangement processing using two interleave processing circuits is described in Non-Patent Document 1, for example. That is, in the base station apparatus, the constellation / rearrangement process converts the bit arrangement of 4 bits into one group and inverts the logical bits for the transmission data sequence subjected to the interleaving process. In the interleave processing, the transmission data is stored in each of the matrix spaces of the internal memories of the two interleave processing circuits in a predetermined writing order, and when the transmission data stored in the reading order different from the writing order is read, the two interleaving processes are performed. The transmission data series output from each circuit is parallel-serial converted.

Further, in the mobile communication terminal, the received transmission data sequence (soft data) is subjected to a deconstellation / rearrangement process in which the arrangement of the upper and lower data is replaced for every four data, and the code is inverted. A deinterleave process is performed on the transmission data series. In the matrix space of the internal memory of the two deinterleave processing circuits, the transmission data is stored in the same reading order as that of the base station apparatus, and after the storing, the transmission data stored in the reading order different from the writing order is read out. The respective transmission data series output from the two deinterleave processing circuits are subjected to parallel-serial conversion, and the processing is completed by returning the respective transmission data series to the original order.
3GPP Technical Specification: 3GPP TS 25.212 V 5.4.0 Mar., 2003.

  However, in the above-described data processing method of the mobile communication system, no consideration has been given to the following points.

  In a decoding process of a mobile communication system, when a deconstellation / rearrangement process and a deinterleave process are always performed continuously on a data sequence to be processed without lowering the throughput, both processing circuits are always active circuits. . The data processing unit of the deinterleave process is for each radio frame, and a plurality of data is multiplexed in the radio frame. Therefore, the memory configuration for storing data after the deconstellation / rearrangement process stores transmission data for at least two codes. It is necessary to adopt a configuration that can do this.

  Further, in the deinterleave processing circuit, the transmission data after the deconstellation / rearrangement processing is subjected to transmission data replacement processing using a replacement pattern. It is necessary to construct two internal memories having a matrix space of 30 rows × 32 columns. In other words, an internal memory having a storage capacity corresponding to the number of transmission data must be constructed.

  Furthermore, since the number of transmissions of the transmission data increases and enormous current is consumed for this transfer control, high-speed data communication technology such as HSDPA (High Speed Downlink Packet Access) based on W-CDMA is used. This is fatal in systems that require processing.

  As shown in FIGS. 8 and 9, a specific data processing device that continuously performs the deconstellation / rearrangement process and the deinterleave process includes a first data storage unit 1 that stores a transmission data sequence, Depending on the radio environment, the deconstellation / rearrangement processing unit 2, the post-deconstellation / rearrangement output storage unit 3 for storing transmission data after the deconstellation / rearrangement processing, and a temporary deinterleaving process Storage units 4 and 5, a parallel-serial conversion unit 6 that performs parallel-serial conversion on transmission data after deinterleaving, a second data storage unit 7 that stores a transmission data sequence after parallel-serial conversion, and a first data storage Part 1, deconstellation rearrangement processing part 2, deconstellation Arrangement After output storage unit 3, and a control unit 8 for controlling the temporary storage unit 4, 5 and the second data storage unit 7. Here, the temporary storage units 4 and 5 are each constructed by a memory matrix space of 30 rows × 32 columns.

  In this data processing apparatus, the number of transmission data to be processed stored in the first data storage unit 1 is, for example, the number of data for one frame. Here, the transmission data output from the first data storage unit 1 is, for example, 0, 1, 2, 3,..., 1916, 1917, 1918, 1919 as one code.

  These transmission data output from the first data storage unit 1 are processed in accordance with the processing order selected according to the modulation scheme under the control of the control unit 8.

  For example, when the selected process is a QPSK process as shown in FIG. 8, the data input to the deconstellation / rearrangement processing unit 2 is not subjected to data replacement or inversion under the control of the control unit 8. The output is stored in the output storage unit 3 after deconstellation and rearrangement as it is.

  Next, the transmission data series stored in the post-deconstellation / rearrangement output storage unit 3 is written in the temporary storage unit 4 that performs deinterleaving processing. The temporary storage unit 4 is constructed in a memory matrix space of 30 rows × 32 columns, and writing is sequentially performed in the vertical direction. When writing to the 32nd column of the first row is completed, the second row Writing in the vertical direction from the first column to the 32nd column is performed, and similarly, writing from the third row to the 30th row is sequentially performed.

  The transmission data written in the temporary storage unit 4 is sequentially read out in the horizontal direction in accordance with a rearrangement pattern program incorporated in the control unit 8. Specifically, the transmission data stored in the temporary storage unit 4 is read in the horizontal direction from the a1th column according to the rearrangement pattern.

  The transmission data written in the temporary storage unit 4 is read and stored in the second data storage unit 7.

  In addition, when the selected processing sequence is 16QAM as shown in FIG. 9, the deconstellation / rearrangement processing unit 2 performs de-decoding for every four data of the transmission data series according to the constellation number set by the control unit 8. Perform constellation and rearrangement processing. The transmission data subjected to the deconstellation / rearrangement process is stored in the post-deconstellation / rearrangement output storage unit 3 under the control of the control unit 8. The post-deconstellation / rearrangement output storage unit 3 stores, for example, the upper 2 data and the lower 2 data interchanged. Specifically, as shown in FIG. 9, the post-deconstellation / rearrangement output storage unit for the transmission data series “0, 1, 2, 3” stored in the first data storage unit 1. 3 stores the transmission data series “2, 3, 0, 1”.

  The transmission data series stored in the post-deconstellation / rearrangement output storage unit 3 is written to each of the temporary storage units 4 and 5 every two data under the control of the control unit 8. As described above, since the temporary storage units 4 and 5 are each constructed by a memory matrix space of 30 rows × 32 columns, the transmission data “2, 3” is stored in the temporary storage unit 4 as shown in FIG. The transmission data “0, 1” is written to the temporary storage unit 5 every two data sequentially in the vertical direction. When the writing from the first row to the 32nd column is completed, the vertical writing from the first column to the 32nd column of the second row is performed, and the third row to the 30th row are similarly performed. Writing up to the eyes is performed sequentially.

  The transmission data written in the temporary storage units 4 and 5 is read according to the rearrangement pattern program incorporated in the control unit 8. Specifically, the transmission data stored in the temporary storage unit 4 is every two data in the horizontal direction from the a1 column, and the transmission data stored in the temporary storage unit 5 is every two data in the horizontal direction from the b1 column. Each is read out. The read transmission data is parallel-serial converted by the parallel-serial conversion unit 6. When the reading of the transmission data in the a1 column written in the temporary storage unit 4 and the transmission data in the b1 column written in the temporary storage unit 5 is completed, the transmission data in the a2 column continuously written in the temporary storage unit 4 The transmission data in the b2th column written in the temporary storage unit 5 is read out. This reading is sequentially performed until the transmission data of the a32th column written in the temporary storage unit 4 and the transmission data of the b32th column written in the temporary storage unit 5 are completed.

  The transmission data written in the temporary storage units 4 and 5 is read, and the transmission data converted by the parallel-serial conversion unit 6 is stored in the second data storage unit 7.

  In this type of data processing device, the post-deconstellation / rearrangement output storage unit 3 has a memory having a storage capacity for storing transmission data for at least two codes, and a temporary storage unit 4 used for deinterleaving processing. And a memory having 5 is required, and the storage capacity of the memory is increased. Further, as the storage capacity of the memory increases, the number of transmission data transfers increases, and the power consumed for such transmission data transfer control increases.

  The present invention has been made in view of the above points, and can reduce the storage capacity of the memory used for the deconstellation and rearrangement processing and the storage capacity of the memory used for the deinterleave processing. An object of the present invention is to provide a data processing device, a decoding device, a wireless device, a data processing method, and a data processing program that can reduce power consumption associated with transfer and improve throughput of each processing.

  A data processing apparatus according to the present invention includes a first data storage unit that stores data to be processed, a replacement pattern storage unit that stores a replacement pattern used for deinterleaving processing, and a modulation method that is appropriately changed according to a communication environment. Generating means for generating an address value for reading out the processing target data stored in the first data storage means based on a constellation number indicating a process dependent on the constellation and a deconstellation / rearrangement processing method and the replacement pattern And temporary storage means for temporarily storing the processing target data read based on the address value, and controlling the operation of the replacement pattern storage means, the address generation means and the temporary storage means, Deconstellation, rearrangement processing and deinterlacing Performs leave processing, take a control means for outputting the processed data from the temporary storage means, second data storing means for storing the processed data, the configuration with.

  According to this configuration, an address value for reading the processing target data stored in the first data storage unit is generated based on the processing mode, the constellation number, and the replacement pattern that are appropriately changed according to the communication environment. Since the data to be processed is temporarily stored based on the address value, the memory used for the deconstellation and rearrangement processing and the memory used for the deinterleave processing are not required, and the data storage capacity required for the memory processing Can be greatly reduced. Furthermore, since the storage capacity of the memory can be greatly reduced, the number of data transfers can also be reduced, and the power consumption required for data transfer control can be greatly reduced. Furthermore, since the deconstellation / rearrangement process and the deinterleave process can be executed simultaneously, the throughput of the entire data process can be improved.

  In the data processing device of the present invention, in the data processing device, the address generation means includes a sequence selector that determines a processing mode, a data counter that counts the number of data to be processed, and a pseudo memory space matrix. A row counter that counts the number of rows above, a column counter that pseudo-counts the number of columns on the matrix, a frame code counter that counts the number of codes in a frame from the output of the data counter, and the replacement pattern, Based on the number of codes in the frame, the number of rows, the number of columns, and the constellation number, address calculation means for calculating the address value, addition means for adding the address value, “0” and “1” 1-bit counter that repeatedly outputs “0” of the 1-bit counter or Taking a first selector for determining a 1 ", a configuration with a.

  In the data processing device according to the present invention, the data processing device employs a configuration in which the sequence selector determines the processing procedure of the address generation unit based on a modulation method that is appropriately changed according to a communication environment.

  In the data processing device of the present invention, the data processing device is configured such that the count value of the row counter is controlled by the count value of the data counter.

  In the data processing device of the present invention, the data processing device is configured such that the count value of the column counter is controlled by the count value of the data counter.

  In the data processing device of the present invention, the selector is configured to control whether the address value added by the adding means is used for the address value.

  In the data processing device according to the present invention, the selector controls the output method of the data stored in the temporary storage means in the data processing device.

  The decoding device of the present invention employs a configuration including the data processing device.

  The wireless device of the present invention employs a configuration including the data processing device.

  The recording medium of the present invention adopts a configuration in which the data processing device is recorded.

  In addition, the data processing method of the present invention includes a stage for storing data to be processed, a stage for performing processing depending on a modulation scheme that changes as appropriate according to the communication environment, a replacement pattern and a deconsturer used for deinterleaving processing. A step of generating an address value based on the constellation number, the number of rows, the number of columns, the number of codes in a frame, and the number of data, which indicates a method of processing for processing and rearrangement, and reading out the processing target data corresponding to the address value, And storing the temporarily stored processing target data as processed data.

  According to this method, an address value for reading the processing target data stored in the first data storage means is generated based on the processing method depending on the modulation method that changes as appropriate, the constellation number, and the replacement pattern. Therefore, the deconstellation / rearrangement process and the deinterleave process can be realized without temporarily storing the data to be processed and using a large memory capacity.

  Also, the data processing method of the present invention employs a method of determining a processing procedure for generating the address value according to a modulation method that changes as appropriate in the data processing method.

  The decoding device of the present invention has a configuration including the data processing method.

  A radio apparatus according to the present invention has a configuration including the data processing method.

  The recording medium of the present invention has a configuration in which the data processing method is recorded.

  In addition, the data processing program of the present invention includes a control for storing data to be processed, a replacement mode used for a processing mode and a deinterleave process, a constellation number indicating the number of constellation / rearrangement processing, the number of rows and the number of columns. And control for generating an address value based on the number of codes in the frame and the number of data, control for reading out and temporarily storing the processing target data corresponding to the address value, and the processing target data temporarily stored And control for storing the data as processed data.

  According to this configuration, the address value for reading the processing target data stored in the first data storage unit is generated based on the processing procedure, the constellation number, and the replacement pattern depending on the modulation method that changes as appropriate, and the address value The data to be processed can be temporarily stored based on the above, and the deconstellation / rearrangement process and the deinterleave process can be realized in the program without using a large memory capacity.

  Moreover, the data processing program of this invention takes the structure which determines a processing procedure with the modulation system which changes suitably in the said data processing program.

  Further, the decoding device of the present invention has a configuration including the data processing program.

  The wireless device of the present invention has a configuration including the data processing program.

  The recording medium of the present invention employs a configuration in which the data processing program is recorded.

  According to the present invention, it is possible to reduce the storage capacity of the memory used for the deconstellation / rearrangement process and the storage capacity of the memory used for the deinterleave process, and to reduce the power consumption accompanying the data transfer. In addition, it is possible to provide a data processing device, a decoding device, a wireless device, a data processing method, and a data processing program that can improve the throughput of each processing.

  The embodiment of the present invention includes a processing mode depending on a modulation method that changes appropriately according to a communication environment, a column replacement pattern used for deinterleaving processing, and a constellation number indicating a deconstellation / rearrangement processing method. The address value is generated on the basis of the address value, the processing target data corresponding to the address value is read out, temporarily stored, and the temporarily stored processing target data is stored as processed data.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[Configuration of radio apparatus and decoding apparatus thereof]
As shown in FIG. 1, a wireless device (wireless communication device) 10 including a data processing device according to an embodiment of the present invention includes a reception antenna 20, a wireless reception unit 30, a demodulation unit 40, and a decoding unit ( Decoding device) 50. The receiving antenna 20 receives a radio signal. The radio reception unit 30 performs a predetermined radio reception process on the transmission data sequence received through the reception antenna 20. The demodulator 40 demodulates the transmission data sequence processed in the radio receiver 30. The decoding unit 50 decodes the demodulated transmission data sequence. The decrypting unit 50 includes a data processing device 500 according to the present embodiment shown in FIG.

[Data processor configuration]
As shown in FIG. 2, the data processing device 500 includes a first data storage unit (first data storage unit) 510 that stores data to be processed and a replacement that stores a column replacement pattern used for deinterleaving processing. First data based on a pattern storage unit (replacement pattern storage means) 530, a processing mode depending on a modulation method that changes as appropriate, a constellation number indicating a deconstellation / rearrangement processing method, and a sequence replacement pattern An address generation unit (address generation means) 540 that generates an address value for reading out the processing target data stored in the storage unit 510, and a temporary storage unit (temporary storage) that temporarily stores the processing target data read based on the address value Storage means) 550, a replacement pattern storage unit 530, an address generation unit 540, and A control unit (control unit) 560 that controls the operation of the temporary storage unit 550, performs deconstellation / rearrangement processing and deinterleave processing on the processing target data, and outputs the processed data from the temporary storage unit 550; And a second data storage unit (second data storage means) 520 for storing completed data.

  As shown in FIG. 3, the address generation unit 540 includes a data counter 541 that counts the number of data to be processed, a row counter 542 that counts the number of rows on the matrix of the memory space in a pseudo manner, and a pseudo on the matrix. A column counter 543 that counts the number of columns, a frame code counter 544 that counts the number of intra-frame codes from the output of the data counter 541, and calculates an address value based on the replacement pattern, the number of intra-frame codes, the number of columns, and the constellation number Address calculating section (address calculating means) 545, an adding section (adding means) 546 for adding address values, a 1-bit counter 547 that repeatedly outputs “0” and “1”, and “0” of the 1-bit counter ”Or“ 1 ”, and the modulation method of the received data sequence It has a sequence selector 549 to determine the physical sequence.

[Data processing method and data processing program]
Next, a data processing method of the data processing apparatus 500 configured as described above will be described with reference to FIGS. 4, 5, 6, and 7. In the present embodiment, the data processing method described below is executed by a data processing program stored in the control unit 560 of the data processing device 500.

  FIG. 4 is a data processing flow based on the modulation method. First, in step S1, the sequence selector 549 shown in FIG. 3 determines whether the modulation method is QPSK processing or 16QAM processing.

  Here, when the modulation method is QPSK (step S1 “YES”), deinterleaving processing is performed (step S2) until all data processing is completed (step S4 “NO”), and all data deinterleaving processing is completed. If so (step S4 “YES”), the deinterleaving process is terminated (step S4).

  On the other hand, when the modulation system is 16QAM (step S1 “NO”), the deconstellation / rearrangement process and the deinterleave process are performed (step S3) until all data processing is completed (step S4 “NO”). When the deconstellation / rearrangement process and the deinterleave process are completed for the data (“YES” in step S4), the deconstellation / rearrangement process and the deinterleave process are terminated (step S4).

  FIG. 5 shows a processing method when the QPSK process is determined by the sequence selector 549 shown in FIG.

  First, as shown in step S21, the data counter value of the data counter 541, the row counter value of the row counter 542, the column counter value of the column counter 543, and the intra-frame code counter value of the frame code counter 544 shown in FIG. To do.

  In step S22, a constellation number indicating a control method for performing the de-constellation / rearrangement process is set to “0”.

  As shown in step S <b> 23, the row counter 542 is used to set a replacement pattern in the address calculation unit 545 from the replacement pattern storage unit 530.

  As shown in step S24, the address calculation unit 545 is used to calculate an address for the replacement pattern of the frame code counter 544, the row counter 542, the column counter 543, and the replacement pattern storage unit 530 of FIG.

  As shown in step S25, the data stored in the first data storage unit 510 is read from the address and stored in the second data storage unit 520.

  In step S26, the counter values of the data counter 541 and the row counter 542 are incremented by one.

  In step S27, it is determined whether or not the counter value of the row counter 542 is “30”. If the determination result is not established, the process returns to step S23. If it is established, the counter value of the row counter 542 is set to “0”, and the process proceeds to step S28.

  In step S28, the counter value of the column counter 543 shown in FIG.

  In step S29, it is determined whether or not the counter value of the column counter 543 shown in FIG. If the determination result is not established, the process returns to step S23. If true, the counter value of the column counter 543 is set to “0”, and the process proceeds to step S210.

  In step S210, it is determined whether or not the processing for all frames has been completed. If not, the frame code counter 544 is incremented by “1” (step S211), and the process returns to step S23. If established, the process is terminated.

  FIG. 7 shows a processing method when 16QAM processing is determined by the sequence selector 549 shown in FIG.

  First, as shown in step S31, the data counter value of the data counter 541 shown in FIG. 3, the row counter value of the row counter 542, the column counter value of the column counter 543, the intra-frame code counter value of the frame code counter 544, 1 bit All counters 547 are reset.

  As shown in step S <b> 32, the row counter 542 is used to set a replacement pattern in the address calculation unit 545 from the replacement pattern storage unit 530. As shown in step S33, the address calculation unit 545 generates an address value based on the set replacement pattern.

  Here, as shown in step S34, it is determined whether or not the constellation number indicating the control method for performing the de-constellation / rearrangement process is “1” or “3”. As shown in step S35, if the result of determination is YES (YES), it is determined whether or not the 1-bit counter 547 is “0”. As shown in step S36, if the result of determination is satisfied, “2” is added to the address value generated in step S33. Next, as illustrated in step S <b> 37, the transmission data indicated by the added address value among the transmission data to be processed stored in the first data storage unit 510 is stored in the temporary storage unit 550.

  If it is determined that the constellation number is not “1” or “3” in step S34 (NO), or if the 1-bit counter 547 is not “0” in step S35, the first data is set as shown in step S37. Of the transmission data to be processed stored in the storage unit 510, the transmission data indicated by the added address value is stored in the temporary storage unit 550. The relationship between the deconstellation / rearrangement processing method and the constellation number indicating the processing method is shown in FIG.

  Next, as shown in step S38, it is determined whether or not the constellation number is “3”. As shown in step S <b> 39, if the determination result is true, it is determined whether or not the 1-bit counter 547 is “0”. As shown in step S <b> 310, when the determination result is established, the transmission data stored in the temporary storage unit 550 is inverted between positive and negative. Thereafter, the process proceeds to step S314.

  If the constellation number is not “3” in step S38, the process proceeds to step S311. If the 1-bit counter 547 is not “0” in step S39, the process proceeds to step S314.

  As shown in step S311, it is determined whether or not the constellation number is “2”. As shown in step S312, if the result of determination is satisfied, it is determined whether or not the 1-bit counter 547 is “0”. As shown in step S313, when the result of determination is not established, the transmission data stored in the temporary storage unit 550 is inverted between positive and negative. Thereafter, the process proceeds to step S314.

  If the 1-bit counter 547 is established as “0” in step S312, if the constellation number is not “2” in step S311, the process proceeds to step S314.

  In step S314, the transmission data stored in temporary storage unit 550 is stored in second data storage unit 520.

  As shown in step S315, the data counter value of the data counter 541 is incremented by “1”. Thereafter, as shown in step S316, it is determined whether or not the remainder obtained by dividing the data counter value by “2” is “1”. As shown in step S317, when the result of determination is satisfied, the row counter value of the row counter 542 is incremented by “1”. Thereafter, the process returns to step S32. As shown in step S318, when the remainder obtained by dividing the data counter value by “2” is not “1”, the output of the 1-bit counter 547 is inverted.

  Subsequently, as shown in step S319, it is determined whether or not the remainder obtained by dividing the data counter value by “4” is “0”. As a result of the determination, if satisfied, the process proceeds to step S320. As shown in step S321, if the result of determination is not satisfied, “1” is decremented from the row counter value. Thereafter, the process returns to step S32.

  In step S320, it is determined whether the deconstellation / rearrangement process and the deinterleave process for the corresponding column have been completed. As a result of the determination, if it is satisfied, the process proceeds to step S322. As shown in step S323, if the result of determination is not satisfied, “1” is incremented from the row counter value. Thereafter, the process returns to step S32.

  In step S322, it is determined whether or not the remainder obtained by dividing the data counter value by “8” is “0”. As a result of the determination, if satisfied, the process proceeds to step S324. As shown in step S325, if the result of determination is not satisfied, the row counter value is reset and the column counter value is incremented by "1". Thereafter, the process returns to step S32.

  In step S324, it is determined whether or not the deconstellation / rearrangement process and the deinterleave process have been completed for all the columns. As a result of the determination, if it is satisfied, the process proceeds to step S326. As shown in step S327, if the result of determination is negative, the row counter value of the row counter 542 is reset, and the column counter value of the column counter 543 is incremented by “3”. Thereafter, the process returns to step S32.

  In step S326, it is determined whether the deconstellation / rearrangement processing and interleaving processing for all the frame data have been completed. As a result of the determination, if it is satisfied, the data processing method according to the present embodiment ends. As shown in step S328, if the result of determination is not satisfied, the row counter value and the column counter value are reset, and the intra-frame code counter value of the frame code counter 544 is incremented by “1”. Thereafter, the process returns to S32.

  Thus, according to the present embodiment, according to the communication environment, the replacement pattern used for the deinterleaving process stored in the replacement pattern storage unit 530 and the constellation number indicating the deconstellation / rearrangement processing method. Is used to generate an address value, and using this address value, the transmission data to be processed stored in the first data storage unit 510 is read, and the read transmission data is written to the temporary storage unit 550. Since the transmission data output from the temporary storage unit 550 is stored in the second data storage unit 520, the storage capacity of the memory for realizing the deconstellation / rearrangement process and the deinterleave process is significantly reduced. can do.

  Furthermore, the memory capacity of the memory can be greatly reduced. As a result, the power consumption used for transmission data transfer control can be greatly reduced.

  Furthermore, since the deconstellation / rearrangement process and the deinterleave process can be executed simultaneously, the throughput of the entire data process can be improved.

  The data processing device, decoding device, wireless device, data processing method, and data processing program according to the present invention can reduce the storage capacity of the memory, reduce power consumption, and further improve the throughput of the entire processing. It is effective for a data processing apparatus such as image processing, a data processing method, and a data processing program, without being limited to wireless communication.

The block diagram which shows the structure of the radio | wireless apparatus which concerns on embodiment of this invention The block diagram which shows the structure of the data processor of the radio | wireless apparatus which concerns on embodiment of this invention The block diagram which shows the structure of the address generation part of the data processor shown in FIG. The flowchart which shows the data processing method of the data processor shown in FIG. 4 is a flowchart showing a data processing procedure when the modulation method is QPSK in the data processing shown in FIG. The figure which shows the relationship between a de-constellation rearrangement processing method and a constellation number in the data processing method shown in FIG. 4 is a flowchart showing a data processing procedure when the modulation method is 16QAM in the data processing shown in FIG. Block diagram of a data processing apparatus when the modulation method according to the prior art is QPSK Block diagram of a data processing apparatus when the modulation scheme according to the prior art is 16QAM

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Radio | wireless apparatus 20 Reception antenna 30 Radio | wireless receiving part 40 Demodulation part 50 Decoding part 500 Data processing apparatus 510 1st data storage part 520 2nd data storage part 530 Replacement pattern storage part 540 Address generation part 541 Data counter 542 Row counter 543 Column counter 544 Frame code counter 545 Address calculator 546 Adder 547 1-bit counter 548 Selector 549 Sequence selector 550 Temporary storage

Claims (20)

First data storage means for storing data to be processed;
Replacement pattern storage means for storing replacement patterns used for deinterleaving processing;
The processing object stored in the first data storage means based on a constellation number indicating the processing depending on the modulation method, which is appropriately changed according to the communication environment, and the constellation number and the replacement pattern. Address generating means for generating an address value for reading data;
Temporary storage means for temporarily storing the processing target data read based on the address value;
Controls the operations of the replacement pattern storage means, the address generation means, and the temporary storage means, performs deconstellation / rearrangement processing and deinterleave processing on the processing target data, and transfers the processed data from the temporary storage means. Control means for outputting;
Second data storage means for storing the processed data;
A data processing apparatus comprising:   The address generation means includes a sequence selector that determines a processing mode, a data counter that counts the number of data to be processed, a row counter that counts the number of rows on a matrix in a memory space, and the matrix A column counter for counting the number of upper columns, a frame code counter for counting the number of codes in a frame from the output of the data counter, the replacement pattern, the number of codes in the frame, the number of rows, the number of columns and the constant An address calculating means for calculating the address value, an adding means for adding the address value, a 1-bit counter that repeatedly outputs “0” and “1”, and “0” of the 1-bit counter. And a selector for determining “1”. Data processing device.   3. The data processing apparatus according to claim 2, wherein the sequence selector determines a processing procedure of the address generation unit based on a modulation method that is appropriately changed according to a communication environment.   The data processing apparatus according to claim 2, wherein the count value of the row counter is controlled by the count value of the data counter.   The data processing apparatus according to claim 2, wherein the count value of the column counter is controlled by the count value of the data counter.   3. The data processing apparatus according to claim 2, wherein the selector controls whether to use the address value added by the adding means to the address value.   3. The data processing apparatus according to claim 2, wherein the selector controls an output method of data stored in the temporary storage unit.   A decoding apparatus comprising the data processing apparatus according to claim 1.   A wireless device comprising the data processing device according to claim 1.   A recording medium on which the data processing apparatus according to claim 1 is recorded. Storing the data to be processed;
Performing a process depending on the modulation method that changes appropriately according to the communication environment; and
A step of generating an address value based on the replacement pattern used for the deinterleave processing, the constellation number indicating the deconstellation / rearrangement processing method, the number of rows, the number of columns, the number of codes in the frame, and the number of data,
Reading and temporarily storing the data to be processed corresponding to the address value;
Storing the temporarily stored processing target data as processed data;
A data processing method comprising:   12. The data processing method according to claim 11, wherein a processing procedure for generating the address is determined in accordance with a modulation scheme that changes as appropriate.   A decoding apparatus comprising the data processing method according to claim 11.   A wireless apparatus comprising the data processing method according to claim 11.   The recording medium which recorded the data processing method of the said Claim 11. Control to store data to be processed,
Control for generating an address value based on the constellation number, the number of rows, the number of columns, the number of codes in a frame, and the number of data indicating a replacement mode, a deconstellation / rearrangement processing method used for a processing mode and a deinterleave process,
Control for reading and temporarily storing the data to be processed corresponding to the address value;
Control for storing the temporarily stored processing target data as processed data;
A data processing program comprising:   17. The data processing program according to claim 16, wherein the processing procedure is determined by a modulation scheme that changes as appropriate.   17. A decoding apparatus comprising the data processing program according to claim 16.   A radio apparatus comprising the data processing program according to claim 16.   17. A recording medium on which the data processing program according to claim 16 is recorded.

Images