JP2005328637A - Parallel multiplex inverter device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a parallel multiplex inverter device which obtains a surge voltage suppression effect equivalent to the time of a plurality of parallel operations even after the failed inverter is disconnected from an ac motor. <P>SOLUTION: The parallel multiplex inverter includes a plurality of three phase inverters 1A, 1B for driving the ac motor 20; LCR type dV/dt suppression filter 2A, 2B respectively provided at the output side of the three phase inverters 1A, 1B, first cables 3A, 3B connected at one ends to the outputs of the dV/dt suppression filters; circuit breakers 10A, 10B connected to the other ends of the first cables, respectively and second cables 3C for connecting the connecting point of the output side of the circuit breakers 10A, 10B to the ac motor 20. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a parallel multiple inverter device in which a method for suppressing a surge voltage applied to an AC motor is improved.

  A surge voltage resulting from a steep voltage change of the inverter output voltage may be applied to the input terminal of the AC motor driven by the inverter, particularly when the cable connecting the inverter and the AC motor is long. This is because the resonance and reflection are excited by the inductance component and capacitance component of the cable due to the steep voltage change of the inverter output voltage. Depending on the conditions, a surge voltage about twice the peak value of the inverter output voltage may be applied to the AC motor. To be applied.

  It is well known that this surge voltage may cause dielectric breakdown or winding burnout on the AC motor side. As a countermeasure, there has been proposed a method of suppressing the surge voltage on the AC motor side by connecting an LCR type dV / dt suppression filter to the inverter output (see, for example, Patent Document 1).

By the way, in order to drive a large-capacity AC motor with an inverter, a large-capacity inverter is required. As one method for realizing the same, there is a method in which a plurality of inverters are connected in parallel to increase the total output capacity. Further, when a plurality of inverters are connected in parallel as described above, there is a case where it is required to continue the operation by reducing the output even when one or more of the inverters fails. For example, in the case of a two-parallel connection configuration, one faulty unit is disconnected from the AC motor side, control is performed to reduce the output command to ½, and the operation is continued (see, for example, Patent Document 2).
JP-A-6-38543 (page 2-3, FIG. 1) JP 2002-10684 A (page 3-6, FIG. 1)

  For example, for a system in which two inverters are configured in parallel, a dV / dt suppression filter is required on the output side of the inverter, and one inverter continues to operate even if one inverter fails, the dV / dt Consider how to determine the constants of the dt suppression filter. The circuit constants of the filter reactor, the filter resistor, and the filter capacitor of the dV / dt suppression filter are determined in consideration of the circuit characteristics of the cable, and there are the following two ways of thinking.

  One is an idea of determining circuit constants of two dV / dt suppression filters in accordance with the circuit characteristics of one parallel cable. In this case, for example, even if one inverter fails and is disconnected, the necessary surge voltage suppression effect is obtained by the dV / dt suppression filter connected to the healthy inverter, so that the operation by the healthy inverter can be continued. It is. However, when both are healthy and are operated in parallel, the dV / dt suppression filter is connected in parallel, so that an excessive surge voltage suppression effect is obtained. As the surge voltage suppression effect increases, the loss of the filter resistance tends to increase. Therefore, the surge voltage suppression effect more than necessary causes a problem of increased filter resistance loss.

  The other is the idea of determining the circuit constant in a state where the dV / dt suppression filter is connected in parallel according to the circuit characteristics of two parallel cables. In this case, when both are sound and two parallel operations are performed, an appropriate surge voltage suppression effect is obtained. However, since the dV / dt suppression filter for one unit does not provide a sufficient surge voltage suppression effect for two parallel cables, continuation of operation when one unit fails is unacceptable.

  In any of the above ideas, the problem becomes more serious when the number of parallel connections is larger.

  The present invention has been made to solve the above-described problems. In a parallel multiple inverter device in which a plurality of inverters having dV / dt suppression filters on the output side are connected in parallel, a faulty inverter is solved from an AC motor. It is an object of the present invention to provide a parallel multiple inverter device that can obtain the same surge voltage suppression effect as that obtained when a plurality of units are operated in parallel.

  To achieve the above object, a parallel multiple inverter device of the present invention includes a plurality of three-phase inverters for driving an AC motor, and an LCR type dV / dt suppression filter provided on the output side of each of the three-phase inverters. A first cable having one end connected to each output of the dV / dt suppression filter, a circuit breaker connected to the other end of the first cable, and an output side of each circuit breaker. It consists of the 2nd cable which connects a connection point and the said AC motor.

  According to the present invention, it is possible to provide a parallel multiple inverter device that can obtain a surge voltage suppression effect equivalent to that in the parallel operation of a plurality of units even after the failed inverter is disconnected from the AC motor.

Embodiments of the present invention will be described below with reference to the drawings.

  A parallel multiple inverter device according to a first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a circuit configuration diagram showing Embodiment 1 of a parallel multiple inverter device of the present invention.

  The outputs of the inverters 1A and 1B for converting direct current to three-phase alternating current drive the AC motor 20 in parallel via dV / dt suppression filters 2A and 2B and cable circuits 3A and 3B, respectively. Since the cable circuits 3A and 3B are cables having a certain distance, they are accurately distributed constant circuits, but can be simply expressed as an LCR equivalent circuit, and include line resistance Rc, line inductance Lc, conductor and shield. It is comprised by the capacitance Cc in between. The dV / dt suppression filters 2A and 2B are configured by a filter reactor Lf and a series circuit of a filter resistor Rf and a filter capacitor Cf connected in parallel to the filter reactor Lf.

  Circuit breakers 10A and 10B are respectively provided between the cable circuits 3A and 3B and the AC motor 20, and the inverter 1A or the inverter 1B is connected to the AC motor 20 by opening the circuit breaker 10A or the circuit breaker 10B. It can be disconnected. The circuit breakers 10A and 10B and the AC motor 20 are connected by a cable. However, since this cable is shorter than the cable circuits 3A and 3B, its impedance is ignored.

  An internal configuration example of the inverters 1A and 1B is shown in FIG. FIG. 2 (a) is an example of a two-level three-phase inverter configured by connecting power devices in a bridge connection. FIG. 2 (b) configures one arm of the bridge connection by connecting the power devices in series. This is an example of a three-level three-phase inverter configured by clamping the middle point of a series circuit to a neutral point voltage. FIG. 2C shows an example of a three-phase inverter in which single-phase full-bridge unit inverters are star-connected.

  These inverters are generally operated by a PWM (Pulse Width Modulation) method, and output pulses having a steep voltage change when switching individual power devices.

  As shown in FIG. 1, by configuring the circuit breakers 10A and 10B in the vicinity of the AC motor 20, when a failure occurs in the three-phase inverter 1A or 1B, the circuit breaker on the failed inverter side is opened. For example, the influence on the healthy inverter side including the cable circuit can be cut off. Therefore, when determining the circuit constants of the dV / dt suppression filters 2A and 2B, it is not necessary to consider two parallel parts, and only one parallel part needs to be considered. Further, the surge voltage suppression effect more than necessary is not obtained even in the two parallel operation, and therefore there is no problem that the loss of the filter resistor Rf increases.

  Here, a method of determining circuit constants of the dV / dt suppression filters 2A and 2B will be described. First, the resonance frequency fc [= 1 / (2π × √ (Lc × Cc))] of the cable circuit and the resonance frequency ff [= 1 / (2π × √ (Lf × Cf))] of the dV / dt suppression filter are The filter reactor Lf and the filter capacitor Cf are selected so as to satisfy the relationship of fc> ff. Next, the filter resistor Rf is selected in consideration of the resonance damping and response speed of the series circuit of the filter reactor Lf, the filter capacitor Cf, and the filter resistor Rf. Furthermore, the surge voltage applied to the AC motor 20 when a step-like voltage equivalent to the inverter output voltage is input is evaluated using a circuit simulator or the like. Then, the circuit constants are determined while repeating the above operation on a trial and error basis.

  FIG. 3 shows an example of a step response simulation waveform of the dV / dt suppression filter whose circuit constant is determined by the above method. FIG. 3A shows a simulation waveform in the first embodiment of the present invention, and the same surge voltage suppression effect is obtained both in the case of 1 parallel and in the case of 2 parallel. FIG. 3B shows a case where overvoltage is suppressed more than necessary during two parallel operations when the circuit constants are combined during one parallel operation as described above. Further, FIG. 3C shows a case where the surge voltage suppression effect is insufficient during one parallel operation when the circuit constants are combined during two parallel operation as described above.

  As described above, it is necessary to install the circuit breakers 10 </ b> A and 10 </ b> B at the closest end of the AC motor 20 in order to obtain the desired effect in the present invention. However, in an actual plant, it may be difficult to install at the closest end due to space constraints. Hereinafter, it will be examined how the filter effect changes depending on the distance between the circuit breakers 10A and 10B and the AC motor 20.

  FIG. 4 is a circuit configuration diagram in consideration of a cable from the circuit breaker to the AC motor. In the circuit configuration of FIG. 4, the same parts as those in FIG. 4 differs from FIG. 1 in that a cable circuit 3C having an impedance that cannot be ignored is provided between the connection point on the output side of the circuit breakers 10A and 10B and the AC motor 20.

  First, a design example in which the distance between the dV / dt suppression filters 2A and 2B and the AC motor 20 is 100 m, the distance between the circuit breakers 10A and 10B and the AC motor 20 is 0 m, that is, the circuit constant of the cable circuit 3C is zero. explain. In this design example, the circuit constants of the dV / dt suppression filters 2A and 2B are designed so that the ratio of the surge voltage to the input step voltage is 1.25, as shown in FIG. When the circuit breaker installation position is separated from the AC motor by 20 m, 40 m, and 60 m with the circuit constants of the dV / dt suppression filters 2A and 2B as described above, that is, the circuit constant of the cable circuit 3C. Consider the time when you increased. The change in surge voltage in this case is as shown in FIG.

  When the distance between the circuit breakers 10A and 10B and the AC motor 20 is 0 m, the surge voltage multiplication factor is suppressed to 1.25 times the expected value for both 1-parallel and 2-parallel. When the distance between the circuit breakers 10A and 10B and the AC motor 20 is increased, the surge voltage magnification in the case of two parallels tends to decrease to 1.25 or less, and there is no problem. However, the surge voltage magnification tends to increase according to the distance in one parallel operation. Strictly speaking, if the circuit constant design of the dV / dt suppression filters 2A and 2B is changed when the circuit breaker installation position is separated from the AC motor by 20m, 40m and 60m, the above two parallel surge voltage Although the magnification is reduced, this is considered as a margin on the safety side.

  In the above state, it is assumed that 1.30 is within the allowable error range with respect to the design value 1.25 of the surge voltage magnification. At this time, if the distance between the connection point on the output side of the circuit breakers 10A and 10B and the AC motor 20 is about 30 m, the distance is within the above range.

  In the above design example, it is assumed that the voltage rise of the three-phase inverters 1A and 1B is on the order of 1 microsecond and the cable length is not extremely short. When the voltage rises of the three-phase inverters 1A and 1B are further steep and the cable length is short, the surge voltage multiplication factor is not significantly affected by the installation position of the circuit breaker. However, the above design values have a certain practical validity. Therefore, it can be said that there is no practical problem if the circuit breakers 10A and 10B are installed at a position of 0 to 30% of the distance between the dV / dt suppression filters 2A and 2B and the AC motor 20.

  As described above, according to the parallel multiple inverter device of the present invention, the circuit constant of the dV / dt suppression filter is determined for each unit inverter, and the unit inverters are connected in parallel. It is not necessary to change the circuit constant of the / dt suppression filter.

  Further, since the failed unit inverter is disconnected at the closest end of the load, the surge voltage suppression effect of the dV / dt suppression filter does not change even when the operation is continued with a sound unit inverter.

  For this reason, in any operating state, there is no problem that the surge voltage suppression effect is excessive or insufficient, or the loss of the filter resistance Rf is increased, and the AC motor can be operated safely.

  FIG. 6 is a circuit configuration diagram of a parallel multiple inverter device showing Embodiment 2 of the present invention. The same parts of the second embodiment as those of the parallel multiple inverter device according to the first embodiment of FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. The difference between the second embodiment and the first embodiment is that failure control circuits 30A and 30B are provided for the three-phase inverters 1A and 1B, respectively, so that when any three-phase inverter fails, the operation can be smoothly switched to the single operation. It is a point that has been configured.

  In FIG. 6, for example, when the three-phase inverter 1A fails, the failure control circuit 30A detects the failure itself and gives an open command to the circuit breaker 10A. Then, this failure signal is given to the failure control circuit 30B.

  A certain period of time is required until the circuit breaker 10A is opened after the failure control circuit 30A detects the failure of the three-phase inverter 1A. During this period, the healthy three-phase inverter 1B is affected as a disturbance. End up. In the worst case, this disturbance may cause an overcurrent in the three-phase inverter 1B, resulting in a failure.

  In order to avoid such a situation, the output of the three-phase inverter 1B is temporarily reduced when the failure control circuit 30B detects a failure of the three-phase inverter 1A. As a method for reducing the output, for example, a method of temporarily stopping switching of the three-phase inverter 1B, or a method of reducing only the torque current when the torque current and the excitation current are controlled by a control device (not shown), etc. There is.

  The output of the three-phase inverter 1B is temporarily reduced by the above method, and the output is restored again after a fixed time until the circuit breaker 10A is opened. By applying such an operation continuation method, the operation state can be smoothly switched from before the failure to after the failure.

  The above is true when the failure control circuit 30A or 30B is healthy even if the three-phase inverter 1A or 1B fails. Accordingly, when it is necessary to consider a mode in which the failure control circuit 30A cannot operate normally when the three-phase inverter 1A fails, the failure control circuit 30B side should perform failure monitoring and control of the three-phase inverter 1A. Just do it. In addition, a common fault control circuit may be provided separately as the parallel multiple inverter device.

The circuit block diagram of the parallel multiple inverter apparatus which concerns on Example 1 of this invention. The figure which shows the structural example of a three-phase inverter. The simulation waveform which shows the effect by this invention. The circuit block diagram which considered the cable from a circuit breaker to an AC motor. Surge voltage multiplication factor by the length of the cable from the circuit breaker to the AC motor. The circuit block diagram of the parallel multiple inverter apparatus which concerns on Example 2 of this invention.

Explanation of symbols

1A, 1B 3-phase inverter 2A, 2B dV / dt suppression filter 3A, 3B, 3C Cable circuit 10A, 10B Breaker 20 AC motor 30A, 30B Fault control circuit

Claims (5)

A plurality of three-phase inverters for driving an AC motor;
An LCR type dV / dt suppression filter provided on the output side of each of the three-phase inverters;
A first cable having one end connected to each output of the dV / dt suppression filter;
Circuit breakers respectively connected to the other ends of the first cable;
A parallel multiple inverter device comprising a connection point on the output side of each circuit breaker and a second cable connecting the AC motor. A ratio of the length of the first cable to the sum of the lengths of the first cable and the second cable;
For the surge voltage applied to the AC motor when all the three-phase inverters are operated in parallel,
The increase in surge voltage applied to the AC motor when at least one of the plurality of three-phase inverters is disconnected by the circuit breaker is selected so as not to exceed a predetermined value. Item 2. The parallel multiple inverter device according to Item 1.   2. The parallel multiple inverter device according to claim 1, wherein a ratio of a length of the second cable to a sum of the lengths of the first cable and the second cable is 30% or less. When at least one of the plurality of three-phase inverters fails,
Open the circuit breaker on the output side of the failed three-phase inverter,
2. The parallel multiple inverter device according to claim 1, wherein the operation of the three-phase inverter excluding the failed three-phase inverter is continued. When at least one of the plurality of three-phase inverters fails,
5. The parallel multiple inverter device according to claim 4, wherein an output of the three-phase inverter excluding the failed three-phase inverter is reduced for a predetermined period.

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