JP2005328087A - Power module substrate - Google Patents

Power module substrate Download PDF

Info

Publication number
JP2005328087A
JP2005328087A JP2005219775A JP2005219775A JP2005328087A JP 2005328087 A JP2005328087 A JP 2005328087A JP 2005219775 A JP2005219775 A JP 2005219775A JP 2005219775 A JP2005219775 A JP 2005219775A JP 2005328087 A JP2005328087 A JP 2005328087A
Authority
JP
Japan
Prior art keywords
insulating substrate
power module
heat sink
layer
buffer layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005219775A
Other languages
Japanese (ja)
Other versions
JP4487881B2 (en
Inventor
Yoshiyuki Nagatomo
義幸 長友
Toshiyuki Nagase
敏之 長瀬
Kazuaki Kubo
和明 久保
Shoichi Shimamura
正一 島村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP2005219775A priority Critical patent/JP4487881B2/en
Publication of JP2005328087A publication Critical patent/JP2005328087A/en
Application granted granted Critical
Publication of JP4487881B2 publication Critical patent/JP4487881B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the load caused by heat stress applied on an insulating substrate, reduce the manufacturing costs of a power module substrate, and improve productivity. <P>SOLUTION: A power module substrate 11 comprises a heat sink 18, a buffer layer 14, a metal layer 17, an insulating substrate 12, and a circuit layer 16, which are sequentially laminated in this order and bonded. The heat sink, the metal layer, and the circuit layer 16 are each made of Al. A predetermined pattern, on which a semiconductor chip 23 is mounted via a solder layer 22, is formed on the circuit layer. The buffer layer is made of a material having a thermal expansion coefficient between the thermal expansion coefficient of the insulating substrate and that of the heat sink. To be specific, the insulating substrate is preferably made of AlN, Si<SB>3</SB>N<SB>4</SB>, or Al<SB>2</SB>O<SB>3</SB>, and the buffer layer is preferably made of AlSiC, a carbon plate, or an AlC composite material. The thickness of the buffer layer is preferably 1.5 to 50 times as large as the thickness of the insulating substrate, and the insulating substrate, the buffer layer, and the heat sink are preferably laminated and bonded via a brazing foil. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、電気自動車や電気車両等、大電圧・大電流を制御する半導体装置に用いられるパワーモジュール用基板に関する。更に詳しくは半導体チップ等の発熱体から発生する熱を放散させるヒートシンクを有するパワーモジュール用基板に関するものである。   The present invention relates to a power module substrate used in a semiconductor device that controls a large voltage and a large current, such as an electric vehicle and an electric vehicle. More specifically, the present invention relates to a power module substrate having a heat sink that dissipates heat generated from a heating element such as a semiconductor chip.

従来、この種のパワーモジュール用基板として、図5に示すように、絶縁基板2がアルミナ等により形成され、この絶縁基板2の上面及び下面に回路層6及び金属層7がはんだ(図示せず)を介して積層接着され、金属層7がヒートシンク3の放熱板8に第1はんだ層5aを介して接着されたものが知られている(例えば、特許文献1参照。)。この基板では、回路層6に第2はんだ層5bを介して半導体チップ4が接着され、放熱板8に雄ねじ部材9c(なべ小ねじ等)を介して水冷シンク部9が取付けられる。水冷シンク部9の内部には冷却水9aが通過する冷却水通路9bが形成される。
このように構成されたパワーモジュール用基板では、半導体チップ4の発熱量が比較的多いため、半導体チップ4が発生した熱は第2はんだ層5b,回路層6,絶縁基板2,金属層7,第1はんだ層5a及び放熱板8を通って水冷シンク部9に伝わり、冷却水通路9bを通過する冷却水9aが上記熱を受け取ってパワーモジュール用基板1外に持ち去るので、パワーモジュール用基板1が過熱しないようになっている。
Conventionally, as this type of power module substrate, as shown in FIG. 5, an insulating substrate 2 is formed of alumina or the like, and a circuit layer 6 and a metal layer 7 are soldered on the upper and lower surfaces of the insulating substrate 2 (not shown). ), And the metal layer 7 is bonded to the heat sink 8 of the heat sink 3 via the first solder layer 5a (see, for example, Patent Document 1). In this substrate, the semiconductor chip 4 is bonded to the circuit layer 6 via the second solder layer 5b, and the water-cooled sink 9 is attached to the heat sink 8 via a male screw member 9c (pan head screw or the like). A cooling water passage 9 b through which the cooling water 9 a passes is formed inside the water cooling sink portion 9.
In the power module substrate configured as described above, the heat generated by the semiconductor chip 4 is relatively large. Therefore, the heat generated by the semiconductor chip 4 is generated by the second solder layer 5b, the circuit layer 6, the insulating substrate 2, the metal layer 7, The cooling water 9a that is transmitted to the water cooling sink 9 through the first solder layer 5a and the heat sink 8 and passes through the cooling water passage 9b receives the heat and takes it out of the power module substrate 1, so that the power module substrate 1 Is not overheated.

しかし、上記従来のパワーモジュール用基板1では、大型の放熱板8が比較的高価なAlSiCにより形成されているため、製造コストが増大する問題点があった。
また、上記従来のパワーモジュール用基板1では、絶縁基板2及び放熱板8の熱膨張係数の相違に基づく絶縁基板2及び放熱板8の変形の相違により第1はんだ層5aの熱サイクル寿命が短くなる問題点もあった。
更に、上記従来のパワーモジュール用基板1では、回路層6及び金属層7の絶縁基板2への積層接着とは別の工程で金属層7を第1はんだ層5aを介して放熱板8に接着しなければならず、組立工数が増大する問題点もあった。
これらの点を解消するために、図6に示すように、絶縁基板2の上面及び下面に回路層6及び金属層7をそれぞれ積層接着したろう付け用箔(図示せず)と同一のろう付け用箔を用いて金属層7及び放熱板8を接着したパワーモジュール用基板1が開示されている。
このように構成されたパワーモジュール用基板1では、絶縁基板2及び放熱板8の接着に第1はんだ層を用いていないため、第1はんだ層の熱サイクル寿命が短くなるという問題点を解消でき、また回路層6及び金属層7の絶縁基板2への積層接着と同時に金属層7を放熱板8に接着することができる。
実開昭61−207038号公報(第1図)
However, the conventional power module substrate 1 has a problem that the manufacturing cost increases because the large heat sink 8 is made of relatively expensive AlSiC.
Further, in the conventional power module substrate 1 described above, the thermal cycle life of the first solder layer 5a is shortened due to the difference in deformation of the insulating substrate 2 and the heat radiating plate 8 based on the difference in thermal expansion coefficient between the insulating substrate 2 and the heat radiating plate 8. There was also a problem.
Further, in the conventional power module substrate 1, the metal layer 7 is bonded to the heat sink 8 via the first solder layer 5 a in a process different from the lamination bonding of the circuit layer 6 and the metal layer 7 to the insulating substrate 2. There is also a problem that the number of assembly steps increases.
In order to eliminate these points, as shown in FIG. 6, the same brazing as a brazing foil (not shown) in which the circuit layer 6 and the metal layer 7 are laminated and bonded to the upper surface and the lower surface of the insulating substrate 2, respectively. There is disclosed a power module substrate 1 in which a metal layer 7 and a radiator plate 8 are bonded using a working foil.
In the power module substrate 1 configured as described above, since the first solder layer is not used for bonding the insulating substrate 2 and the heat sink 8, the problem that the thermal cycle life of the first solder layer is shortened can be solved. In addition, the metal layer 7 can be bonded to the heat sink 8 at the same time as the circuit layer 6 and the metal layer 7 are laminated and bonded to the insulating substrate 2.
Japanese Utility Model Publication No. 61-207038 (FIG. 1)

しかし、上記改善されたパワーモジュール用基板では、大型の放熱板が比較的高価なAlSiCにより形成されているため、未だ製造コストが増大する不具合があった。
本発明の目的は、絶縁基板の熱応力による負荷を抑制することができ、製造コストを低減することができ、更に生産性を向上することができる、パワーモジュール用基板を提供することにある。
本発明の別の目的は、ヒートシンクによる冷却効率を向上することができ、半導体チップを回路層に取付けるためのはんだ層の劣化を抑制することができる、パワーモジュール用基板を提供することにある。
However, in the improved power module substrate described above, the large heat sink is formed of relatively expensive AlSiC, so that there is still a problem that the manufacturing cost increases.
The objective of this invention is providing the board | substrate for power modules which can suppress the load by the thermal stress of an insulated substrate, can reduce manufacturing cost, and can improve productivity further.
Another object of the present invention is to provide a power module substrate capable of improving the cooling efficiency by the heat sink and suppressing the deterioration of the solder layer for attaching the semiconductor chip to the circuit layer.

請求項1に係る発明は、図1に示すように、放熱板18と緩衝層14と金属層17と絶縁基板12と回路層16がこの順序で積層接着されたパワーモジュール用基板であって、放熱板18と金属層17と回路層16がそれぞれAlから構成され、回路層16にはんだ層22を介して半導体チップ23が搭載される所定のパターンが形成され、緩衝層14が絶縁基板12の熱膨張係数と放熱板18の熱膨張係数の間の熱膨張係数を有する材料により形成されたことを特徴とする。
この請求項1に記載されたパワーモジュール用基板では、絶縁基板12及び放熱板18の熱膨張係数の相違に基づく絶縁基板12及び放熱板18の変形の相違が緩衝層14により吸収されるので、絶縁基板12に発生する内部応力が小さくなり、絶縁基板12の熱応力による負荷を抑制することができる。
また、放熱板18がAlにより形成されるので、放熱板が高価なAlSiCにより形成される従来のパワーモジュール用基板より製造コストを低減することができる。
The invention according to claim 1 is a power module substrate in which a heat radiating plate 18, a buffer layer 14, a metal layer 17, an insulating substrate 12, and a circuit layer 16 are laminated and bonded in this order, as shown in FIG. The heat radiating plate 18, the metal layer 17, and the circuit layer 16 are each composed of Al, a predetermined pattern on which the semiconductor chip 23 is mounted is formed on the circuit layer 16 via the solder layer 22, and the buffer layer 14 is formed on the insulating substrate 12. It is characterized by being formed of a material having a thermal expansion coefficient between the thermal expansion coefficient and the thermal expansion coefficient of the radiator plate 18.
In the power module substrate described in claim 1, since the difference in deformation of the insulating substrate 12 and the heat radiating plate 18 based on the difference in thermal expansion coefficient between the insulating substrate 12 and the heat radiating plate 18 is absorbed by the buffer layer 14, The internal stress generated in the insulating substrate 12 is reduced, and the load due to the thermal stress of the insulating substrate 12 can be suppressed.
Moreover, since the heat sink 18 is made of Al, the manufacturing cost can be reduced as compared with the conventional power module substrate in which the heat sink is made of expensive AlSiC.

請求項2に係る発明は、請求項1に係る発明であって、放熱板18と緩衝層14と金属層17と絶縁基板12と回路層16がそれぞれAl−Si系箔を介してロー付けされたことを特徴とする。
この請求項2に記載されたパワーモジュール用基板では、放熱板18と緩衝層14と金属層17と絶縁基板12と回路層16の積層接着を1回の熱処理で行うことができ、その製造コストを低減してその生産性を向上することができる。
The invention according to claim 2 is the invention according to claim 1, wherein the heat sink 18, the buffer layer 14, the metal layer 17, the insulating substrate 12, and the circuit layer 16 are respectively brazed via an Al—Si-based foil. It is characterized by that.
In the power module substrate according to the second aspect, the heat sink 18, the buffer layer 14, the metal layer 17, the insulating substrate 12, and the circuit layer 16 can be laminated and bonded by a single heat treatment. And the productivity can be improved.

請求項3に係る発明は、請求項1又は2に係る発明であって、絶縁基板12がAlN,Si34又はAl23により形成され、緩衝層14がAlSiC、カーボン板又はAlC複合材により形成されたことを特徴とする。
この請求項3に記載されたパワーモジュール用基板では、絶縁基板12及び緩衝層14を具体的に特定することにより製造コストを更に低減してその生産性を向上することができる。
The invention according to claim 3 is the invention according to claim 1 or 2, wherein the insulating substrate 12 is formed of AlN, Si 3 N 4 or Al 2 O 3 , and the buffer layer 14 is AlSiC, a carbon plate, or an AlC composite. It is characterized by being formed of a material.
In the power module substrate according to the third aspect, by specifically specifying the insulating substrate 12 and the buffer layer 14, it is possible to further reduce the manufacturing cost and improve the productivity.

請求項4に係る発明は、請求項1ないし3いずれか1項2に係る発明であって、緩衝層14の表面積が絶縁基板12の表面積の1〜3倍であり、緩衝層14の厚さが絶縁基板12の厚さの1.5〜50倍であることを特徴とする。
この請求項4に記載されたパワーモジュール用基板では、絶縁基板12及び放熱板18の熱膨張係数の相違に基づく絶縁基板12及び放熱板18の変形の相違が緩衝層14により確実に吸収されるので、絶縁基板12の熱応力による負荷を確実に抑制することができる。
The invention according to claim 4 is the invention according to any one of claims 1 to 3, wherein the surface area of the buffer layer 14 is 1 to 3 times the surface area of the insulating substrate 12, and the thickness of the buffer layer 14 is Is 1.5 to 50 times the thickness of the insulating substrate 12.
In the power module substrate according to the fourth aspect, the buffer layer 14 reliably absorbs the difference in deformation of the insulating substrate 12 and the heat radiating plate 18 based on the difference in thermal expansion coefficient between the insulating substrate 12 and the heat radiating plate 18. Therefore, the load due to the thermal stress of the insulating substrate 12 can be reliably suppressed.

請求項5に係る発明は、請求項1ないし4いずれか1項に係る発明であって、図2に示すように、放熱板48に取付けられ内部に冷却水19aが通過する冷却水通路19bが形成された水冷シンク部19を更に備え、放熱板48の表面に緩衝層14を嵌入可能な溝48a又は凹部が形成され、緩衝層14が溝48a又は凹部に嵌入された状態で放熱板48に接着されたことを特徴とする。
この請求項5記載されたパワーモジュール用基板では、緩衝層14を水冷シンク部19に近付けることができるので、熱が緩衝層14から放熱板48を通って速やかに水冷シンク部19に伝わる。この結果、水冷シンク部19の冷却水通路19bを通過する冷却水19aが上記熱を受け取ってパワーモジュール用基板41外に持ち去るので、その冷却効率を向上することができ、パワーモジュール用基板41が過熱することはない。
The invention according to claim 5 is the invention according to any one of claims 1 to 4, wherein, as shown in FIG. 2, there is provided a cooling water passage 19b attached to the radiator plate 48 and through which the cooling water 19a passes. The formed water-cooled sink portion 19 is further provided, and a groove 48a or a recessed portion into which the buffer layer 14 can be fitted is formed on the surface of the heat radiating plate 48. The buffer layer 14 is fitted into the groove 48a or the recessed portion in the heat radiating plate 48 It is characterized by being bonded.
In the power module substrate according to the fifth aspect, since the buffer layer 14 can be brought close to the water-cooled sink portion 19, heat is quickly transferred from the buffer layer 14 to the water-cooled sink portion 19 through the heat radiating plate 48. As a result, the cooling water 19a passing through the cooling water passage 19b of the water cooling sink portion 19 receives the heat and takes it out of the power module substrate 41, so that the cooling efficiency can be improved, and the power module substrate 41 There is no overheating.

請求項6に係る発明は、請求項1ないし4いずれかに係る発明であって、図4に示すように、放熱板は内部に冷却水73aが通過する冷却水通路73bが形成された水冷式ヒートシンク73であることを特徴とする。
この請求項6記載されたパワーモジュール用基板71では、緩衝層14を水冷式ヒートシンク73に直接積層接着するので、熱が緩衝層14から水冷式ヒートシンク73に速やかに伝わる。この結果、水冷式ヒートシンク73を通過する冷却水73aが上記熱を受け取ってパワーモジュール用基板71外に持ち去るので、冷却効率を更に向上することができ、パワーモジュール用基板71が過熱することはない。
The invention according to claim 6 is the invention according to any one of claims 1 to 4, and as shown in FIG. 4, the heat sink is a water-cooled type in which a cooling water passage 73 b through which the cooling water 73 a passes is formed. It is a heat sink 73.
In the power module substrate 71 described in claim 6, since the buffer layer 14 is directly laminated and bonded to the water-cooled heat sink 73, heat is quickly transferred from the buffer layer 14 to the water-cooled heat sink 73. As a result, the cooling water 73a passing through the water-cooled heat sink 73 receives the heat and takes it out of the power module substrate 71, so that the cooling efficiency can be further improved and the power module substrate 71 is not overheated. .

本発明のパワーモジュール用基板では、放熱板と緩衝層と金属層と絶縁基板と回路層がこの順序で積層接着され、放熱板と金属層と回路層がそれぞれAlから構成されるので、放熱板が高価なAlSiCにより形成される従来のパワーモジュール用基板より製造コストを低減することができる。また、回路層にはんだ層を介して半導体チップが搭載される所定のパターンが形成され、緩衝層が絶縁基板の熱膨張係数と放熱板の熱膨張係数の間の熱膨張係数を有する材料により形成されるので、絶縁基板及び放熱板の熱膨張係数の相違に基づく絶縁基板及び放熱板の変形の相違が緩衝層により吸収されるので、絶縁基板に発生する内部応力が小さくなり、絶縁基板の熱応力による負荷を抑制することができる。
この場合、放熱板と緩衝層と金属層と絶縁基板と回路層がそれぞれAl−Si系箔を介してロー付けされたものであれば、それらの積層接着を1回の熱処理で行うことができ、その製造コストを低減してその生産性を向上することができる。また、絶縁基板がAlN,Si34又はAl23により形成され、緩衝層がAlSiC、カーボン板又はAlC複合材により形成されたものであれば、その製造コストを更に低減してその生産性を向上することができる。
In the power module substrate of the present invention, the heat sink, the buffer layer, the metal layer, the insulating substrate, and the circuit layer are laminated and bonded in this order, and the heat sink, the metal layer, and the circuit layer are each made of Al. However, the manufacturing cost can be reduced as compared with the conventional power module substrate formed of expensive AlSiC. In addition, a predetermined pattern for mounting the semiconductor chip is formed on the circuit layer via the solder layer, and the buffer layer is formed of a material having a thermal expansion coefficient between the thermal expansion coefficient of the insulating substrate and the thermal expansion coefficient of the heat sink. Therefore, since the difference in deformation of the insulating substrate and the heat sink due to the difference in thermal expansion coefficient between the insulating substrate and the heat sink is absorbed by the buffer layer, the internal stress generated in the insulating substrate is reduced and the heat of the insulating substrate is reduced. Load due to stress can be suppressed.
In this case, if the heat sink, the buffer layer, the metal layer, the insulating substrate, and the circuit layer are each brazed via an Al-Si-based foil, the lamination adhesion can be performed by a single heat treatment. The production cost can be reduced and the productivity can be improved. Further, if the insulating substrate is made of AlN, Si 3 N 4 or Al 2 O 3 and the buffer layer is made of AlSiC, a carbon plate or an AlC composite material, the production cost can be further reduced. Can be improved.

また、緩衝層の表面積が絶縁基板の表面積の1〜3倍であり、緩衝層の厚さが絶縁基板の厚さの1.5〜50倍であれば、絶縁基板及び放熱板の熱膨張係数の相違に基づく絶縁基板及び放熱板の変形の相違が緩衝層により確実に吸収されるので、絶縁基板の熱応力による負荷を確実に抑制することができる。
また、放熱板に取付けられ内部に冷却水が通過する冷却水通路が形成された水冷シンク部を更に備え、放熱板の表面に緩衝層を嵌入可能な溝又は凹部が形成され、緩衝層が溝又は凹部に嵌入された状態で放熱板に接着されたものであれば、緩衝層を水冷シンク部に近付けることができるので、熱が緩衝層から放熱板を通って速やかに水冷シンク部に伝わり、水冷シンク部の冷却水通路を通過する冷却水が上記熱を受け取ってパワーモジュール用基板外に持ち去るので、その冷却効率を向上することができ、パワーモジュール用基板が過熱することはない。
一方、放熱板は内部に冷却水が通過する冷却水通路が形成された水冷式ヒートシンクであれば、緩衝層を水冷式ヒートシンクに直接積層接着するので、熱が緩衝層から水冷式ヒートシンクに速やかに伝わる。この結果、水冷式ヒートシンクを通過する冷却水が上記熱を受け取ってパワーモジュール用基板外に持ち去るので、冷却効率を更に向上することができ、パワーモジュール用基板が過熱することはない。
Further, if the surface area of the buffer layer is 1 to 3 times the surface area of the insulating substrate and the thickness of the buffer layer is 1.5 to 50 times the thickness of the insulating substrate, the thermal expansion coefficient of the insulating substrate and the heat sink Since the difference in deformation of the insulating substrate and the heat radiating plate based on the difference is reliably absorbed by the buffer layer, the load due to the thermal stress of the insulating substrate can be reliably suppressed.
In addition, it further includes a water-cooled sink portion that is attached to the heat radiating plate and has a cooling water passage through which cooling water passes. A groove or a recess into which the buffer layer can be fitted is formed on the surface of the heat radiating plate. Or, if it is attached to the heat sink in a state of being fitted in the recess, the buffer layer can be brought close to the water-cooled sink part, so that heat is quickly transferred from the buffer layer through the heat sink to the water-cooled sink part, Since the cooling water passing through the cooling water passage of the water cooling sink part receives the heat and takes it out of the power module substrate, the cooling efficiency can be improved and the power module substrate does not overheat.
On the other hand, if the heat sink is a water-cooled heat sink with a cooling water passage through which cooling water passes, the buffer layer is directly laminated and bonded to the water-cooled heat sink, so heat is quickly transferred from the buffer layer to the water-cooled heat sink. It is transmitted. As a result, the cooling water passing through the water-cooled heat sink receives the heat and takes it out of the power module substrate, so that the cooling efficiency can be further improved and the power module substrate is not overheated.

次に本発明の第1の実施の形態を図面に基づいて説明する。
図1に示すように、本発明のパワーモジュール用基板11は絶縁基板12と、ヒートシンク13と、絶縁基板12とヒートシンク13との間に積層接着された緩衝層14とを備える。絶縁基板12はAlN,Si34又はAl23により形成され、絶縁基板12の上面及び下面には回路層16及び金属層17がそれぞれ積層接着される。回路層16及び金属層17はAlにより厚さ0.1〜0.5mmに形成される。またヒートシンク13は放熱板18と、この放熱板18に雄ねじ部材21(例えば、なべ小ねじ等)により取付けられた水冷シンク部19とを有する。放熱板18はAlにより形成され、絶縁基板12の表面積の1〜3倍の表面積を有し、かつ絶縁基板12の厚さの1.5〜50倍の厚さを有する。水冷シンク部19はAl,Cu等により形成され、内部に冷却水19aが通過する冷却水通路19bが形成され、放熱板18と略同一の表面積を有する。
Next, a first embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, the power module substrate 11 of the present invention includes an insulating substrate 12, a heat sink 13, and a buffer layer 14 laminated and bonded between the insulating substrate 12 and the heat sink 13. The insulating substrate 12 is made of AlN, Si 3 N 4 or Al 2 O 3 , and the circuit layer 16 and the metal layer 17 are laminated and bonded to the upper surface and the lower surface of the insulating substrate 12, respectively. The circuit layer 16 and the metal layer 17 are made of Al to a thickness of 0.1 to 0.5 mm. The heat sink 13 includes a heat radiating plate 18 and a water-cooled sink portion 19 attached to the heat radiating plate 18 with a male screw member 21 (for example, a pan head screw). The heat radiating plate 18 is made of Al, has a surface area of 1 to 3 times the surface area of the insulating substrate 12, and has a thickness of 1.5 to 50 times the thickness of the insulating substrate 12. The water-cooled sink portion 19 is formed of Al, Cu or the like, and a cooling water passage 19b through which the cooling water 19a passes is formed. The water-cooling sink portion 19 has substantially the same surface area as the heat radiating plate 18.

緩衝層14は絶縁基板12の熱膨張係数とヒートシンク13の熱膨張係数の間の熱膨張係数を有する材料、即ちAlSiC、カーボン板又はAlC複合材により形成されることが好ましい。AlN,Si34及びAl23の熱膨張係数はそれぞれ約4.3×10-6/℃,約2.8×10-6/℃及び約7.3×10-6/℃であり、Al及びCuの熱膨張係数はそれぞれ約25.0×10-6/℃及び約16.5×10-6/℃であり、AlSiCの熱膨張係数は約7.5×10-6/℃である。 The buffer layer 14 is preferably formed of a material having a thermal expansion coefficient between the thermal expansion coefficient of the insulating substrate 12 and the heat sink 13, that is, AlSiC, a carbon plate, or an AlC composite material. The thermal expansion coefficients of AlN, Si 3 N 4 and Al 2 O 3 are about 4.3 × 10 −6 / ° C., about 2.8 × 10 −6 / ° C. and about 7.3 × 10 −6 / ° C., respectively. The thermal expansion coefficients of Al and Cu are about 25.0 × 10 −6 / ° C. and about 16.5 × 10 −6 / ° C., respectively, and the thermal expansion coefficient of AlSiC is about 7.5 × 10 −6 / ° C. ° C.

また緩衝層14は絶縁基板12の表面積の1〜3倍、好ましくは1〜2倍の表面積を有する。即ち、緩衝層14は放熱板18より表面積が小さく形成される。緩衝層14の表面積を絶縁基板12の表面積の1〜3倍に限定したのは、1倍未満では後述する半導体チップ23からの熱を速やかに放熱板18に伝えることができず、3倍を超えると製造コストが増大するからである。また緩衝層14の厚さは絶縁基板12の厚さの1.5〜50倍、更に2〜10倍であることが好ましい。緩衝層14の厚さを1.5〜50倍の範囲に限定したのは、1.5倍未満では絶縁基板12及びヒートシンク13の熱膨張係数の相違に基づく絶縁基板12及びヒートシンク13の変形の相違を十分に吸収することができず、50倍を超えるとパワーモジュール用基板11が大型化しかつ製造コストが増大するからである。   The buffer layer 14 has a surface area of 1 to 3 times, preferably 1 to 2 times the surface area of the insulating substrate 12. That is, the buffer layer 14 has a smaller surface area than the heat sink 18. The reason why the surface area of the buffer layer 14 is limited to 1 to 3 times the surface area of the insulating substrate 12 is that if it is less than 1 time, heat from the semiconductor chip 23 (to be described later) cannot be quickly transmitted to the heat radiating plate 18. This is because the manufacturing cost increases if the ratio is exceeded. The thickness of the buffer layer 14 is preferably 1.5 to 50 times, more preferably 2 to 10 times the thickness of the insulating substrate 12. The reason why the thickness of the buffer layer 14 is limited to the range of 1.5 to 50 times is that if the thickness is less than 1.5 times, the deformation of the insulating substrate 12 and the heat sink 13 is based on the difference in thermal expansion coefficient between the insulating substrate 12 and the heat sink 13. This is because the difference cannot be sufficiently absorbed, and if it exceeds 50 times, the power module substrate 11 becomes larger and the manufacturing cost increases.

また絶縁基板12と緩衝層14とヒートシンク13とはろう付け用箔(図示せず)を介して積層接着される。金属層17と放熱板18がAlにより形成されるので、ろう付け用箔としては87.0〜96.0重量%のAlと4.0〜13.0重量%のSiとの合金であるAl−Si系箔を用いることが好ましい。更に絶縁基板12上面の回路層16にははんだ層22を介して半導体チップ23が取付けられる。   The insulating substrate 12, the buffer layer 14, and the heat sink 13 are laminated and bonded via a brazing foil (not shown). Since the metal layer 17 and the heat radiating plate 18 are made of Al, the brazing foil is an alloy of 87.0 to 96.0% by weight of Al and 4.0 to 13.0% by weight of Si. It is preferable to use a Si-based foil. Further, a semiconductor chip 23 is attached to the circuit layer 16 on the upper surface of the insulating substrate 12 via a solder layer 22.

このように構成されたパワーモジュール用基板の製造方法を説明する。
回路層16,金属層17及び放熱板18がAlにより形成されるので、先ず放熱板18の上にAl−Si系箔(図示せず),緩衝層14,Al−Si系箔,金属層17,Al−Si系箔,絶縁基板12,Al−Si系箔及び回路層16を重ねた状態で、これらに荷重0.5〜5kgf/cm2を加え、真空中で600〜650℃に加熱することにより積層体を作製する。このように放熱板18,緩衝層14,金属層17,絶縁基板12及び回路層16を一体として1回の熱処理で積層体を作製することができるので、パワーモジュール用基板11の生産性を向上することができる。次にこの積層体の回路層16をエッチング法により所定のパターンの回路に形成した後に、上記積層体の回路層16にはんだ層22を介して半導体チップ23を搭載する。更にこの積層体を水冷シンク部19に載せて放熱板18を雄ねじ部材21により水冷シンク部19に取付ける。
A method for manufacturing the power module substrate thus configured will be described.
Since the circuit layer 16, the metal layer 17, and the heat sink 18 are made of Al, first, an Al—Si foil (not shown), a buffer layer 14, an Al—Si foil, and a metal layer 17 are formed on the heat sink 18. , Al-Si-based foil, insulating substrate 12, Al-Si-based foil, and circuit layer 16 are overlaid, and a load of 0.5 to 5 kgf / cm 2 is applied thereto and heated to 600 to 650 ° C. in a vacuum. Thus, a laminate is produced. As described above, since the heat sink 18, the buffer layer 14, the metal layer 17, the insulating substrate 12, and the circuit layer 16 can be integrated into a laminate by a single heat treatment, the productivity of the power module substrate 11 is improved. can do. Next, after forming the circuit layer 16 of this laminated body into a circuit with a predetermined pattern by an etching method, a semiconductor chip 23 is mounted on the circuit layer 16 of the laminated body via a solder layer 22. Further, this laminate is placed on the water-cooled sink portion 19 and the heat radiating plate 18 is attached to the water-cooled sink portion 19 with the male screw member 21.

このように製造されたパワーモジュール用基板では、回路層16,金属層17及び放熱板18がAlにより形成されるので、600〜650℃という高温で絶縁基板12,緩衝層14,放熱板18等が接着された後に、室温まで冷却されても、絶縁基板12及び放熱板18の熱膨張係数の相違に基づく絶縁基板12及び放熱板18の変形の相違がこれらの間の熱膨張係数を有する緩衝層14により吸収される。この結果、絶縁基板12に発生する内部応力が小さくなるので、絶縁基板12の熱応力による負荷を抑制することができる。また絶縁基板12及びヒートシンク13の熱膨張又は熱収縮時の変形の相違が緩衝層14により吸収されるので、半導体チップ23を回路層16に取付けるはんだ層22の劣化を抑制することができる。   In the power module substrate thus manufactured, since the circuit layer 16, the metal layer 17, and the heat sink 18 are formed of Al, the insulating substrate 12, the buffer layer 14, the heat sink 18 and the like at a high temperature of 600 to 650 ° C. Even if the insulating substrate 12 and the heat radiating plate 18 are cooled to room temperature after being bonded, the difference in deformation of the insulating substrate 12 and the heat radiating plate 18 due to the difference in thermal expansion coefficient between the insulating substrate 12 and the heat radiating plate 18 has a coefficient of thermal expansion between them. Absorbed by layer 14. As a result, since the internal stress generated in the insulating substrate 12 is reduced, the load due to the thermal stress of the insulating substrate 12 can be suppressed. Further, since the difference in deformation during thermal expansion or contraction of the insulating substrate 12 and the heat sink 13 is absorbed by the buffer layer 14, it is possible to suppress deterioration of the solder layer 22 that attaches the semiconductor chip 23 to the circuit layer 16.

図2は本発明の第2の実施の形態を示す。図2において図1と同一符号は同一部品を示す。
この実施の形態では、ヒートシンク43の放熱板48表面に緩衝層14を嵌入可能な溝48aが形成され、緩衝層14がこの溝48aに嵌入された状態で放熱板48に接着されるように構成される。上記以外は第1の実施の形態と同一に構成される。
このように構成されたパワーモジュール用基板41では、緩衝層14を水冷シンク部19に近付けることができるので、半導体チップ23が発生した熱が緩衝層14から放熱板48を通って速やかに水冷シンク部19に伝わる。この結果、水冷シンク部19を通過する冷却水19aが上記熱を受け取ってパワーモジュール用基板41外に持ち去るので、ヒートシンク43による冷却効率を向上することができる。従って、パワーモジュール用基板41が過熱することはない。上記以外の動作は第1の実施の形態の動作と略同様であるので、繰返しの説明を省略する。
FIG. 2 shows a second embodiment of the present invention. 2, the same reference numerals as those in FIG. 1 denote the same components.
In this embodiment, a groove 48a into which the buffer layer 14 can be fitted is formed on the surface of the heat sink 48 of the heat sink 43, and the buffer layer 14 is bonded to the heat sink 48 in a state of being fitted into the groove 48a. Is done. The configuration other than the above is the same as that of the first embodiment.
In the power module substrate 41 configured as described above, the buffer layer 14 can be brought close to the water-cooled sink portion 19, so that the heat generated by the semiconductor chip 23 can be promptly passed from the buffer layer 14 through the radiator plate 48 to the water-cooled sink. It is transmitted to part 19. As a result, the cooling water 19a passing through the water-cooled sink portion 19 receives the heat and takes it out of the power module substrate 41, so that the cooling efficiency by the heat sink 43 can be improved. Therefore, the power module substrate 41 does not overheat. Since the operation other than the above is substantially the same as the operation of the first embodiment, repeated description will be omitted.

図3は本発明の第3の実施の形態を示す。図3において図2と同一符号は同一部品を示す。
この実施の形態では、ヒートシンク63の放熱板68表面に緩衝層64を嵌入可能な溝68aが形成され、この溝68aの底面に凹凸68bが形成され、更にこの溝68aに嵌入される緩衝層64の底面に上記溝68a底面の凹凸68bに相応する凹凸64aが形成される。上記以外は第2の実施の形態と同一に構成される。
このように構成されたパワーモジュール用基板61では、緩衝層64と放熱板68との接触面積が増大するので、半導体チップ23にて発生した熱が緩衝層64から放熱板68に速やかに伝わる。上記以外の動作は第2の実施の形態の動作と略同様であるので、繰返しの説明を省略する。
なお、上記第2及び第3の実施の形態では、ヒートシンクの表面に緩衝層を嵌入可能な溝を形成し、緩衝層を溝に嵌入した状態でヒートシンクに接着したが、ヒートシンクの表面に緩衝層を嵌入可能な凹部を形成し、緩衝層を凹部に嵌入した状態でヒートシンクに接着してもよい。
FIG. 3 shows a third embodiment of the present invention. 3, the same reference numerals as those in FIG. 2 denote the same components.
In this embodiment, a groove 68a into which the buffer layer 64 can be fitted is formed on the surface of the heat sink plate 68 of the heat sink 63, an unevenness 68b is formed on the bottom surface of the groove 68a, and the buffer layer 64 fitted into the groove 68a. Concavities and convexities 64a corresponding to the concavities and convexities 68b on the bottom surface of the groove 68a are formed on the bottom surface. The configuration other than the above is the same as that of the second embodiment.
In the power module substrate 61 configured as described above, the contact area between the buffer layer 64 and the heat radiating plate 68 increases, so that heat generated in the semiconductor chip 23 is quickly transmitted from the buffer layer 64 to the heat radiating plate 68. Since the operation other than the above is substantially the same as the operation of the second embodiment, repeated description will be omitted.
In the second and third embodiments, a groove in which a buffer layer can be fitted is formed on the surface of the heat sink, and the buffer layer is adhered to the heat sink in a state in which the buffer layer is fitted in the groove. May be bonded to the heat sink in a state where the buffer layer is inserted into the recess.

図4は本発明の第4の実施の形態を示す。図4において図1と同一符号は同一部品を示す。
この実施の形態では、放熱板として、内部に冷却水73aが通過する冷却水通路73bが形成された水冷式ヒートシンク73が使用される。この水冷式ヒートシンク73はAlにより形成され、絶縁基板12の表面積の1〜3倍の表面積を有し、かつ絶縁基板12の厚さの1.5〜50倍の厚さを有する。緩衝層14はこの水冷式ヒートシンク73にろう付け用箔(図示せず)を介して直接積層接着される。ろう付け用箔としては87.0〜96.0重量%のAlと4.0〜13.0重量%のSiとの合金であるAl−Si系箔を用いることが好ましい。上記以外は第1の実施の形態と同一に構成される。
このように構成されたパワーモジュール用基板71では、緩衝層14が水冷式ヒートシンク73に直接積層接着されるので、半導体チップ23が発生した熱が緩衝層14から速やかに水冷式ヒートシンク73に伝わる。この結果、水冷式ヒートシンク73を通過する冷却水73aが上記熱を受け取ってパワーモジュール用基板71外に持ち去るので、ヒートシンク73による冷却効率を更に向上することができる。上記以外の動作は第1の実施の形態の動作と略同様であるので、繰返しの説明を省略する。
FIG. 4 shows a fourth embodiment of the present invention. 4, the same reference numerals as those in FIG. 1 denote the same components.
In this embodiment, a water-cooled heat sink 73 having a cooling water passage 73b through which the cooling water 73a passes is used as the heat radiating plate. The water-cooled heat sink 73 is made of Al, has a surface area that is 1 to 3 times the surface area of the insulating substrate 12, and has a thickness that is 1.5 to 50 times the thickness of the insulating substrate 12. The buffer layer 14 is directly laminated and bonded to the water-cooled heat sink 73 via a brazing foil (not shown). As the brazing foil, it is preferable to use an Al—Si based foil which is an alloy of 87.0 to 96.0% by weight of Al and 4.0 to 13.0% by weight of Si. The configuration other than the above is the same as that of the first embodiment.
In the power module substrate 71 configured as described above, the buffer layer 14 is directly laminated and bonded to the water-cooled heat sink 73, so that the heat generated by the semiconductor chip 23 is quickly transferred from the buffer layer 14 to the water-cooled heat sink 73. As a result, the cooling water 73a passing through the water-cooled heat sink 73 receives the heat and takes it out of the power module substrate 71, so that the cooling efficiency by the heat sink 73 can be further improved. Since the operation other than the above is substantially the same as the operation of the first embodiment, repeated description will be omitted.

本発明第1実施形態のパワーモジュール用基板の断面図。Sectional drawing of the board | substrate for power modules of 1st Embodiment of this invention. 本発明の第2実施形態を示す図1に対応する断面図。Sectional drawing corresponding to FIG. 1 which shows 2nd Embodiment of this invention. 本発明の第3実施形態を示す図1に対応する断面図。Sectional drawing corresponding to FIG. 1 which shows 3rd Embodiment of this invention. 本発明の第4実施形態を示す図1に対応する断面図。Sectional drawing corresponding to FIG. 1 which shows 4th Embodiment of this invention. 従来例を示す図1に対応する断面図。Sectional drawing corresponding to FIG. 1 which shows a prior art example. 別の従来例を示す図1に対応する断面図。Sectional drawing corresponding to FIG. 1 which shows another prior art example.

符号の説明Explanation of symbols

11,41,61,71 パワーモジュール用基板
12 絶縁基板
14,64 緩衝層
16 回路層
17 金属層
18,48,68 放熱板
19 水冷シンク部
19a 冷却水
19b 冷却水通路
22 はんだ層
23 半導体チップ
48a,68a 溝
73 水冷式ヒートシンク(ヒートシンク)
73a 冷却水
73b 冷却水通路
11, 41, 61, 71 Power module substrate 12 Insulating substrate 14, 64 Buffer layer 16 Circuit layer 17 Metal layer 18, 48, 68 Heat sink 19 Water cooling sink portion 19a Cooling water 19b Cooling water passage 22 Solder layer 23 Semiconductor chip 48a , 68a Groove 73 Water-cooled heat sink (heat sink)
73a Cooling water 73b Cooling water passage

Claims (6)

放熱板(18)と緩衝層(14,64)と金属層(17)と絶縁基板(12)と回路層(16)がこの順序で積層接着されたパワーモジュール用基板であって、
前記放熱板(18)と前記金属層(17)と前記回路層(16)がそれぞれAlから構成され、
前記回路層(16)にはんだ層(22)を介して半導体チップ(23)が搭載される所定のパターンが形成され、
前記緩衝層(14,64)が前記絶縁基板(12)の熱膨張係数と前記放熱板(18)の熱膨張係数の間の熱膨張係数を有する材料により形成された
ことを特徴とするパワーモジュール用基板。
A power module substrate in which a heat sink (18), a buffer layer (14, 64), a metal layer (17), an insulating substrate (12), and a circuit layer (16) are laminated and bonded in this order,
The heat sink (18), the metal layer (17) and the circuit layer (16) are each composed of Al,
A predetermined pattern on which the semiconductor chip (23) is mounted on the circuit layer (16) through the solder layer (22) is formed,
The power module, wherein the buffer layer (14, 64) is formed of a material having a thermal expansion coefficient between a thermal expansion coefficient of the insulating substrate (12) and a thermal expansion coefficient of the heat sink (18). Substrate.
放熱板(18)と緩衝層(14)と金属層(17)と絶縁基板(12)と回路層(16)がそれぞれAl−Si系箔を介してロー付けされた請求項1記載のパワーモジュール用基板。 The power module according to claim 1, wherein the heat sink (18), the buffer layer (14), the metal layer (17), the insulating substrate (12), and the circuit layer (16) are brazed via Al-Si-based foils, respectively. Substrate. 絶縁基板(12)がAlN,Si34又はAl23により形成され、緩衝層(14,64)がAlSiC、カーボン板又はAlC複合材により形成された請求項1又は2記載のパワーモジュール用基板。 The power module according to claim 1 or 2, wherein the insulating substrate (12) is made of AlN, Si 3 N 4 or Al 2 O 3 and the buffer layer (14, 64) is made of AlSiC, a carbon plate or an AlC composite material. Substrate. 緩衝層(14,64)の表面積が前記絶縁基板(12)の表面積の1〜3倍であり、前記緩衝層(14,64)の厚さが絶縁基板(12)の厚さの1.5〜50倍である請求項1ないし3いずれか1項に記載のパワーモジュール用基板。 The surface area of the buffer layer (14, 64) is 1 to 3 times the surface area of the insulating substrate (12), and the thickness of the buffer layer (14, 64) is 1.5 times the thickness of the insulating substrate (12). The power module substrate according to any one of claims 1 to 3, wherein the power module substrate is -50 times. 放熱板(48,68)に取付けられ内部に冷却水(19a)が通過する冷却水通路(19b)が形成された水冷シンク部(19)を更に備え、放熱板(48,68)の表面に緩衝層(14,64)を嵌入可能な溝(48a,68a)又は凹部が形成され、前記緩衝層(14,64)が前記溝(48a,68a)又は前記凹部に嵌入された状態で前記放熱板(48,68)に接着された請求項1ないし4いずれか1項に記載のパワーモジュール用基板。 It further includes a water cooling sink (19) attached to the radiator plate (48,68) and having a cooling water passage (19b) through which the cooling water (19a) passes, and on the surface of the radiator plate (48,68). Grooves (48a, 68a) or recesses into which the buffer layers (14, 64) can be inserted are formed, and the heat dissipation is performed with the buffer layers (14, 64) inserted into the grooves (48a, 68a) or the recesses. The power module substrate according to any one of claims 1 to 4, wherein the power module substrate is bonded to a plate (48, 68). 放熱板は内部に冷却水(73a)が通過する冷却水通路(73b)が形成された水冷式ヒートシンク(73)である請求項1ないし4いずれか1項に記載のパワーモジュール用基板。
The power module substrate according to any one of claims 1 to 4, wherein the radiator plate is a water-cooled heat sink (73) in which a cooling water passage (73b) through which the cooling water (73a) passes is formed.
JP2005219775A 1999-03-24 2005-07-29 Power module substrate manufacturing method Expired - Lifetime JP4487881B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005219775A JP4487881B2 (en) 1999-03-24 2005-07-29 Power module substrate manufacturing method

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP7955499 1999-03-24
JP25425999 1999-09-08
JP2005219775A JP4487881B2 (en) 1999-03-24 2005-07-29 Power module substrate manufacturing method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2000002700A Division JP2001148451A (en) 1999-03-24 2000-01-11 Power module board

Publications (2)

Publication Number Publication Date
JP2005328087A true JP2005328087A (en) 2005-11-24
JP4487881B2 JP4487881B2 (en) 2010-06-23

Family

ID=35474123

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005219775A Expired - Lifetime JP4487881B2 (en) 1999-03-24 2005-07-29 Power module substrate manufacturing method

Country Status (1)

Country Link
JP (1) JP4487881B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011181846A (en) * 2010-03-03 2011-09-15 Mitsubishi Materials Corp Substrate for power module, method of manufacturing the same, substrate for power module with heat sink, and power module
KR20150092150A (en) * 2012-12-06 2015-08-12 미쓰비시 마테리알 가부시키가이샤 Substrate for power modules, substrate with heat sink for power modules, power module, method for producing substrate for power modules, paste for copper plate bonding, and method for producing bonded body
WO2019180914A1 (en) 2018-03-23 2019-09-26 三菱マテリアル株式会社 Electronic-component-mounted module
WO2019180913A1 (en) 2018-03-23 2019-09-26 三菱マテリアル株式会社 Method for manufacturing electronic-component-mounted module

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6199399A (en) * 1984-10-22 1986-05-17 株式会社日立製作所 Electrically insulating cooler
JPS61207038U (en) * 1985-06-14 1986-12-27
JPS6281047A (en) * 1985-10-04 1987-04-14 Hitachi Ltd Semiconductor device
JPH04192341A (en) * 1990-11-24 1992-07-10 Hitachi Ltd Semiconductor device
JPH08335652A (en) * 1995-06-09 1996-12-17 Mitsubishi Materials Corp Substrate for power module and its production
JPH1065075A (en) * 1996-08-22 1998-03-06 Mitsubishi Materials Corp Ceramic circuit board with heat sink

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6199399A (en) * 1984-10-22 1986-05-17 株式会社日立製作所 Electrically insulating cooler
JPS61207038U (en) * 1985-06-14 1986-12-27
JPS6281047A (en) * 1985-10-04 1987-04-14 Hitachi Ltd Semiconductor device
JPH04192341A (en) * 1990-11-24 1992-07-10 Hitachi Ltd Semiconductor device
JPH08335652A (en) * 1995-06-09 1996-12-17 Mitsubishi Materials Corp Substrate for power module and its production
JPH1065075A (en) * 1996-08-22 1998-03-06 Mitsubishi Materials Corp Ceramic circuit board with heat sink

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011181846A (en) * 2010-03-03 2011-09-15 Mitsubishi Materials Corp Substrate for power module, method of manufacturing the same, substrate for power module with heat sink, and power module
KR20150092150A (en) * 2012-12-06 2015-08-12 미쓰비시 마테리알 가부시키가이샤 Substrate for power modules, substrate with heat sink for power modules, power module, method for producing substrate for power modules, paste for copper plate bonding, and method for producing bonded body
US20150313011A1 (en) * 2012-12-06 2015-10-29 Mitsubishi Materials Corporation Power module substrate, power module substrate with heat sink, power module, method of producing power module substrate, paste for copper sheet bonding, and method of producing bonded body
KR102279553B1 (en) * 2012-12-06 2021-07-19 미쓰비시 마테리알 가부시키가이샤 Substrate for power modules, substrate with heat sink for power modules, power module, method for producing substrate for power modules, paste for copper plate bonding, and method for producing bonded body
WO2019180914A1 (en) 2018-03-23 2019-09-26 三菱マテリアル株式会社 Electronic-component-mounted module
WO2019180913A1 (en) 2018-03-23 2019-09-26 三菱マテリアル株式会社 Method for manufacturing electronic-component-mounted module
KR20200135378A (en) 2018-03-23 2020-12-02 미쓰비시 마테리알 가부시키가이샤 Electronic component mounting module
US11315868B2 (en) 2018-03-23 2022-04-26 Mitsubishi Materials Corporation Electronic-component-mounted module design to reduce linear expansion coefficient mismatches
US11476127B2 (en) 2018-03-23 2022-10-18 Mitsubishi Materials Corporation Manufacturing method of electronic-component-mounted module

Also Published As

Publication number Publication date
JP4487881B2 (en) 2010-06-23

Similar Documents

Publication Publication Date Title
US6310775B1 (en) Power module substrate
KR101188150B1 (en) Cooling device
KR101215695B1 (en) Heat dissipation device and power module
US7813135B2 (en) Semiconductor device
JP6199397B2 (en) Semiconductor device and manufacturing method thereof
JP2010171279A (en) Heat radiator
JP2008235852A (en) Ceramic substrate and semiconductor module using the same
JP2005191502A (en) Electronic part cooling device
JP5151080B2 (en) Insulating substrate, method for manufacturing insulating substrate, power module substrate and power module
JP2006100640A (en) Ceramic circuit board and power semiconductor module using same
WO2008075409A1 (en) Base for power module, method for producing base for power module and power module
JP4487881B2 (en) Power module substrate manufacturing method
JP2011114157A (en) Power converter
JP4044449B2 (en) Power module substrate
JP7024331B2 (en) A method for manufacturing an insulated circuit board, a method for manufacturing an insulated circuit board with a heat sink, and a method for manufacturing a laminated structure of an insulated circuit board.
JP5018737B2 (en) Manufacturing method of semiconductor device
US20220001482A1 (en) Bonded body, heat sink-attached insulated circuit board, and heat sink
WO2017051798A1 (en) Light-emitting module substrate, light-emitting module, substrate for light-emitting module having cooler, and production method for light-emitting module substrate
JP2017139508A (en) Joined body for manufacturing substrate for power module
JP2008124187A (en) Base for power module
JP2008124187A6 (en) Power module base
JP3938079B2 (en) Power module substrate manufacturing method
JP5659935B2 (en) Semiconductor device
JP2000323630A (en) Semiconductor device
JP2010238965A (en) Substrate for power module, method for manufacturing substrate for power module, and power module

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070110

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20091208

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100205

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20100309

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20100322

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130409

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 4487881

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130409

Year of fee payment: 3

EXPY Cancellation because of completion of term