JP2005324476A - Light emitting element array head and optical printer using it - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting element array head which can reduce the number of light emitting element array chips to achieve cost down. <P>SOLUTION: The light emitting element array chip 10 is loaded with a plurality of linearly arranged light emitting elements, and has a plurality of light waveguides 14 different in pitch between the incidence edge side and the irradiation edge side formed on an optical wave-guide array substrate 12. The light emitted from the light emitting section of the light emitting elements of the light emitting element array chip 10 is made to enter the incidence edge of the light waveguides 14 to be propagated within the light waveguides 14, allowing the light emitted from the irradiation edge side of the light waveguides 14 to be condensed on the photoreceptor drum surface 20 at the back of the lens with a micro-lens array 18 formed of a plurality of lenses. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a light emitting element array head mainly used for an electrophotographic printer.

  An optical printer head used in an electrophotographic printer (optical printer) is a light source for exposing light to a photosensitive drum. FIG. 1 shows a principle diagram of an optical printer having an optical printer head. A photoconductive material (photosensitive member) such as amorphous Si is formed on the surface of the cylindrical photosensitive drum 52. The drum rotates at the printing speed. The photoreceptor surface of the rotating drum is uniformly charged by the charger 54. Then, the optical printer head 56 irradiates the photosensitive member with the light of the dot image to be printed, and neutralizes the charging where the light hits. Subsequently, the developing unit 58 applies toner to the photoconductor according to the charged state on the photoconductor. Then, the toner is transferred onto the sheet 64 sent from the cassette 62 by the transfer device 60. The paper 64 is heated and fixed by the fixing device 66 and sent to the stacker 68. On the other hand, the drum after transfer is neutralized by the erasing lamp 70 over the entire surface, and the remaining toner is removed by the cleaner 72.

  For such an optical printer head, a light emitting element array chip in which a large number of light emitting elements are linearly arranged is prepared, and a light emitting element array head in which a large number of light emitting element array chips are linearly arranged is used.

  For example, if a general light emitting element array head is a 600 dpi light emitting element array head having a short side length of A4 size paper, the light emitting element pitch p = 25.4 mm / 600 = 42.3 μm and about A large number of light emitting element array chips are arranged over 210 mm. The interval between the light emitting elements needs to be constant even at the joint between the two light emitting element array chips, and a large number of light emitting element array chips must be arranged with high positional accuracy. In addition, since the light emitting elements must always be arranged in a length corresponding to the paper size, a large number of light emitting element array chips are required, which increases the total cost of the light emitting element array head. It was.

  An object of the present invention is to provide a light emitting element array head that can reduce the number of light emitting element array chips and reduce the cost.

  It is another object of the present invention to provide a light emitting element array head that can greatly relieve the alignment accuracy of the light emitting element array chip.

  Another object of the present invention is to provide a light-emitting element array head that is thin and has a small occupied volume.

  In order to solve the problems of the prior art, the present invention provides a light emitting element array substrate on which a light emitting element array chip in which a plurality of light emitting elements are linearly arranged is mounted, and a pitch between the incident end side and the emitting end side. Having a plurality of different optical waveguides, having an optical waveguide array substrate for propagating the light emitted from the light emitting portion of the light emitting element to the incident end of the optical waveguide and propagating through the waveguide, and a plurality of lenses; A light-emitting element array head including a lens array that allows light emitted from an output end of an optical waveguide to enter and collect light behind the lens, wherein the light-emitting element pitch of the light-emitting element is on the output end side of the optical waveguide array substrate It is characterized by being 1 / integer of the pitch of the optical waveguide.

  It is preferable that light from a plurality of light emitting portions is incident on one incident end of the optical waveguide. The light emitting element array chip is preferably fixed in the vicinity of the incident end of the optical waveguide.

  The light emitting element array substrate and the optical waveguide array substrate are preferably bonded and fixed so that the light emitting portion of the light emitting element and the incident end of the optical waveguide are in close contact or close to each other. Furthermore, it is preferable that the light emitting portion of the light emitting element is disposed in close proximity or close to the incident end of the optical waveguide, and one surface of the light emitting element array chip is in close contact with the surface of the optical waveguide array substrate.

  The light emitting element array chip preferably has a self-scanning function. It is preferable that the lens array has a lens pitch equal to the pitch of the optical waveguides on the output end side of the optical waveguide array substrate, and the light emission pattern on the output end side of the optical waveguide array substrate is enlarged and imaged behind the lens array. . The light emitting element is preferably an edge-emitting type light emitting element.

  For example, when a 600 dpi light emitting element array head is manufactured using a 3000 dpi light emitting element array according to the present invention, the number of light emitting element chips can be reduced to 1/5 compared to a normal case using a 600 dpi light emitting element array. Thus, the cost of the light emitting element array head can be reduced. Moreover, the arrangement position accuracy of the light emitting element array chip can be greatly relaxed. Further, the entire head can be formed on a glass substrate having a thickness of about 1 to 2 mm, and a thin light-emitting element array head with a small occupied volume can be realized.

  FIG. 2 is a front view of a light emitting element array head according to an embodiment of the present invention. The light emitting element array head shown in FIG. 2 has eight light emitting element array chips 10 (only four are shown in the figure) and a plurality of optical waveguides 14 having different pitches on the incident end side and the emission end side. The optical waveguide array substrate 12 transmits the light emitted from the light emitting elements of the light emitting element array chip 10 to the incident end of the optical waveguide 14 and propagates in the waveguide 14, and has a plurality of lenses. The microlens array 18 which makes the light radiate | emitted from the output end of this light incident, and condenses light on the photosensitive drum surface 20 behind a lens is provided.

  The light emitting element array chip 10 is fixed in close contact with the optical waveguide array substrate 12 so that the light emitted from the light emitting elements enters the incident end of the optical waveguide. The light emitting element array chip 10 is mounted on a ceramic substrate (not shown). One light emitting element array chip 10 is a linear array of 1300 light emitting elements at 6000 dpi, that is, a pitch of 4.2335 μm, and has a length of about 5.5 mm. The light-emitting element is an edge-emitting type light-emitting element, and each emission end of the light-emitting element, that is, the light-emitting region of each light-emitting portion has a width of about 3 μm in the arrangement direction of the light-emitting elements and a width of about 1 μm in the vertical direction. Yes. The light emitting element array chip has a self-scanning function.

  A typical example of an edge-emitting light-emitting element is an edge-emitting diode, but the inventors of the present application pay attention to an edge-emitting thyristor having a pnpn structure as a component of the light-emitting element, and perform self-scanning of a light-emitting point. Has already been filed (see JP-A-9-85985, JP-A-11-330541, JP-A-2001-53334). FIG. 3 shows an edge-emitting thyristor described in JP-A-9-85985. (A) is a plan view and (b) is a side view.

  As shown in FIG. 3B, the edge-emitting thyristor includes an n-type semiconductor layer 32, a p-type semiconductor layer 34, an n-type semiconductor layer 36, a p-type semiconductor layer 38 formed on an n-type semiconductor substrate 30. , An anode electrode 40 formed so as to be in ohmic contact with the p-type semiconductor layer 38, and a gate electrode 42 formed so as to be in ohmic contact with the n-type semiconductor layer 36. Although not shown, an insulating film (made of an insulating material that transmits light) is provided on the entire structure, and an Al wiring 44 is provided thereon as shown in FIG. 3A. A contact hole 46 for electrically connecting the electrode and the Al wiring is formed in the insulating film. A cathode electrode (not shown) is provided on the back surface of the n-type semiconductor substrate 30. In such an end surface light emitting thyristor, light is emitted from the end surfaces of the gate layers 34 and 36.

  In general, it is difficult to individually drive each light emitting element of a light emitting element array chip having a fine pitch as shown in FIG. 2, that is, a light emitting element pitch of 8.467 μm, because there is a limit to making the wire bonding pitch fine. However, since the light-emitting element array chip of the present invention has a self-scanning function by integrating the three-terminal thyristor structure as a light-emitting element array, each light-emitting element can be substantially connected with a small number of wire bonding. Can be driven individually.

  On the other hand, 640 effective optical waveguides 14 are formed on the surface of the optical waveguide array substrate 12. The pitch of the optical waveguide 14 is set to 3000 dpi, that is, a pitch of 8.467 μm, and the output end is set to 600 dpi, that is, a pitch of 42.33 μm. The surface of the optical waveguide array substrate 12 has a pitch conversion rate. The pitch conversion waveguide is 1: 5. The core at the input end of the optical waveguide 14 has a square shape of 4 × 4 μm.

  The light emitting portion of the light emitting element of the light emitting element array chip 10 and the incident end of the optical waveguide 14 are fixed closely. The light emitting portion of the light emitting element has a pitch of 4.2335 μm and the shape of the light emitting portion is 3 × 1 μm, and the input end of the optical waveguide 14 has a pitch of 8.467 μm and a core size of 4 × 4 μm. As shown, if the light emitting element array chip 10 is aligned so as to be coaxial with the optical waveguide core only in the height direction, any one or two light emitting elements can be arranged in the arrangement direction even if there is a misalignment. So that the light emitted from each of the two light emitting portions is incident and propagated from each incident end of the optical waveguide 14 into each optical waveguide 14. It has become. That is, with such a configuration, the allowable alignment width of the light emitting element array substrate and the optical waveguide array substrate in the arrangement direction is greatly relaxed.

  The alignment of the light emitting portion of the light emitting element and the optical waveguide core at this time will be described with reference to FIG. The light emitting section 26 and the optical waveguide core 48 of the light emitting element are arranged at equal intervals, but the pitch of the optical waveguide core 48 is set to be an integral number of the pitch of the light emitting section 26 of the light emitting element.

  During assembly, the lateral direction (array direction) is simply abutted without adjustment. Since the positional relationship between the light emitting part 26 of the light emitting element and the optical waveguide core 48 can be in various states as shown in FIGS. 4A to 4D, the light emitting part 26 and the optical waveguide core 48 are in a state after the matching. Investigate the state of the positional relationship between the two.

  If it is found from this investigation that the positional relationship between the light emitting section 26 and the optical waveguide core 48 is, for example, as shown in FIG. 4A or 4B, as shown in FIG. If it is in the state, the signal to be incident on the optical waveguide A is sent only to the light emitting element 1 and the light emitting element 2 is not lit (it may be lit but not used). Similarly, a signal to be incident on the optical waveguide B is sent only to the light emitting element 3. The same applies hereinafter.

  In the state as shown in FIG. 4B, a signal to be incident on the optical waveguide A is sent only to the light emitting element 1 and the light emitting element 2. Similarly, a signal to be incident on the optical waveguide B is sent only to the light emitting element 3 and the light emitting element 4. The same applies hereinafter.

  As shown in FIG. 5, the light emitting element may be further reduced in distance. However, if the light emitting element has the same distance as the optical waveguide, light from the same light emitting element may be coupled to two optical waveguides or any light emitting element. In other words, an optical waveguide that is not coupled to the substrate is formed.

  In short, the present invention assembles the light emitting element array substrate and the optical waveguide array substrate without any adjustment in the array direction, and then selects a signal for operating the light emitting element so as to perform a predetermined operation by examining the state. To do.

  In addition, a microlens array 18 is installed in the vicinity of the emission end of the optical waveguide 14. The lens pitch of the microlens array 18 is also 600 dpi, that is, 42.33 μm, the effective total number of microlenses is 5120 (one row), and the length is about 210 mm corresponding to the short side of A4 size paper. Light emitted from each exit end of the optical waveguide 14 enters each microlens of the microlens array 18, is refracted, and is collected on the photosensitive drum surface 20 behind the microlens.

  That is, according to the present embodiment, an A4 size specification light emitting element array head that collects emitted light on a photosensitive drum at a pitch of 600 dpi using eight light emitting element array chips of 6000 dpi can be obtained.

  The produced light emitting element array head has a light emitting portion of a light emitting element array chip having a size of about 1 × 3 μm, and light is emitted by a ridge type or buried type waveguide array having an incident end cross section of the optical waveguide array, that is, a core cross section of about 4 × 4 μm. Combined. The optical waveguide array substrate was produced by molding an ultraviolet curable resin on a glass substrate having a thickness of about 220 × 20 mm and a thickness of 0.05 mm. The numerical aperture (NA) of the optical waveguide was 0.423 or more.

  The microlens array was produced by molding an ultraviolet curable resin on one surface of a glass substrate having a thickness of about 50 μm using a stamper having a substantially spherical recess array. Actually, a large number of glass lenses were simultaneously molded on a glass substrate of about 250 × 300 mm, and then cut using a diamond blade to produce a microlens array of about 220 × 2 mm. The microlens array has a lens diameter of 42.3 μm, a focal length of 90.9 μm, and an incident-side numerical aperture (NA) of 0.211, and the side on which the microlens array is formed faces the output end of the optical waveguide array. Fixed to the array substrate.

  With such a configuration, the cross section of the exit end of the optical waveguide, that is, the magnified image of the core cross section 4 × 4 μm, is about 40 × 40 μm at the position about 1.0 mm behind the glass substrate on which the microlens is formed. It was formed as a focused spot.

The light use efficiency of the manufactured light emitting element array head is 4.45% as a limit value that can be achieved by the lens numerical aperture (NA) when there is no coupling loss at each end face, no waveguide bending loss, and no propagation loss. It was. The depth of focus was ± 0.87 mm (± λ / (2 (NA ² ))).

  FIG. 6 is a diagram schematically showing a side surface of the light emitting element array head. The light emitting element array substrate 22 is configured by mounting the light emitting element array chip 10 on a ceramic substrate 28. The optical waveguide array substrate 12 is configured by forming a ridge type optical waveguide on a glass substrate 16. Further, the light emitting element array substrate 22 is bonded and fixed on the optical waveguide array substrate 12 by solder 24. The cross-section of the incident end of the ridge-type optical waveguide is processed so as to be substantially perpendicular to the glass substrate surface, and its vicinity (A part in FIG. 6) is in the vicinity of the light emitting part of the light emitting element array chip 10 (A ′ part in FIG. 6). And the center of the light emitting portion 26 and the center of the optical waveguide core coincide with each other.

  That is, the optical axis height can be easily matched by adhering the light emitting element array substrate to the optical waveguide array substrate with the A portion and A ′ portion of FIG. 4 being in contact with each other.

  The optical waveguide array substrate is actually manufactured by molding a large number of substrates on a 250 × 300 mm substrate using a stamper and an ultraviolet curable resin, and then cutting with a diamond blade. In this cutting process, the vertical processing of the waveguide incident end face and the processing of the A portion are simultaneously performed.

  The incident end face can be made substantially mirror-finished using a diamond blade with a fine diamond count. Moreover, the light emitting part end face of the light emitting element and the incident end face of the optical waveguide may be brought close to each other, and a refractive index matching may be performed between them with a transparent adhesive or the like.

  On the other hand, the output side end surface of the optical waveguide array substrate is similarly processed to be vertical, and when the microlens array surface is bonded to the cut end surface of the optical waveguide array substrate, the output end surface (B surface) of the optical waveguide A notch process is performed on a part of the output side end face of the optical waveguide array substrate so that the distance between the microlens and the microlens is 100 μm, and the distance between the microlens and the imaging surface is 1000 μm.

  With the configuration as described above, a light emitting element array head was fabricated, and a 600 dpi focused spot could be formed on the photosensitive drum placed 1.0 mm behind the microlens array substrate.

  In the embodiment described above, each microlens of the microlens array and each exit end of the optical waveguide array are made to correspond one-to-one, and an enlarged image of each exit end is formed on the photosensitive drum by each microlens. Instead of this, an erecting equal magnification image may be formed by an erecting imaging system microlens array such as a SELFOC lens array (registered trademark of Nippon Sheet Glass Co., Ltd.).

  Further, the optical waveguide is not limited to the ridge type but may be an embedded type, a refractive index distribution type, or the like. In addition to the square, the core cross-sectional shape of the optical waveguide may be a rectangle, a circle, an ellipse, or the like. Furthermore, it is sometimes desirable that one or both of the incident end face and the exit end face of the optical waveguide have a substantially spherical shape because the incident efficiency of light emitting element light and the coupling efficiency of the microlens array are improved.

  Next, a self-scanning end face light emitting element array using end face light emitting thyristors will be described.

FIG. 7 is an equivalent circuit diagram of a first basic structure of a self-scanning end surface light emitting element array using an end surface light emitting thyristor. Light emitting thyristors T (−2) to T (+2) are used as the light emitting elements, and gate electrodes G _{−2 to} G ₊₂ are provided in the light emitting thyristors T (−2) to T (+2), respectively. A power supply voltage V _GK is applied to each gate electrode via a load resistor R _L. Further, each of the gate electrodes G _{-2 to} G ₊₂ is electrically connected through a resistor R _I in order to create an interaction. In addition, three transfer clock lines (φ1, φ2, φ3) are connected to every three elements (to be repeated) to the anode electrode of each single light emitting thyristor.

The operation will be described. First, it is assumed that the transfer clock φ ₃ is at a high level and the light emitting thyristor T (0) is turned on. At this time, due to the characteristics of the three-terminal thyristor, the gate electrode G ₀ is pulled down to near zero volts. If the power supply voltage V _GK is 5 volts, the gate voltage of each light-emitting thyristor is determined from the network of the load resistance R _L and the interaction resistance R _I. Then, the gate voltage of the element close to the light emitting thyristor T (0) is the lowest, and thereafter the gate voltage increases as the distance from the T (0) increases. This can be expressed as:

V _G0 <V _G1 = V _G-1 <V _G2 = V _G-2 (1)
The difference between these voltages can be set by appropriately selecting the values of the load resistance R _L and the interaction resistance R _I.

It is known that the turn-on voltage V _ON on the anode side of the three-terminal thyristor is higher than the gate voltage by the diffusion potential V _dif .

V _ON ≒ V _G + V _dif (2)
Therefore, if the voltage applied to the anode is set higher than the turn-on voltage V _ON , the light emitting thyristor is turned on.

Now, in a state where the light emitting thyristor T (0) is on, the high level voltage V _H is applied to the next transfer clock pulse φ ₁ . This clock pulse φ ₁ is simultaneously applied to the light emitting thyristors T (+1) and T (−2). However, if the value of the high level voltage V _H is set to the following range, only the light emitting thyristor T (+1) is turned on. it can.

V _G-2 + V _dif > V _H > V _{G + 1} + V _dif (3)
Thus, the light emitting thyristors T (0) and T (+1) are turned on simultaneously. When the high level voltage of the clock pulse φ ₃ is cut off, the light-emitting thyristor T (0) is turned off and the on-state transfer is completed.

As described above, in the self-scanning end surface light emitting element array, the light emitting thyristor can have a transfer function by connecting the gate electrodes of the respective light emitting thyristors with the resistor network. Based on the principle described above, if the high level voltages of the transfer clocks φ ₁ , φ ₂ , and φ ₃ are set so as to slightly overlap each other in order, the ON state of the light emitting thyristors is sequentially transferred. That is, the light emitting points are sequentially transferred, and a self-scanning end surface light emitting element array can be realized.

FIG. 8 is an equivalent circuit diagram of the second basic structure of the self-scanning end surface light emitting element array. This self-scanning end surface light emitting element array uses a diode as a method of electrical connection between the gate electrodes of the light emitting thyristors. The light emitting thyristors T (−2) to T (+2) are arranged in a line. G _{−2 to} G ₊₂ represent gate electrodes of the light emitting thyristors T (−2) to T (+2), respectively. R _L represents the load resistance of the gate electrode, and D _{−2 to} D ₊₂ represent diodes that perform electrical interaction. V _GK represents a power supply voltage. Two transfer clock lines (φ1, φ2) are connected to every other element to the anode electrode of each single light emitting thyristor.

The operation will be described. First, assume that the transfer clock φ ₂ is at a high level and the light-emitting thyristor T (0) is turned on. At this time, the gate electrode G ₀ is pulled down to near zero volts from the characteristics of the three-terminal thyristor. Assuming that the power supply voltage V _GK is 5 volts, the gate voltage of each light emitting thyristor is determined from the network of the resistor R _L and the diodes D _{−2 to} D ₊₂ . Then, the gate voltage of the element close to the light emitting thyristor T (0) is the lowest, and thereafter the gate voltage increases as the distance from the T (0) increases.

However, the effect of lowering the voltage works only to the right of T (0) due to the unidirectionality and asymmetry of the diode characteristics. That is, the gate electrode G ₁ is set to a voltage that is higher than the G ₀ by the diode forward rising voltage V _dif , and the gate electrode G ₂ is set to a voltage that is higher than the G ₁ by the diode forward rising voltage V _dif. Is done. On the other hand, no current flows through the gate electrode G- ₁ on the left side of T (0) because the diode D- ₁ is reverse-biased, and therefore has the same potential as the power supply voltage _VGK .

The next transfer clock pulse φ ₁ is applied to the nearest light emitting thyristors T (1), T (−1), and T (3) and T (−3). The element with the lowest voltage is T (1), and the turn-on voltage of T (1) is the gate voltage + V _dif of about G ₁ , which is about twice V _dif . The element with the next lowest turn voltage is T (3), which is about 4 times V _dif . The on voltages of T (−1) and T (−3) are about V _GK + V _dif .

From the above, by setting the high-level voltage of the transfer clock pulses between about 2 times the V _dif of approximately 4 times the V _dif, it is possible to turn on only the light-emitting thyristor T (1), the transfer operation It can be carried out.

FIG. 9 is an equivalent circuit diagram of the third basic structure of the self-scanning end surface light emitting element array. This self-scanning end surface light emitting element array includes switch elements T (-1) to T (2) and writing light emitting elements L (-1) to L (2). The configuration of the switch element portion shows an example using diode connection. The gate electrodes G _{−1 to} G ₁ of the switch element are also connected to the gate of the writing light emitting element. A writing signal S _in is applied to the anode of the writing light emitting element.

The operation of this self-scanning end surface light emitting element array will be described below. Assuming that the transfer element T (0) is in the ON state, the voltage of the gate electrode G ₀ is lower than V _GK (assumed to be 5 volts here) and becomes almost zero volts. Therefore, if the voltage of the write signal S _in is equal to or higher than the diffusion potential (about 1 volt) of the pn junction, the light emitting element L (0) can be brought into a light emitting state.

On the other hand, the gate electrode G _-1 is about 5 volts, and the gate electrode G ₁ is about 1 volt. Therefore, the writing voltage of the light emitting element L (-1) is about 6 volts, and the writing voltage of the light emitting element L (1) is about 2 volts. Accordingly, the voltage of the write signal S _in that can be written only to the light emitting element L (0) is in the range of about 1 to 2 volts. When the light emitting element L (0) is turned on, that is, enters the light emitting state, the voltage of the write signal _Sin line is fixed to about 1 volt, so that an error that another light emitting element is selected can be prevented. it can.

The light emission intensity is determined by the amount of current applied to the write signal _Sin , and image writing can be performed at an arbitrary intensity. Further, in order to transfer the light emission state to the next element, it is necessary to once turn the voltage of the write signal _Sin line to zero volts and to turn off the light emitting element.

  Such a self-scanning end surface light emitting element array is characterized in that the number of wire bondings may be smaller than that of a normal light emitting element array.

It is a figure for demonstrating the principle of an optical printer. It is a front view of the light emitting element array head which is one Example of this invention. FIG. 3 is a structural diagram of an edge-emitting thyristor. It is a figure which shows the positional relationship of a light emitting element and an optical waveguide core. It is a figure which shows the positional relationship of a light emitting element and an optical waveguide core. It is a figure which shows schematically the side surface of a light emitting element array head. It is an equivalent circuit diagram of the 1st basic structure of a self-scanning end surface light emitting element array. It is an equivalent circuit schematic of the 2nd basic structure of a self-scanning end surface light emitting element array. It is an equivalent circuit schematic of the 3rd basic structure of a self-scanning end surface light emitting element array.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Light emitting element array chip 12 Optical waveguide array substrate 14 Optical waveguide 16 Glass substrate 18 Micro lens array 20 Photosensitive drum surface 22 Light emitting element array substrate 24 Solder 26 Light emission part 28 Ceramic substrate 30 N-type semiconductor substrate 32, 36 n-type semiconductor layer 34 , 38 p-type semiconductor layer 40 Anode electrode 42 Gate electrode 44 Al wiring 46 Contact hole 48 Optical waveguide core 52 Photosensitive drum 54 Charger 56 Optical printer head 58 Developer 60 Transfer device 62 Cassette 64 Paper 66 Fixing device 68 Stacker 70 Erase lamp 72 Cleaner

Claims (12)

A light-emitting element array substrate on which a light-emitting element array chip in which a plurality of light-emitting elements are arranged in a straight line is mounted; and a plurality of optical waveguides having different pitches on the incident end side and the output end side. An optical waveguide array substrate that allows light emitted from the light to enter the incident end of the optical waveguide and propagate through the waveguide, and a plurality of lenses, and allows light emitted from the output end of the optical waveguide to enter. A light emitting element array head comprising a lens array for condensing light behind the lens,
The light emitting element array head according to claim 1, wherein the light emitting element pitch of the light emitting element is an integral number of the pitch of the optical waveguide on the emission end side of the optical waveguide array substrate.   The light emitting element array head according to claim 1, wherein light from a plurality of the light emitting portions is incident on one incident end of the optical waveguide.   2. The light emitting element array head according to claim 1, wherein the total number of the light emitting units is several to several tens more than an integral multiple of the total number of the optical waveguides.   4. The light emitting element array head according to claim 1, wherein the light emitting element array chip is fixed in the vicinity of an incident end of the optical waveguide.   The light emitting element array substrate and the optical waveguide array substrate are bonded and fixed such that a light emitting portion of the light emitting element and an incident end of the optical waveguide are in close contact or close to each other. The light-emitting element array head according to any one of the above.   The light emitting portion of the light emitting element is disposed in close proximity or close to the incident end of the optical waveguide, and one surface of the light emitting element array chip is in close contact with the surface of the optical waveguide array substrate. The light emitting element array head according to any one of claims 1 to 5   The light emitting element array head according to claim 1, wherein the light emitting element array chip has a self-scanning function.   The lens array has a lens pitch equal to the pitch of the optical waveguides on the output end side of the optical waveguide array substrate, and the light emission pattern on the output end side of the optical waveguide array substrate is enlarged and imaged behind the lens array. The light emitting element array head according to claim 1, wherein the light emitting element array head is a light emitting element array head.   8. The light emitting device according to claim 1, wherein the lens array forms a light emitting pattern on an emission end side of the optical waveguide array substrate at an equal magnification upright behind the lens array. Array head.   The light emitting element array head according to claim 1, wherein the light emitting element is an end face light emitting type light emitting element.   The light-emitting element array head according to claim 1, wherein the optical waveguide is a ridge type or embedded type optical waveguide formed on a glass substrate.   An optical printer using the light emitting element array head according to claim 1.

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