JP2005318374A - Set and method for digital broadcasting receiving - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the circuit scale of an LSI etc., and to reduce power consumption by decreasing the amount of usage of an SRAM built-in in the LSI of a TS buffer portion or the like in a digital terrestrial broadcasting receiving set. <P>SOLUTION: This receiving set is provided with a large-capacity memory 40, a writing controller 41, and a read-out controller 42a. The large-capacity memory 40 is for performing time de-interleaving processing of received data of multiplex streams whose packet arrangement is specified by a model receiver. The writing controller 41 writes the received data in the large-capacity memory 40 at each sample clock according to the rule of time interleaving. The read-out controller 42a selects received data written in the large-capacity memory 40 on the basis of processing contents of TS regenerators 10a-10b, calculates beforehand a timing at which the received data selected in the TS regenerators 10a-10b are processed, and reads the selected received data out from the large-capacity memory 40 at the calculated timing. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a digital broadcast receiving apparatus that decodes received data of a multiplexed stream of a digital broadcast in which a plurality of transport streams whose packet arrangement is defined by a model receiver is multiplexed.

  Digital terrestrial broadcasting ISDB-T (Service Integrated Terrestrial Digital Broadcasting) in Japan uses a plurality of groups of data of transport streams (hereinafter also referred to as TS) defined by the MPEG-2 system as data segments, and the data A plurality of OFDM (Orthogonal Frequency Division Multiplexing) blocks (or also referred to as OFDM segments) in which pilot signals are added to the segments are transmitted in combination (for example, see Non-Patent Document 1). The structure of the TS is based on the structure of the TS that is reproduced by the model receiver defined in Non-Patent Document 1 on the receiving side, and is assumed to perform the same operation as the model receiver on the receiving side. Multiplexing is performed so that the arrangement of stream packets (hereinafter also referred to as TSP) is suitable for OFDM signals.

  The TSP in the multiplex frame belongs to one of the three layers of the OFDM signal defined in Non-Patent Document 1 or the null packet that is not transmitted in the OFDM signal. By defining the TSP arrangement in the multiplex frame based on the structure of the TS reproduced by the model receiver as described above, transmission is performed on the receiving side from the signal divided into a plurality of layers for each TSP and transmitted. The same TS as that transmitted on the side can be reproduced.

  Further, in the model receiver defined in Non-Patent Document 1, the demodulation processing by differential demodulation or scattered pilot is performed on the reception data subjected to FFT processing, frequency deinterleaving processing is performed, and time Deinterleave processing is performed. Since the time deinterleaving process is a convolutional deinterleaving process between OFDM frames, a large-capacity memory of about 2 OFDM frames at the maximum is required. Generally, an inexpensive and relatively large capacity DRAM (SDRAM or the like) is externally used as a memory element used for the time deinterleaving process. Thereafter, the received data is divided into hierarchies, bit deinterleave processing and depunctured processing are performed for each hierarchy, and stored in the hierarchy buffer unit. Memory elements used for processing other than time deinterleaving processing such as a hierarchical buffer unit require a small individual capacity, and therefore use an expensive and relatively small-capacity SRAM built in an LSI. It is common.

  When data for one packet is input to the hierarchical buffer unit, the switch connected to the hierarchical synthesizing unit is switched and connected, and the data is transferred to the TS buffer unit of the TS reproducing unit provided in the subsequent stage. This data transfer is performed instantaneously. In the TS playback control unit of the TS playback unit, the TS buffer unit is set for each 1 TSP time (408 byte time. Since 1 TSP is 204 bytes, the mother code of the convolutional code is 1/2, it is 408 bytes). Check that if more than one packet of data is stored, read one packet of data, and if there is no data in the TS buffer, send a null packet.

Standard number “ARIB STD-B31”, standard name “Transmission method of digital terrestrial television broadcasting”, Radio Industry (ARIB), Version 1.5 (Revised date: July 29, 2003), Formulation date: May 31, 2001

  As described above, the terrestrial digital broadcast receiving apparatus needs to be configured according to the model receiver defined in Non-Patent Document 1, but if configured as the model receiver, for example, TS playback from the hierarchical buffer unit When data is instantaneously transferred to the TS buffer unit, a waiting time in units of TSP time is generated before the data stored in the TS buffer unit is output to the TS reproduction control unit by a switch or the like. . Since the TS buffer unit needs to hold data transferred from each hierarchical buffer unit during the waiting time, a considerable capacity is required. As a capacity of the TS buffer unit, a data capacity of 16 TSP at the maximum is required.

Since the 1TSP data in the TS buffer unit is composed of 408 bytes, the storage capacity required for the TS buffer unit can be obtained by calculating the following equation.
(16 bits x 408 bytes) x 16TSP = 104K bits

  In other words, the storage capacity necessary for the waiting time for the TS playback control unit in the TS buffer unit of the model receiver is 104K bits, but in the model receiver, the TS buffer unit is arranged in front of the Viterbi decoding unit. Therefore, for example, in order to improve the accuracy of Viterbi decoding, the data width of 1 byte needs to be 16 bits or more. In this case, it is necessary to further increase the storage capacity of the TS buffer unit beyond 104 Kbits. In other words, in the conventional terrestrial digital broadcast receiving apparatus, it is necessary to increase the storage capacity required for the TS buffer unit configured by the expensive SRAM built in the LSI, and the circuit scale of the memory of the TS buffer unit, etc. There is a problem that the cost of components such as LSI increases due to the increase in the number of components.

  The present invention has been made to solve the above-described problems, and reduces the amount of SRAM used in an LSI such as a TS buffer unit in a terrestrial digital broadcast receiving apparatus, thereby reducing the circuit scale of the LSI or the like. The purpose is to reduce power consumption.

In order to achieve the above object, in the terrestrial digital broadcast receiver of the present invention,
A large-capacity memory for performing time deinterleaving processing on received data, which is a multiplexed stream in which a plurality of transport streams whose packet arrangement is defined by the model receiver is multiplexed,
A write control unit that writes the received data of the multiplexed stream to the large-capacity memory by switching the storage position for each sample clock in accordance with the rule of time interleaving performed on the transmission side;
The received data written in the large-capacity memory is selected based on the processing contents of at least one data processing unit provided in the subsequent stage of the large-capacity memory, and the received data selected in the subsequent data processing section is processed. A read control unit that calculates in advance the timing to be executed or the timing at which processed data is output, and reads selected received data from the large-capacity memory at the calculated timing;

In the terrestrial digital broadcast receiving method of the present invention,
A large-capacity memory for performing time deinterleaving processing on received data, which is a multiplexed stream obtained by multiplexing a plurality of transport streams whose packet arrangement is defined by a model receiver, and a read control unit thereof In the terrestrial digital broadcast receiving device provided,
The processing content of the read control unit is a step of selecting the received data written in the large-capacity memory based on the processing content of at least one data processing unit provided at the subsequent stage of the large-capacity memory;
Calculating in advance the timing at which the received data selected in the subsequent data processing unit is processed or the timing at which the processed data is output;
Reading the selected received data from the large-capacity memory at the calculated timing.

  The present invention relates to received data based on the processing contents of at least one data processing unit provided at the subsequent stage of the large-capacity memory in the control of reading the received data from the inexpensive large-capacity memory for performing the time deinterleaving process. The timing at which the received data selected in the subsequent data processing unit is processed or the timing at which the processed data is output is calculated in advance, and the selected received data is largely calculated at the calculated timing. Since reading is performed from the capacity memory, the amount of SRAM incorporated in an expensive LSI such as a TS buffer can be reduced, the circuit scale of the LSI can be reduced, the cost can be reduced, and the power consumption can be suppressed. There is an effect that can be.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
Before describing Embodiment 1 of the present invention, a model that defines the arrangement of packets in a multiplexed stream shown in Non-Patent Document 1 described above, which is a standard for the transmission system of Japanese terrestrial digital television broadcasting The configuration and operation of the receiver will be described.

  Since the terrestrial digital broadcast transmission method is a method that can mix a plurality of transmission parameters such as hierarchical transmission, information on these transmission parameters is transmitted from the transmission side to the reception side by a TMCC (Transmission and Multiplexing Configuration Control) signal. Is transmitted. The TMCC signal is configured as an OFDM frame together with a pilot signal for data portion and synchronous reproduction. All signals that have completed the configuration of the OFDM frame are converted into OFDM transmission signals by inverse FFT operation. On the receiver side, after the TMCC signal is demodulated, the main data is demodulated based on the transmission parameters of each layer.

  A TS is configured with a multiplex frame composed of N TSPs as a basic unit. The number (N) of TSPs constituting a multiplex frame varies depending on transmission parameters. The multiplex frame length is based on a 204-byte TSP, and can be matched with the OFDM frame length by setting the transmission clock to four times the FFT sample clock. The TSP in the multiplex frame belongs to either a packet transmitted in one of the three layers of the OFDM signal or a null packet not transmitted in the OFDM signal.

FIG. 1 is a block diagram showing a configuration of a model receiver that defines the arrangement of packets in a multiplexed stream shown in Non-Patent Document 1.
The model receiver reproduces a carrier, a clock, and the like from an OFDM modulation signal received from the outside, and outputs the OFDM modulation signal to the FFT unit 1.

  The FFT unit 1 performs fast Fourier transform (FFT) processing on the input OFDM modulated signal (received signal). Note that the carrier and the clock are recovered from the OFDM modulated signal input to the model receiver by a separate circuit. The differential demodulation / synchronous demodulation unit 2 executes differential demodulation processing or demodulation processing using a scattered pilot on the FFT-processed signal.

  The signals hierarchically combined on the transmission side are subjected to time interleaving and frequency interleaving to ensure mobile reception performance and anti-multipath performance. For time interleaving, convolutional interleaving is employed, and the interleaving length can be specified independently for each layer. Therefore, on the receiving side, a process for restoring the above-described processes performed on the transmitting side is performed.

  The frequency deinterleaving unit 3 performs a frequency deinterleaving process on the reception signal that has been subjected to the frequency interleaving process on the transmission side so as to restore the original signal. The time deinterleaving unit 4 performs the time deinterleaving process so as to restore the received signal that has been subjected to the time interleaving process on the transmission side. The time deinterleaving unit 4 is provided with a time deinterleaving memory 40, a write control unit 41, and a read control unit 42 so as to be inside or associated therewith.

FIGS. 2A and 2B are block diagrams illustrating a schematic configuration of an example of the time deinterleave unit 4.
As shown in FIG. 2 (a), the time deinterleaving memory 40 includes a time deinterleaving NO. 0, NO. 1, NO. 2-NO. It is divided into 12 13 blocks. Further, as shown in FIG. 2B, the inside of each data segment time deinterleave is further divided into a different number of symbol buffers for each mode, and the write control unit 41 and the read control unit 42 Data can be input / output for each symbol buffer. The number of symbol buffers is 96 in mode 1, 192 in mode 2, and 384 in mode 3.

  In the processing in the time deinterleaving unit 4, first, the write control unit 41 converts the received data of the multiplexed stream into a large capacity for each FFT sample clock in accordance with the time interleaving rule of digital terrestrial broadcasting performed on the transmission side. In the time deinterleaving memory 40, which is a DRAM memory, the storage position is switched and written. Next, in accordance with the time interleaving rules for digital broadcasting implemented on the transmission side, the read control unit 42 demodulates the time for each FFT sample clock so that the OFDM symbol shown in FIG. 3 (described later in FIG. 3) is obtained. The received data stored in the interleaving memory 40 is read in order. Since time deinterleaving is convolutional deinterleaving between OFDM frames, the time deinterleaving memory 40 requires a memory of up to about 2 OFDM frames.

Since the time interleaving process is a convolutional interleaving process in terms of operation, a large memory capacity is required. When the interleaving length (I) = 4 and the transmission mode (Mode) = 3, as shown in the following equation, The required memory capacity is 948K words.
(95 * 4) * (96 * 4 * 13) / 2 = 948480 words For example, in the case of 16 bits per word, the memory capacity required for the time deinterleaving process is about 15 Mbits. For this reason, as the time deinterleave memory, it is common to use inexpensive and large capacity DRAM (SDRAM or the like) such as 16 Mbit or 32 Mbit. When the terrestrial digital broadcast receiving apparatus is realized by an LSI, the SRAM in the LSI is not used for the time interleaving process, and the DRAM is externally provided to perform the time deinterleaving process in many cases.

  The point to be noted here is that the read control unit 42 of the model receiver of Non-Patent Document 1 only performs a read control so as to be an OFDM symbol for each FFT sample clock. In each embodiment of the invention, as will be described in detail later, data to be read is selected based on the processing content of at least one data processing unit provided at the subsequent stage of the large-capacity memory (time deinterleaving memory 40). The timing at which the received data selected in the stage data processing unit is processed or the timing at which the processed data is output is calculated in advance, and the selected received data is read from the large-capacity memory at the calculated timing. There is a difference.

FIG. 3 is a diagram illustrating an exemplary configuration of an OFDM symbol for digital terrestrial broadcasting.
The OFDM symbol in FIG. 3 indicates a state in which time / frequency interleaving processing for transmission is not performed in digital terrestrial broadcasting, and a data group (data segment) composed of a plurality of TSs defined in the MPEG-2 system It is composed of units (bandwidth). A pilot signal is added to this data segment to form an OFDM block (OFDM segment), and 13 combined OFDM symbols are transmitted as one channel.

  TSs defined in the MPEG-2 system are multiplexed so as to have a TSP arrangement suitable for OFDM signals. At this time, it is converted into a burst signal format of 188 bytes and a 16-byte outer code parity is added.

  These 13 OFDM segments may be used for all high-definition television (HDTV) broadcast programs, etc. (audio program 1 + high-definition program 12 etc.), but up to a maximum of 3 layers (3 programs) with different transmission characteristics. Can be divided and used. That is, in the terrestrial digital broadcasting system, hierarchical transmission in which up to three layers having different transmission characteristics are simultaneously transmitted is possible. Each layer is composed of one or a plurality of OFDM segments, and it is possible to specify a carrier modulation scheme, an inner code coding rate, a time interleaving parameter, and the like for each layer.

  FIG. 3 is a diagram when one OFDM segment is used for the A layer, seven OFDM segments are used for the B layer, and five OFDM segments are used for the C layer.

  The layer dividing unit 5 in FIG. 1 divides the time-deinterleaved received data for each layer described above and sends it out. Bit deinterleave units 6a, 6b, and 6c provided for each layer perform bit deinterleave processing on the received data divided for each layer and output the received data. The bit deinterleave units 6a, 6b, 6c are provided therein with a bit deinterleave memory 60, a write control unit (not shown), and a read control unit (not shown).

FIG. 4 is a block diagram illustrating a schematic configuration of an example of the bit deinterleave units 6a, 6b, and 6c.
In the digital terrestrial broadcasting bit deinterleaving process, for example, the parallel data for each layer output from the time deinterleaving unit 4 in FIG. 1 is input to a delay line in which the delay amount is changed for each bit number. The output of the delay line is output again as parallel data for each hierarchy. The configuration and capacity of the delay line differ depending on the modulation method. As the modulation method, there are four types of digital terrestrial broadcasting: DQPSK, QPSK, 16QAM, and 64QAM, and the modulation method is selected for each layer. FIG. 4 shows an example of a bit deinterleave circuit when the modulation method is 64QAM.

  As shown in FIG. 4, the bit deinterleaving memory 60 has a 120-bit delay, a 96-bit delay, a 72-bit delay, a 48-bit delay, a 24-bit delay, and no delay with respect to the input bits. It is divided into six delay processing blocks (delay lines) so as to output any of the six types of delay processing. Further, a write control unit (not shown) and a read control unit (not shown) can input / output data to / from any delay processing block for each bit. The bit deinterleaving memory 60 is a memory other than the time deinterleaving memory in the digital terrestrial broadcasting receiver described above. Since the individual capacity is small, it is common to use an SRAM that can be incorporated in an LSI.

  When hierarchical transmission is performed on the transmission side, hierarchical transmission is performed according to the designation of hierarchical information, and a maximum of three systems of parallel processing are performed. In this parallel processing, after energy spreading, byte interleaving, and convolutional coding (punctured processing), carrier modulation including bit interleaving and modulation mapping is performed by a method specified for each layer, and layer synthesis is performed. In each of the three layers, the convolutional coding rate and the carrier modulation scheme can be specified independently. Therefore, on the receiving side, a process for restoring the above-described processes performed on the transmitting side is performed.

  In the processing in each bit deinterleave unit 6a, 6b, 6c, first, the write control unit (not shown) converts each bit b0 to b5 of the received data to each delay processing block of the bit deinterleave memory 60 on the transmission side. In accordance with the bit interleaving rule of digital broadcasting implemented in step 1, the storage position is switched and written for each FFT sample clock. Next, a reading control unit (not shown) performs bit deinterleaving for each FFT sample clock so that the bit interleaving performed on the transmitting side is restored according to the time interleaving rules of digital broadcasting performed on the transmitting side. The received data stored in the memory 60 is sequentially read according to the delay time of each delay processing block.

  The depunctured units 7a and 7b7c in FIG. 1 perform punctured processing performed on the transmission side on the received data that has been hierarchically divided and bit deinterleaved by the bit deinterleave units 6a, 6b, and 6c. In accordance with the rules, the punctured processing is performed every FFT sample clock so that the punctured processing is restored. In the hierarchical buffer units 8a, 8b, and 8c, the reception data that has been returned to the state before the punctured processing on the transmission side by the depunctured processing is sequentially stored. The layer combining unit 9 combines the data for each layer with the data for each OFDM frame and outputs the combined data to the TS reproducing units 10a and 10b. The hierarchical buffer units 8a, 8b, and 8c are memories other than the time deinterleave memory in the digital terrestrial broadcast receiving apparatus described above, and can be built in the LSI because their individual capacities are small like the bit deinterleave memory 60. It is common to use SRAM.

  The storage state of the received data in the hierarchical buffer units 8a, 8b, and 8c is monitored, and the switch S1 is switched when data for one packet is input, and the TS reproducing unit 10a is switched via the hierarchical synthesis unit 9. Data is transferred to the TS buffer units 100a and 100b in 10b. This data transfer is performed instantaneously. A switch S3 between the layer synthesizing unit 9 and the TS reproducing units 10a and 10b switches the TS reproducing units 10a and 10b that receive signals from the layer synthesizing unit 9, and is alternately switched at the head of the OFDM frame. The TS buffer units 100a and 100b are memories other than the time deinterleave memory in the digital terrestrial broadcast receiving apparatus described above, and have small capacities similar to the bit deinterleave memory 60 and the hierarchical buffer units 8a, 8b, and 8c. Therefore, it is common to use an SRAM that can be incorporated in an LSI.

  The TS reproducing units 10a and 10b in FIG. 1 take various values for the number of TSPs that can be transmitted per unit time by setting the transmission parameters of the OFDM signal. Complements the appropriate number of null packets. In this way, the TS can be regenerated with a constant clock regardless of the transmission parameter setting. Also, by defining the TSP arrangement in the multiplex frame, it is possible to reproduce the same TS as that on the transmission side on the reception side from the signal transmitted after being divided into a plurality of layers for each TSP. The arrangement of the TSP is defined by the operation of the model receiver, and the TS reproduction units 10a and 10b on the receiving side can reproduce the TSP by performing the same operation as the model receiver.

  1 TS data is transferred to the TS buffer units 100a and 100b of the TS reproducing units 10a and 10b shown in the model receiver of FIG. 1 every time data of 1 TSP is accumulated in the hierarchical buffer units 8a, 8b, and 8c. . As described above, the hierarchical buffer units 8a, 8b, and 8c have a maximum of three hierarchical levels, the data storage speed in each hierarchical buffer unit 8a, 8b, and 8c is not constant, and the TSP data of a plurality of hierarchical levels is the same TSP. In some cases, the data is transferred to the TS buffer units 100a and 100b within a certain time.

  In the TS playback control units 102a and 102b in the TS playback units 10a and 10b of FIG. 1, 1 TSP time (408 byte time. 1 TSP is 204 bytes, but the mother code of the convolutional code is 1/2, so 408 bytes. The TS buffer units 100a and 100b are monitored every time, and when data of one packet or more is accumulated, the switches S2a and S2b are switched to the TS buffer units 100a and 100b side, and the data for one packet is obtained. When there is no data in the TS buffer units 100a and 100b, the switches S2a and S2b are switched to the null TSPs 101a and 101b to send a null packet.

  Further, a null TSP may be being output when TSP data is transferred from the hierarchical buffer units 8a, 8b, 8c to the TS buffer units 100a, 100b. Therefore, after the TSP data is transferred from the hierarchical buffer units 8a, 8b, and 8c to the TS buffer units 100a and 100b, the TSP data is output via the switches S2a and S2b until the TSP data is output. There is a waiting time. While waiting for output in the TS buffer units 100a and 100b, TSP data is accumulated in the TS buffer units 100a and 100b, so that the TS buffer units 100a and 100b require a considerable capacity. This has been found to be a data capacity of up to 16 TSP.

  The Viterbi decoding unit 11 in FIG. 1 performs Viterbi decoding processing on the reproduced TS. The switch S4 switches the TS reproducing units 10a and 10b that output signals and causes the Viterbi decoding unit 11 to input the signals. The switch S4 is switched to the same side as the switch S3 with a delay of 3 TSP time from the switching timing of the switch S3, that is, the timing at which the beginning of the OFDM frame is input to the TS reproducing units 10a and 10b.

  1TSP data in the TS buffer units 100a and 100b is composed of 408 bytes, but since the TS buffer units 100a and 100b are the previous stage of the Viterbi decoding unit 11, in order to increase the accuracy of Viterbi decoding, the data width of 1 byte Needs to be 16 bits or more, and the capacity of the TS buffer units 100a and 100b is increased to 104K bits or more as described above.

  The first embodiment of the present invention changes the read control content of the read control unit 42 on the premise of the configuration and operation of the model receiver that prescribes the arrangement of packets in the multiplexed stream in Non-Patent Document 1 described above. Therefore, the TS buffer units 100a and 100b constituted by SRAM or the like built in an expensive LSI are made unnecessary.

FIG. 5 is a diagram showing the terrestrial digital broadcast receiving apparatus according to Embodiment 1 of the present invention.
The terrestrial digital broadcast receiving apparatus of the present embodiment shown in FIG. 5 is mainly different from the model receiver shown in FIG. 1 in configuration in that TS buffer units 100a and 100b in the TS playback units 10a and 10b. Is deleted, and output lines of control signals from the TS playback control units 102a and 102b and the hierarchical buffer units 8a, 8b, and 8c are input to the read control unit 42a. . 5 is the same as that of the model receiver shown in FIG.

Next, differences in operation of the terrestrial digital broadcast receiving apparatus of the present embodiment from the model receiver shown in FIG. 1 will be described.
In the model receiver described above, the data of each OFDM symbol is stored in the TS buffer units 100a and 100b in the TS reproducing units 10a and 10b. However, in this embodiment, the TS buffer units 100a and 100b are deleted. Therefore, the model receiver receives data from the hierarchical buffer units 8a, 8b, 8c to the hierarchical synthesis unit 9 so as to correspond to the timing at which the data is output from the TS buffer units 100a, 100b to the TS reproduction control units 102a, 102b. It is necessary to output. For this processing, in the present embodiment, the read control unit 42a controls the selection of TSP data read from the time deinterleave memory 40 and the read timing.

  As described above, since the data of the hierarchical buffer units 8a, 8b, and 8c is transferred to the conventional TS buffer units 100a and 100b via the hierarchical synthesis unit 9, the hierarchical buffer unit 8a is instantly transferred. , 8b and 8c are also instantaneously transferred to the TS reproduction control units 102a and 102b.

  In the case of the model receiver described above, the data stored in the time deinterleave memory (DRAM) 40 is transferred to the OFDM side by the read control unit 42a of the time deinterleave unit 4. According to the implemented time interleaving process rule, the data is sequentially read for each FFT sample clock. In the case of the present embodiment, the read control unit 42a follows the time interleaving process rule implemented on the transmission side, Based on control signals from the TS playback control units 102a and 102b and the hierarchical buffer units 8a, 8b and 8c, 1TSP data of an arbitrary hierarchy is read out collectively.

  The control signals from the TS playback controllers 102a and 102b are TSP hierarchy information to be output and order information calculated in advance in the TS playback units 10a and 10b. The read control unit 42a of the present embodiment receives information on the TSP hierarchy and order to be output from the TS playback units 10a and 10b, and based on the TSP data hierarchy information stored in the time deinterleave memory 40. The TSP data of the designated hierarchy is selected from the TS reproducing units 10a and 10b, and is read from the time deinterleave memory 40 in the designated order.

  In other words, the read control content of the read control unit 42a in the present embodiment is based on the processing content of the TS playback control units 102a and 102b provided in the subsequent stage for data read from the large-capacity time deinterleave memory 40. The data read timing appropriate to the timing at which the received data selected by the TS reproduction control units 102a and 102b is processed is calculated in advance, and the selected received data is calculated at the calculated timing. From the deinterleave memory 40, data for 1 TSP of an arbitrary hierarchy processed by the TS reproduction control units 102a and 102b is read out collectively.

  The TSP data read from the time deinterleave unit 4 is output to any of the bit deinterleave units 6a, 6b, and 6c for each TSP hierarchy. The data subjected to the bit deinterleaving processing by the bit deinterleaving units 6a, 6b, 6c is output to the depunctured units 7a, 7b, 7c, and is depunctured according to the coding rate of each layer. The data for 1 TSP for each layer after the depuncture processing is accumulated in the layer buffer units 8a, 8b, and 8c.

  When data for 1 TSP is accumulated in the hierarchical buffer units 8a, 8b, and 8c, a message to that effect is output to the read control unit 42a. Then, the read control unit 42a finishes reading the TSP data of the hierarchy, and prepares for reading of the TSP data of the hierarchy to be read next. Further, the data for 1 TSP accumulated in the hierarchical buffer units 8a, 8b, and 8c is sent to the hierarchical synthesis unit 9 via the switch S1 in units of 1 byte corresponding to the data output speed from the TS reproducing units 10a and 10b. Is output.

  As described above, by controlling the reading of the TSP data from the time deinterleaving memory 40 by the reading control unit 42a, the TS reproducing units 10a and 10b can use the TSP data received from the hierarchical buffer units 8a, 8b and 8c from the TSP data. In order to reproduce the data, it is not necessary to wait for the output of each TSP data. That is, in the terrestrial digital broadcast receiving apparatus according to the present embodiment, the TS buffer units 100a and 100b provided in the TS reproduction units 10a and 10b for waiting for output of each TSP data are unnecessary and can be deleted. .

  In the present embodiment, since the output waiting function of the conventional TS buffer units 100a and 100b is substituted for the time deinterleaving memory 40, the TS buffer units 100a and 100b are not required, and an LSI SRAM or the like can be used. Although expensive memory can be reduced, on the other hand, the time deinterleaving memory 40 has a longer accumulation time than the conventional one, and has the possibility of increasing the capacity. However, since the time deinterleaving memory 40 is configured by using an inexpensive DRAM as described above, a memory having a sufficient margin for the time deinterleaving processing is generally used for its storage capacity. Therefore, it often has many unused areas. Therefore, it is not necessary to change the capacity of the DRAM used for the time deinterleave memory 40 of the present embodiment if this unused area is used as a capacity corresponding to the processing of the conventional TS buffer unit. It will be.

  As described above, in this embodiment, the read control unit 42a collects 1 TSP data of an arbitrary layer from the time deinterleave memory 40 for 1 TSP, and the TS playback control units 102a and 102b process the 1TSP data at the timing. Since the appropriate data read timing is calculated and read in advance, the TS buffer units 100a and 100b are not required, and the amount of memory such as SRAM incorporated in an expensive LSI can be reduced. The circuit scale can be reduced to reduce the cost, and the power consumption can also be suppressed.

Embodiment 2. FIG.
FIG. 6 is a diagram showing a terrestrial digital broadcast receiving apparatus according to Embodiment 2 of the present invention.
The terrestrial digital broadcast receiving apparatus according to the present embodiment shown in FIG. 6 is mainly different from the terrestrial digital broadcast receiving apparatus according to the first embodiment shown in FIG. 5 in the configuration in the hierarchical buffer units 8a, 8b, 8c. In addition, the output line of the control signal input to the read control unit 42b from the hierarchical buffer units 8a, 8b, and 8c is deleted, and the output line of the control signal from the depunctured units 7a, 7b, and 7c is read control. The point is that it is input to the part 42b. Other configurations in the present embodiment in FIG. 6 are the same as those in the terrestrial digital broadcast receiving apparatus in the first embodiment shown in FIG.

Next, differences in operation of the terrestrial digital broadcast receiving apparatus of the present embodiment from the terrestrial digital broadcast receiving apparatus of the first embodiment shown in FIG. 5 will be described.
In the terrestrial digital broadcast receiving apparatus according to Embodiment 1 described above, data for 1 TSP that has been depunctured by the depunctured units 7a, 7b, and 7c according to the coding rate specified for each hierarchy is stored in the hierarchy. Although stored in the buffer units 8a, 8b, and 8c, since the hierarchical buffer units 8a, 8b, and 8c are deleted in this embodiment, hierarchical synthesis is performed from the hierarchical buffer units 8a, 8b, and 8c in the first embodiment. It is necessary to output data from the depunctured parts 7a, 7b, 7c to the hierarchical composition part 9 so as to correspond to the timing at which the data is output to the part 9. For this process, in the present embodiment, the read control unit 42b controls selection and read timing of TSP data read from the time deinterleave memory 40.

  As described above, the transfer of the data in the hierarchical buffer units 8a, 8b, and 8c to the TS reproduction control units 102a and 102b via the hierarchical synthesis unit 9 is performed instantaneously. It is assumed that data transfer from the Ard units 7a, 7b, 7c to the TS reproduction control units 102a, 102b is also performed instantaneously.

  The depunctured processing of the depunctured units 7a, 7b, and 7c is performed by, for example, converting a signal whose number of bits is converted according to a predetermined coding rate on the transmission side to the original number of bits based on the coding rate. Since the process is a return process, the data amount ratio between the input signal and the output signal is not 1: 1. The coding rate in the above-mentioned digital terrestrial broadcasting standard of Non-Patent Document 1 is selected from 1/2, 3/2, 3/4, 5/6, and 7/8. For example, when the coding rate is 3/4, if 4-bit data is input to the depunctured unit 8a, 6 bits are output after the depunctured processing.

  Since the data amount ratio between the input signal and the output signal of the depunctured sections 7a, 7b and 7c is not 1: 1, the number of clocks required to output 1 TSP of data from the depunctured section However, the time required for outputting data for 1 TSP from the depunctured portion also differs depending on the coding rate. On the other hand, the layer synthesizing unit 9 needs to output data for 1 TSP to the TS reproducing units 10a and 10b in a certain time (408 clock time of FFT sample clock).

  Conventionally, hierarchical buffer units 8a, 8b, and 9c are provided to absorb the difference in output time, and data for 1 TSP is temporarily stored in the hierarchical buffer units 8a, 8b, and 9c. In this embodiment, it is necessary to control the timing for reading data from the time deinterleaving unit 4 according to the coding rate.

  The output of the control signal from the depunctured units 7a, 7b, 7c to the read control unit 42b depends on the level of the TSP that is read and processed by any of the depunctured units 7a, 7b, 7c. Coding rate. By outputting the TSP coding rate to be processed to the reading control unit 42b, the reading control unit 42b controls the data reading timing according to the coding rate of the TSP hierarchy read from the time deinterleaving memory 40. It becomes possible.

  In the read control unit 42b of the present embodiment, the timing of reading the TSP from the time deinterleaving memory 40 is controlled according to the coding rate as described above, so that it is output from the depunctured units 7a, 7b, 7c. The data output speed can be controlled to be constant. This can also correspond to the need to output 1 TSP of data from the hierarchical synthesis unit 9 to the TS playback units 10a and 10b in a certain time as described above. In this embodiment, the depunctured unit The output from 7a, 7b, 7c and the output speed of the TS reproducing units 10a, 10b can be matched.

  As the read control contents of the read control unit 42b in the present invention, for example, data read from the time deinterleaving memory 40 having a large capacity is converted into TS reproduction control units 102a and 102b and a depunctured unit 7a provided in the subsequent stage. , 7b, 7c, and the data output timing after the received data selected by the depunctured units 7a, 7b, 7c is processed using the coding rate. The data read timing is calculated in advance, and the selected reception data is read from the time deinterleave memory 40 at the calculated timing for 1 TSP of data of an arbitrary layer processed by the TS reproduction control units 102a and 102b. To control.

  As described above, in this embodiment, the read control unit 42b collects 1 TSP data of an arbitrary layer from the time deinterleave memory 40 for 1 TSP, and the depunctured units 7a, 7b, and 7c according to the coding rate. Since the data read timing appropriate for the timing at which the 1TSP data is processed is calculated and read in advance, not only the TS buffer units 100a and 100b but also the hierarchical buffer units 8a, 8b and 8c can be dispensed with. Further, the amount of memory such as SRAM incorporated in an expensive LSI can be reduced more than in the first embodiment, the circuit scale of the LSI or the like can be reduced, the cost can be reduced, and the power consumption can also be suppressed.

Embodiment 3 FIG.
FIG. 7 is a diagram showing a terrestrial digital broadcast receiving apparatus according to Embodiment 3 of the present invention.
The terrestrial digital broadcast receiving apparatus of the present embodiment shown in FIG. 7 is different from the terrestrial digital broadcast receiving apparatus of the second embodiment shown in FIG. 6 mainly in configuration in that the bit deinterleave memory 60 is deleted. And the output lines of the control signals from the bit deinterleave units 6a, 6b, 6c are input to the read control unit 42c. The other configuration in the present embodiment in FIG. 7 is the same as that of the terrestrial digital broadcast receiving apparatus in the second embodiment shown in FIG.

Next, differences in operation of the terrestrial digital broadcast receiving apparatus of the present embodiment from the terrestrial digital broadcast receiving apparatus of the second embodiment shown in FIG. 6 will be described.
In the terrestrial digital broadcast receivers of the first and second embodiments described above, the bit deinterleave units 6a, 6b, and 6c transfer the bits b0 to b5 of the received data to the delay processing blocks of the bit deinterleave memory 60. Writing is performed according to the bit interleaving rule and reading is performed sequentially according to the delay time. However, since the bit deinterleaving memory 60 is deleted in the present embodiment, the bit deinterleaving units 6a and 6b in the first and second embodiments. , 6c is data that is not delayed by the bit deinterleave units 6a, 6b, 6c so that the data read in order according to the delay times of 6c corresponds to the timing at which the data is output to the depunctured units 7a, 7b, 7c Must be output to the depunctured portions 7a, 7b, and 7c. For this process, in the present embodiment, the read control unit 42c controls selection and read timing of TSP data read from the time deinterleave memory 40 for each bit.

  The bit deinterleaving process in the digital terrestrial broadcast receiving apparatus is performed by inputting data to a delay line in which the delay amount is changed for each bit number of parallel data output from the time deinterleaving unit 4 as shown in FIG. Are output again as parallel data. Further, as described above, the delay time between the input and output of the bit deinterleave units 6a, 6b, and 6c differs depending on the bit number of the data input to the bit deinterleave units 6a, 6b, and 6c.

  In the present embodiment, the data for 1 TSP of an arbitrary layer processed by the TS playback control units 102a and 102b is not read from the time deinterleave memory 40 in a collective manner as in the first and second embodiments above. The data is handled as bit data for each number, and data with a delay corresponding to bit deinterleaving is read for each bit number.

  Therefore, as a control signal from the bit deinterleaving units 6a, 6b, and 6c to the reading control unit 42c, modulation of each layer of TSP read by the reading control unit 42c and processed by each bit deinterleaving unit 6a, 6b, 6c. Method is sent out. This is because, as described above, the configuration and capacity of the delay line in the bit deinterleave units 6a, 6b, and 6c differ depending on the modulation method. The read control unit 42 reads and outputs data while changing the delay time until reading from the time deinterleave memory 40 for each bit according to the received modulation method.

  As the read control contents of the read control unit 42c in the present invention, for example, data read from the large-capacity time deinterleaving memory 40 is converted to TS reproduction control units 102a and 102b and depunctured unit 7a provided in the subsequent stage. , 7b, 7c and bit deinterleave units 6a, 6b, 6c are selected based on the processing contents, and the received data selected in the depunctured units 7a, 7b, 7c is processed using the coding rate. In addition to the calculation of the data read timing appropriate for the data output timing after being performed, the timing for each bit corresponding to each delay time of the bit deinterleave units 6a, 6b, 6c is calculated in advance and selected. From the time deinterleave memory 40 at a timing at which the received data is calculated, the TS reproduction control unit 102a, Data 1TSP content of any hierarchy to be processed by 02b controls to read for each bit.

  As described above, in this embodiment, the read control unit 42c causes 1TSP data of an arbitrary layer from the time deinterleave memory 40 to be debited by the depunctured units 7a, 7b, and 7c according to the coding rate for each bit. Since the timing for processing 1TSP data is further calculated and read out in advance at a timing for each bit corresponding to each delay time of the bit deinterleave units 6a, 6b, and 6c, TS In addition to the buffer units 100a and 100b and the hierarchical buffer units 8a, 8b, and 8c, the bit interleaving memory 60 can be eliminated, and the amount of memory such as SRAM incorporated in an expensive LSI can be further reduced as compared with the second embodiment. Can be reduced, cost can be reduced by reducing the circuit scale of LSI, etc., and power consumption can be reduced. Can.

  The present invention is not limited to the above-described embodiments. For example, a time deinterleaving process is performed using a relatively large capacity memory such as a DRAM, and then an SRAM or the like built in an LSI or the like is relatively compared. The present invention can be easily applied to any digital broadcast receiving apparatus that performs decoding by performing data processing including data rearrangement or input / output timing adjustment using a small memory.

It is a block diagram which shows the structure of the model receiver which prescribes | regulates the arrangement | positioning of the packet in the multiplexed stream shown by the nonpatent literature 1. (A), (b) is a block diagram which shows schematic structure of an example of a time deinterleaving part. It is a figure which shows the structure of an example of the OFDM symbol of terrestrial digital broadcasting. It is a block diagram which shows schematic structure of an example of a bit deinterleaving part. It is a figure which shows the terrestrial digital broadcast receiver of Embodiment 1 of this invention. It is a figure which shows the terrestrial digital broadcast receiver of Embodiment 2 of this invention. It is a figure which shows the terrestrial digital broadcast receiver of Embodiment 3 of this invention.

Explanation of symbols

1 FFT section, 2 differential / synchronous demodulation section, 3 frequency deinterleave section, 4 time deinterleave section, 40 time deinterleave memory, 41 write control section, 42, 42a, 42b, 42c write control section, 5 layer division 6a, 6b, 6c bit deinterleave unit, 60-bit deinterleave memory, 7a, 7b, 7c depunctured unit, 8a, 8b, 8c hierarchical buffer, 9 hierarchical synthesis unit, 10a, 10b TS playback unit, 100a, 100b TS buffer unit, 101a, 101b Null TSP unit, 102a, 102b TS playback control unit, 11 Viterbi decoding unit, S1, S2a, S2b, S3, S4 switch.

Claims (12)

A large-capacity memory for performing time deinterleaving processing on received data, which is a multiplexed stream in which a plurality of transport streams whose packet arrangement is defined by the model receiver is multiplexed,
A write control unit that writes the received data of the multiplexed stream by switching the storage position in the large-capacity memory for each sample clock in accordance with the rule of time interleaving performed on the transmission side;
The reception data written in the large-capacity memory is selected based on the processing content of at least one data processing unit provided in the subsequent stage of the large-capacity memory, and the selected reception data in the subsequent data processing section A read control unit that calculates in advance the timing at which the processing is performed or the timing at which the processed data is output, and reads the selected received data from the large-capacity memory at the calculated timing. A digital broadcast receiver. The received data of the multiplexed stream is designated with layer information so that layer transmission in which a plurality of layers having different transmission characteristics are simultaneously transmitted is possible,
At least a part of the transfer path through which the received data reaches the subsequent data processing unit and the configuration of the data processing unit are arranged in units of multiple columns so that the received data in which the respective layers are specified can be processed in parallel. Configured in the transfer path,
The read control unit
The received data written in the large-capacity memory is selected based on the processing content of the data processing unit provided in the subsequent stage of the large-capacity memory and the configuration of the transfer path of the received data, and the selected data is the hierarchy 2. The digital broadcast receiving apparatus according to claim 1, wherein a timing at which processing is performed by the subsequent data processing unit is calculated and read through each transfer path. The data processing unit
It is a transport stream reproduction unit that outputs the reception data of the transport stream every one data packet or outputs a null packet,
The read control unit
Selecting in accordance with the output order of transport stream packets output from the transport stream reproduction unit, and calculating and reading the timing at which data is output to the transport stream reproduction unit from the transfer path for each layer The digital broadcast receiver according to claim 2. In the transfer path for each hierarchy of the plurality of columns,
A hierarchy dividing unit that divides the received data into the transfer paths for each hierarchy;
A layer combining unit that combines the received data processed by the layer-by-layer transfer path;
4. The digital broadcast receiving apparatus according to claim 2, further comprising: a switching unit that selects reception data to be input to the layer synthesis unit from the layer-by-layer transfer path. The data processing unit
A depunctured part provided in the transfer path for each layer so as to perform a depunctured process at a coding rate when the received data is punctured on the transmission side,
The read control unit
Select received data corresponding to each of the transfer paths for each layer, and calculate the timing at which the depunctured data is output from the depunctured unit to the layer combining unit according to the coding rate. The digital broadcast receiving device according to claim 4, wherein the digital broadcast receiving device is read out. The data processing unit
A bit deinterleave unit provided in the transfer path for each layer so as to perform bit deinterleave processing on the received data;
The read control unit
Select received data corresponding to each of the transfer paths for each layer, and calculate the timing at which the bit deinterleaved data is output to the layer synthesizing unit based on the modulation scheme in the bit deinterleave unit. The digital broadcast receiving apparatus according to claim 4, wherein the digital broadcast receiving apparatus reads the data. The large-capacity memory is a dynamic random access memory (DRAM),
The digital broadcast receiving apparatus according to claim 1, wherein the sample clock is an FFT (Fast Fourier Transform) sample clock. A large-capacity memory for performing time deinterleaving processing on received data, which is a multiplexed stream obtained by multiplexing a plurality of transport streams whose packet arrangement is defined by a model receiver, and a read control unit thereof In the digital broadcast receiving apparatus provided,
The processing steps of the read control unit include
Selecting the reception data written in the large-capacity memory based on the processing content of at least one data processing unit provided in a subsequent stage of the large-capacity memory;
Pre-calculating the timing at which processing is performed on the selected received data or the timing at which processed data is output in the subsequent data processing unit;
Reading the selected reception data from the large-capacity memory at the calculated timing. In the digital broadcast receiving apparatus, at least a part of the configuration of the transfer path and the data processing unit where the received data reaches the subsequent data processing unit can process the received data in which each layer is specified in parallel. As shown in the figure, it is configured as a multi-column transfer route for each hierarchy,
In the processing step of the read control unit,
In the step of selecting the reception data written in the large-capacity memory, the selection is made based on the processing content of the data processing unit provided in the subsequent stage of the large-capacity memory and the transfer path configuration of the reception data,
9. The digital broadcast according to claim 8, wherein in the step of reading out the selected received data, a timing at which processing is performed in the subsequent data processing unit is calculated and read through the transfer path for each layer. Reception method. The data processing unit
It is a transport stream reproduction unit that outputs the reception data of the transport stream every one data packet or outputs a null packet,
In the processing step of the read control unit,
In the step of selecting the reception data written in the large-capacity memory, the selection is made according to the output order of the transport stream packets output from the transport stream reproduction unit,
10. The digital broadcast according to claim 9, wherein in the step of reading the selected received data, a timing at which data is output from the transfer path for each layer to the transport stream reproduction unit is calculated and read. Reception method. The data processing unit
A depunctured part provided in the transfer path for each layer so as to perform a depunctured process at a coding rate when the received data is punctured on the transmission side,
In the processing step of the read control unit,
In the step of selecting the reception data written in the large-capacity memory, the reception data corresponding to each of the transfer paths for each layer is selected,
In the step of reading out the selected received data, calculating and reading out a timing outputted from the depunctured unit in order to hierarchically synthesize the depunctured data according to the coding rate. The digital broadcast receiving method according to claim 10, wherein: The data processing unit
A bit deinterleave unit provided in the transfer path for each layer so as to perform bit deinterleave processing on the received data;
In the processing step of the read control unit,
In the step of selecting the reception data written in the large-capacity memory, the reception data corresponding to each of the transfer paths for each layer is selected,
In the step of reading the selected received data, the bit deinterleave unit calculates and reads the output timing for hierarchically synthesizing the bit deinterleaved data based on the modulation scheme. The digital broadcast receiving method according to claim 10 or 11.

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