JP2005311736A - Solid-state imaging apparatus and drive method of the solid-state imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging apparatus, capable of effectively reducing a longitudinal stripe shaped fixed pattern noise at a very high level by acquiring a reference signal, in a state of less effect of the dark current. <P>SOLUTION: In a CMOS image sensor 10A, electric charges stored in a photodiode PD of each pixel 111 of a light-shield region (light-shielded pixel array section) 11B of a pixel array section 11 are swept out and thereafter, a signal is read from each pixel 111; a memory device 21 stores the signals as the reference signal, to correct the longitudinal stripe shaped fixed pattern noise; and a DSP circuit 20 carries out correction processing of the longitudinal stripe shaped fixed pattern noise, by using the reference signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a solid-state imaging device and a driving method of the solid-state imaging device, and in particular, solid-state imaging that outputs a pixel signal through a signal processing circuit arranged for each column with respect to a matrix-like array of pixels including photoelectric conversion elements. The present invention relates to a device and a driving method of the solid-state imaging device.

  Solid-state imaging devices represented by charge transfer type solid-state imaging devices such as CCD (Charge Coupled Device) image sensors and MOS-type image sensors such as CMOS (Complementary Metal Oxide Semiconductor) image sensors, video cameras for capturing moving images, It is used as an imaging device in various video equipment such as an electronic still camera that captures still images.

  In recent years, solid-state imaging devices with millions of pixels have been developed due to advances in semiconductor technology and used as imaging devices in camera devices (imaging devices) such as digital still cameras and movie video cameras that require high resolution. Yes. Among them, the CMOS image sensor is a solid-state imaging device in which each pixel is provided with a photoelectric conversion element and a readout circuit. Each pixel can be accessed randomly and read out at high speed, so it has a promising future. It is a sensor being viewed.

  However, in a typical column-type CMOS image sensor, that is, a CMOS image sensor that outputs a pixel signal through a signal processing circuit (column signal processing circuit) arranged for each column (column) of a matrix of pixels, For each column, vertical streaks are fixed due to process variations (CDS circuit capacitors arranged for each vertical signal line, variation in threshold voltage of each pixel transistor in the pixel array section, variation in wiring width, etc.) There has been concern about having pattern noise and degrading image characteristics.

  In order to improve the image quality defect due to this vertical streak-like fixed pattern noise, conventionally, the pixel signal is read after resetting the pixel, and the pixel signal after being output through the column signal processing circuit for each column is fixed. As a reference signal for correcting pattern noise, a fixed pattern noise component (longitudinal streaks) is obtained by performing correction processing (subtraction processing) on the output signal of the CMOS image sensor using the reference signal in the normal imaging mode. Noise component) is suppressed (for example, see Patent Document 1).

  In addition, a dummy signal line to which no photosensitive pixel is connected is provided in a part of the photosensitive portion, and a line buffer for storing noise component data is provided, and a signal output from the dummy signal line is taken into the line buffer. Is used as noise component data to correct fixed pattern noise (see, for example, Patent Document 2).

JP 10-1226697 A Japanese Patent Laid-Open No. 06-189200

  In the conventional technique according to Patent Document 1, since the signal itself output from each pixel through the column signal processing circuit is used as a reference signal for correcting fixed pattern noise, the reference signal includes the pixel transistor. Reset variation and the like are also included, and there is a problem that it is difficult to obtain a reference signal with high accuracy under the influence of the reset variation. In addition, in solid-state imaging devices such as digital still cameras that can obtain a reference signal for correcting vertical streak fixed pattern noise only when the power is turned on, the characteristics may change due to temperature changes, so the correction capability is limited. There is.

  In the prior art according to Patent Document 2, since no photosensitive pixel is connected to the dummy signal line, each load of the effective pixel array unit to which the photosensitive pixel is connected is loaded when a signal is read from the dummy signal line. Since this is different from the load when reading a signal from a pixel through a vertical signal line, there is a problem that sufficient accuracy cannot be obtained as a reference signal for correcting vertical streak-like fixed pattern noise.

  The present invention has been made in view of the above-described problems, and its object is to effectively acquire vertical streaky fixed pattern noise by acquiring a reference signal in a state where there is little influence of dark current. Another object of the present invention is to provide a solid-state imaging device and a driving method of the solid-state imaging device that can be reduced at a very high level.

  In order to achieve the above object, in the present invention, pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix, and an effective pixel array unit that outputs a signal obtained by photoelectric conversion for each pixel; and the effective pixels In a solid-state imaging device comprising: a light-shielding pixel array unit in which pixels having the same pixel structure as each pixel of the array unit are arranged in at least one row for each column of the pixel array unit in a light-shielded state. A signal is read from each pixel in a state where no charge is accumulated in each pixel of the light-shielding pixel array unit, the signal is held as a reference signal, and the effective reference signal is stored in the effective pixel array unit using the held reference signal. A configuration for correcting a signal output from each pixel is adopted.

  In the solid-state imaging device having the above-described configuration, for example, after the charges accumulated in the photoelectric conversion elements of the respective pixels of the light-shielding pixel array unit are swept out in a state where charges are not accumulated in the respective pixels of the light-shielding pixel array unit, By reading out signals from each pixel in the light-shielded pixel array section with each pixel in the pixel array section reset, each pixel in the light-shielded pixel array section is affected by the dark current generated in the photoelectric conversion element and the floating diffusion. The signal of each pixel is obtained under the same condition as when the load of the vertical signal line is small and the signal is read from each pixel of the effective pixel array section. Then, the signal of each pixel in the light-shielding pixel array unit is held as a reference signal, and the fixed pattern noise for reducing vertical streaks to the signal of each pixel in the effective pixel array unit is reduced using the reference signal. Perform correction processing.

  According to the present invention, the reference signal for correcting the fixed pattern noise is less affected by the dark current generated in the photoelectric conversion element and the floating diffusion, and the load of the vertical signal line is a signal from each pixel of the effective pixel array unit. Can be acquired in substantially the same state as when reading out, so that vertical streak-like fixed pattern noise can be effectively reduced at a very high level.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a MOS solid-state imaging device, for example, a CMOS image sensor according to an embodiment of the present invention. As shown in FIG. 1, the CMOS image sensor 10A according to the present embodiment includes a pixel array unit 11, a vertical drive circuit 12, a shutter drive circuit 13, a column signal processing circuit 14, a horizontal drive circuit 15, a horizontal signal line 16, an analog signal. The amplifier 17, the timing generator 18, an ADC (Analog-Digital Conversion) circuit 19, a DSP (Digital Signal Processor) circuit 20, a memory device 21 and a digital amplifier 22 are configured.

  The pixel array unit 11 has a configuration in which pixels 111 including photoelectric conversion elements are two-dimensionally arranged in a matrix and vertical signal lines 112 are wired for each column in the matrix arrangement. The pixel array unit 11 has an opening area (effective pixel array unit) 11A in which an incident surface of the pixel 111 is opened, and light incident through the opening is photoelectrically converted into a signal charge corresponding to the amount of light by a photoelectric conversion element; The incident surface of the pixel 111 is shielded (light-shielded), and has a light-shielding region (light-shielded pixel array portion) 11B that does not perform photoelectric conversion by the photoelectric conversion element.

  The pixels 111 of the opening area 11A and the light shielding area 11B have the same pixel structure. About several tens of rows of pixels 111 are arranged in the light shielding region 11B. However, FIG. 1 shows a configuration in which the pixels 111 are arranged in two rows in both the opening region 11A and the light shielding region 11B for simplification of the drawing.

  For example, as illustrated in FIG. 2, the pixel 111 includes, in addition to a photoelectric conversion element, for example, a photodiode PD, a signal charge obtained by photoelectric conversion by the driving transistor of the pixel 111, for example, the photodiode PD, in a floating diffusion FD. The transfer transistor Q1 is configured to have three transistors: a transfer transistor Q1, a reset transistor Q2 that controls the potential of the floating diffusion FD, and an amplification transistor Q3 that outputs a signal corresponding to the potential of the floating diffusion FD.

  In FIG. 2, a selection pulse SEL is commonly applied to the drains of the reset transistor Q2 and the amplification transistor Q3. Thereby, the pixels 111 are selected in units of rows. A reset pulse RST is applied to the gate of the reset transistor Q2. As a result, the floating diffusion FD is reset. A transfer pulse TRG is applied to the gate of the transfer transistor Q1. Thereby, the charge of the photodiode PD is transferred to the floating diffusion FD.

  Here, N-channel MOS transistors are used as the transfer transistor Q1, the reset transistor Q2, and the amplification transistor Q3, but P-channel MOS transistors can also be used. Further, the pixel 111 is not limited to the above-described three-transistor configuration, and a four-transistor formed by connecting a dedicated selection transistor for performing pixel selection between the amplification transistor Q3 and the vertical signal line 112. The thing of a structure etc. may be sufficient.

  The vertical drive circuit 12 includes a shift register or the like, and performs operations such as selecting each of the pixels 111 in units of rows, resetting the pixels 111 in the selected row, reading signals from the pixels 111, and the like. During driving by the vertical drive circuit 12, the potential of the floating diffusion FD when reset by the reset transistor Q2 is output from each of the pixels 111 in the selected row to the vertical signal line 112 through the amplification transistor Q3 as a reset level. When the signal charge is transferred from the photodiode PD to the floating diffusion FD by the transfer transistor Q1, the potential of the floating diffusion FD is output as a signal level to the vertical signal line 112 through the amplification transistor Q3.

  The shutter drive circuit 13 is basically composed of a shift register or the like, similar to the vertical drive circuit 12, and selects an electronic shutter row and performs an electronic shutter operation on the pixel 111 in the selected row, that is, the pixel 111. The exposure time (signal charge accumulation time) of the pixels 111 is controlled for each row (line) by performing the operation of sweeping out the charge accumulated in the photodiode PD. That is, in this shutter drive circuit 13, a desired exposure time can be set by controlling the drive interval with respect to the vertical drive circuit 12 for the same pixel row.

  The column signal processing circuit 14 includes a CDS (Correlated Double Sampling) circuit 141 and a line memory 142 for each pixel column of the pixel array unit 11, for example. The CDS circuit 141 performs CDS processing for noise removal on the signal output from the pixel 111 in the row selected by the vertical drive circuit 12. Specifically, as described above, the reset level and the signal level output in order from the pixel 111 in the selected row are received in order, and the difference between the two is removed, thereby removing fixed pattern noise for each pixel. As this CDS circuit 141, a circuit having a well-known circuit configuration including a sample hold circuit including a capacitor and a differential amplifier is used. The line memory 142 is composed of, for example, a sample hold capacitor, and holds the signal after the CDS process for one row (line).

  The horizontal drive circuit 15 is configured by a shift register or the like, and selects the line memory 142 in order for each pixel column, and sequentially outputs signals for one line held in the line memory 142 to the horizontal signal line 16. . The analog amplifier 17 amplifies (including attenuation) the signal of each pixel supplied from the line memory 142 through the horizontal signal line 16 with an appropriate gain. The timing generator 18 generates various timing pulses used in the circuit portions and supplies the timing pulses to the circuit portions.

  In each circuit portion described so far, that is, the vertical drive circuit 12, the shutter drive circuit 13, the column signal processing circuit 14, the horizontal drive circuit 15, the horizontal signal line 16, the analog amplifier 17, and the timing generator 18, the pixels 111 are arranged in a matrix. Are integrated on the same chip (semiconductor substrate) 23 as the pixel array unit 11 arranged in the circuit section, and the circuit parts described below, that is, the ADC circuit 19, the DSP circuit 20, the memory device 21, and the digital amplifier 22 are integrated on the chip 23. It is provided outside.

  The ADC circuit 19 converts an analog signal output from the analog amplifier 17 in the chip 23 to the outside of the chip 23 into a digital signal. The DSP circuit 20 takes, for example, an average value for a plurality of rows of signals output from each pixel in the light-shielding region 11B of the pixel array unit 11, and uses the average value as a reference signal for correcting vertical stripe-shaped fixed pattern noise. As a mean value calculation means stored in the memory device 21.

  Here, the vertical streak fixed pattern noise is a process variation for each column, specifically, a capacitor of the CDS circuit 141, a variation in threshold voltage of each pixel transistor in the pixel array unit 11, and a wiring width. This refers to noise components caused by variations.

  The DSP circuit 20 further uses the signal (average value) of each pixel stored in the memory device 21 as a reference signal for each column for correcting the vertical streak-like fixed pattern noise. The vertical streak-like fixed pattern noise is reduced by performing processing (subtraction processing) for taking a difference from the reference signal for each column stored in the signal memory device 21 output from each pixel in the effective area 11A. It has a function as a correction means for performing a correction process. The digital amplifier 22 amplifies (including attenuation) the digital signal output from the DSP circuit 20 with an appropriate gain.

  Next, the circuit operation of the CMOS image sensor 10A according to the present embodiment having the above-described configuration will be described.

  By the vertical scanning by the vertical drive circuit 12, the pixels 111 of the pixel array unit 11 are sequentially selected in units of rows. Then, in each pixel 111 of the selected row (signal output row), the signal level corresponding to the signal charge (for example, electrons) accumulated in the photodiode PD, and the reset level after resetting the photodiode PD (for example, 0 level) is output to the column signal processing circuit 14 of each column through the vertical signal line 112.

  On the other hand, when each pixel 111 of the pixel array unit 11 is sequentially selected in units of rows by scanning by the shutter drive circuit 13, the photodiode PD of each pixel 111 in the selected row (electronic shutter row) is reset. Immediately after driving the signal output row, each pixel 111 in the electronic shutter row is operated with the same drive pulse. When the electronic shutter row and the signal output row advance at a constant interval, the signal output from the signal output row is a light signal photoelectrically converted during the period from the electronic shutter row to the signal output row.

  By adjusting the interval between the electronic shutter row and the signal output row, the irradiation time (signal charge accumulation time) to the photodiode PD can be changed. Drive pulses for the vertical drive circuit 12 and the shutter drive circuit 13, that is, a start pulse and a clock pulse are generated by the timing generator 18. The adjustment of the irradiation time (signal charge accumulation time) is performed by adjusting the timing of the drive pulse generated by the timing generator 18.

  At the time of all pixel readout for reading out signals from all of the pixels 111, the shutter operation and readout operation are sequentially selected from the first row to the last row of the pixel array unit 11, and are performed on all rows. The operation up to this point is a known operation that is the same as the conventional one.

  Next, two embodiments for acquiring a reference signal for correcting vertical streak fixed pattern noise, which is a feature of the present invention, will be described below. In any of the embodiments, in order to eliminate the influence of light, the signal of each pixel in the light-shielding region (light-shielding pixel array unit) 11B of the pixel array unit 11 is corrected for vertical streak-like fixed pattern noise. As a reference signal.

(Example 1)
In Example 1, after the electric charge accumulated in the photoelectric conversion element (in this example, the photodiode PD) of each pixel 111 of the light shielding region (light shielding pixel array unit) 11B of the pixel array unit 11 is swept out by the electronic shutter operation, A signal is read from each pixel 111.

  FIG. 3 shows the timing relationship of drive pulses used in the pixel 111 for realizing the operation of the first embodiment. As a driving pulse for the pixel 111, a selection pulse SEL given to the drains of the reset transistor Q2 and the amplification transistor Q3, a reset pulse RST given to the gate of the reset transistor Q2, and a transfer pulse TRG given to the gate of the transfer transistor Q1 are used. .

  By the vertical scanning by the vertical drive circuit 12, the selection pulse SEL is set to the “H” level at the scanning timing t1 of a certain row in the light shielding region 11B of the pixel array unit 11, so that each pixel 111 in the row is selected. Become. In this selected state, when the transfer pulse TRG becomes “H” level at time t2, the transfer transistor Q1 is turned on and charges stored in the photodiode PD are transferred by the floating diffusion FD. Further, when the reset pulse RST becomes “H” level at the same timing t2 as the transfer pulse TRG, the reset transistor Q2 is turned on to reset the floating diffusion FD.

  Thereafter, the reset pulse RST becomes “H” level again at time t3, and the reset operation is performed. The potential of the floating diffusion FD in this reset state is output to the vertical signal line 112 through the amplification transistor Q3 as the reset level. . Subsequently, when the transfer pulse TRG becomes “H” level at time t4, the transfer operation of the charge of the photodiode PD to the floating diffusion FD is performed, and the potential of the floating diffusion FD at this time is used as the signal level to amplify the transistor Q3. To the vertical signal line 112.

  In this way, the reset level and the signal level are sequentially supplied to the CDS circuit 141 from the pixels 111 in a certain row in the light shielding region 11B of the pixel array unit 11 through the vertical signal line 112. Here, since each pixel 111 in the light shielding region 11B of the pixel array unit 11 is shielded from light, the signal of these pixels 111 is not affected by light at all, and both the reset level and the signal level are photodiodes. Since the charge stored in the PD is read out while being swept out, the reset level and the signal level are the same level without being affected by the dark current generated in the photodiode PD.

  At this time, the reset level and the signal level of the signal after the CDS process output from each of the CDS circuits 141 are ideally the same level, so that the 0 level is output as the output value after the CDS process. However, the values slightly vary from column to column under the influence of process variations of the CDS circuit 141, for example, variations of capacitors constituting the CDS circuit 141.

  The signal after the CDS processing is stored in a line memory (for example, a sample hold capacitor) 142 and then sequentially read out to the horizontal signal line 16 by horizontal scanning by the horizontal driving circuit 15. The read signal is amplified to an appropriate gain by the analog amplifier 17, output to the outside of the chip 23, digitally converted by the ADC circuit 19, and then sent to the memory device 21 via the DSP circuit 20. Stored as a reference signal for correcting the fixed pattern noise.

  Here, an average value of the signal of each pixel output from the ADC circuit 19 and the signal of each pixel stored in the memory device 21 is obtained, and the average value is used to correct the vertical streak fixed pattern noise. The function (average value calculation function) of the DSP circuit 20 that is stored in the memory device 21 as the reference signal will be described more specifically.

  The signal for each column of one row (for one time) stored in the memory device 21 as a reference signal for correcting the vertical streak fixed pattern noise is a random noise that cannot be ignored (for example, thermal noise or power fluctuation). Etc.) in many cases. When the correction signal for the vertical streak-like fixed pattern noise is performed using the reference signal having the random noise as it is, the corresponding fixed pattern noise can be reduced, but the image quality is deteriorated due to the random noise. There are also concerns.

  Therefore, in order to suppress random noise, the DSP circuit 20 performs averaging of signals for each column of a plurality of rows (a plurality of times) of the light-shielding region 11B, and corrects the average value of the fixed streak pattern noise. This is stored in the memory device 21 as a reference signal for this purpose. Specifically, the process of calculating the average value of the current output value of the ADC circuit 19 and the storage value (previous average value) of the memory device 21 and storing the average value in the memory device 21 as the current average value is as follows: Execute multiple times over multiple lines (lines).

  Here, the average value is obtained every time for each row, but the output values for a plurality of rows are sequentially added, and finally the average value is obtained by dividing the added value by the number of added rows. It is also possible to store the average value in the memory device 21 as a reference signal for correcting the vertical streaky fixed pattern noise.

  As is clear from FIG. 1, in the pixel array unit 11, a light shielding region 11B is provided above the opening region 11A. When the vertical drive circuit 12 performs vertical scanning, the light shielding region 11B is scanned first. Subsequently, scanning of the opening region 11A is performed. Therefore, when a series of operations for acquiring signals output from the respective pixels in the light shielding region 11B as reference signals for correcting the vertical streak fixed pattern noise is completed, scanning of the opening region 11A, that is, normal scanning is performed subsequently. The imaging operation starts.

  In this normal imaging operation, each pixel 111 in the opening region 11A of the pixel array unit 11 is sequentially selected in units of rows by vertical scanning by the vertical driving circuit 12. Then, the reset level and the signal level are sequentially output from each pixel 111 of the selected row to the vertical signal line 112, and CDS processing is performed in the CDS circuit 141.

  The signal after the CDS processing is stored in a line memory (for example, a sample hold capacitor) 142 and then sequentially read out to the horizontal signal line 16 by horizontal scanning by the horizontal driving circuit 15. The read signal is amplified to an appropriate gain by the analog amplifier 17 and is output to the outside of the chip 23. After being digitally converted by the ADC circuit 19, the signal is input to the DSP circuit 20. In the DSP circuit 20, the difference from the reference signal stored in the memory device 21 is taken to perform correction processing for removing the vertical streak-like fixed pattern noise, and an appropriate gain is obtained by the digital amplifier 22. Is amplified and output.

  FIG. 4 shows experimental results when correction processing for removing vertical streak fixed pattern noise is performed using the reference signal acquisition method according to the first embodiment. In this experiment, the number of rows in the light-shielding region 11B is set to 47 rows, an average value for each column of the signals of the pixels for the 47 rows is taken, and the average value is used as a reference signal for each column.

  In FIG. 4, the number of added and averaged images represents the number of frames when the number of images is repeated and averaged several times in order to suppress random noise when the output value of 47 rows is one frame. In addition, the vertical axis represents the corrected vertical streak noise (vertical streak-like fixed pattern noise), and the horizontal axis represents the addition averaged number.

  As is apparent from FIG. 4, when 100 sheets are added and averaged and correction is performed, the fixed pattern noise in the form of vertical stripes can be accurately extracted by suppressing the random noise of the reference signal. It can be seen that the vertical streak noise can be corrected to a value of about 1/4 of. In addition, since this value is almost the same as the inter-pixel fixed pattern noise, it is a very effective correction method.

  As described above, after sweeping out the electric charge accumulated in the photodiode PD of each pixel 111 in the light-shielding region (light-shielding pixel array unit) 11B of the pixel array unit 11, a signal is read from each pixel 111 and the vertical streak-like shape is read out. By using it as a reference signal for correcting fixed pattern noise, the influence of the dark current generated in the photodiode PD is suppressed, and the load of the vertical signal line 112 is almost the same as when a signal is read from each pixel 111 in the opening region 11A. Since the reference signal can be acquired in the same state, the vertical streak fixed pattern noise can be effectively reduced at a very high level.

(Example 2)
In Example 2, a signal is read from each pixel 111 in a state where each pixel 111 of the light-shielding region (light-shielding pixel array unit) 11B of the pixel array unit 11, specifically, the floating diffusion FD is reset.

  FIG. 5 shows a timing relationship of drive pulses used in the pixel 111 for realizing the operation of the second embodiment. As a driving pulse for the pixel 111, a selection pulse SEL given to the drains of the reset transistor Q2 and the amplification transistor Q3, a reset pulse RST given to the gate of the reset transistor Q2, and a transfer pulse TRG given to the gate of the transfer transistor Q1 are used. .

  By the vertical scanning by the vertical drive circuit 12, the selection pulse SEL is set to the “H” level at the scanning timing t1 of a certain row in the light shielding region 11B of the pixel array unit 11, so that each pixel 111 in the row is selected. Become. In this selected state, when the transfer pulse TRG becomes “H” level at time t2, the transfer transistor Q1 is turned on to transfer the charge stored in the photodiode PD by the floating diffusion FD. Further, when the reset pulse RST becomes “H” level at the same timing t2 as the transfer pulse TRG, the reset transistor Q2 is turned on to reset the floating diffusion FD.

  Thereafter, the reset pulse RST again becomes “H” level at time t3, whereby the floating diffusion FD is reset. Then, in a state where the floating diffusion FD is reset, the reset level (so-called P phase) and the signal level (so-called D phase) are read, and the reset level and the signal level are sequentially transferred to the vertical signal line 112 through the amplification transistor Q3. Is output.

  In this way, the reset level and the signal level are sequentially supplied to the CDS circuit 141 from the pixels 111 in a certain row in the light shielding region 11B of the pixel array unit 11 through the vertical signal line 112. Here, since each pixel 111 in the light-shielding region 11B of the pixel array unit 11 is in a light-shielded state, the signals of these pixels 111 are not affected by light at all and are read out in a reset state of the floating diffusion FD. Therefore, the reset level and the signal level are the same level without being affected by the dark current generated in the floating diffusion FD.

  At this time, the reset level and the signal level of the signal after the CDS process output from each of the CDS circuits 141 are ideally the same level, so that the 0 level is output as the output value after the CDS process. However, the values slightly vary from column to column under the influence of process variations of the CDS circuit 141, for example, variations of capacitors constituting the CDS circuit 141.

  The signal after the CDS processing is stored in a line memory (for example, a sample hold capacitor) 142 and then sequentially read out to the horizontal signal line 16 by horizontal scanning by the horizontal driving circuit 15. The read signal is amplified to an appropriate gain by the analog amplifier 17, output to the outside of the chip 23, digitally converted by the ADC circuit 19, and then sent to the memory device 21 via the DSP circuit 20. Stored as a reference signal for correcting the fixed pattern noise.

  Here, an average value of the signal of each pixel output from the ADC circuit 19 and the signal of each pixel stored in the memory device 21 is obtained, and the average value is used to correct the vertical streak fixed pattern noise. The function (average value calculation function) of the DSP circuit 20 stored in the memory device 21 as the reference signal is the same as that in the first embodiment.

  When a series of operations for acquiring signals output from the respective pixels in the light-shielding region 11B as reference signals for correcting vertical streak-like fixed pattern noise is completed, scanning of the opening region 11A, that is, normal imaging is subsequently performed. The operation is started, and the correction processing for removing the vertical streak fixed pattern noise is executed in the same manner as in the first embodiment.

  FIG. 6 shows the experimental results when correction processing for removing vertical streak fixed pattern noise is performed using the reference signal acquisition method according to the second embodiment. In this experiment, as in the case of the first embodiment, the number of rows of the light-shielding region 11B is set to 47 rows, an average value for each column of the signals of the pixels for the 47 rows is taken, and the average value is calculated for each column. As a reference signal.

  In FIG. 6, the addition averaged number represents the number of frames when the number of images is repeated several times in order to suppress random noise when the output value of 47 rows is one frame, and the addition averaging is performed. In addition, the vertical axis represents the corrected vertical streak noise (vertical streak-like fixed pattern noise), and the horizontal axis represents the addition averaged number. As is apparent from FIG. 6, when nine sheets are averaged and corrected, the vertical streak-like fixed pattern noise can be accurately extracted by suppressing the random noise of the reference signal. It can be understood that it is about ½ before the correction, and can be corrected sufficiently.

  As described above, in a state where each pixel 111 of the light-shielding region (light-shielding pixel array unit) 11B of the pixel array unit 11 is reset, a signal is read from each pixel 111 to correct vertical streak-like fixed pattern noise. By using it as a reference signal, the influence of the dark current generated in the floating diffusion FD is suppressed, and the reference signal is acquired in almost the same state as when the load of the vertical signal line 112 reads a signal from each pixel 111 in the opening region 11A. Therefore, it is possible to effectively reduce the vertical streak fixed pattern noise at a very high level.

  In the above embodiment, the number of rows in which the pixels 111 are arranged in the light shielding region 11B is a plurality of rows, and the signals output from the pixels in the plurality of rows are averaged and used as a reference signal for each column. The number of rows in which the pixels 111 are arranged in the light shielding region 11B is not limited to a plurality of rows. For example, even if there is one row, signals are repeatedly read from each pixel in the one row, and Even if the signals obtained repeatedly are averaged and used as a reference signal for each column, the intended purpose can be achieved.

  In the above-described embodiment, the case where the ADC circuit 19, the DSP circuit 20, the memory device 21, and the digital amplifier 22 are applied to the CMOS image sensor 10A having the configuration arranged outside the chip 23 is described as an example. 7, the ADC circuit 19, the DSP circuit 20, the memory device 21, and the digital amplifier 22 are made up of a vertical drive circuit 12, a shutter drive circuit 13, a column signal processing circuit 14, a horizontal drive circuit 15, a horizontal signal line 16, an analog The present invention can be similarly applied to the CMOS image sensor 10 </ b> B integrated with the amplifier 17 and the timing generator 18 on the same chip 23 as the pixel array unit 11.

  Furthermore, in the above-described embodiment, the case where the present invention is applied to a CMOS image sensor has been described as an example. However, the present invention is not limited to application to a CMOS image sensor, and XY represented by a MOS type image sensor. The present invention is applicable to all address type solid-state imaging devices.

  The solid-state imaging device according to the present invention can be used as an imaging device for various video devices such as a video camera that captures moving images and an electronic still camera that captures still images, and can also be used for mobile devices such as mobile phones with cameras. It can also be used as an imaging device.

It is a block diagram which shows the structure of the CMOS image sensor which concerns on one Embodiment of this invention. It is a circuit diagram which shows an example of a structure of a pixel. 3 is a timing chart of drive pulses used in pixels for realizing the operation of the first embodiment. It is a figure which shows the experimental result when the correction process for removing the fixed pattern noise of a vertical streak is performed using the acquisition method of the reference signal which concerns on Example 1. FIG. 10 is a timing chart of drive pulses used in pixels for realizing the operation of the second embodiment. It is a figure which shows the experimental result when the correction process for removing the fixed pattern noise of a vertical streak is performed using the acquisition method of the reference signal which concerns on Example 2. FIG. It is a block diagram which shows the structure of the CMOS image sensor which concerns on the modification of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10A, 10B ... CMOS image sensor, 11 ... Pixel array part, 11A ... Opening area | region, 11B ... Light-shielding area | region, 12 ... Vertical drive circuit, 13 ... Shutter drive circuit, 14 ... Column signal processing circuit, 15 ... Horizontal drive circuit, 16 ... horizontal signal line, 17 ... analog amplifier, 18 ... timing generator, 19 ... ADC circuit, 20 ... DSP (digital signal processing) circuit, 21 ... memory device, 22 ... digital amplifier, 23 ... chip (semiconductor substrate), 111 ... Pixel, 112... Vertical signal line, 141... CDS circuit, 142.

Claims (12)

Pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix, and an effective pixel array unit that outputs a signal obtained by photoelectric conversion for each pixel;
A light-shielding pixel array unit in which pixels having the same pixel structure as each pixel of the effective pixel array unit are arranged in at least one row for each column of the pixel array unit in a light-shielded state;
Driving means for reading a signal from each pixel in a state in which no charge is accumulated in each pixel of the light-shielding pixel array unit;
Storage means for storing, as a reference signal, a signal output from each pixel of the light-shielding pixel array unit by driving by the driving means;
A solid-state imaging device comprising: a correction unit that performs a correction process on a signal output from each pixel of the effective pixel array unit using the reference signal stored in the storage unit. 2. The solid according to claim 1, wherein the driving unit reads out a signal from each pixel of the light-shielding pixel array unit after sweeping out charge accumulated in a photoelectric conversion element of each pixel of the light-shielding pixel array unit. Imaging device. The solid-state imaging device according to claim 1, wherein the driving unit reads a signal from each pixel in a state where each pixel of the light-shielding pixel array unit is reset. An average value calculating means for obtaining an average value of a signal obtained from each pixel of the light-shielding pixel array portion and a signal stored in the storage means and storing the average value in the storage means is provided. The solid-state imaging device according to claim 1. In the shading pixel array portion, pixels are arranged for a plurality of rows,
The solid-state imaging device according to claim 4, wherein the average value calculation unit obtains an average value of signals obtained from the pixels of the plurality of rows for each column. In the light-shielding pixel array portion, only one row of pixels is arranged,
The solid-state imaging device according to claim 4, wherein the average value calculation unit obtains an average value of signals repeatedly obtained from the pixels for one row for each column. Pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix, and an effective pixel array unit that outputs a signal obtained by photoelectric conversion for each pixel;
A solid-state imaging device comprising: a light-shielded pixel array unit in which pixels having the same pixel structure as each pixel of the effective pixel array unit are arranged in a state of being shielded from light by at least one row for each column of the pixel array unit Driving method,
A first step of reading a signal from each pixel in a state in which no charge is accumulated in each pixel of the light-shielding pixel array unit;
A second step of holding, as a reference signal, a signal output from each pixel of the light-shielding pixel array unit by driving in the first step;
And a third step of performing a correction process on a signal output from each pixel of the effective pixel array unit using the reference signal held in the second step. 8. The signal is read out from each pixel of the light-shielding pixel array unit after sweeping out charge accumulated in the photoelectric conversion elements of the pixels of the light-shielding pixel array unit in the first step. A driving method of a solid-state imaging device. The solid-state imaging device driving method according to claim 7, wherein in the first step, a signal is read from each pixel in a state where each pixel of the light-shielding pixel array unit is reset. A fourth step of obtaining an average value of a signal obtained from each pixel of the light-shielding pixel array unit and a signal held in the second step and setting the average value as a signal held in the second step; The method for driving a solid-state imaging device according to claim 7. In the shading pixel array portion, pixels are arranged for a plurality of rows,
The method of driving a solid-state imaging device according to claim 10, wherein in the fourth step, an average value of signals obtained from the pixels of the plurality of rows is obtained for each column. In the light-shielding pixel array portion, only one row of pixels is arranged,
The solid-state imaging device driving method according to claim 10, wherein, in the fourth step, an average value of signals repeatedly obtained from the pixels of the one row is obtained for each column.

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