JP2005277146A - 半導体装置の製造方法 - Google Patents
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- JP2005277146A JP2005277146A JP2004089052A JP2004089052A JP2005277146A JP 2005277146 A JP2005277146 A JP 2005277146A JP 2004089052 A JP2004089052 A JP 2004089052A JP 2004089052 A JP2004089052 A JP 2004089052A JP 2005277146 A JP2005277146 A JP 2005277146A
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823835—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes silicided or salicided gate conductors
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823864—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising silicides
Abstract
【解決手段】50nm以下の線幅の半導体領域にシリサイド層を形成する前に、前記半導体領域から有機物を除去する工程と、前記半導体領域表面に形成された酸化膜を除去する工程と、乾燥処理として有機溶媒を用いない乾燥を行う工程とを含む半導体装置の製造方法。
【選択図】図5
Description
(評価結果)
図5(A)は、本発明のnチャネルMOSトランジスタにおけるゲート抵抗のウェーハ面内の累積確率を示す図である。図5(B)は、本発明のpチャネルMOSトランジスタにおけるゲート抵抗のウェーハ面内の累積確率を示す図である。図中、縦軸は累積確率を示し、横軸はゲート抵抗を示している。nチャネルMOSトランジスタは、上述した本発明の実施形態において詳細に説明した方法にて形成した。すなわち、シリサイド形成工程における前洗浄として、APM処理、HPM処理、有機溶媒を用いた乾燥、DHF処理、スピン乾燥処理を行った。その後、コバルト成膜、熱処理、配線工程等を行い、nMOSトランジスタのゲート長40,60,80nmのゲート抵抗をそれぞれ測定した。その結果、いずれのゲート長においてもウェーハ面内でのゲート抵抗のばらつきを抑制することができた。
2…素子分離領域
3…ゲート絶縁膜
4…ゲート電極
16…ソース/ドレイン拡散層
18…ソース/ドレイン拡散層
19…コバルトシリサイド層
Claims (10)
- 50nm以下の線幅の半導体領域にシリサイド層を形成する前に、
前記半導体領域から有機物を除去する工程と、
前記半導体領域表面の酸化膜を除去する工程と、
乾燥処理として有機溶媒を用いない乾燥を行なう工程と
を有することを特徴とする半導体装置の製造方法。 - 半導体領域にシリサイド層を形成する前に、
前記半導体領域から有機物を除去する工程と、
有機溶媒を用いて前記半導体領域を乾燥する工程と、
前記半導体領域表面の酸化膜を除去する工程と、
乾燥処理として有機溶媒を用いない乾燥を行なう工程と、
を有することを特徴とする半導体装置の製造方法。 - nMOSトランジスタ領域における50nm以下の線幅の半導体表面にシリサイド層を形成する前に、
前記半導体領域から有機物を除去する工程と、
前記半導体表面を乾燥する工程と、
前記半導体領域表面の酸化膜を除去する工程と、
乾燥処理として有機溶媒を用いない乾燥を行なう工程と、
を有することを特徴とする半導体装置の製造方法。 - 請求項1又は3に記載の半導体装置の製造方法において、
前記半導体領域の側壁に、酸化膜、または酸化膜及び窒化膜で形成した側壁絶縁膜を有することを特徴とする半導体装置の製造方法。 - 請求項1乃至4のいずれか1項に記載の半導体装置の製造方法において、
前記半導体領域から有機物を除去する工程は、水酸化アンモニウムと過酸化水素の溶液で処理することを特徴とする半導体装置の製造方法。 - 請求項1乃至5のいずれか1項に記載の半導体装置の製造方法において、
前記半導体領域から有機物を除去する工程の後、前記半導体領域から金属不純物を除去する工程をさらに含むことを特徴とする半導体装置の製造方法。 - 請求項6記載の半導体装置の製造方法において、
前記半導体領域から金属不純物を除去する工程は、塩酸と過酸化水素の溶液で処理することを特徴とする半導体装置の製造方法。 - 請求項1乃至7のいずれか1項に記載の半導体装置の製造方法において、
前記半導体表面の酸化膜を除去する工程は、希釈フッ酸で処理することを特徴とする半導体装置の製造方法。 - 請求項1乃至8のいずれか1項に記載の半導体装置の製造方法において、
前記有機溶媒を用いない乾燥は、温水乾燥、加熱乾燥及び真空乾燥、スピン乾燥であることを特徴とする半導体装置の製造方法。 - 請求項1乃至9のいずれか1項に記載の半導体装置の製造方法において、
前記有機溶媒を用いない乾燥において、乾燥後の前記半導体表面に存在する総有機物量が10pg/cm2以下であることを特徴とする半導体装置の製造方法。
Priority Applications (2)
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JP2004089052A JP2005277146A (ja) | 2004-03-25 | 2004-03-25 | 半導体装置の製造方法 |
US11/088,984 US7294577B2 (en) | 2004-03-25 | 2005-03-24 | Method of manufacturing a silicide layer |
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JP2004089052A JP2005277146A (ja) | 2004-03-25 | 2004-03-25 | 半導体装置の製造方法 |
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JP (1) | JP2005277146A (ja) |
Cited By (1)
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US9570362B2 (en) | 2014-05-08 | 2017-02-14 | Canon Kabushiki Kaisha | Method for manufacturing semiconductor device and semiconductor device |
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KR100706798B1 (ko) * | 2005-09-28 | 2007-04-12 | 삼성전자주식회사 | 실리콘막과 실리콘 게르마늄막이 노출된 기판의 세정 방법및 이를 이용하는 반도체 제조 방법 |
KR100875164B1 (ko) * | 2007-06-26 | 2008-12-22 | 주식회사 동부하이텍 | 웨이퍼의 세정 방법 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH03278431A (ja) * | 1989-05-09 | 1991-12-10 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH05160103A (ja) * | 1991-12-04 | 1993-06-25 | Fujitsu Ltd | ウエハの乾燥方法 |
JPH06104239A (ja) * | 1992-09-18 | 1994-04-15 | Nippon Steel Corp | 基板の乾燥方法及び装置 |
JPH06104328A (ja) * | 1992-08-04 | 1994-04-15 | Internatl Business Mach Corp <Ibm> | 全自動且つコンピュータ化コンベヤベースの製造ライン |
JPH1022255A (ja) * | 1996-06-28 | 1998-01-23 | Sony Corp | 洗浄方法及び洗浄装置 |
JP2001053051A (ja) * | 1999-08-10 | 2001-02-23 | Pre-Tech Co Ltd | 基板の乾燥装置および洗浄装置並びに乾燥方法および洗浄方法 |
JP2002334850A (ja) * | 2001-03-30 | 2002-11-22 | Internatl Business Mach Corp <Ibm> | サリサイド構造の改良された形成方法 |
JP2004006759A (ja) * | 2002-04-19 | 2004-01-08 | Hitachi Ltd | 半導体装置の製造方法 |
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US6664196B1 (en) * | 1999-03-15 | 2003-12-16 | Matsushita Electric Industrial Co., Ltd. | Method of cleaning electronic device and method of fabricating the same |
US6211055B1 (en) * | 1999-08-16 | 2001-04-03 | Promos Technology, Inc. | Wet-dry-wet process in wet station |
US6492275B2 (en) * | 2000-01-21 | 2002-12-10 | Advanced Micro Devices, Inc. | Control of transistor performance through adjustment of spacer oxide profile with a wet etch |
US7293571B2 (en) * | 2002-09-30 | 2007-11-13 | Lam Research Corporation | Substrate proximity processing housing and insert for generating a fluid meniscus |
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- 2004-03-25 JP JP2004089052A patent/JP2005277146A/ja active Pending
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Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH03278431A (ja) * | 1989-05-09 | 1991-12-10 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH05160103A (ja) * | 1991-12-04 | 1993-06-25 | Fujitsu Ltd | ウエハの乾燥方法 |
JPH06104328A (ja) * | 1992-08-04 | 1994-04-15 | Internatl Business Mach Corp <Ibm> | 全自動且つコンピュータ化コンベヤベースの製造ライン |
JPH06104239A (ja) * | 1992-09-18 | 1994-04-15 | Nippon Steel Corp | 基板の乾燥方法及び装置 |
JPH1022255A (ja) * | 1996-06-28 | 1998-01-23 | Sony Corp | 洗浄方法及び洗浄装置 |
JP2001053051A (ja) * | 1999-08-10 | 2001-02-23 | Pre-Tech Co Ltd | 基板の乾燥装置および洗浄装置並びに乾燥方法および洗浄方法 |
JP2002334850A (ja) * | 2001-03-30 | 2002-11-22 | Internatl Business Mach Corp <Ibm> | サリサイド構造の改良された形成方法 |
JP2004006759A (ja) * | 2002-04-19 | 2004-01-08 | Hitachi Ltd | 半導体装置の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9570362B2 (en) | 2014-05-08 | 2017-02-14 | Canon Kabushiki Kaisha | Method for manufacturing semiconductor device and semiconductor device |
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