JP2005265939A - Liquid crystal device interface system and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal device (LCD) interface system and a method in which, when driving an LCD panel, last line data are compared with current line data for each bit of the current line and the last line data are used if there is no change. <P>SOLUTION: The system includes; an LCD controller 10 for transmitting a dot clock signal of an arbitrary line of a display data, a horizontal and a vertical synchronized signals, an RGB data signal and a pre-line signal indicating a data of the arbitrary line is the same as the data of the last line; and a timing control part 20 in which the dot clock signal, the horizontal and the vertical signals, the RGB data signal and pre-line signal are received and if the pre-line signal is effective, the RGB output signal which operates an LCD panel 3 is made unchanged. Moreover, the LCD controller 10 has a function of writing the display signal generated by a CPU1 to a buffer memory 2. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an LCD interface method and method, and more particularly, to an LCD interface method and method for preventing RGB output signals applied to an LCD panel from changing as much as possible.

  In the conventional LCD interface system, as shown in FIG. 4, the display data signal generated by the CPU 1 is temporarily written in the buffer memory 2 through the LCD controller 60, and further passed through the LCD controller 60 and the timing control unit 70. 3 is operated.

  Further, as shown in FIG. 5, the LCD controller 60 includes a dot clock generation unit 61, a synchronization signal generation unit 62, a line buffer 64, and a memory control unit 63, and takes in a display data signal from the buffer memory 2 and receives a dot clock signal. , The horizontal / vertical synchronization signal, and the RGB data signal are sent to the timing controller 70. The timing control unit 70 includes a line buffer 71 and an LCD display timing generation unit 72. The timing control unit 70 inputs a dot clock signal, a horizontal / vertical synchronization signal, and an RGB data signal from the LCD controller 60 to generate an RGB output signal. To drive.

  Here, in order to send the display data read from the buffer memory to the LCD panel, the RGB data is output in synchronization with the display timing of the LCD. At this time, since the number of RGB data has a large number of signals according to the number of display colors, the current consumption increases and the number of radiation nozzles increases as the signal changes. That is, a signal change of RGB data occurs at the change point of the display data, and the current consumption and the emission nozzle are increased by this signal change.

  Conventionally, various means have been proposed to improve the above phenomenon (see, for example, Patent Document 1). In this example, when all the bits of one line of display data coincide with all the bits of the immediately preceding line, the shift lock is stopped and scanning of one line is stopped. That is, the presence / absence of a signal change is checked for each line to reduce the current consumption and the radiation nozzle.

Japanese Patent Laid-Open No. 10-83165 (pages 3 to 4, FIG. 1)

  As described above, in the conventional LCD interface method, whenever a signal change of RGB data occurs at a change point of display data, the current consumption applied to the LCD panel increases and the radiation nozzles also increase. In order to avoid this, the presence or absence of a signal change from the previous line is checked for each display data line, and scanning of one line is stopped when all bits match. However, since this is a line-by-line check, there is a drawback that it does not correspond to actual signal changes.

  An object of the present invention is to improve the above drawbacks by comparing the data of the previous line for each bit of the current line and using the data of the previous line when there is no change. It is to provide an interface method and method. In particular, when the same data continues in the vertical direction, an LCD interface method and method in which RGB signal changes are reduced by generating data output of RGB signals based on previous line data.

  The LCD interface system of the present invention indicates that the data of the arbitrary line is the same as the data of the immediately preceding line together with the dot clock signal, horizontal / vertical synchronization signal, and RGB data signal of the arbitrary line of display data. LCD controller for sending a pre-line signal, the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the pre-line signal are fetched, and the RGB output signal for operating the LCD panel is changed when the pre-line signal is valid And a timing control unit for preventing it from occurring.

  Furthermore, in the LCD interface system of the present invention, the LCD controller includes a dot clock generation unit that generates a dot clock signal, a synchronization signal generation unit that generates the timing of a horizontal / vertical synchronization signal, and a buffer memory that holds display data A memory control unit for controlling reading / writing of the display data between the line buffer, a line buffer for temporarily holding RGB data signals of lines currently being sent to the LCD panel, and the line buffer A pre-line buffer for holding the RGB data signal of the line immediately before the line, a latch for temporarily holding the RGB data signal of the line currently being sent, and the RGB data signal sent by the line buffer and the pre-line buffer And send the result as a pre-line signal A first comparator, a second comparator for comparing the RGB data signal sent by the latch and the RGB data signal sent by the line buffer, and sending the result to the first comparator; and the latch And a selector that selects either the RGB data signal to be transmitted or the RGB data signal to be transmitted by the line buffer according to the output result of the first comparator and transmits the selected RGB data signal as an RGB data signal.

  Further, in the LCD interface system of the present invention, the timing control unit receives a line buffer that holds the RGB data signal of the line sent from the LCD controller, and an RGB data signal of the previous line held by the line buffer. A preline buffer to be held, an LCD display timing generation unit for generating a timing signal of the LCD panel in accordance with the horizontal / vertical synchronization signal, an RGB data signal transmitted by the LCD controller, and a line before one line transmitted by the preline buffer And a selector for selecting any of the RGB data signals according to a pre-line signal transmitted by the LCD controller.

  Further, the LCD interface method of the present invention generates a pre-line signal indicating that the data of an arbitrary line of the display data is the same as the data of the immediately preceding line when displaying arbitrary display data on the LCD panel, When the pre-line signal is valid, the RGB output signal for operating the LCD panel is not changed.

  In addition, the LCD interface method of the present invention, together with the dot clock signal, the horizontal / vertical synchronization signal, and the RGB data signal of an arbitrary line of display data, the data of the arbitrary line is the same as the data of the immediately preceding line. The pre-line signal is transmitted, and the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the pre-line signal are captured, and the RGB output signal for operating the LCD panel is not changed when the pre-line signal is valid. It is characterized by doing so.

Furthermore, in the LCD interface method of the present invention, the data of the arbitrary line is the same as the data of the immediately preceding line together with the dot clock signal, horizontal / vertical synchronization signal, and RGB data signal of the arbitrary line of display data. When a pre-line signal is transmitted, the dot clock signal is generated, the timing of the horizontal / vertical synchronization signal is generated, and the reading / writing of the display data with the buffer memory holding the display data is controlled. The RGB data signal of the line being sent to the LCD panel is temporarily held in the line buffer, the RGB data signal of the line immediately preceding the line is held in the pre-line buffer, and the RGB data signal of the line currently being sent Is temporarily held in the latch, the line buffer and the pre-line The RGB data signal sent by the buffer is compared by the first comparator and the result is sent as a pre-line signal. The RGB data signal sent by the latch and the RGB data signal sent by the line buffer are sent by the second comparator. The comparison result is sent to the first comparator, and either the RGB data signal sent by the latch or the RGB data signal sent by the line buffer is selected according to the output result of the first comparator. Is transmitted as an RGB data signal.
Further, in the LCD interface method of the present invention, the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the preline signal are captured, and when the preline signal is valid, an RGB output signal for operating the LCD panel is obtained. When not changing, the RGB data signal of the line is held in the line buffer, the RGB data signal of the previous line held by the line buffer is held in the pre-line buffer, and the LCD panel according to the horizontal / vertical synchronization signal The timing signal is generated, the current RGB data signal and the RGB data signal one line before the pre-line buffer are sent out are selected according to the pre-line signal and sent to the line buffer. .

  That is, according to the present invention, in the display data interface circuit to the LCD display unit of the information terminal device, a preline signal indicating the same data as the previous line is generated, and the RGB output signal is not changed when the preline signal is valid. To do.

  Specifically, the line buffer data is compared with the preline buffer data without being output as RGB data. If the data is the same, the preline signal is validated and the previous data held in the latch is converted to RGB. Output as data. In this way, if the data is the same as the previous line data, the RGB data signal of the LCD controller is continuously output without changing the RGB data signal, thereby reducing the power consumption and the radiation nozzle. To do.

  As described above in detail, according to the present invention, when the same data continues in the line or column direction in a display device such as a computer device, RGB data can be obtained by utilizing the data of the previous line in the LCD interface. Since no signal change is required for data output, it is possible to suppress an increase in current consumption and generation of radiation nozzles due to RGB signal changes.

  The present invention will be described below with reference to the drawings.

  FIG. 1 is an explanatory view showing an embodiment of the present invention. In the same figure, the LCD interface method according to the present invention is the same as the data of the previous line, together with the dot clock signal, horizontal / vertical synchronization signal, and RGB data signal of the arbitrary line of display data. An LCD controller 10 for sending a pre-line signal indicating the presence, and the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the pre-line signal are fetched, and the LCD panel 3 is operated when the pre-line signal is valid And a timing control unit 20 that prevents the RGB output signal to be changed from being changed.

  The LCD controller 10 also has a function of writing a display data signal generated by the CPU 1 into the buffer memory 2.

  FIG. 2 is a block diagram showing the configuration of the LCD controller. In the figure, the LCD controller 10 includes a dot clock generation unit 11 that generates a dot clock signal, a synchronization signal generation unit 12 that generates the timing of a horizontal / vertical synchronization signal, and a buffer memory that holds display data. The memory control unit 13 that controls the reading / writing of the display data between them, the line buffer 14 that temporarily holds the RGB data signal of the line currently being sent to the LCD panel, and the line buffer A pre-line buffer 15 that holds the RGB data signal of the line immediately before the line, a latch 18 that temporarily holds the RGB data signal of the currently sent line, and the RGB that the line buffer and the pre-line buffer send out The first to compare the data signal and send the result as a pre-line signal The comparator 16 compares the RGB data signal sent by the latch with the RGB data signal sent by the line buffer, and sends the result to the first comparator, and the latch sends And a selector 19 for selecting either the RGB data signal to be transmitted or the RGB data signal transmitted by the line buffer according to the output result of the first comparator and transmitting it as an RGB data signal.

  FIG. 3 is a block diagram illustrating a configuration of the timing control unit. In the figure, the timing control unit 20 holds a line 21 buffer that holds the RGB data signal of the line sent from the LCD controller, and the RGB data signal of the previous line held by the line buffer. A preline buffer 22, an LCD display timing generation unit 24 that generates an LCD panel timing signal in accordance with the horizontal / vertical synchronization signal, an RGB data signal sent by the LCD controller, and a line one line before the preline buffer sends And a selector 23 for selecting any of the RGB data signals in accordance with a pre-line signal transmitted from the LCD controller.

  Next, the operation of the LCD interface method will be described.

  Referring to FIG. 2, first, the LCD controller 10 reads data for one line from the buffer memory 2 into the line buffer 14 via the memory control unit 13. The line buffer outputs RGB data corresponding to each pixel in synchronization with the dot clock.

  Further, the line buffer 14 sends data to the pre-line buffer 15 when the next line is displayed. As a result, the preline buffer always holds the data displayed one line before. Similar to the line buffer 14, the pre-line buffer 15 synchronizes with the dot clock and outputs RGB data of the same column one line before.

  Here, the latch 18 holds the data of the previous pixel by latching the RGB data output from the LCD controller 10.

  Next, the comparator 16 compares the output of the line buffer 14 with the previous line data from the preline buffer 15, and if the data is the same, validates the preline signal and outputs it to the timing control unit 20. The selector 19 is controlled to output the data held in the latch 18 so that the actual RGB output signal is not changed. If the data is different, the output of the line buffer 14 is output as it is as RGB data.

  The comparator 17 compares the data one pixel before output from the latch 18 with the original data output from the line buffer 14, and if the data is the same, there is no change in the RGB signal output. Since the comparison operation with the previous line is unnecessary, the operation of the comparator 16 is invalidated.

  As described above, when displaying vertical line data, only the preline signal is operated, and the RGB data signal is controlled so as not to change.

  Referring to FIG. 3, in the timing control unit 20, the line buffer 21 holds RGB data obtained via the selector 23 for one line, and sends the data to the preline buffer 22 when moving to the next line. As a result, the preline buffer 22 always holds the display data of the previous line, and outputs the RGB data of the previous line to the selector 23 in synchronization with the dot clock.

  The selector 23 normally outputs the RGB data output from the LCD controller 10 to the line buffer 21, but if the preline signal is valid, the previous line data output from the preline buffer 22 is output to the line buffer 21. Output.

  The RGB data output from the line buffer 21 is adjusted and transmitted by the LCD display timing generation unit 24 at the synchronization timing required by the LCD panel 3.

  As described above, even if there is a change in the display data and the RGB data needs to be changed, if the data is the same as the previous line, by enabling the pre-line signal, the RGB data signal is changed to the previous data. The state can be maintained, and the timing control unit 20 can reproduce the original data based on the data of the previous line.

  According to the present invention, the RGB data of each line is compared with the previous line for each bit to check the signal change and determine the driving signal for the LCD panel. It can be greatly reduced. Therefore, a power-saving and high-quality LCD panel can be provided.

Explanatory drawing which shows one Embodiment of this invention. The block diagram which shows the structure of a LCD controller. The block diagram which shows the structure of a timing control part. Explanatory drawing which shows the prior art example of this invention. The block diagram which shows the structure of a prior art example.

Explanation of symbols

1 CPU
2 Buffer memory 3 LCD panel 10, 60 LCD controller 11, 61 Dot clock generation unit 12, 62 Synchronization signal generation unit 13, 63 Memory control unit 14, 21, 64, 71 Line buffer 15, 22 Pre-line buffer 16, 17 Comparison Device 18 Latch 19, 23 Selector 20, 70 Timing controller 24, 72 LCD display timing generator

Claims (7)

An LCD controller for transmitting a pre-line signal indicating that the data of the arbitrary line is the same as the data of the immediately preceding line together with the dot clock signal, horizontal / vertical synchronization signal, and RGB data signal of the arbitrary line of the display data; ,
A timing control unit that captures the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the preline signal, and prevents the RGB output signal that operates the LCD panel from changing when the preline signal is valid;
An LCD interface system characterized by comprising:   The LCD controller reads / displays the display data between a dot clock generation unit that generates a dot clock signal, a synchronization signal generation unit that generates the timing of a horizontal / vertical synchronization signal, and a buffer memory that holds display data. A memory control unit that controls writing, a line buffer that temporarily holds the RGB data signal of the line currently being sent to the LCD panel, and an RGB data signal of the line immediately before the line held by the line buffer; The pre-line buffer to be held, the latch to temporarily hold the RGB data signal of the line currently being sent, and the RGB data signal sent by the line buffer and the pre-line buffer are compared, and the result is sent as a pre-line signal. A first comparator that transmits the RGB data transmitted by the latch; And a second comparator for comparing the RGB data signals sent from the line buffer and sending the result to the first comparator, an RGB data signal sent by the latch, and an RGB data signal sent by the line buffer 2. An LCD interface system according to claim 1, further comprising a selector that selects one of the two based on an output result of the first comparator and transmits the selected data as an RGB data signal.   The timing control unit includes a line buffer that holds RGB data signals of lines sent from the LCD controller, a pre-line buffer that holds RGB data signals of the previous line held by the line buffer, and the horizontal / An LCD display timing generation unit that generates an LCD panel timing signal in accordance with a vertical synchronization signal, and an RGB data signal sent out by the LCD controller and an RGB data signal one line before sent out by the pre-line buffer. The LCD interface system according to claim 1, further comprising a selector that selects according to a pre-line signal transmitted by.   When displaying arbitrary display data on the LCD panel, a pre-line signal indicating that the data of the arbitrary line of the display data is the same as the data of the previous line is generated, and when the pre-line signal is valid, An LCD interface method, wherein an RGB output signal for operating an LCD panel is not changed. Along with the dot clock signal, horizontal / vertical synchronization signal, and RGB data signal of any line of display data, a pre-line signal indicating that the data of the arbitrary line is the same as the data of the previous line,
Capturing the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the pre-line signal so as not to change the RGB output signal for operating the LCD panel when the pre-line signal is valid;
An LCD interface method characterized by the above. When sending a pre-line signal indicating that the data of the arbitrary line is the same as the data of the immediately preceding line, together with the dot clock signal, horizontal / vertical synchronization signal, and RGB data signal of the arbitrary line of the display data,
Generates dot clock signal, generates horizontal / vertical synchronization signal timing, controls reading / writing of display data to / from a buffer memory holding display data, and controls the line currently being sent to the LCD panel The RGB data signal is temporarily held in the line buffer, the RGB data signal of the line immediately before the line is held in the pre-line buffer, the RGB data signal of the currently sent line is temporarily held in the latch, The RGB data signals sent from the line buffer and the pre-line buffer are compared by a first comparator and the result is sent as a pre-line signal. The RGB data signal sent from the latch and the RGB data signal sent from the line buffer And the result is sent to the first comparator, and the latch 6. The LCD according to claim 5, wherein either an RGB data signal to be transmitted or an RGB data signal to be transmitted by the line buffer is selected according to an output result of the first comparator and is transmitted as an RGB data signal. Interface method. When the dot clock signal, the horizontal / vertical synchronization signal, the RGB data signal, and the preline signal are captured, and the RGB output signal for operating the LCD panel is not changed when the preline signal is valid,
Holding the RGB data signal of the line in a line buffer, holding the RGB data signal of the previous line held in the line buffer in a pre-line buffer, and generating an LCD panel timing signal according to the horizontal / vertical synchronization signal, 7. The current RGB data signal or the RGB data signal of the previous line sent by the preline buffer is selected according to the preline signal and sent to the line buffer. LCD interface method.

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