JP2005259961A - Pressure welding semiconductor device - Google Patents

Pressure welding semiconductor device Download PDF

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JP2005259961A
JP2005259961A JP2004069056A JP2004069056A JP2005259961A JP 2005259961 A JP2005259961 A JP 2005259961A JP 2004069056 A JP2004069056 A JP 2004069056A JP 2004069056 A JP2004069056 A JP 2004069056A JP 2005259961 A JP2005259961 A JP 2005259961A
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pressure
intermediate pressure
pressure member
semiconductor chip
electrode
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Riichi Sawano
理一 澤野
Masahiro Tatsukawa
昌弘 辰川
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Fuji Electric Co Ltd
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Fuji Electric Holdings Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pressure welding semiconductor device capable of balancing the pressurization stress distribution of the whole pressurization contact surface of a semiconductor chip, by easing the concentration of the pressurization stress in the end of the pressurization contact surface of the semiconductor chip in the pressure welding semiconductor device. <P>SOLUTION: A rigidity reduction means for reducing the rigidity of the edge lower than the rigidity of the center is provided, near the edge of one intermediate pressurizing member, which intervenes between a main electrode and a semiconductor chip. Consequently, the stress concentration in the edge of the medium pressurizing member of the pressurization contact surface of a semiconductor chip is eased, so that balancing of the whole distribution is attained. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

この発明は、例えばIGBTやパワーMOSFET、サイリスタ等の大容量のパワー半導体装置に好適な圧接構造を有する圧接型半導体装置に関する。   The present invention relates to a pressure contact type semiconductor device having a pressure contact structure suitable for a large capacity power semiconductor device such as an IGBT, a power MOSFET, or a thyristor.

圧接型半導体装置としては、図11に示すような構成を有するものが、例えば特許文献1によりすでに知られている。   As a press-contact type semiconductor device, one having a configuration as shown in FIG.

図11に示す半導体装置は、半導体チップ5を複数個並置したマルチチップ形の圧接型半導体装置の例であり、この図において、1および2はそれぞれ複数の半導体チップ5の両側に共通に配置されたエミッタ側銅電極およびコレクタ側銅電極、3はエミッタ側銅電極1にそれぞれの半導体チップ5に対応して設けられた凸状の押圧ポスト11が各半導体チップ5に対向する位置となるようにエミッタ側銅電極の位置決めを行なうためのエミッタ側ガイド、4は同様にコレクタ側銅電極2に設けられた凸状の押圧ポスト21が各半導体チップ5と対向する位置となるようにコレクタ側銅電極2の位置決めを行なうためのコレクタ側ガイド、6および7は両銅電極の押圧ポストと半導体チップ5との間にそれぞれ配置されたモリブデンあるいはタングステン等からなるエミッタ側中間加圧部材およびコレクタ側中間加圧部材である。これらの部材は、図示しない絶縁材料で形成された外容器内に収納され、その内部に窒素などの不活性ガスを充填して密封される。このとき、2つの銅電極1,2は外部との接続を行なうために外部へ露出しており、その外側にそれぞれ図示しない冷却体を接合し、これらの冷却体の外側から加圧することにより前記各部材を相互に加圧接触させて電気的および熱的に接続する。   The semiconductor device shown in FIG. 11 is an example of a multi-chip type pressure contact type semiconductor device in which a plurality of semiconductor chips 5 are juxtaposed. In this figure, reference numerals 1 and 2 are arranged in common on both sides of the plurality of semiconductor chips 5, respectively. The emitter-side copper electrode and the collector-side copper electrode 3 are arranged so that the convex pressing posts 11 provided on the emitter-side copper electrode 1 corresponding to the respective semiconductor chips 5 are positioned to face the respective semiconductor chips 5. Similarly, the emitter side guide 4 for positioning the emitter side copper electrode is arranged so that the convex pressing post 21 provided on the collector side copper electrode 2 faces the semiconductor chip 5. The collector-side guides 6 and 7 for positioning 2 are molybdenum or copper disposed between the pressing posts of both copper electrodes and the semiconductor chip 5, respectively. Emitter side intermediate pressure member made of tungsten, and the like, and the collector-side intermediate pressure member. These members are housed in an outer container formed of an insulating material (not shown), and the inside thereof is filled with an inert gas such as nitrogen and sealed. At this time, the two copper electrodes 1 and 2 are exposed to the outside in order to make a connection with the outside, and a cooling body (not shown) is joined to the outside of each of the copper electrodes 1 and 2, and the pressure is applied from the outside of these cooling bodies to Each member is brought into pressure contact with each other to be electrically and thermally connected.

このような圧接構造の半導体装置における半導体チップの圧接面の加圧応力は、一般に図3に特性線Bで示すように、半導体チップの端縁付近に集中しここでピークとなり、中央部で低くなるような分布を示す。これは、加圧応力が半導体チップに加圧力を伝える中間加圧部材の端縁部に集中するためである。このため、半導体チップの中央部の加圧応力を高めようとすると、その分だけ端縁部の加圧応力が増大し、半導体チップの端縁部付近に応力がより過大に集中することになる。   In the semiconductor device having such a pressure-contact structure, the pressure stress on the pressure-contact surface of the semiconductor chip is generally concentrated near the edge of the semiconductor chip as shown by the characteristic line B in FIG. It shows such a distribution. This is because the pressurizing stress is concentrated on the edge of the intermediate pressurizing member that transmits the pressurizing force to the semiconductor chip. For this reason, if it is going to raise the pressurization stress of the center part of a semiconductor chip, the pressurization stress of an edge part will increase by that much, and stress will concentrate more excessively near the edge part of a semiconductor chip. .

このような半導体チップの加圧応力分布の不均衡は、半導体チップにおける電流分布および温度分布の不均衡を招き、これらの不均衡が複合的に作用することにより使用中に半導体チップが破損する危険がる。   Such an imbalance in the pressure stress distribution of the semiconductor chip leads to an imbalance in the current distribution and the temperature distribution in the semiconductor chip, and the risk of the semiconductor chip being damaged during use due to the combined action of these imbalances. Garage.

このような半導体チップの圧接面の不均衡な応力分布を均衡化するため、従来は、特許文献2に示されるように、半導体チップの表裏両面に中間加圧部材をろう合金を介して接合することが提案されている。しかしこのような構造においても、半導体チップと中間加圧部材の熱膨張率が異なるため、両者の接合工程での加熱や、使用時の熱サイクルにより両者間に熱応力が生じ、半導体チップを破損することがある。   In order to balance such an unbalanced stress distribution on the pressure contact surface of the semiconductor chip, conventionally, as shown in Patent Document 2, intermediate pressure members are joined to both the front and back surfaces of the semiconductor chip via a brazing alloy. It has been proposed. However, even in such a structure, since the thermal expansion coefficient of the semiconductor chip and the intermediate pressure member are different, thermal stress is generated between the two due to heating in the joining process or thermal cycle during use, and the semiconductor chip is damaged. There are things to do.

このような熱応力による半導体チップの破損を防止するためには、中間加圧部材の厚さを薄くする必要があるが、この中間加圧部材は、その剛性により外部からの加圧力を分散してその分布を均衡化するものであるため、厚さを薄くすると剛性の低下により、加圧力の分布が不均衡となり、これによって半導体チップの一部に加圧応力が集中し、そこから半導体チップが破損する恐れが生じる。   In order to prevent damage to the semiconductor chip due to such thermal stress, it is necessary to reduce the thickness of the intermediate pressure member, but this intermediate pressure member disperses external pressure due to its rigidity. Therefore, when the thickness is reduced, the rigidity is reduced and the distribution of the applied pressure becomes unbalanced. As a result, pressure stress is concentrated on a part of the semiconductor chip, from which the semiconductor chip is concentrated. May cause damage.

また、特許文献1においては、エミッタ側電極(第1電極)およびコレクタ側電極(第2電極)の中間加圧部材に接する面に設けた凸状の押圧ポストにより、中間加圧部材を介して半導体チップを圧接することにより、両電極と半導体チップとの熱膨張のバランスをとって半導体チップの横方向の応力を緩和するようにしている。しかしこのポスト構造の電極は、特に並置する半導体チップの個数が多くなると形状が複雑となり加工コストが高くなるだけでなく、通常はエミッタ側中間加圧部材の大きさがコレクタ側中間加圧部材より小さくその端縁部がコレクタ側中間加圧部材の端縁の内側にくるため、エミッタ側中間加圧部材の端縁に応力集中が発生し、これを解消することができないなどの問題がある。
特開2002−110876号公報 特開平8−167625号公報
Moreover, in patent document 1, the convex press post provided in the surface which contact | connects the intermediate pressure member of an emitter side electrode (1st electrode) and a collector side electrode (2nd electrode) via an intermediate pressure member By pressure-contacting the semiconductor chip, the thermal expansion balance between both electrodes and the semiconductor chip is balanced to reduce the stress in the lateral direction of the semiconductor chip. However, this post-structured electrode not only has a complicated shape and increases the processing cost, especially when the number of semiconductor chips arranged in parallel increases, but usually the size of the emitter-side intermediate pressure member is larger than that of the collector-side intermediate pressure member. Since the edge portion is small and comes inside the edge of the collector-side intermediate pressure member, there is a problem that stress concentration occurs at the edge of the emitter-side intermediate pressure member, which cannot be eliminated.
JP 2002-110876 A JP-A-8-167625

この発明は、前記の従来装置における半導体チップおける加圧応力または熱応力による破損の危険を防止するために、簡単な構造で、半導体チップの加圧面の端縁部における加圧応力の集中を緩和して半導体チップの加圧接触面全体の加圧応力分布を均衡させることのできる圧接型半導体装置を提供することを課題とするものである。   The present invention reduces the concentration of pressure stress at the edge of the pressure surface of the semiconductor chip with a simple structure in order to prevent the risk of damage due to pressure stress or thermal stress in the semiconductor chip in the conventional device described above. An object of the present invention is to provide a pressure contact type semiconductor device capable of balancing the pressure stress distribution of the entire pressure contact surface of the semiconductor chip.

前記の課題を解決するため、この発明は、対向する第1の主面と第2の主面にそれぞれ第1の主電極と第2の主電極を有する1個以上の半導体チップと、前記第1の主電極に接触して加圧する第1の中間加圧部材と、この第1の中間加圧部材に接触して加圧する第1の主加圧電極と、第2の主電極に接触して加圧する第2の中間加圧部材と、この第2の中間加圧部材に接触して加圧する第2の主加圧電極とを順次重ね合わせ、前記第1および第2の主加圧電極間に外部からの加圧力を加えて前記各部材を相互に加圧接触させる圧接型半導体装置において、前記2つの中間加圧部材の一方の部材に、その端縁部付近の剛性を低下させる手段を形成したことを特徴とするものである。   In order to solve the above-described problems, the present invention provides one or more semiconductor chips each having a first main electrode and a second main electrode on a first main surface and a second main surface facing each other; A first intermediate pressure member that contacts and pressurizes one main electrode, a first main pressure electrode that contacts and pressurizes the first intermediate pressure member, and a second main electrode. A second intermediate pressure member that pressurizes the second intermediate pressure member, and a second main pressure electrode that contacts and pressurizes the second intermediate pressure member, and sequentially superimposes the first and second main pressure electrodes. In the press contact type semiconductor device in which the respective members are pressed against each other by applying external pressure between them, means for reducing the rigidity in the vicinity of the edge of one member of the two intermediate pressing members Is formed.

前記の発明において、前記の端縁部付近の剛性を低下させる手段は、第1の中間加圧部材の端縁付近を部分的に階段状に切欠いた切欠きにより構成することができる(請求項2)。   In the above invention, the means for reducing the rigidity in the vicinity of the end edge portion can be constituted by a notch in which the vicinity of the edge of the first intermediate pressure member is partially cut out in a step shape. 2).

また、前記の端縁部付近の剛性を低下させる手段は、第1の中間加圧部材の端縁部付近を部分的に溝状に切欠いた切欠きにより構成することもできる(請求項3)。   Further, the means for reducing the rigidity in the vicinity of the end edge portion can be constituted by a notch in which the vicinity of the end edge portion of the first intermediate pressure member is partially cut out in a groove shape. .

前記各請求項の発明において、階段状に切欠きが設けら断面形状が凸状をなす中間加圧部材の角部を円弧状等に角を切り落とすのがよい(請求項4)。   In the inventions of the above-mentioned claims, it is preferable to cut off the corners of the intermediate pressure member having a stepped notch and a convex cross-sectional shape in an arcuate shape (invention 4).

前記各請求項の発明において、前記主加圧電極の前記中間加圧部材と接触する面に凸状の押圧ポストを形成することができる。   In the invention of each of the above claims, a convex pressing post can be formed on a surface of the main pressing electrode that contacts the intermediate pressing member.

この発明によれば、半導体チップの第1の主電極に接触する中間加圧部材の端縁部付近の剛性を中央部の剛性より低下させる手段を設けたので、この中間加圧部材の端縁部付近の剛性が低下することより、この加圧部材を介して半導体チップに加えられる加圧部材の端縁部付近に集中していた加圧応力が低減されて、半導体チップに対する加圧応力が全面に分散して均衡化されることにより、半導体チップが破損する危険を低下することができる。   According to the present invention, since the means for reducing the rigidity in the vicinity of the edge portion of the intermediate pressure member that contacts the first main electrode of the semiconductor chip is lower than the rigidity of the central portion, the edge of the intermediate pressure member is provided. The pressure stress concentrated near the edge of the pressure member applied to the semiconductor chip via this pressure member is reduced, and the pressure stress on the semiconductor chip is reduced. By being distributed and balanced over the entire surface, the risk of breakage of the semiconductor chip can be reduced.

以下、この発明の実施の形態を図に示す実施例について説明する。   Embodiments of the present invention will now be described with reference to the drawings.

図1は、この発明の第1の実施例を示すものである。   FIG. 1 shows a first embodiment of the present invention.

図1において、1および2はそれぞれ複数の半導体チップ5の両側に共通に配置されたエミッタ側銅電極(第1の電極)およびコレクタ側銅電極(第2の電極)、3は絶縁材料で構成されたエミッタ側ガイド、4は同様に絶縁材料で構成されたコレクタ側ガイド、5はIGBTや、パワーMOSFETなどを構成する半導体チップ、6は各半導体チップ5に対して前記エミッタ側ガイドによって位置決めされそのエミッタ電極(第1の主電極)面にそれぞれ接触されるモリブデンあるいはタングステン等の高剛性材料からなるエミッタ側中間加圧部材、7は同様に前記コレクタ側ガイド4によって各半導体チップ5に対して位置決めされそのコレクタ電極(第2の主電極)面にそれぞれ接触されるモリブデンあるいはタングステン等の高剛性材料からなるコレクタ側中間加圧部材、8はそれぞれ半導体チップ5とエミッタ側およびコレクタ側ガイドによってエミッタ側銅電極1およびコレクタ側銅電極2に接触されたエミッタ側中間加圧部材6およびコレクタ側中間加圧部材7とからなりチップユニットを位置決めするチップユニットガイドである。これらの部材は、図示しない絶縁材料で形成された外容器内に収納され、その内部に窒素などの不活性ガスを充填して密封される。このとき、2つの銅電極1,2は外部との接続を行なうために外部へ露出しており、その外側にそれぞれ図示しない冷却体を当接し、これらの冷却体の外側から加圧することにより前記各部材を相互に加圧接触させて電気的および熱的接続を行なう。なお、コレクタ側中間加圧部材7は、加圧接触でなく、半導体チップ5のコレクタ電極面にろう合金等を用いて固定的に結合するようにしてもよい。   In FIG. 1, reference numerals 1 and 2 denote an emitter-side copper electrode (first electrode) and a collector-side copper electrode (second electrode) that are commonly arranged on both sides of a plurality of semiconductor chips 5, respectively. The emitter-side guides 4 are similarly collector-side guides made of an insulating material, 5 is a semiconductor chip constituting an IGBT or a power MOSFET, and 6 is positioned with respect to each semiconductor chip 5 by the emitter-side guides. An emitter-side intermediate pressure member 7 made of a high-rigidity material such as molybdenum or tungsten, which is in contact with the emitter electrode (first main electrode) surface, is similarly applied to each semiconductor chip 5 by the collector-side guide 4. High rigidity such as molybdenum or tungsten that is positioned and in contact with the collector electrode (second main electrode) surface The collector-side intermediate pressurizing member 8 made of a material is an emitter-side intermediate pressurizing member 6 and a collector-side intermediate member which are in contact with the emitter-side copper electrode 1 and the collector-side copper electrode 2 by the semiconductor chip 5 and the emitter-side and collector-side guides, respectively. It is a chip unit guide that includes the pressure member 7 and positions the chip unit. These members are housed in an outer container formed of an insulating material (not shown), and the inside thereof is filled with an inert gas such as nitrogen and sealed. At this time, the two copper electrodes 1 and 2 are exposed to the outside in order to make a connection with the outside, a cooling body (not shown) is brought into contact with the outside thereof, and the pressure is applied from the outside of these cooling bodies to Each member is brought into pressure contact with each other to make an electrical and thermal connection. The collector-side intermediate pressure member 7 may be fixedly bonded to the collector electrode surface of the semiconductor chip 5 using a braze alloy or the like instead of being pressed.

このような構成において、エミッタ側中間加圧部材6は、図2に詳細を示すように、端縁部に全周にわたって部分的に階段状に切欠かれた切欠き6bが設けられ、端縁部付近の厚さが中央部分6aの厚さより薄くなっている。   In such a configuration, as shown in detail in FIG. 2, the emitter-side intermediate pressurizing member 6 is provided with a notch 6b that is partially cut out in a stepped manner over the entire periphery, as shown in detail in FIG. The thickness in the vicinity is thinner than the thickness of the central portion 6a.

中間加圧部材6をこのような形状とすることによって、この部材の端縁部分の剛性が厚さの厚い中央部分の剛性に比べて低下する。このため、エミッタ側銅電極1からこの中間加圧部材6に加えられた加圧力が端縁部への集中が緩和されて中央部分に分散されるようになる。   By setting the intermediate pressure member 6 to such a shape, the rigidity of the edge portion of the member is lowered as compared with the rigidity of the thick central portion. For this reason, the applied pressure applied from the emitter-side copper electrode 1 to the intermediate pressurizing member 6 is reduced in concentration on the end edge and dispersed in the central portion.

具体的について説明する。図に2における中間加圧部材6は、高剛性材料のタングステンで形成され、各部の寸法を次のように選定している。   A specific description will be given. The intermediate pressure member 6 in FIG. 2 is made of tungsten, which is a highly rigid material, and the dimensions of each part are selected as follows.

長辺6W :17.3mm
短辺6D :14.4mm
厚さ6T :3.0mm
切欠き6bの幅W :2.1mm
切欠き6bの高さD:2.0mm
このような中間加圧部材6を介して半導体チップ5を所定の圧力で加圧したときの半導体チップ5の加圧接触面における加圧応力の分布を有限要素法でシミュレーションした結果を従来装置の加圧応力の分布と併せて図3に示す。図3の特性線Aは、この発明の実施例おける半導体チップの加圧接触面の長辺6W方向の加圧応力分布を示し、特性線Bは従来装置における同様の加圧応力分布を示している。
Long side 6W: 17.3 mm
Short side 6D: 14.4 mm
Thickness 6T: 3.0mm
Notch 6b width W: 2.1 mm
Notch 6b height D: 2.0 mm
The result of simulating the distribution of the pressing stress on the pressing contact surface of the semiconductor chip 5 when the semiconductor chip 5 is pressed at a predetermined pressure through such an intermediate pressing member 6 is the result of the simulation of the conventional apparatus. FIG. 3 shows the distribution of pressure stress. The characteristic line A in FIG. 3 shows the pressure stress distribution in the direction of the long side 6W of the pressure contact surface of the semiconductor chip in the embodiment of the present invention, and the characteristic line B shows the same pressure stress distribution in the conventional apparatus. Yes.

なお、従来の中間加圧部材としては、外形がこの発明の実施例の中間加圧部材と同じ大きさで切欠き6bをなくした構成のものを比較のために用いた。もちろん半導体チップ等の中間加圧部材以外の構成部材は両者同じものを使用している。   For comparison, a conventional intermediate pressure member having the same outer shape as the intermediate pressure member of the embodiment of the present invention and having the notch 6b eliminated is used for comparison. Of course, the same components are used for the components other than the intermediate pressure member such as a semiconductor chip.

図3の横軸は、半導体チップ5の中心軸から長辺方向の距離(mm)を示し、縦軸は半導体チップの加圧接触面の受ける応力を単位化して示している。したがって、横軸のW1は切欠き6bの内側端の位置、W2は中間加圧部材6の長辺側の外側端の位置、そしてW3は半導体チップの長辺側の外側端の位置となる。また、P1は、この発明の実施例による半導体チップ5の加圧接触面の加圧応力のピーク値、P2は従来装置における半導体チップの加圧接触面の加圧応力のピーク値を示している。   The horizontal axis in FIG. 3 indicates the distance (mm) in the long side direction from the central axis of the semiconductor chip 5, and the vertical axis indicates the stress received by the pressure contact surface of the semiconductor chip as a unit. Accordingly, W1 on the horizontal axis is the position of the inner end of the notch 6b, W2 is the position of the outer end on the long side of the intermediate pressure member 6, and W3 is the position of the outer end on the long side of the semiconductor chip. Further, P1 represents the peak value of the pressing stress on the pressing contact surface of the semiconductor chip 5 according to the embodiment of the present invention, and P2 represents the peak value of the pressing stress on the pressing contact surface of the semiconductor chip in the conventional device. .

従来の圧接形半導体装置の半導体チップの加圧接触面の加圧応力の分布は、特性線Bで示すように、中間加圧部材の外側端の位置となるW2で高いピーク値P2(約130)を有するとともに急激な変化を示すが、この発明によれば、半導体チップの加圧応力分布は、特性線Aで示すように、中間加圧部材6の外側端位置W2においてピークを示すが、そのピーク値P1(約105)は、従来装置のピーク値P2より2割以上低減され、しかも中間加圧部材の内側における応力分布の低下も緩慢な変化となり均衡化していることがわかる。   As shown by the characteristic line B, the pressure stress distribution on the pressure contact surface of the semiconductor chip of the conventional pressure contact type semiconductor device has a high peak value P2 (about 130) at W2, which is the position of the outer end of the intermediate pressure member. According to the present invention, the pressure stress distribution of the semiconductor chip shows a peak at the outer end position W2 of the intermediate pressure member 6 as indicated by the characteristic line A. It can be seen that the peak value P1 (about 105) is reduced by more than 20% from the peak value P2 of the conventional device, and the decrease in the stress distribution inside the intermediate pressurizing member is also a slow change and balanced.

このように、この発明によれば、半導体チップの加圧接触面の加圧応力の中間加圧部材の端縁部付近への集中が緩和されて分布が均衡化するため、使用中における半導体チップの破損の危険が低減され、信頼性を高めることができる。   As described above, according to the present invention, since the concentration of the pressing stress on the pressing contact surface of the semiconductor chip near the end edge of the intermediate pressing member is relaxed and the distribution is balanced, the semiconductor chip in use The risk of breakage is reduced and the reliability can be improved.

なお、この実施例1において、前記中間加圧部材6は、図4に示すように、直角な角部Rの角を切り落として円弧状等にすると、この中間加圧部材の端縁部および切欠き6bの内周縁部における加圧力の集中がさらに緩和されるので、これと加圧接触する半導体チップの加圧接触面の加圧応力のピークがさらに低減し、より分布を均衡化することができる。   In the first embodiment, as shown in FIG. 4, when the intermediate pressure member 6 is cut into the corners of the right-angled corners R to form an arc shape or the like, Since the concentration of the pressing force at the inner peripheral edge of the notch 6b is further relaxed, the peak of the pressing stress on the pressing contact surface of the semiconductor chip that is in pressure contact therewith can be further reduced, and the distribution can be further balanced. it can.

さらにこの実施例においては、図5および図6に示すように、中間加圧部材6,7と接触する銅電極1および2の少なくとも一方の接触面に凸状の押圧ポスト11または21を設け、この押圧ポストにより中間加圧部材を加圧する構成とすることができる。このように押圧ポストにより中間加圧部材を加圧するようにすると、中間加圧部材の中央部分が加圧されることになるので、中間加圧部材の端縁部付近の加圧力の集中がさらに緩和されることになり、中間加圧部材6による加圧力の集中緩和作用と相まって半導体チップ5の加圧接触面の加圧応力分布をより均衡化することができる。   Furthermore, in this embodiment, as shown in FIG. 5 and FIG. 6, convex pressing posts 11 or 21 are provided on at least one contact surface of the copper electrodes 1 and 2 that are in contact with the intermediate pressure members 6 and 7, It can be set as the structure which pressurizes an intermediate pressure member with this press post. When the intermediate pressure member is pressurized by the pressure post in this way, the central portion of the intermediate pressure member is pressurized, so that the concentration of applied pressure near the edge of the intermediate pressure member is further increased. As a result, the pressure stress distribution on the pressure contact surface of the semiconductor chip 5 can be further balanced, coupled with the concentration relaxation action of the applied pressure by the intermediate pressure member 6.

図7および図8にこの発明の第2の実施例を示す。   7 and 8 show a second embodiment of the present invention.

この実施例2も、図7から明らかなように、エミッタ側銅電極1およびコレクタ側銅電極2の間にそれぞれエミッタ側中間加圧部材6およびコレクタ側中間加圧部材7を介してIGBTやパワーMOSFETなどを構成する半導体チップ5が挟まれ、外部からの加圧力により各部材が加圧接触される構成を有する。3、4および8は、各部材の位置決め用のガイドである。この実施例2におけるエミッタ側中間加圧部材6には、端縁部付近に、実施例1における階段状に切欠いた切欠き6bの代わりに、周回した溝状に切欠いた切欠き6cが設けられている。中間加圧部材6は、ここでは図8に示すように平面形状が正方形に形成され、切欠き6cは、この部材の平面外形と相似な正方形に形成されている。   As is apparent from FIG. 7, the second embodiment also includes an IGBT and a power via an emitter-side intermediate pressure member 6 and a collector-side intermediate pressure member 7 between the emitter-side copper electrode 1 and the collector-side copper electrode 2, respectively. A semiconductor chip 5 constituting a MOSFET or the like is sandwiched, and each member is pressed and contacted by external pressure. Reference numerals 3, 4 and 8 are guides for positioning each member. The emitter-side intermediate pressurizing member 6 in the second embodiment is provided with a notch 6c cut out in the shape of a circumferential groove, instead of the stepped notch 6b in the first embodiment, in the vicinity of the edge. ing. Here, as shown in FIG. 8, the intermediate pressure member 6 is formed in a square shape in plan view, and the notch 6c is formed in a square shape similar to the planar outer shape of this member.

銅電極1の中間加圧部材6との接触面には凸状の押圧ポスト11が形成され、この押圧ポスト11により中間加圧部材6の切欠き6cの内側の中央部分6a接触してこれを押圧するようにしている。   A convex pressing post 11 is formed on the contact surface of the copper electrode 1 with the intermediate pressing member 6, and the pressing post 11 contacts the inner central portion 6 a of the notch 6 c of the intermediate pressing member 6. I try to press it.

このように中間加圧部材6に溝状の切欠き6cを設けると、この部分で中間加圧部材6の厚さが薄くなり、剛性が低下し、この溝状の切欠き6cが剛性低下手段として機能する。このように中間加圧部材6の端縁部の内側に剛性を低下させる手段として溝状の切欠き6cが設けられると、この中間加圧部材6の中央部6aで受けた加圧力が溝状の切欠き6cで剛性が低下に伴う変形によりで弱められ、その外側の端縁部の導体チップ5に対する加圧力が減少する。   When the groove-shaped notch 6c is provided in the intermediate pressure member 6 in this way, the thickness of the intermediate pressure member 6 is reduced at this portion and the rigidity is lowered, and the groove-shaped notch 6c is used to reduce the rigidity. Function as. As described above, when the groove-shaped notch 6c is provided as a means for reducing the rigidity inside the edge portion of the intermediate pressure member 6, the applied pressure received at the central portion 6a of the intermediate pressure member 6 is groove-shaped. In the notch 6c, the rigidity is weakened by deformation accompanying the reduction, and the pressure applied to the conductor chip 5 at the outer edge is reduced.

したがって、この実施例2においても、中間加圧部材6における端縁部付近に設けられた溝状の切欠き6cが、実施例1の中間加圧部材6における端縁部付近の階段状の切欠き6bと同様の剛性を低下させる作用をすることによって、銅電極1、2の外側から所定の加圧力で加圧した場合、半導体チップ5の加圧接触面における加圧応力分布は、実施例1における図3に特性線Aで示す応力分布と同様の傾向を示し、中間加圧部材6端縁部におけるの応力のピーク値が低減され、分布が全体に均衡化する。   Therefore, also in the second embodiment, the groove-shaped notch 6c provided in the vicinity of the end edge portion of the intermediate pressure member 6 has a stepped cut near the end edge portion of the intermediate pressure member 6 of the first embodiment. When pressure is applied with a predetermined pressure from the outside of the copper electrodes 1 and 2 by acting to reduce the rigidity similar to that of the notch 6b, the pressure stress distribution on the pressure contact surface of the semiconductor chip 5 is an example. 3 in FIG. 3 shows the same tendency as the stress distribution indicated by the characteristic line A, the peak value of stress at the edge of the intermediate pressure member 6 is reduced, and the distribution is balanced as a whole.

このような実施例2においては、銅電極1押圧ポスト11の断面を円形に形成した場合、中間加圧部材6に設ける溝状の切欠き6cは、図9および図10に示すように、押圧ポスト11を取り囲む円形または楕円形とするのがよい。特に中間加圧部材6の平面が長方形となる場合には、その縦横の長さの比に応じて、短辺側に長い楕円形にすることにより中間加圧部材の長辺と短辺における端縁の加圧力を等しくできないまでも、その差を縮小することができる。   In the second embodiment, when the cross section of the copper electrode 1 pressing post 11 is formed in a circular shape, the groove-shaped notch 6c provided in the intermediate pressure member 6 is pressed as shown in FIG. 9 and FIG. It may be circular or oval surrounding the post 11. In particular, when the plane of the intermediate pressure member 6 is a rectangle, depending on the ratio of the length and width of the intermediate pressure member 6, an end on the long side and the short side of the intermediate pressure member is formed by forming an ellipse that is long on the short side. Even if the edge pressure cannot be equalized, the difference can be reduced.

この発明は、対向する第1の主面と第2の主面にそれぞれ第1の主電極と第2の主電極を有する1個以上の半導体チップと、前記第1の主電極に接触して加圧する第1の中間加圧部材と、この第1の中間加圧部材に接触して加圧する第1の主加圧電極と、第2の主電極に接触して加圧する第2の中間加圧部材と、この第2の中間加圧部材に接触して加圧する第2の主加圧電極とを順次重ね合わせ、前記第1および第2の主加圧電極間に外部からの加圧力により前記各部材を相互に加圧接触させる圧接型半導体装置において、中間加圧部材の端縁部に剛性を低下させる手段を設けるだけの簡単な構成により、半導体チップの加圧接触面の応力の集中を緩和し、その分布の均衡化を図ることができるので、加圧接触型半導体装置における半導体チップの破損事故を軽減でき信頼性を向上でき有益である。
また、前記実施例においては、半導体チップを複数並置したマルチチップ形の半導体装置の例を示したが、この発明は、半導体チップを1個にしたシングルチップ形の半導体装置にも適用することができる。
According to the present invention, one or more semiconductor chips each having a first main electrode and a second main electrode on the first main surface and the second main surface facing each other, and in contact with the first main electrode, A first intermediate pressure member that pressurizes, a first main pressure electrode that contacts and pressurizes the first intermediate pressure member, and a second intermediate pressurizer that contacts and pressurizes the second main electrode A pressure member and a second main pressure electrode that pressurizes the second intermediate pressure member in contact with the second intermediate pressure member are sequentially overlapped, and external pressure is applied between the first and second main pressure electrodes. In the press-contact type semiconductor device in which the members are brought into pressure contact with each other, the stress concentration on the pressure contact surface of the semiconductor chip can be achieved by simply providing a means for reducing the rigidity at the edge of the intermediate pressure member. Can be relaxed and the distribution can be balanced. Is beneficial can improve reliability can reduce the damage accident of-flops.
In the above embodiment, an example of a multi-chip type semiconductor device in which a plurality of semiconductor chips are juxtaposed is shown. However, the present invention can also be applied to a single-chip type semiconductor device having one semiconductor chip. it can.

この発明の第1の実施例による加圧接触型半導体装置を示す縦断面図である。1 is a longitudinal sectional view showing a pressure contact type semiconductor device according to a first embodiment of the present invention. この発明の第1の実施例で使用する中間加圧部材の斜視図である。It is a perspective view of the intermediate pressure member used in the first embodiment of the present invention. 加圧接触型半導体装置における半導体チップの加圧接触面の応力分布の説明図である。It is explanatory drawing of the stress distribution of the press contact surface of the semiconductor chip in a press contact type semiconductor device. この発明の第1の実施例で使用する中間加圧部材の変形例を示す正面図である。It is a front view which shows the modification of the intermediate pressure member used in 1st Example of this invention. この発明の第1の実施例の変形例を示す縦断面図である。It is a longitudinal cross-sectional view which shows the modification of 1st Example of this invention. この発明の第1の実施例の他の変形例を示す縦断面図である。It is a longitudinal cross-sectional view which shows the other modification of the 1st Example of this invention. この発明の第2の実施例による加圧接触型半導体装置を示す縦断面図である。It is a longitudinal cross-sectional view which shows the pressurization contact type semiconductor device by 2nd Example of this invention. この発明の第2の実施例で使用する中間加圧部材の斜視図である。It is a perspective view of the intermediate | middle pressurization member used in 2nd Example of this invention. この発明の第2の実施例において使用する中間加圧部材の変形例を示す平面図である。It is a top view which shows the modification of the intermediate pressure member used in 2nd Example of this invention. この発明の第2の実施例において使用する中間加圧部材の他の変形例を示す平面図である。It is a top view which shows the other modification of the intermediate | middle pressurization member used in 2nd Example of this invention. 従来の加圧接触型半導体装置を示す縦断面図である。It is a longitudinal cross-sectional view which shows the conventional pressurization contact type semiconductor device.

符号の説明Explanation of symbols

1 エミッタ側銅電極(第1主電極)
2 コレクタ側銅電極(第2主電極)
5 半導体チップ
6 エミッタ側中間加圧部材
7 コレクタ側中間加圧部材

1 Emitter-side copper electrode (first main electrode)
2 Collector-side copper electrode (second main electrode)
5 Semiconductor chip 6 Emitter-side intermediate pressure member 7 Collector-side intermediate pressure member

Claims (5)

対向する第1の主面と第2の主面にそれぞれ第1の主電極と第2の主電極を有する1個以上の半導体チップと、前記第1の主電極に接触して加圧する第1の中間加圧部材と、この第1の中間加圧部材に接触して加圧する第1の主加圧電極と、第2の主電極に接触して加圧する第2の中間加圧部材と、この第2の中間加圧部材に接触して加圧する第2の主加圧電極とを順次重ね合わせ、前記第1および第2の主加圧電極間に外部からの加圧力を加えて前記各部材を相互に加圧接触させる圧接型半導体装置において、前記の少なくとも一方の中間加圧部材に、その端縁部付近の剛性を低下させる手段を形成したことを特徴とする圧接型半導体装置。   One or more semiconductor chips each having a first main electrode and a second main electrode on the first main surface and the second main surface that face each other, and a first pressure that contacts and pressurizes the first main electrode An intermediate pressure member, a first main pressure electrode that contacts and pressurizes the first intermediate pressure member, a second intermediate pressure member that contacts and pressurizes the second main electrode, A second main pressure electrode that pressurizes the second intermediate pressure member in contact with the second intermediate pressure member is sequentially superposed, and external pressure is applied between the first and second main pressure electrodes to In the press contact type semiconductor device in which the members are brought into pressure contact with each other, the pressure contact type semiconductor device is characterized in that the at least one intermediate pressurizing member is formed with means for reducing the rigidity in the vicinity of the edge portion thereof. 前記の中間加圧部材の端縁部付近の剛性を低下させる手段が、中間加圧部材の端縁部付近を部分的に階段状に切欠いた切欠きにより構成されたことを特徴とする請求項1記載の圧接型半導体装置。   The means for reducing the rigidity in the vicinity of the end edge portion of the intermediate pressure member is constituted by a notch in which the vicinity of the end edge portion of the intermediate pressure member is partially cut out in a step shape. The pressure contact type semiconductor device according to 1. 前記の中間加圧部材の端縁部付近の剛性を低下させる手段が、中間加圧部材の端縁部付近を部分的に部分的に溝状に切欠いた切欠きにより構成されたことを特徴とする請求項1記載の圧接型半導体装置。   The means for reducing the rigidity in the vicinity of the edge of the intermediate pressure member is constituted by a notch in which the vicinity of the edge of the intermediate pressure member is partially cut out in a groove shape. The pressure contact type semiconductor device according to claim 1. 前記中間加圧部材の直角な角部の角を切り落としたことを特徴とする請求項1ないし3の何れかに記載の圧接型半導体装置。   4. The press-contact type semiconductor device according to claim 1, wherein corners of a right-angled corner of the intermediate pressure member are cut off. 前記主加圧電極の前記中間加圧部材と接触する面に凸状の押圧ポストを形成したことを特徴とする請求項1ない4の何れかに記載の圧接型半導体装置。

5. The press contact type semiconductor device according to claim 1, wherein a convex pressing post is formed on a surface of the main pressing electrode that contacts the intermediate pressing member.

JP2004069056A 2004-03-11 2004-03-11 Pressure welding semiconductor device Pending JP2005259961A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011243929A (en) * 2010-05-21 2011-12-01 Hitachi Ltd Semiconductor device and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011243929A (en) * 2010-05-21 2011-12-01 Hitachi Ltd Semiconductor device and manufacturing method thereof

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