JP2010118577A - Resin encapsulated semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a resin encapsulated semiconductor device which is low-cost and advantageous also in terms of reliability. <P>SOLUTION: A first lead frame 10 having a die pad 12 and a second lead frame 20 having inner leads 23a, 23b are prepared. A semiconductor chip 30 is mounted on the die pad 12, and the second lead frame 20 is superimposed on the first lead frame 10. The respective distal end parts 25a, 25b of the inner leads 23a, 23b and a part (electrode) of the semiconductor chip 30 are bonded by ultrasonic welding, etc. After that, a laminate of the first, second lead frame 10, 20 is set in a mold to perform resin encapsulation. Since the semiconductor chip 30 is directly connected to the inner leads 23a, 23b by one bonding part, reliability of bonding is high. Positioning between the semiconductor chip 30 and the inner leads 23a, 23b is simple and manufacturing costs are also inexpensive. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a resin-encapsulated semiconductor device equipped with a power semiconductor chip and a method for manufacturing the same.

  Conventionally, a resin-encapsulated semiconductor device in which a semiconductor chip on which a power device is formed is encapsulated with a resin has been incorporated in various electronic devices. Since power devices consume relatively large power, wiring members such as inner leads must also be adapted to them.

As a structure of a wiring member suitable for a power device, for example, there is one disclosed in Patent Document 1. In the technique of this document, the inner lead and the electrode of the semiconductor chip are joined using a conductive connecting plate and silver paste instead of the bonding wire.
As described above, by using a conductive connecting plate having a large cross-sectional area, it is possible to flow a large current compared to the bonding wire.
JP-A-2005-129606

In the technique disclosed in Patent Document 1, it is necessary to join the conductive connecting plate using silver paste at two locations of the inner lead and the electrode of the semiconductor chip. However, the operation of joining the conductive connecting plates, which are relatively small metal pieces, at both ends thereof is complicated. That is, a tool for supporting the conductive connection plate and a special jig for positioning are also required. Therefore, when the technique of Patent Document 1 is used, the manufacturing cost of the entire resin-encapsulated semiconductor device may increase.
Further, since there are two joint portions at both ends of the conductive connection plate, there is a possibility that the reliability may be deteriorated.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a resin-encapsulated semiconductor device that is low in cost and advantageous in terms of reliability, and a method for manufacturing the same, by providing a means that allows easy positioning and requires fewer joints.

The method for manufacturing a resin-encapsulated semiconductor device includes the following steps. First, a first lead frame having a die pad and at least one second lead frame having inner leads are prepared. Then, a semiconductor chip is mounted on the die pad of the first lead frame. Further, the second lead frame is superimposed on the first lead frame, and a part of the semiconductor chip and the inner lead are joined. Thereafter, resin sealing is performed.
There may be a plurality of second lead frames depending on the type of semiconductor chip.

In this method, since two lead frames are overlapped, it is easy to align the inner lead and a part of the semiconductor chip (for example, an electrode). Therefore, a resin-encapsulated semiconductor device can be assembled at a low cost without requiring a complicated jig or a special device.
Since the inner lead is directly connected to the semiconductor chip, a large current can flow. Moreover, there is only one joint between the inner lead and the semiconductor chip. Therefore, the reliability of the joint is also improved.
Therefore, by the method of the present invention, a highly reliable resin-encapsulated semiconductor device as a power device can be formed at low cost.

  It is preferable that an assembly positioning portion is formed on the first and second lead frames, and that the first and second lead frames are overlapped with each other. Then, the inner lead and the semiconductor chip can be joined with the first and second lead frames positioned securely. As an assembly positioning part, for example, there are a guide pin and a pin hole engaged with the guide pin. However, it is not limited to this combination.

  Further, a positioning portion such as a guide pin may be provided in the sealing mold, and the positioning portions (pin holes and the like) of the first and second lead frames may be engaged.

The inner lead and a part of the semiconductor chip are preferably joined by one selected from ultrasonic welding, pressure welding, and diffusion welding. By this method, it is not necessary to use brazing material, solder, metal paste, etc., and highly reliable joining can be performed at low cost.
However, the inner lead and a part of the semiconductor chip can be joined by soldering or brazing.

  By using Cu as the material of the first and second lead frames, heat dissipation can be enhanced by utilizing high thermal conductivity.

  According to the oil-sealed semiconductor device and the manufacturing method thereof of the present invention, since positioning is easy and the number of joints is small, a resin-sealed semiconductor device that is advantageous in terms of reliability at low cost can be obtained.

(Embodiment)
FIG. 1 is a perspective view showing a lead frame preparation process in the embodiment of the present invention. First, a first lead frame 10 having a die pad 12 and a second lead frame 20 having inner leads 23a and 23b are prepared.

  The first lead frame 10 has a rectangular outer frame 11, and the die pad 12 is disposed in the outer frame 11. The die pad 12 is connected to the outer frame 11 by a pair of tie bars 14 a and 14 b and an outer lead 13. The die pad 12 has an opening 15 for attaching a heat radiating fin.

  Guide pins 16 for positioning at the time of assembly are provided at two corners which are diagonal positions of the outer frame 11. Further, guide pin holes 17 for positioning at the time of mold setting are provided at two corners different from the above two corners.

  The second lead frame 20 has an outer frame 21 having the same size and shape as the outer frame 11 of the first lead frame 10. A pair of outer leads 22a, 22b and inner leads 23a, 23b extend inward from the outer frame 21. The inner leads 23a and 23b are branched into three tip portions 25a and 25b. The boundaries between the outer leads 22a and 22b and the inner leads 23a and 23b are supported on the outer frame 21 by tie bars 24a and 24b.

In the second lead frame 20, guide pin holes 26 for positioning at the time of assembly are provided at two corners which are diagonal positions of the outer frame 21. Further, guide pin holes 27 for positioning at the time of mold setting are provided at two corners different from the above two corners.
That is, the guide pin 16 and the guide pin hole 26 are assembly positioning portions, and the guide pin holes 17 and 27 are mold positioning portions.

The first and second lead frames 10 and 20 are formed of a plated Cu plate such as Ni plating or Au plating, and have a thickness of about 0.5 mm to 1.0 mm. The dimensions of the outer frames 11 and 21 of the first and second lead frames 10 and 20 are about (25 mm to 30 mm) × (40 mm to 45 mm).
The inner leads 23a, 23b and the outer leads 13, 22a, 22b have a thickness of about 0.4 mm to 0.8 mm. As will be described later, the tip portions 25a and 25b of the inner leads 23a and 23b are preferably thinly deformed.

  Next, the semiconductor chip 30 is mounted on the die pad 12 of the first lead frame 10. The semiconductor chip 30 is formed with a vertical semiconductor device such as an IGBT using a substrate such as SiC or GaN. The semiconductor chip 30 has a thickness of about 0.2 mm to 0.5 mm and a width of 1 mm. It is about 0.0 mm to 5.0 mm, and the length is about 1.0 mm to 5.0 mm.

  Although not shown in the figure, since the vertical semiconductor device is formed on the semiconductor chip 30 in the present embodiment, the entire bottom surface of the semiconductor chip 30 is formed with a bottom electrode made of Ni or the like. Then, the lower surface electrode of the semiconductor chip 30 and the die pad 12 are joined by silver paste, solder, or the like.

  Next, as shown in FIG. 2, the second lead frame 20 is overlaid on the first lead frame 10. At this time, the two guide pin holes 26 of the second lead frame 20 are fitted into the two guide pins 16 of the first lead frame 10. Then, the front end portions 25 a and 25 b of the inner leads 23 a and 23 b are located immediately above the upper surface electrode (not shown) provided on the semiconductor chip 30.

  3 is a cross-sectional view of the second lead frame 20 taken along line III-III shown in FIG. The outer lead 22a and the inner lead 23a of the second lead frame 20 are deformed as shown in FIG. That is, when the first and second lead frames 10 and 20 are overlapped, the outer lead 13, the tie bars 24a and 24b, and the inner leads 23a and 23b are at the same planar position.

  FIG. 4 is a perspective view showing an example of the shape of the tip portions 25a and 25b of the inner leads 23a and 23b. As shown in FIG. 4, the leading end portions of the tip portions 25 a and 25 b are thinned and bent. For example, the thickness t1 of the base portions of the tip portions 25a and 25b is 0.5 mm, and the thickness t2 of the most distal portion is as thin as about 0.05 mm. This is due to press deformation and the following deformation during ultrasonic welding.

  FIG. 5 is a cross-sectional view showing a bonding state between the semiconductor chip 30 and the tip portions 25a and 25b of the inner leads 23a and 23b. In the present embodiment, ultrasonic vibrations are applied between the tip portions 25a and 25b in a state where the tip portions of the tip portions 25a and 25b are pressed against the semiconductor chip 30. By applying ultrasonic vibration, the members in phase contact are plastically deformed, and the surface oxide film is destroyed, and a clean surface appears and mutual diffusion occurs and is joined.

  In the present embodiment, a part (electrode) of the semiconductor chip 30 and each of the inner leads 23a and 23b are joined by ultrasonic welding without using solder or brazing material. By processing in this way, it is possible to realize strong and highly reliable bonding. However, bonding may be performed using solder, brazing material, silver paste, or the like.

  In this example, the upper surface electrode of the semiconductor chip 30 having a vertical semiconductor device is a source electrode and a gate electrode, and the lower surface electrode is a drain electrode. Therefore, the inner leads 23a and 23b are connected to the source electrode and the gate electrode of the vertical semiconductor device. Cu, Al, Au or the like is used for the electrodes of the semiconductor chip 30. When using Cu, NI plating, Au plating, etc. are performed.

  Next, the first and second lead frames 10 and 20 are set in a sealing mold in a temporarily fixed state. At this time, the guide pin holes 17 and 27 can be fitted into guide pins (not shown) of the sealing mold. Although the illustration of the set state at this time is omitted, a well-known and commonly used resin sealing process may be used.

FIG. 6 is a cross-sectional view showing the structure of the laminated body of the first and second lead frames 10 and 20 after resin sealing. 6 is a cross-sectional view taken along a line III-III shown in FIG.
As shown in FIG. 6, the semiconductor chip 30 and the inner leads 23 a and 23 b are sealed with a resin 40 on the upper surface side of the die pad 12. Thereby, the resin-encapsulated semiconductor device A is formed. After the sealing step, the portions protruding from the resin 40 are removed except for the outer leads 13, 22a, and 22b. That is, the outer frames 11 and 21 and the tie bars 24a, 24b, 14a, and 14b are removed by cutting.

According to the manufacturing method of the resin-encapsulated semiconductor device A of the present embodiment, the following effects can be obtained.
Since the first and second lead frames 10 and 20 are overlapped, it is easy to align the inner lead and a part (electrode) of the semiconductor chip. For example, as in the above-described embodiment, the positioning can be performed simply by fitting the guide pin 16 into the guide pin hole 26. That is, a resin-encapsulated semiconductor device can be assembled at low cost without the need for jigs or special devices.

Further, since the inner leads 23a and 23b (tip portions 25a and 25b) are directly connected to the semiconductor chip 30, there is only one joint portion. Therefore, the reliability of the joint is also improved. Then, it is possible to pass a larger current than the bonding wire using the inner leads 23a and 23b.
Therefore, a highly reliable resin-encapsulated semiconductor device as a power device can be formed at low cost by the method of this embodiment.

  The assembly positioning portion of the present invention is not limited to the structure of the above embodiment. For example, a rectangular container into which the entire outer frames 11 and 21 of the first and second lead frames 10 and 20 are fitted may be used. In addition, well-known and conventional positioning means used for positioning a plurality of members can be used.

  Further, the guide pin holes 17 and 27 of the first and second lead frames 10 and 20 may be used as assembly and mold positioning portions. In that case, after the guide pin holes 17 and 27 of the first and second lead frames 10 and 20 are fitted into the guide pins of the sealing mold, the inner leads 23a and 23b and the semiconductor chip 30 are joined. Do.

  In the above embodiment, the inner leads 23a and 23b and a part (electrode) of the semiconductor chip 30 are joined by ultrasonic welding. However, not only the ultrasonic welding method but also a pressure welding method or a diffusion welding method may be used. In the pressure welding method, plastic deformation is generated only by applying a large pressure between two members, and both are joined. In the diffusion welding method, in a vacuum or a protective atmosphere, heating is performed at a high temperature while applying pressure between two members, and the constituent elements are diffused to be joined.

  By performing joining using mechanical energy such as ultrasonic welding, pressure welding, and diffusion welding, it is not necessary to use a bonding agent such as solder. Therefore, the manufacturing cost can be reduced, and high bonding reliability can be obtained even when used at a high temperature.

  However, soldering, brazing, or joining using silver paste may be performed.

  In the above embodiment, a single second lead frame 20 is used, but a plurality of second lead frames 20 may be used. In particular, when the semiconductor chip 30 is provided with a horizontal semiconductor device such as a high-frequency device, a large number of inner leads are required, and therefore it is preferable to use a plurality of second lead frames 20.

(Other embodiments)
As in the above embodiment, not only one die pad 12 but also a large number of die pads 12 can be formed on the first lead frame 10. In that case, a plurality of resin-encapsulated semiconductor devices A are obtained in a single resin-encapsulation process.
FIG. 7 is a plan view showing an example in which a plurality of die pads 12 are provided on the first lead frame 10. In the figure, one side of the horizontal frame 18 is not shown, but the horizontal frame 18 exists above and below. In the first lead frame 10, a die pad 12 is disposed in each region surrounded by the outer frame 11 extending between the horizontal frames 18.

  On the other hand, although not shown, the second lead frame 20 also has a shape overlapping the first lead frame 10. An inner lead extends above the semiconductor chip 30 mounted on each die pad 12. The shape of the inner lead is the same as the inner leads 23a and 23b of the embodiment.

  As the positioning part for assembly, a pair of guide pins may be provided in the first lead frame 10 and a pair of guide pin holes may be provided in the second lead frame.

Note that the second lead frame may be individually overlapped for each outer frame 11 of the first lead frame 10. That is, a plurality of second lead frames are used for one first lead frame.
In that case, a pair of guide pins is provided for each outer frame 11 of the first lead frame. The second lead frame is provided with a guide pin hole for assembly that fits into the guide pin. Only one pair of guide pin holes for mold setting may be formed in the first lead frame 10 (for example, the horizontal frame 18).

  With the structure shown in FIG. 7, the efficiency in the production line can be increased, and the production cost can be further reduced.

  The structure of the embodiment of the present invention disclosed above is merely an example, and the scope of the present invention is not limited to the scope of these descriptions. The scope of the present invention is indicated by the description of the scope of claims, and further includes meanings equivalent to the description of the scope of claims and all modifications within the scope.

  The resin-encapsulated semiconductor device of the present invention can be used for electronic components used in various devices such as hybrid vehicles and electric vehicles.

It is a perspective view which shows the state which prepared the two lead frames in embodiment. It is a perspective view which shows the state which overlaps with two lead frames in embodiment. It is sectional drawing in the III-III line of the 2nd lead frame. It is a perspective view which shows an example of the shape of the front-end | tip part of an inner lead. It is sectional drawing which shows the joining state of the semiconductor chip and the front-end | tip part of each inner lead. It is sectional drawing which shows the structure of the laminated body of the 1st, 2nd lead frame after resin sealing. It is a top view which shows the example which provided the several die pad in the 1st lead frame.

Explanation of symbols

A resin-sealed semiconductor device 10 first lead frame 11 outer frame 12 die pad 13 outer lead 14a, 14b tie bar 15 opening 16 guide pin 17 guide pin hole 18 horizontal frame 20 second lead frame 21 outer frame 22a, 22b outer lead 23a, 23b Inner leads 24a, 24b Tie bars 25a, 25b Tip portion 26 Guide pin hole 27 Guide pin hole 30 Semiconductor chip 40 Sealing resin

Claims (6)

Preparing a first lead frame having a die pad and at least one second lead frame having an inner lead;
A step (b) of mounting a semiconductor chip on the die pad of the first lead frame;
A step (c) of superimposing the second lead frame on the first lead frame;
A step (d) of joining a part of the semiconductor chip and the inner lead;
A step (e) of sealing each of the first and second lead frames and the semiconductor chip with a resin;
A method for manufacturing a resin-encapsulated semiconductor device comprising: In the manufacturing method of the resin-sealed semiconductor device according to claim 1,
In the step (a), on the first and second lead frames, an assembly positioning portion that determines a relative position of each other is formed,
In the step (c), a method for manufacturing a resin-encapsulated semiconductor device, wherein the first and second lead frames are overlapped using the assembly positioning portion. In the manufacturing method of the resin-sealed semiconductor device according to claim 1,
In the step (a), on each of the first and second lead frames, a mold positioning portion for determining a position with the sealing mold used in the step (e) is formed.
In the step (c), a method for manufacturing a resin-encapsulated semiconductor device, wherein the first and second lead frames are set in a sealing mold using the mold positioning portion. In the manufacturing method of the resin-sealed semiconductor device according to any one of claims 1 to 3,
In the step (d), the inner lead and a part of the semiconductor chip are joined by one selected from ultrasonic welding, pressure welding, and diffusion welding. In the manufacturing method of the resin-sealed semiconductor device according to any one of claims 1 to 4,
In the step (a), a method for manufacturing a resin-encapsulated semiconductor device using a Cu frame as the first and second lead frames.   A resin-encapsulated semiconductor device formed by the method for producing a resin-encapsulated semiconductor device according to claim 1.

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