JP2005234781A - Constant current control circuit device - Google Patents

Constant current control circuit device Download PDF

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JP2005234781A
JP2005234781A JP2004041511A JP2004041511A JP2005234781A JP 2005234781 A JP2005234781 A JP 2005234781A JP 2004041511 A JP2004041511 A JP 2004041511A JP 2004041511 A JP2004041511 A JP 2004041511A JP 2005234781 A JP2005234781 A JP 2005234781A
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resistance
current control
constant current
temperature characteristic
control circuit
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JP4285266B2 (en
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Kingo Ota
欣吾 太田
Hiroyuki Ban
伴　　博行
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Denso Corp
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Denso Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To facilitate trimming of a shunt resistance value in a constant current control circuit device composed by using a current mirror circuit and improve a temperature property of the device. <P>SOLUTION: An on-state resistance of a P channel MOSFET 12 is used for a shunt-resistance of a current control circuit 11 and a temperature characteristics correction circuit 15 composed of a series circuit of an emitter resistance 13 and a CrSi resistance 14 is connected to the gate of the MOSFET 12. Then, a temperature characteristics of the on-resistance of the MOSFET 12 is corrected by controlling the gate potential of the MOSFET 12 by means of the correction circuit 15. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、カレントミラー回路を用いて構成される定電流制御回路装置に関する。   The present invention relates to a constant current control circuit device configured using a current mirror circuit.

図５には、カレントミラー回路を用いて構成される定電流制御回路の一構成例を示す。主電源ＶMAINとグランドとの間には、シャント抵抗であるＡｌ（アルミニュウム）抵抗１と、ＮチャネルＬＤ（Laterally Diffused）ＭＯＳＦＥＴ（電流制御素子）２と、負荷抵抗３との直列回路が接続されている。シャント抵抗１の両端には、カレントミラー回路４を構成する２つのＰＮＰトランジスタ４ａ及び４ｂのエミッタが接続されている。
トランジスタ４ａ及び４ｂのコレクタは、夫々定電流源５ａ及び５ｂを介してグランドに接続されている。また、トランジスタ４ａ及び４ｂのコレクタは、オペアンプ６の反転入力端子及び非反転入力端子に接続されている。そして、オペアンプ６の出力端子は、ＦＥＴ２のゲートに接続されている。 FIG. 5 shows a configuration example of a constant current control circuit configured using a current mirror circuit. A series circuit of an Al (aluminum) resistor 1 which is a shunt resistor, an N-channel LD (Laterally Diffused) MOSFET (current control element) 2 and a load resistor 3 is connected between the main power supply VMAIN and the ground. Yes. Connected to both ends of the shunt resistor 1 are the emitters of the two PNP transistors 4a and 4b constituting the current mirror circuit 4.
The collectors of the transistors 4a and 4b are connected to the ground via the constant current sources 5a and 5b, respectively. The collectors of the transistors 4 a and 4 b are connected to the inverting input terminal and the non-inverting input terminal of the operational amplifier 6. The output terminal of the operational amplifier 6 is connected to the gate of the FET 2.

以上のように構成される定電流回路７は、ＦＥＴ２のオン状態によって負荷抵抗３に定電流を流すように制御している。例えば、負荷抵抗３に流れる電流が増加すると当Ａｌ抵抗１における電圧降下が大きくなる。すると、トランジスタ５ｂのエミッタ電位が低下するので、トランジスタ５ａ側のエミッタ−ベース間の電位差が大きくなり、トランジスタ５ａは電流をより多く流そうとする。しかし、コレクタ側には定電流源５ａが接続されているため電流は増加せず、オペアンプ６の反転入力端子の電位が上昇する。その結果ＦＥＴ２のゲート電位が低下するので、ＦＥＴ２はドレイン−ソース間電流を絞るように作用する。
尚、出願人は、本願発明について提示すべき適当な先行技術文献を見つけることはできなかった。 The constant current circuit 7 configured as described above is controlled so that a constant current flows through the load resistor 3 when the FET 2 is on. For example, when the current flowing through the load resistor 3 increases, the voltage drop in the Al resistor 1 increases. Then, since the emitter potential of the transistor 5b is lowered, the potential difference between the emitter and the base on the transistor 5a side is increased, and the transistor 5a tries to flow more current. However, since the constant current source 5a is connected to the collector side, the current does not increase and the potential of the inverting input terminal of the operational amplifier 6 rises. As a result, the gate potential of the FET 2 is lowered, so that the FET 2 acts to reduce the drain-source current.
The applicant could not find a suitable prior art document to be presented for the present invention.

この場合、シャント抵抗１としては、Ａｌ（アルミニュウム）抵抗が比較的適していると考えられる。これは、Ａｌ抵抗の温度特性がトランジスタ４ａ及び４ｂにおけるベース−エミッタ間電圧の温度特性に近いため、その特性をキャンセルするのに適しているからである。ところで、Ａｌ抵抗は、製造プロセスのばらつきによって抵抗値がばらつくが、抵抗値のトリミングができないという問題があるため、必ずしも理想的な抵抗素子であるとは言えない。   In this case, it is considered that an Al (aluminum) resistor is relatively suitable as the shunt resistor 1. This is because the temperature characteristic of the Al resistance is close to the temperature characteristic of the base-emitter voltage in the transistors 4a and 4b, and is suitable for canceling the characteristic. By the way, although the resistance value of Al resistance varies due to variations in the manufacturing process, there is a problem that the resistance value cannot be trimmed, so that it is not necessarily an ideal resistance element.

本発明は上記事情に鑑みてなされたものであり、その目的は、カレントミラー回路を用いて構成される定電流制御回路装置について、シャント抵抗値のトリミングを容易とし、且つ、装置の温度特性を良好にすることにある。   The present invention has been made in view of the above circumstances, and an object of the present invention is to facilitate the trimming of the shunt resistance value of a constant current control circuit device configured using a current mirror circuit and to improve the temperature characteristics of the device. It is to improve.

請求項１記載の定電流制御回路装置によれば、シャント抵抗に替えて、抵抗値が印加電圧によって制御可能に構成される抵抗制御素子を使用する。そして、抵抗制御素子の温度特性を、温度特性補正回路によって補正する。斯様に構成すれば、抵抗制御素子によりシャント抵抗として付与される抵抗値が適切な値となるように、印加電圧によって調整することができる。また、抵抗制御素子の温度特性が、カレントミラー回路を構成する半導体素子の温度特性に近似するように補正することで、定電流制御回路装置としての温度特性が良好となるように調整を行なうこともできる。   According to the constant current control circuit device of the first aspect, instead of the shunt resistor, a resistance control element configured such that the resistance value can be controlled by the applied voltage is used. Then, the temperature characteristic of the resistance control element is corrected by the temperature characteristic correction circuit. If comprised in this way, it can adjust with an applied voltage so that the resistance value provided as shunt resistance by a resistance control element may turn into an appropriate value. In addition, by adjusting the temperature characteristics of the resistance control element so as to approximate the temperature characteristics of the semiconductor elements constituting the current mirror circuit, adjustment is performed so that the temperature characteristics as a constant current control circuit device are improved. You can also.

請求項２記載の定電流制御回路装置によれば、温度特性補正回路を、電源とグランドとの間に、温度に応じた端子電圧の変化特性が異なる複数の素子を直列に接続して構成するので、それらの温度特性の合成によって抵抗制御素子の温度特性が適切に補正されるように調整することができる。   According to the constant current control circuit device of claim 2, the temperature characteristic correction circuit is configured by connecting a plurality of elements having different terminal voltage change characteristics according to temperature in series between the power source and the ground. Therefore, it is possible to adjust so that the temperature characteristic of the resistance control element is appropriately corrected by combining the temperature characteristics.

請求項３記載の定電流制御回路装置によれば、温度特性補正回路を２つの抵抗素子で構成する。即ち抵抗素子は、その材質に応じて様々な温度特性を示すものがあるので、２つの抵抗素子を適宜選択して組合わせることで、抵抗制御素子の温度特性を適切に補正することができる。   According to the constant current control circuit device of the third aspect, the temperature characteristic correction circuit is constituted by two resistance elements. That is, some resistance elements exhibit various temperature characteristics depending on the material thereof. Therefore, the temperature characteristics of the resistance control element can be appropriately corrected by appropriately selecting and combining the two resistance elements.

請求項４記載の定電流制御回路装置によれば、２つの抵抗素子を、エミッタ抵抗素子と、ＣｒＳｉ（クローム・シリコン）抵抗素子とで構成する。即ち、エミッタ抵抗素子は１１００〜１２００ｐｐｍ程度の温度係数を有するのに対し、ＣｒＳｉ抵抗素子は２４〜２５ｐｐｍ程度と温度係数が極めて小さい。従って、これらを組合わせれば、抵抗制御素子への印加電圧を変化させることができ、温度特性を補正することができる。   According to the constant current control circuit device of the fourth aspect, the two resistance elements are constituted by an emitter resistance element and a CrSi (chrome silicon) resistance element. That is, the emitter resistance element has a temperature coefficient of about 1100 to 1200 ppm, whereas the CrSi resistance element has an extremely small temperature coefficient of about 24 to 25 ppm. Therefore, when these are combined, the voltage applied to the resistance control element can be changed, and the temperature characteristics can be corrected.

請求項５記載の定電流制御回路装置によれば、温度特性補正回路に、負帰還抵抗が接続されているオペアンプを備える。即ち、前記負帰還抵抗が有する温度特性も加えることで、抵抗制御素子の温度特性をより高精度に補正することができる。   According to the constant current control circuit device of the fifth aspect, the temperature characteristic correction circuit includes the operational amplifier to which the negative feedback resistor is connected. That is, the temperature characteristic of the resistance control element can be corrected with higher accuracy by adding the temperature characteristic of the negative feedback resistor.

請求項６記載の定電流制御回路装置によれば、半導体素子をＰＮＰトランジスタで構成し、抵抗制御素子をＭＯＳＦＥＴで構成する。即ち、シャント抵抗にＭＯＳＦＥＴのオン抵抗を利用する。ＭＯＳＦＥＴのオン抵抗は、ゲートソース間電圧を制御すれば比較的容易にトリミングすることができる。しかし、ＦＥＴのオン抵抗の温度係数は、カレントミラー回路を構成するＰＮＰトランジスタのベース−エミッタ間電圧のそれよりも大きいため、ＦＥＴのゲートに温度特性補正回路を接続してそのゲート電位を制御し、ＦＥＴの温度特性を補正すれば、定電流制御回路装置としての温度特性が良好となるように調整することができる。   According to the constant current control circuit device of the sixth aspect, the semiconductor element is constituted by a PNP transistor, and the resistance control element is constituted by a MOSFET. That is, the on-resistance of the MOSFET is used as the shunt resistance. The on-resistance of the MOSFET can be trimmed relatively easily by controlling the gate-source voltage. However, since the temperature coefficient of the on-resistance of the FET is larger than that of the base-emitter voltage of the PNP transistor that constitutes the current mirror circuit, a temperature characteristic correction circuit is connected to the gate of the FET to control its gate potential. If the temperature characteristics of the FET are corrected, the temperature characteristics of the constant current control circuit device can be adjusted to be good.

請求項７記載の定電流制御回路装置によれば、ＭＯＳＦＥＴをＰチャネル型とした場合、ゲートとグランドとの間に温度係数が比較的小さい素子を接続し、電源とゲートとの間に温度係数が比較的大きい素子を接続する。斯様に構成すれば、温度が上昇した場合に、グランド側の素子の定数は比較的変化せず、電源側の素子の定数が大きくなるので、ＰチャネルＦＥＴのゲート電位は低下する。すると、当該ＦＥＴにはより大きな電流が流れるようになるのでＦＥＴのＯＮ抵抗は見かけ上低下することになり、結果として、ＦＥＴの温度係数を低下させる方向に作用する。従って、ＰチャネルＦＥＴの温度特性を良好に補正することができる。   According to the constant current control circuit device of claim 7, when the MOSFET is a P-channel type, an element having a relatively small temperature coefficient is connected between the gate and the ground, and the temperature coefficient is connected between the power source and the gate. An element having a relatively large value is connected. With this configuration, when the temperature rises, the constant of the element on the ground side does not change relatively, and the constant of the element on the power supply side increases, so that the gate potential of the P-channel FET decreases. Then, since a larger current flows through the FET, the ON resistance of the FET is apparently lowered, and as a result, the temperature coefficient of the FET is lowered. Therefore, the temperature characteristics of the P-channel FET can be corrected well.

請求項８記載の定電流制御回路装置によれば、ＭＯＳＦＥＴをＮチャネル型とした場合、ゲートとグランドとの間に温度係数が比較的大きい素子を接続し、電源とゲートとの間に温度係数が比較的小さい素子を接続する。斯様に構成すれば、温度が上昇した場合に、グランド側の素子の定数は大きくなるのに対して、電源側の素子の定数は比較的変化しない。従って、ＮチャネルＦＥＴのゲート電位は上昇する。すると、当該ＦＥＴにはより大きな電流が流れるようになるのでＦＥＴのＯＮ抵抗は低下することになり、結果として、ＦＥＴの温度係数を低下させる方向に作用する。従って、ＮチャネルＦＥＴの温度特性を良好に補正することができる。   According to the constant current control circuit device of claim 8, when the MOSFET is an N-channel type, an element having a relatively large temperature coefficient is connected between the gate and the ground, and the temperature coefficient is connected between the power source and the gate. Is connected to a relatively small element. With this configuration, when the temperature rises, the constant of the element on the ground side increases, whereas the constant of the element on the power supply side does not change relatively. Therefore, the gate potential of the N channel FET rises. Then, since a larger current flows through the FET, the ON resistance of the FET is lowered, and as a result, the temperature coefficient of the FET is lowered. Therefore, the temperature characteristic of the N channel FET can be corrected well.

請求項９記載の定電流制御回路装置によれば、温度特性補正回路を、ＭＯＳＦＥＴの温度特性が３０００ｐｐｍ〜４０００ｐｐｍとなるように補正する。即ち、ＰＮＰトランジスタにおけるベース−エミッタ間電圧の温度特性は上記数値範囲内にあるので、その数値範囲に合わせて補正を行うことで、定電流制御回路装置の温度特性を良好に設定することができる。   According to the constant current control circuit device of the ninth aspect, the temperature characteristic correction circuit corrects the temperature characteristic of the MOSFET to be 3000 ppm to 4000 ppm. That is, since the temperature characteristic of the base-emitter voltage in the PNP transistor is within the above numerical range, the temperature characteristic of the constant current control circuit device can be satisfactorily set by performing correction according to the numerical range. .

（第１実施例）
以下、本発明の第１実施例について図１を参照して説明する。尚、図５と同一部分には同一符号を付して説明を省略し、以下異なる部分についてのみ説明する。本実施例の定電流制御回路（定電流制御回路装置）１１は、図５に示す定電流制御回路に使用されていたＡｌ抵抗１を、ＰチャネルＬＤＭＯＳＦＥＴ（抵抗制御素子）１２に置き換えたものである。即ち、シャント抵抗にＦＥＴ１２のＯＮ抵抗を用いるためである。ＦＥＴ１２のＯＮ抵抗値は、ゲート電位を制御することで容易にトリミングを行うことができる。そして、電源ＶCCとグランドとの間には、エミッタ抵抗１３とＣｒＳｉ抵抗１４との直列回路が接続されており、両者の共通接続点は、ＦＥＴ１２のゲートに接続されている。これらの抵抗１３及び１４は、温度特性補正回路１５を構成している。 (First embodiment)
A first embodiment of the present invention will be described below with reference to FIG. The same parts as those in FIG. 5 are denoted by the same reference numerals, and the description thereof is omitted. Only different parts will be described below. The constant current control circuit (constant current control circuit device) 11 of this embodiment is obtained by replacing the Al resistor 1 used in the constant current control circuit shown in FIG. 5 with a P-channel LDMOSFET (resistance control element) 12. is there. That is, the ON resistance of the FET 12 is used as the shunt resistance. The ON resistance value of the FET 12 can be easily trimmed by controlling the gate potential. A series circuit of an emitter resistor 13 and a CrSi resistor 14 is connected between the power supply VCC and the ground, and a common connection point between them is connected to the gate of the FET 12. These resistors 13 and 14 constitute a temperature characteristic correction circuit 15.

次に、本実施例の作用について説明する。カレントミラー回路１４を構成するＰＮＰトランジスタ（半導体素子）１４ａ，１４ｂにおけるベース−エミッタ間電圧の温度係数は３７００ｐｐｍ程度であるのに対し、例えばＡｌ抵抗１の温度係数は３０００〜４０００ｐｐｍ程度であり、両者は近似しているため、その組み合わせによれば、定電流制御回路７の温度特性は平坦に近くなるように設定される。   Next, the operation of this embodiment will be described. While the temperature coefficient of the base-emitter voltage in the PNP transistors (semiconductor elements) 14a and 14b constituting the current mirror circuit 14 is about 3700 ppm, for example, the temperature coefficient of the Al resistance 1 is about 3000 to 4000 ppm. Therefore, according to the combination, the temperature characteristic of the constant current control circuit 7 is set to be nearly flat.

しかし、Ａｌ抵抗１に替えて使用するＦＥＴ１２におけるＯＮ抵抗の温度係数は５０００〜６０００ｐｐｍ程度であり、ＰＮＰトランジスタ１４ａ，１４ｂの温度係数とは若干乖離している。そこで、ＦＥＴ１２の温度特性を、温度特性補正回路１５によって補正する。即ち、エミッタ抵抗１３は、半導体基板上に形成されるバイポーラトランジスタのエミッタ領域を抵抗素子として利用するものであり、１１００〜１２００ｐｐｍ程度の温度係数（一次温度係数ｔｃ）を有している。これに対して、ＣｒＳｉ抵抗素子１４の温度係数は、２４〜２５ｐｐｍ程度となっている。
このような各素子における温度特性の組み合わせによって、定電流制御回路１１は、周囲温度の変化に対して以下のように動作する。ＦＥＴ１２のゲート電位は、温度特性補正回路１５における抵抗１３及び１４の分圧電位として与えられており、ＦＥＴ１２は、そのゲート電位に応じたＯＮ抵抗値をシャント抵抗値として付与している。 However, the temperature coefficient of the ON resistance in the FET 12 used instead of the Al resistance 1 is about 5000 to 6000 ppm, which is slightly different from the temperature coefficient of the PNP transistors 14a and 14b. Therefore, the temperature characteristic of the FET 12 is corrected by the temperature characteristic correction circuit 15. That is, the emitter resistor 13 uses the emitter region of the bipolar transistor formed on the semiconductor substrate as a resistance element, and has a temperature coefficient (primary temperature coefficient tc) of about 1100 to 1200 ppm. On the other hand, the temperature coefficient of the CrSi resistance element 14 is about 24 to 25 ppm.
The constant current control circuit 11 operates in the following manner with respect to changes in the ambient temperature by such a combination of temperature characteristics in each element. The gate potential of the FET 12 is given as a divided potential of the resistors 13 and 14 in the temperature characteristic correction circuit 15, and the FET 12 gives an ON resistance value corresponding to the gate potential as a shunt resistance value.

そして、夫々の素子の温度が上昇すると、ＦＥＴ１２のＯＮ抵抗値は増加しようとするが、温度特性補正回路１５においては、ＣｒＳｉ抵抗１４の抵抗値は殆ど変化せず、エミッタ抵抗１３の抵抗値は増加する。すると、両者による分圧電位は低下するため、ＦＥＴ１２のゲート−ソース間電圧は大きくなり、ＦＥＴ１２はソース−ドレイン間電流をより多く流すようになるので、見かけ上の抵抗値が低下するように作用する。従って、ＦＥＴ１２のＯＮ抵抗値の増加傾向と、ゲート電圧の低下による見かけ上の抵抗値の減少傾向とが相殺されることで、定電流制御回路１１の温度特性が平坦化される。   When the temperature of each element rises, the ON resistance value of the FET 12 tends to increase, but in the temperature characteristic correction circuit 15, the resistance value of the CrSi resistor 14 hardly changes and the resistance value of the emitter resistor 13 is To increase. Then, since the divided potential by both decreases, the gate-source voltage of the FET 12 increases, and the FET 12 causes more source-drain current to flow, so that the apparent resistance value decreases. To do. Accordingly, the temperature characteristic of the constant current control circuit 11 is flattened by offsetting the increasing tendency of the ON resistance value of the FET 12 and the apparent decreasing tendency of the resistance value due to the decrease of the gate voltage.

尚、ＦＥＴ１２と温度特性補正回路１５との組み合わせによる温度係数を３０００ｐｐｍ〜４０００ｐｐｍとなるように補正すれば、Ａｌ抵抗１の温度特性と略等しくなるように補正することができる。また、トランジスタ１４ａ，１４ｂの温度係数は３７００ｐｐｍ程度であるが、その他の回路構成要素の温度特性も考慮すれば３３３３ｐｐｍとなるように設定するのがより好ましい。   If the temperature coefficient by the combination of the FET 12 and the temperature characteristic correction circuit 15 is corrected to be 3000 ppm to 4000 ppm, the temperature characteristic of the Al resistor 1 can be corrected to be substantially equal. The temperature coefficient of the transistors 14a and 14b is about 3700 ppm, but it is more preferable to set the temperature coefficient to 3333 ppm considering the temperature characteristics of other circuit components.

以上のように本実施例によれば、定電流制御回路１１のシャント抵抗にＰチャネルＭＯＳＦＥＴ１２のオン抵抗を利用し、そのＦＥＴ１２のゲートに温度特性補正回路１５を接続して、温度特性補正回路１５によりＦＥＴ１２のゲート電位を制御することで、ＯＮ抵抗の温度特性を補正するようにした。従って、シャント抵抗値を容易にトリミングすることができると共に、ＦＥＴ１２の温度特性を補正して定電流制御回路１１全体の温度特性が平坦となるように調整することができる。   As described above, according to the present embodiment, the on-resistance of the P-channel MOSFET 12 is used as the shunt resistance of the constant current control circuit 11 and the temperature characteristic correction circuit 15 is connected to the gate of the FET 12. By controlling the gate potential of the FET 12, the temperature characteristic of the ON resistance is corrected. Therefore, the shunt resistance value can be easily trimmed, and the temperature characteristic of the FET 12 can be corrected and adjusted so that the temperature characteristic of the constant current control circuit 11 as a whole becomes flat.

また、温度特性補正回路１５を、電源ＶCCとグランドとの間に、温度特性が異なるエミッタ抵抗１３とＣｒＳｉ抵抗１４との直列回路を接続して構成したので、それらの温度特性の合成によって所望の特性が得られるように調整することができる。そして、ＰチャネルＭＯＳＦＥＴ１２に応じて、ゲートとグランドとの間に温度係数が比較的小さいＣｒＳｉ抵抗１４を接続し、電源ＶCCとゲートとの間に温度係数が比較的大きいエミッタ抵抗１３を接続したので、温度が上昇した場合にＦＥＴ１２のゲート電位を低下させ、ＯＮ抵抗の温度係数を低下させる方向に作用させて、ＦＥＴ１２の温度特性を良好に補正することができる。   Further, since the temperature characteristic correction circuit 15 is configured by connecting a series circuit of an emitter resistor 13 and a CrSi resistor 14 having different temperature characteristics between the power source VCC and the ground, a desired circuit can be obtained by combining these temperature characteristics. It can be adjusted to obtain characteristics. Then, according to the P-channel MOSFET 12, a CrSi resistor 14 having a relatively small temperature coefficient is connected between the gate and the ground, and an emitter resistor 13 having a relatively large temperature coefficient is connected between the power source VCC and the gate. When the temperature rises, the gate potential of the FET 12 is lowered, and the temperature characteristic of the FET 12 can be favorably corrected by acting in the direction of lowering the temperature coefficient of the ON resistance.

加えて、温度特性補正回路１５により、ＦＥＴ１２の温度特性が３０００ｐｐｍ〜４０００ｐｐｍとなるように補正することで、ＰＮＰトランジスタ１４ａ，１４ｂにおけるベース−エミッタ間電圧の温度特性に対して、定電流制御回路１１の温度特性がＡｌ抵抗１と同程度になるように補正することができる。   In addition, the temperature characteristic correction circuit 15 corrects the temperature characteristic of the FET 12 to be 3000 ppm to 4000 ppm, whereby the temperature characteristic of the base-emitter voltage in the PNP transistors 14a and 14b is controlled. Can be corrected so that the temperature characteristics thereof are comparable to those of the Al resistance 1.

（第２実施例）
図２は本発明の第２実施例を示すものであり、第１実施例と同一部分には同一符号を付して説明を省略し、以下異なる部分についてのみ説明する。第２実施例の定電流制御回路（定電流制御回路装置）１６は、エミッタ抵抗１３とＣｒＳｉ抵抗１４との共通接続点に、オペアンプ１７の非反転入力端子が接続されており、そのオペアンプ１７の出力端子は、ＦＥＴ１２のゲートに接続されている。 (Second embodiment)
FIG. 2 shows a second embodiment of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof is omitted. Only the different parts will be described below. In the constant current control circuit (constant current control circuit device) 16 of the second embodiment, a non-inverting input terminal of an operational amplifier 17 is connected to a common connection point between an emitter resistor 13 and a CrSi resistor 14. The output terminal is connected to the gate of the FET 12.

また、オペアンプ１７の出力端子と反転入力端子との間には、負帰還抵抗１８が接続されている。そして、第１実施例の温度特性補正回路１５にオペアンプ１７及び負帰還抵抗１８を接続したものが、温度特性補正回路１９を構成している。その他の構成は第１実施例と同様である。
以上のように構成された第２実施例によれば、オペアンプ１７の出力電圧は、エミッタ抵抗１３とＣｒＳｉ抵抗１４との分圧電位に等しくなるが、負帰還抵抗１８自体も温度特性を有しているので、その温度特性も加えることによって、ＦＥＴ１２のＯＮ抵抗の温度特性をより高精度に補正することができる。 A negative feedback resistor 18 is connected between the output terminal and the inverting input terminal of the operational amplifier 17. The temperature characteristic correction circuit 19 is configured by connecting the operational amplifier 17 and the negative feedback resistor 18 to the temperature characteristic correction circuit 15 of the first embodiment. Other configurations are the same as those of the first embodiment.
According to the second embodiment configured as described above, the output voltage of the operational amplifier 17 is equal to the divided potential of the emitter resistor 13 and the CrSi resistor 14, but the negative feedback resistor 18 itself has temperature characteristics. Therefore, by adding the temperature characteristic, the temperature characteristic of the ON resistance of the FET 12 can be corrected with higher accuracy.

（第３実施例）
図３は本発明の第３実施例であり、第１実施例と異なる部分についてのみ説明する。第３実施例の定電流制御回路（定電流制御回路装置）２０は、第１実施例のＰチャネルＭＯＳＦＥＴ１２に替えて、ＮチャネルＬＤＭＯＳＦＥＴ（抵抗制御素子）２１を用いたものである。そして、温度特性補正回路２２は、第１実施例の温度特性補正回路１５におけるエミッタ抵抗１３とＣｒＳｉ抵抗１４との接続を逆にしたものとなっている。即ち、電源側にＣｒＳｉ抵抗１４が配置され、グランド側にエミッタ抵抗１３が配置されており、両者の共通接続点がＦＥＴ２１のゲートに接続されている。 (Third embodiment)
FIG. 3 shows a third embodiment of the present invention, and only parts different from the first embodiment will be described. The constant current control circuit (constant current control circuit device) 20 of the third embodiment uses an N channel LDMOSFET (resistance control element) 21 instead of the P channel MOSFET 12 of the first embodiment. The temperature characteristic correction circuit 22 is obtained by reversing the connection between the emitter resistor 13 and the CrSi resistor 14 in the temperature characteristic correction circuit 15 of the first embodiment. That is, the CrSi resistor 14 is arranged on the power supply side, the emitter resistor 13 is arranged on the ground side, and the common connection point between them is connected to the gate of the FET 21.

次に、第３実施例の作用について説明する。シャント抵抗にＮチャネルＭＯＳＦＥＴ２１のＯＮ抵抗を利用する場合は、ＰチャネルＭＯＳＦＥＴ１２の場合とゲート電位の制御関係が逆になる。即ち、夫々の素子の温度が上昇するとＦＥＴ２１のＯＮ抵抗値はやはり増加しようとするが、温度特性補正回路２２においては、グランド側のエミッタ抵抗１３の抵抗値が増加するので分圧電位は上昇する。すると、ＦＥＴ２１のゲートソース間電圧が大きくなり、ＦＥＴ２１はソース−ドレイン間電流をより多く流すようになるので、見かけ上の抵抗値が低下するように作用する。従って、第１実施例と同様に、定電流制御回路２０の温度特性を平坦化することができる。   Next, the operation of the third embodiment will be described. When the ON resistance of the N-channel MOSFET 21 is used as the shunt resistance, the control relationship of the gate potential is reversed from that of the P-channel MOSFET 12. That is, when the temperature of each element rises, the ON resistance value of the FET 21 still tries to increase. However, in the temperature characteristic correction circuit 22, the resistance value of the emitter resistor 13 on the ground side increases, so the divided potential increases. . As a result, the gate-source voltage of the FET 21 increases, and the FET 21 causes more source-drain current to flow, so that the apparent resistance value decreases. Therefore, as in the first embodiment, the temperature characteristics of the constant current control circuit 20 can be flattened.

（第４実施例）
図４は本発明の第４実施例を示すものであり、第３実施例と異なる部分についてのみ説明する。第４実施例の定電流制御回路（定電流制御回路装置）２３は、温度特性補正回路２４を、複数のダイオード２５とＣｒＳｉ抵抗１４との直列回路で構成したものである。そして、最下段に配置されるダイオード２５のカソードとＣｒＳｉ抵抗１４との共通接続点がＦＥＴ２１のゲートに接続されている。 (Fourth embodiment)
FIG. 4 shows a fourth embodiment of the present invention, and only parts different from the third embodiment will be described. In the constant current control circuit (constant current control circuit device) 23 of the fourth embodiment, the temperature characteristic correction circuit 24 is configured by a series circuit of a plurality of diodes 25 and a CrSi resistor 14. A common connection point between the cathode of the diode 25 arranged at the lowest stage and the CrSi resistor 14 is connected to the gate of the FET 21.

次に、第４実施例の作用について説明する。ダイオード２５は負の温度特性を有しており、温度が上昇すると端子電圧が低下する。従って、温度特性補正回路２４の分圧電位は温度が上昇した場合に上昇することになるので、ＦＥＴ２１のゲート電位を上昇させるため、第３実施例と同様の作用効果が得られる。   Next, the operation of the fourth embodiment will be described. The diode 25 has negative temperature characteristics, and the terminal voltage decreases as the temperature increases. Accordingly, since the divided potential of the temperature characteristic correction circuit 24 increases when the temperature increases, the gate potential of the FET 21 is increased, so that the same effect as the third embodiment can be obtained.

本発明は上記し且つ図面に記載した実施例にのみ限定されるものではなく、次のような変形または拡張が可能である。
温度特性補正回路を構成する抵抗素子は、エミッタ抵抗１３やＣｒＳｉ抵抗１４に限ることなく、適当な温度特性を有するものを適宜選択して使用すれば良い。
また、素子を３つ以上直列に接続して温度特性補正回路を構成しても良い。
抵抗やダイオードに限ることなく、所定の温度特性を有する素子を適宜選択して使用すれば良い。 The present invention is not limited to the embodiments described above and illustrated in the drawings, and the following modifications or expansions are possible.
The resistance element constituting the temperature characteristic correction circuit is not limited to the emitter resistor 13 or the CrSi resistor 14 and may be appropriately selected from those having appropriate temperature characteristics.
Further, a temperature characteristic correction circuit may be configured by connecting three or more elements in series.
An element having a predetermined temperature characteristic may be appropriately selected and used without being limited to a resistor or a diode.

第４実施例において、抵抗１４を電源側に、複数のダイオード２５をグランド側に接続して、ＦＥＴ２１をＰチャンネルＦＥＴ１２に置き換えても良い。
半導体素子，抵抗制御素子は、夫々ＰＮＰトランジスタ、ＭＯＳＦＥＴに限ることなく、カレントミラー回路を構成する半導体素子の温度特性に対して、温度特性補正回路により補正を行うことで、温度特性を近似させることができる抵抗制御素子を適宜選択して実施すれば良い。 In the fourth embodiment, the resistor 14 may be connected to the power supply side, the plurality of diodes 25 may be connected to the ground side, and the FET 21 may be replaced with the P-channel FET 12.
The semiconductor element and the resistance control element are not limited to the PNP transistor and the MOSFET, respectively, and the temperature characteristic is approximated by correcting the temperature characteristic of the semiconductor element constituting the current mirror circuit by the temperature characteristic correction circuit. It is only necessary to select a resistance control element that can be used as appropriate.

本発明の第１実施例であり、定電流制御回路の構成を示す図The figure which is 1st Example of this invention and shows the structure of a constant current control circuit 本発明の第２実施例を示す図１相当図FIG. 1 equivalent view showing a second embodiment of the present invention. 本発明の第３実施例を示す図１相当図FIG. 1 equivalent view showing a third embodiment of the present invention. 本発明の第４実施例を示す図１相当図FIG. 1 equivalent view showing a fourth embodiment of the present invention. 従来技術を示す図１相当図1 equivalent diagram showing the prior art

符号の説明Explanation of symbols

図面中、２はＮチャネルＬＤＭＯＳＦＥＴ（電流制御素子）、４はカレントミラー回路、４ａ及び４ｂはＰＮＰトランジスタ（半導体素子）、５ａ，５ｂは定電流源、６はオペアンプ、１１は定電流制御回路（定電流制御回路装置）、１２はＰチャネルＬＤＭＯＳＦＥＴ（抵抗制御素子）、１３はエミッタ抵抗（素子）、１４はＣｒＳｉ抵抗（素子）、１５は温度特性補正回路、１６は定電流制御回路（定電流制御回路装置）、１７はオペアンプ、１８は負帰還抵抗（素子）、１９は温度特性補正回路、２０は定電流制御回路（定電流制御回路装置）、２１はＮチャネルＬＤＭＯＳＦＥＴ（抵抗制御素子）、２３は定電流制御回路（定電流制御回路装置）、２４は温度特性補正回路、２５はダイオード（素子）を示す。   In the drawing, 2 is an N-channel LDMOSFET (current control element), 4 is a current mirror circuit, 4a and 4b are PNP transistors (semiconductor elements), 5a and 5b are constant current sources, 6 is an operational amplifier, 11 is a constant current control circuit ( Constant current control circuit device), 12 is a P-channel LDMOSFET (resistance control element), 13 is an emitter resistance (element), 14 is a CrSi resistance (element), 15 is a temperature characteristic correction circuit, 16 is a constant current control circuit (constant current) Control circuit device), 17 an operational amplifier, 18 a negative feedback resistor (element), 19 a temperature characteristic correction circuit, 20 a constant current control circuit (constant current control circuit device), 21 an N-channel LDMOSFET (resistance control element), Reference numeral 23 denotes a constant current control circuit (constant current control circuit device), 24 denotes a temperature characteristic correction circuit, and 25 denotes a diode (element).

Claims (9)

電源より負荷に対して供給する電流量を制御するための電流制御素子と、
前記電源と前記電流制御素子との間に直列に接続され、その直列回路に付与する抵抗値を印加電圧によって制御可能に構成される抵抗制御素子と、
この抵抗制御素子の両端に、電源側端子が夫々接続される１対の半導体素子で構成されるカレントミラー回路と、
前記１対の半導体素子のグランド側端子とグランドとの間に接続される１対の定電流源と、
２つの入力端子が前記グランド側端子に夫々接続され、出力端子が前記電流制御素子の制御端子に接続されるオペアンプと、
前記抵抗制御素子の温度特性を補正する温度特性補正回路とで構成されることを特徴とする定電流制御回路装置。 A current control element for controlling the amount of current supplied from the power source to the load;
A resistance control element connected in series between the power source and the current control element, and configured to be able to control a resistance value applied to the series circuit by an applied voltage;
A current mirror circuit composed of a pair of semiconductor elements each having a power supply side terminal connected to both ends of the resistance control element;
A pair of constant current sources connected between the ground-side terminals of the pair of semiconductor elements and the ground;
Two operational amplifiers each connected to the ground side terminal and an output terminal connected to the control terminal of the current control element;
A constant current control circuit device comprising: a temperature characteristic correction circuit that corrects a temperature characteristic of the resistance control element. 前記温度特性補正回路は、電源とグランドとの間に、温度に応じた端子電圧の変化特性が異なる複数の素子を直列に接続して構成されていることを特徴とする請求項１記載の定電流制御回路装置。   2. The constant temperature characteristic correction circuit according to claim 1, wherein the temperature characteristic correction circuit is configured by connecting a plurality of elements having different terminal voltage change characteristics according to temperature in series between a power source and a ground. Current control circuit device. 前記温度特性補正回路を、２つの抵抗素子で構成したことを特徴とする請求項２記載の定電流制御回路装置。   3. The constant current control circuit device according to claim 2, wherein the temperature characteristic correction circuit includes two resistance elements. 前記２つの抵抗素子を、エミッタ抵抗素子と、ＣｒＳｉ抵抗とで構成したことを特徴とする請求項３記載の定電流制御回路装置。   4. The constant current control circuit device according to claim 3, wherein the two resistance elements are constituted by an emitter resistance element and a CrSi resistance. 前記温度特性補正回路は、入力端子が前記複数の素子の何れかの共通接続点に接続され、出力端子が前記抵抗制御素子の制御端子に接続されると共に、負帰還抵抗が接続されているオペアンプを備えていることを特徴とする請求項２乃至４の何れかに記載の定電流制御回路装置。   The temperature characteristic correction circuit includes an operational amplifier in which an input terminal is connected to a common connection point of the plurality of elements, an output terminal is connected to a control terminal of the resistance control element, and a negative feedback resistor is connected The constant current control circuit device according to claim 2, comprising: 前記半導体素子は、ＰＮＰトランジスタで構成され、
前記抵抗制御素子は、ＭＯＳＦＥＴで構成されることを特徴とする請求項１乃至５の何れか記載の定電流制御回路装置。 The semiconductor element is composed of a PNP transistor,
6. The constant current control circuit device according to claim 1, wherein the resistance control element is configured by a MOSFET. 前記ＭＯＳＦＥＴがＰチャネル型である場合、
前記温度特性補正回路は、
当該ＭＯＳＦＥＴのゲートとグランドとの間に接続される、温度係数が比較的小さい素子と、
電源と前記ＭＯＳＦＥＴのゲートとの間に接続される、温度係数が比較的大きい素子とで構成されることを特徴とする請求項６記載の定電流制御回路装置。 When the MOSFET is a P-channel type,
The temperature characteristic correction circuit includes:
An element connected between the gate of the MOSFET and the ground and having a relatively small temperature coefficient;
7. The constant current control circuit device according to claim 6, comprising a device having a relatively large temperature coefficient connected between a power source and the gate of the MOSFET. 前記ＭＯＳＦＥＴがＮチャネル型である場合、
前記温度特性補正回路は、
当該ＭＯＳＦＥＴのゲートとグランドとの間に接続される、温度係数が比較的大きい素子と、
電源と前記ＭＯＳＦＥＴのゲートとの間に接続される、温度係数が比較的小さい素子とで構成されることを特徴とする請求項６記載の定電流制御回路装置。 When the MOSFET is an N-channel type,
The temperature characteristic correction circuit includes:
An element having a relatively large temperature coefficient connected between the gate of the MOSFET and the ground;
7. The constant current control circuit device according to claim 6, comprising a device having a relatively small temperature coefficient connected between a power source and the gate of the MOSFET. 前記温度特性補正回路は、前記ＭＯＳＦＥＴの温度特性が３０００ｐｐｍ〜４０００ｐｐｍとなるように補正することを特徴とする請求項６乃至８の何れかに記載の定電流制御回路装置。   The constant current control circuit device according to claim 6, wherein the temperature characteristic correction circuit corrects the temperature characteristic of the MOSFET to be 3000 ppm to 4000 ppm.
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Publication number Priority date Publication date Assignee Title
JP2014099926A (en) * 2014-02-20 2014-05-29 Seiko Epson Corp Constant current generating circuit, resistance circuit, integrated circuit device, and electronic apparatus
JP2015194460A (en) * 2014-03-17 2015-11-05 富士電機株式会社 Semiconductor device and semiconductor device manufacturing method
US9660592B2 (en) 2013-04-02 2017-05-23 Murata Manufacturing Co., Ltd. Psuedo resistor circuit and charge amplifier

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Publication number Priority date Publication date Assignee Title
US9660592B2 (en) 2013-04-02 2017-05-23 Murata Manufacturing Co., Ltd. Psuedo resistor circuit and charge amplifier
JP2014099926A (en) * 2014-02-20 2014-05-29 Seiko Epson Corp Constant current generating circuit, resistance circuit, integrated circuit device, and electronic apparatus
JP2015194460A (en) * 2014-03-17 2015-11-05 富士電機株式会社 Semiconductor device and semiconductor device manufacturing method
US9880203B2 (en) 2014-03-17 2018-01-30 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing the semiconductor device

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