JP2005223141A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the size of a semiconductor device while securing the insulation distance between terminals. <P>SOLUTION: On the surface of a substrate 10, semiconductor elements 11 and 12 are mounted, and a D1 terminal and a D2 terminal are attached to the substrate 10 adjacent to each other. A case 20 encloses the semiconductor elements 11 and 12, and has a terminal holder 21. The D1 terminal and the D2 terminal upon attachment of the case 20 onto the substrate 10 protrude through the terminal holder 21 to rise above the terminal holder 21. After the attachment of the case 20 onto the substrate 10, an insulating filler is poured into the space between the terminal D1 and the terminal D2 through filler holes provided in the upper part of the terminal holder 21. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a structure of a semiconductor device, and more particularly to a structure for securing an insulation distance of a semiconductor power module.

  In general, a semiconductor device for power control or large current control (hereinafter sometimes referred to as a semiconductor power module) needs to be designed to ensure an insulation distance between terminals for main current. And as one of the methods for that purpose, the design which enlarges the distance between the terminals for main currents can be considered. However, when the distance between the main current terminals is increased, there is usually a problem that the size of the semiconductor device cannot be reduced. The main current terminal is a terminal provided in the semiconductor device. For example, a terminal for inputting a large current to a circuit or a semiconductor element provided in the semiconductor device / provided in the semiconductor device. A terminal for outputting a large current from a circuit or a semiconductor element.

As a method of reducing the module size while ensuring the insulation distance between the terminals of the semiconductor power module, the main current terminals are provided close to each other, and an insulating filler such as silicon gel or epoxy resin is poured between them. The configuration is known (for example, see Patent Document 1).
As another method for reducing the size while ensuring the insulation distance between the terminals of the semiconductor power module, the main current terminals are provided close to each other, and an insulating wall formed of resin or the like is provided between them. The structure to provide is known (for example, refer patent document 2). Patent Document 3 discloses a configuration in which an insulating spacer is inserted between terminals.
Japanese Patent Laid-Open No. 2-246254 (FIG. 1, pages 1 and 2) JP 7-142658 A (FIG. 1, paragraphs 0010 to 0011) Japanese Patent Laid-Open No. 9-22773 (FIGS. 1 and 10)

  In the prior art, depending on the structure of the semiconductor device, it may be difficult to fill the space between the main current terminals with an insulating filler. For example, when the main current terminal attached to the substrate of the semiconductor device has a structure that penetrates a part of the case of the semiconductor device, the insulating filler is blocked by the case itself and the main current is It becomes difficult to enter between terminals.

  Moreover, since the insulating wall is a member formed in a predetermined shape in advance, it is not possible to fill the empty space between the main current terminals without a gap. For this reason, the insulation distance between the terminals for main current cannot be secured sufficiently using the insulating wall. For example, in a structure in which a main current terminal is attached to a substrate of a semiconductor device and a part of the case of the semiconductor device is inserted between the terminals as an insulating wall, the insulating wall is completely adhered to the substrate. This makes it difficult to secure the insulation distance between the main current terminals in a region close to the substrate.

  An object of the present invention is to reduce the size while securing the insulation distance between terminals of a semiconductor device.

  A semiconductor device according to the present invention includes a substrate on which a semiconductor element is mounted, first and second terminals mounted on the substrate in proximity to each other, and a case attached to the substrate so as to surround the semiconductor element. . The case includes a terminal holding member that surrounds the first and second terminals. The terminal holding member is provided with a filler hole for pouring the insulating filler into the space between the first terminal and the second terminal.

  In the semiconductor device, the first and second terminals are surrounded by the terminal holding member. For this reason, after a case is attached to a board | substrate, it is interrupted | blocked by the terminal holding member, and an insulating filler cannot be poured between a 1st terminal and a 2nd terminal. Therefore, in the semiconductor device of the present invention, the terminal holding member is provided with a filler hole for pouring the insulating filler into the space between the first terminal and the second terminal. Thereby, after the case is attached to the substrate, the space between the first terminal and the second terminal can be filled with the insulating filler.

In the semiconductor device, the terminal holding member may be provided in advance with a third terminal for inputting or outputting the main current of the semiconductor element. In this case, the terminal density is increased, which contributes to the miniaturization of the semiconductor device.
In addition, when the third terminal is provided on the terminal holding member, the first and third terminals are provided in parallel and close to each other, and further, the main currents of the semiconductor elements are opposite to each other. You may make it electrically connect to the said semiconductor element so that it may flow. In this case, the self-inductance of the first and third terminals is canceled out, and the loss is reduced.

  According to the present invention, since the space between the first terminal and the second terminal can be reliably filled with the insulating filler, a sufficient insulation distance can be secured between the terminals. Here, the first and second terminals are provided close to each other. Therefore, it is possible to reduce the size of the semiconductor device itself while ensuring the insulation distance between the terminals.

FIG. 1 is an exploded perspective view of a semiconductor device 1 according to an embodiment of the present invention. However, here, in order to make the drawing easy to see, members (for example, bonding wires) that are not directly related to the present invention and fine improvements are omitted.
A plurality of semiconductor elements 11 and a plurality of semiconductor elements 12 are mounted on the upper surface of the substrate 10. Here, it is assumed that the power switch circuit shown in FIG. 2 is configured by the semiconductor elements 11 and 12. That is, the plurality of semiconductor elements 11 are, for example, MOS transistors having the same characteristics, and the upper arm switch shown in FIG. 2 is configured by connecting them in parallel electrically. Further, the plurality of semiconductor elements 12 are, for example, MOS transistors having the same characteristics, and the lower arm switch shown in FIG. 2 is configured by connecting them in parallel electrically.

  Further, a D1 terminal (first terminal) and a D2 terminal (second terminal) are attached to the substrate 10. Here, the D1 terminal is a drain terminal of an upper arm switch constituted by a plurality of semiconductor elements 11, and the D2 terminal is a drain terminal of a lower arm switch constituted by a plurality of semiconductor elements 12. That is, the D1 terminal and the D2 terminal are terminals for inputting / outputting the main current of the semiconductor device 1, respectively. The D1 terminal and the D2 terminal are provided close to each other in order to reduce the size of the semiconductor device 1. A large potential difference may occur between the D1 terminal and the D2 terminal, particularly when the power switch circuit is switched. Therefore, it is required to secure a sufficient insulation distance between these terminals.

  Further, drain electrodes 13 and 14, gate electrodes 15 and 16, and the like are formed on the upper surface of the substrate 10. Here, the drain electrodes 15 and 16 are respectively electrically connected to the D1 terminal and the D2 terminal by a conductor pattern (not shown) formed on the surface of the substrate 10. The gate electrodes 15 and 16 are electrically connected to the gate terminals G1 and G2 by bonding wires (not shown), respectively.

  The case 20 is formed of resin, for example, and has a shape that surrounds the semiconductor elements 11 and 12 when attached to the substrate 10. The case 20 includes a terminal holding member 21. The terminal holding member 21 has a structure that surrounds and holds the D1 terminal and the D2 terminal when the case 20 is attached to the substrate 10. Specifically, the terminal holding member 21 is provided with, for example, a terminal accommodating slit for accommodating the D1 terminal and the D2 terminal. And when the case 20 is attached to the board | substrate 10, it is comprised so that D1 terminal and D2 terminal may be accommodated and hold | maintained in a corresponding terminal accommodation slit, respectively.

  In this embodiment, the terminal holding member 21 is a part of the case 20, and the case 20 and the terminal holding member 21 are integrally molded at the same time. However, the present invention does not exclude the case where the case 20 and the terminal holding member 21 are individually molded and then joined together.

  The terminal holding member 21 is provided with an S1 terminal and an S2 terminal (these terminals correspond to a third terminal in the claims). Here, the S1 terminal is a source terminal of an upper arm switch constituted by a plurality of semiconductor elements 11, and the S2 terminal is a source terminal of a lower arm switch constituted by a plurality of semiconductor elements 12. That is, the S1 terminal and the S2 terminal are terminals for inputting / outputting the main current of the semiconductor device 1, respectively. In this embodiment, the S1 terminal and the S2 terminal are each partially embedded in the terminal holding member 21 and fixed when the terminal holding member 21 is molded. In addition, such a manufacturing method may be called insert molding.

FIG. 3 is a view of the terminal holding member 21 as viewed from above. However, in order to make the drawings easier to see, detailed shapes and the like not directly related to the present invention are omitted.
As described above, the S1 terminal and the S2 terminal protrude from above the terminal holding member 21. Further, a D1 terminal accommodating slot 31 is formed in the vicinity of the S1 terminal, and a D2 terminal accommodating slot 32 is formed in the vicinity of the S2 terminal. When the case 20 is attached to the substrate 10, the D1 terminal and the D2 terminal pass through the D1 terminal accommodation slot 31 and the D2 terminal accommodation slot 32, respectively, and protrude above the terminal holding member 21. Thereby, the S1 terminal and the D1 terminal are provided close to and parallel to each other, and the S2 terminal and the D2 terminal are provided close to and parallel to each other.

  Further, on the upper surface of the terminal holding member 21, a filler hole 33 is formed for pouring an insulating filler into the space between the D1 terminal and the D2 terminal after the case 20 is attached to the substrate 10. Here, the hole 33 for fillers is a through-hole, and it is formed so that the exit may be located in the space between D1 terminal and D2 terminal. The insulating filler is not particularly limited, and silicon gel or epoxy resin is used.

  The shape of the filler hole 33 is not particularly limited, and may be quadrangular or round. Further, the number of filler holes 33 to be formed is not particularly limited. However, the position where the filler hole 33 is to be formed is preferably close to the D1 terminal receiving slot 31 or the D2 terminal receiving slot 32. Further, the hole diameter of the filler hole 33 needs to be large enough to allow the insulating filler to flow sufficiently smoothly.

  FIG. 4 is a cross-sectional view of the semiconductor device 1. As described above, the S1 terminal and the S2 terminal are provided so as to be partially embedded in the terminal holding member 21 that is a part of the case 20. On the other hand, the D1 terminal and the D2 terminal are attached to the substrate 10, and each end protrudes from the upper part of the terminal holding member 21.

  The source region, the drain region, and the gate region of each semiconductor element 11 are connected to the S1 terminal, the drain electrode 13, and the gate electrode 15 by bonding wires, respectively. The D1 terminal is connected to the drain electrode 13 by a conductor pattern formed on the surface of the substrate 10. On the other hand, the source region, drain region, and gate region of each semiconductor element 12 are connected to the S2 terminal, drain electrode 14, and gate electrode 16 by bonding wires, respectively. The D2 terminal is connected to the drain electrode 14 by a conductor pattern formed on the surface of the substrate 10.

  The terminal holding member 21 includes an insulating wall disposed in a space between the D1 terminal and the D2 terminal when the case 20 is attached to the substrate 10. Here, the insulating wall is a part of the terminal holding member 21 and is formed of resin or the like. Further, the insulating wall is designed such that when the case 20 is attached to the substrate 10, the tip thereof reaches the vicinity thereof without contacting the surface of the substrate 10. If the insulating wall is designed to come into contact with the surface of the substrate 10, the contact between the outer peripheral portion of the case 20 and the substrate 10 may deteriorate due to a slight manufacturing error. For this reason, in the vicinity of the surface of the substrate 10, the space between the D1 terminal and the D2 terminal is not blocked by the insulating wall. Thus, even if an insulating wall is disposed in the space between the D1 terminal and the D2 terminal (A region in FIG. 4), the insulating wall cannot completely block the terminals.

  In general, semiconductor devices are designed to protect semiconductor elements and bonding wires by filling the case with silicon gel or the like. Therefore, if this silicon gel or the like can be poured into the space between the D1 terminal and the D2 terminal, a sufficient insulation distance can be secured between those terminals. However, in the semiconductor device 1 of the embodiment, since the D1 terminal and the D2 terminal are surrounded by the terminal holding member 21, the silicon gel or the like that flows from above the semiconductor elements 11, 12 and the like is between the D1 terminal and the D2 terminal. The space between them (area A in FIG. 4) cannot be reached.

  In the semiconductor device 1 of the embodiment, the filler hole 33 is provided in order to solve these problems. That is, the terminal holding member 21 includes a filler hole 33 for pouring an insulating filler such as silicon gel. Then, after the case 20 is attached to the substrate 10, the insulating filler is poured from the filler hole 33, so that the space between the D1 terminal and the D2 terminal (A region in FIG. 4) is due to the insulating filler. Will be satisfied. At this time, since the insulating filler is in a liquid or fluid state, the insulating filler flowing in from the filler hole 33 is inside the terminal holding member 21 due to capillary action (at least the space between the D1 terminal and the D2 terminal). It will be filled without any gaps. Moreover, the air which filled this space is discharged | emitted from D1 terminal accommodation slot and D2 terminal accommodation slot, for example. In addition, since the D1 terminal accommodating slot and the D2 terminal accommodating slot are formed slightly larger than the cross-sectional shape of the corresponding terminals, there is no gap for air to escape even when the terminals are accommodated. It is secured.

  Thus, in the semiconductor device 1, even if the D1 terminal and the D2 terminal attached to the substrate 10 are surrounded by the terminal holding member 21, the filler hole 33 is formed in the terminal holding member 21. The insulating filler can be poured into the space between the D1 terminal and the D2 terminal by using it. For this reason, a sufficient insulation distance can be secured between the input terminals or the output terminals of the main current provided close to each other. In FIG. 4, each terminal is drawn so as to extend straight in a direction perpendicular to the substrate 10 in order to make the drawing easy to see, but each terminal is bent at a position near the surface of the case 20. May be. In this case, for example, the D1 terminal and the S1 terminal are bent to the left in the plane of FIG. 4, and the D2 terminal and the S2 terminal are bent to the right in the plane of FIG. Thereby, the insulation distance between the terminals on the outside of the case 20 is also ensured.

  When the semiconductor element 11 is controlled to be in the on state, the main current input via the D1 terminal is a conductor pattern (not shown) formed on the surface of the substrate 10, the drain electrode 13, the bonding wire, and the semiconductor element. 11. Flows through the bonding wire and is output from the S1 terminal. That is, the current flowing through the D1 terminal and the current flowing through the S1 terminal are substantially the same in magnitude and opposite in direction. Here, the S1 terminal and the D1 terminal are provided close to each other and in parallel. For this reason, when the semiconductor element 11 is controlled to be in the ON state, the self-inductances of the S1 terminal and the D1 terminal are offset, and the loss of the entire semiconductor device is reduced. Similarly, when the semiconductor element 12 is controlled to be in the on state, the self-inductances of the S2 terminal and the D2 terminal are offset and the loss is reduced.

  As described above, according to the configuration of the embodiment, the main current terminals (in the example, D1 terminal, D2 terminal) can be provided close to each other while ensuring an insulation distance between the terminals. Contributes to size reduction. Further, since the self-inductance of the main current path is offset, the loss of the entire semiconductor device is reduced.

It is a disassembled perspective view of the semiconductor device of one Embodiment of this invention. It is an example of the circuit comprised in the semiconductor device shown in FIG. It is the figure which looked at the terminal holding member from the upper part. It is sectional drawing of the semiconductor device of embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Substrate 11, 12 Semiconductor element 13, 14 Drain electrode 15, 16 Gate electrode 20 Case 21 Terminal holding member 31 D1 terminal accommodation slot 32 D2 terminal accommodation slot 33 Filler hole

Claims (3)

A substrate on which a semiconductor element is mounted;
First and second terminals mounted on the substrate in proximity to each other;
A case attached to the substrate so as to surround the semiconductor element,
The case includes a terminal holding member surrounding the first and second terminals, and further a filler for pouring an insulating filler into a space between the first terminal and the second terminal. A semiconductor device, wherein a hole is provided in the terminal holding member. The semiconductor device according to claim 1, wherein the terminal holding member is provided with a third terminal for inputting or outputting a main current of the semiconductor element in advance. The first and third terminals are provided in parallel and close to each other, and are electrically connected to the semiconductor element such that main currents of the semiconductor element flow in opposite directions. The semiconductor device according to claim 2.

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