JP2005209938A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP2005209938A
JP2005209938A JP2004015839A JP2004015839A JP2005209938A JP 2005209938 A JP2005209938 A JP 2005209938A JP 2004015839 A JP2004015839 A JP 2004015839A JP 2004015839 A JP2004015839 A JP 2004015839A JP 2005209938 A JP2005209938 A JP 2005209938A
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Prior art keywords
resin composition
semiconductor
semiconductor device
bonding
gold
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JP2004015839A
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JP4556436B2 (en
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Hiroshi Fujita
浩史 藤田
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Sumitomo Bakelite Co Ltd
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Sumitomo Bakelite Co Ltd
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Priority to JP2004015839A priority Critical patent/JP4556436B2/en
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Publication of JP4556436B2 publication Critical patent/JP4556436B2/en
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having extremely high reliability of electric conduction after heat resistance processing without deteriorating an electric characteristic and other characteristics. <P>SOLUTION: In the semiconductor device, a gold wire is used as a junction method between a semiconductor element and an external terminal and the semiconductor element and a lead frame or a patterned wiring board which is connected to the external terminal are sealed by a semiconductor sealing resin composition. The area of an alloy layer consisting of gold and aluminium which is formed on a junction surface of the semiconductor element and the gold wire is ≥20% of the whole junction area. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は耐熱性に優れた半導体装置に関するものである。   The present invention relates to a semiconductor device having excellent heat resistance.

従来より、金線により半導体素子と外部端子につながるリ−ドフレームまたはパターン加工された配線基板とを接合する技術は半導体装置の製造方法として広く知られていたが、金線と半導体素子上に作られたアルミ配線部(いわゆるボンディングパッド部)の接合状態を明確に規定したものは無かった。
近年の半導体装置は技術革新が飛躍的に進み、金線のファインピッチ化、接合速度の高速化、金線接合時の接合圧力による半導体素子へのダメージ、スタック技術に代表される半導体装置の内部構造の変革による接合条件の変化などによって接合部の信頼性は著しく低下する傾向にある。
Conventionally, a technique for bonding a semiconductor element and a lead frame connected to an external terminal or a patterned wiring board using a gold wire has been widely known as a method for manufacturing a semiconductor device. None of the aluminum wiring parts (so-called bonding pad parts) produced clearly defined the bonding state.
In recent years, semiconductor devices have undergone dramatic technological innovation. Finer pitches of gold wires, faster bonding speeds, damage to semiconductor elements due to bonding pressure during gold wire bonding, internals of semiconductor devices represented by stack technology The reliability of the joint tends to decrease significantly due to changes in joining conditions due to structural changes.

従来技術として下記特許文献1に示すような金−アルミ接合に関する接合方法や接合強度向上のための手法、特許文献2に示すような合金層生成時の厚みを制限する手法、特許文献3に示すような接合部材の薄膜の厚みを制限した手法などに関するものおよび非特許文献1のように封止材料が接合部の信頼性に影響を与えることを示す研究、非特許文献2のように接合部の信頼性を示めす高温保管処理後の接合部の腐食生成に関する原因を研究する報告などは既に公知であるが、本発明に示す金−アルミによる金属間化合物の生成面積に着目した接合信頼性を示す報告は全くなく、非特許文献1に示される封止材中に含有されるBr系化合物を含有しない封止材料においても、同様の高温保管不良が発生するものであった。   As a conventional technique, a gold-aluminum bonding method as shown in Patent Document 1 below, a technique for improving the bonding strength, a technique for limiting the thickness at the time of alloy layer generation as shown in Patent Document 2, and a technique shown in Patent Document 3 Research relating to the method of limiting the thickness of the thin film of the joining member, and research showing that the sealing material affects the reliability of the joint as in Non-Patent Document 1, and the joint as in Non-Patent Document 2 There are reports that study the cause of corrosion generation of joints after high-temperature storage treatment, which shows the reliability of joints, but the reliability of joints focusing on the area of formation of intermetallic compounds by gold-aluminum shown in the present invention There was no report showing any of the above, and the same high-temperature storage failure occurred even in the sealing material containing no Br-based compound contained in the sealing material shown in Non-Patent Document 1.

特開平5−243308号公報(第2〜5頁)JP-A-5-243308 (pages 2 to 5) 特開平10−12670号公報(第2〜11頁)JP-A-10-12670 (pages 2 to 11) 特開平9−36169号公報(第2〜11頁)JP-A-9-36169 (pages 2 to 11) 大野恭秀、清水勲著「Au−Al接合部の信頼性におよぼす樹脂封止の影響」溶接学会論文集第15巻第2号p.383−388(1997年)Ohno Masahide and Shimizu Isao, “Effect of Resin Sealing on Reliability of Au-Al Joints,” Japan Welding Society, Vol. 15, No. 2, p. 383-388 (1997) 大野恭秀、清水勲、今里英一郎著「Au−Al接合部のBr腐食の温度依存性」溶接学会論文集第16巻第3号p.312−318(1998年)"Temperature Dependence of Br Corrosion of Au-Al Joint" written by Masahide Ohno, Isao Shimizu and Eiichiro Imazato, Japan Welding Society, Vol. 16, No. 3, p. 312-318 (1998)

本発明は従来の金線とアルミパッド部の接合部における電気的導通信頼性の問題点を解決するためになされたもので、その目的とするところは電気的特性および他の諸特性を劣化させることなく、耐熱処理後の電気的導通信頼性が著しく優れた半導体装置を提供することにある。   The present invention has been made to solve the problem of electrical conduction reliability at the joint between a conventional gold wire and an aluminum pad, and its purpose is to deteriorate the electrical characteristics and other characteristics. It is another object of the present invention to provide a semiconductor device with extremely excellent electrical conduction reliability after heat-resistant treatment.

[1] 半導体素子と外部端子との接合方法として金線を用い、半導体素子と外部端子につながるリ−ドフレームまたはパターン加工された配線基板とを半導体封止用樹脂組成物により封止してなる半導体装置において、半導体素子と金線との接合面に金・アルミによる合金層が形成される面積が全接合面積の20%以上であることを特徴とする半導体装置、
[2] 前記半導体封止用樹脂組成物がハロゲン系の難燃剤を含有しない樹脂組成物である請求項1記載半導体装置、
[3] 前記半導体封止用樹脂組成物がエポキシ樹脂組成物であり、且つ難燃剤を含有しない樹脂組成物である請求項1又は2記載の半導体装置、
[1] A gold wire is used as a bonding method between the semiconductor element and the external terminal, and the semiconductor element and the lead frame connected to the external terminal or the patterned wiring board are sealed with a resin composition for semiconductor sealing. In the semiconductor device, the area in which the alloy layer of gold and aluminum is formed on the bonding surface between the semiconductor element and the gold wire is 20% or more of the total bonding area,
[2] The semiconductor device according to [1], wherein the semiconductor sealing resin composition is a resin composition containing no halogen-based flame retardant.
[3] The semiconductor device according to claim 1 or 2, wherein the semiconductor sealing resin composition is an epoxy resin composition and is a resin composition not containing a flame retardant.

[4] 前記半導体封止用樹脂組成物が一般式(1)で表されるエポキシ樹脂を含有する樹脂組成物である請求項1、2、又は3記載の半導体装置、
(nは平均値で、1〜5の正数である。)
[4] The semiconductor device according to claim 1, 2, or 3, wherein the semiconductor sealing resin composition is a resin composition containing an epoxy resin represented by the general formula (1).
(N is an average value and is a positive number from 1 to 5.)

[5] 前記半導体封止用樹脂組成物が一般式(2)で表されるフェノール樹脂硬化剤を含有する樹脂組成物である請求項1、2、又は3記載の半導体装置、
(nは平均値で、1〜5の正数である。)
[5] The semiconductor device according to claim 1, 2, or 3, wherein the semiconductor sealing resin composition is a resin composition containing a phenol resin curing agent represented by the general formula (2).
(N is an average value and is a positive number from 1 to 5.)

[6] 前記半導体封止用樹脂組成物が一般式(1)で表されるエポキシ樹脂、及び一般式(2)で表されるフェノール樹脂硬化剤を含有する樹脂組成物である請求項1、2、又は3記載の半導体装置、
(nは平均値で、1〜5の正数である。)
(nは平均値で、1〜5の正数である。)
である。
[6] The semiconductor sealing resin composition is a resin composition containing an epoxy resin represented by the general formula (1) and a phenol resin curing agent represented by the general formula (2). The semiconductor device according to 2 or 3,
(N is an average value and is a positive number from 1 to 5.)
(N is an average value and is a positive number from 1 to 5.)
It is.

本発明の方法に従うと、半導体素子の電気的導通のために行う金線による半導体素子と外部端子に通ずるリ−ドフレームまたはパターン加工された配線基板との接合信頼性を飛躍的に向上させること、すなわち従来の欠陥である高温での加熱処理後におけるボンディングパッド部の接合信頼性の向上が図られるので半導体装置として好適である。   According to the method of the present invention, the reliability of bonding between a semiconductor element using a gold wire for electrical conduction of the semiconductor element and a lead frame or a patterned wiring board connected to an external terminal can be dramatically improved. That is, since the bonding reliability of the bonding pad portion after the heat treatment at a high temperature, which is a conventional defect, can be improved, it is suitable as a semiconductor device.

本発明は、封止材料が接合部の信頼性に影響を与えることを示す研究である非特許文献1に示されている、Br系化合物を含有しない封止材料においても、高温保管不良が発生することを見いだし、その原因を追及した結果、金−アルミによる接合部の金属間化合物の生成比率が異なると、後の高温保管特性に多大な影響を与えることを見いだし、発明に至ったものである。即ち、本発明は、半導体素子と外部端子との接合方法として金線を用い、半導体素子と外部端子につながるリ−ドフレームまたはパターン加工された配線基板とを半導体封止用樹脂組成物により封止してなる半導体装置において、半導体素子と金線との接合面に金・アルミによる合金層が形成される面積を全接合面積の20%以上とすることにより、半導体素子の電気的導通のために行う金線による半導体素子と外部端子に通ずるリ−ドフレームまたはパターン加工された配線基板との接合信頼性を飛躍的に向上させること、すなわち従来の欠陥である高温での加熱処理後におけるボンディングパッド部の接合信頼性の向上が図られるのものである。
以下、本発明について詳細に説明する。
The present invention shows that high-temperature storage failure occurs even in a sealing material that does not contain a Br-based compound, which is shown in Non-Patent Document 1, which is a study showing that the sealing material affects the reliability of the joint. As a result of pursuing the cause, it was found that if the production ratio of the intermetallic compound at the joint of gold-aluminum is different, it has a great influence on the high-temperature storage characteristics later, leading to the invention. is there. That is, the present invention uses a gold wire as a bonding method between a semiconductor element and an external terminal, and seals the semiconductor element and a lead frame or a patterned wiring board connected to the external terminal with a resin composition for semiconductor encapsulation. In the semiconductor device which is stopped, the area where the alloy layer of gold / aluminum is formed on the bonding surface between the semiconductor element and the gold wire is set to 20% or more of the total bonding area, so that the semiconductor element is electrically connected. The reliability of bonding between a semiconductor element using a gold wire and a lead frame connected to an external terminal or a patterned wiring board is dramatically improved, that is, bonding after heat treatment at a high temperature, which is a conventional defect. The bonding reliability of the pad portion can be improved.
Hereinafter, the present invention will be described in detail.

本発明において用いられる金線は、通常半導体装置製造用として市販されている金線であればその化学的組成、硬さ、径などを問われるものではない。また、半導体素子のボンディングパッドに関してはアルミ主体の組成であれば、その化学的組成、形状、厚みなどを問われるものではなく、金線とボンディングパッド部の接合において金とアルミの合金の生成が接合面積全体に対し面積比で20%以上であればよい。
接合部の面積比は、下記の方法により算出できる。金線とアルミパッド部をワイヤーボンディング装置にて接合した後、アルカリ水溶液中に浸漬し、ボンディングパッド部のアルミを溶解、除去する。その後、接合面を観察し、接合面積に対する金・アルミ合金層の面積を画像解析装置により判別し面積比を計算する。
この比率が下限値未満であると半導体装置としての耐熱信頼性が著しく劣り半導体装置としての動作異常や導通不良が発生する。また、この比率は、更に高い信頼性を得ようとするならば50%以上が望ましい。
金線とボンディングパッドの接合部における接合面積全体に対する金−アルミ合金の面積比は、接合時における温度、荷重、超音波パワー、超音波時間等のボンディング条件を調整することにより、上記範囲内に調整することができる。
The gold wire used in the present invention is not limited in its chemical composition, hardness, diameter, and the like as long as it is a gold wire that is usually commercially available for manufacturing semiconductor devices. In addition, regarding the bonding pad of the semiconductor element, as long as it is a composition mainly composed of aluminum, its chemical composition, shape, thickness, etc. are not questioned, and an alloy of gold and aluminum is formed at the bonding of the gold wire and the bonding pad part. The area ratio may be 20% or more with respect to the entire bonding area.
The area ratio of the joint can be calculated by the following method. After bonding a gold wire and an aluminum pad part with a wire bonding apparatus, it is immersed in an alkaline aqueous solution to dissolve and remove the aluminum in the bonding pad part. Thereafter, the bonding surface is observed, the area of the gold / aluminum alloy layer with respect to the bonding area is determined by an image analyzer, and the area ratio is calculated.
If this ratio is less than the lower limit value, the heat resistance reliability as a semiconductor device is remarkably inferior, and an abnormal operation or poor conduction as a semiconductor device occurs. In addition, this ratio is desirably 50% or more in order to obtain higher reliability.
The area ratio of the gold-aluminum alloy to the entire bonding area at the bonding portion between the gold wire and the bonding pad is within the above range by adjusting the bonding conditions such as temperature, load, ultrasonic power, ultrasonic time at the time of bonding. Can be adjusted.

本発明に用いる半導体封止用樹脂組成物には、ハロゲン系の難燃剤を意図的に含有しないことが望ましく、その理由は接合部の耐熱信頼性を高めるためである。本発明で使用可能な難燃剤としては、臭素および塩素に代表されるハロゲン元素をその主構造に意図的に含有していない難燃剤であり、具体的には金属酸化物、金属水酸化物、リン系難燃剤、窒素系難燃剤、およびリン・窒素による複合系難燃剤があげられ、それらを組み合わせて使用しても差し支えない。半導体封止用樹脂組成物の樹脂成分は種類を限定するものではないが、その中でも耐湿信頼性、リフロー耐熱性を考慮するとエポキシ樹脂による組成物が望ましく、更に耐熱信頼性の向上および環境問題を考慮すると、上記のハロゲン元素を含有しない難燃剤をも含有しないことがより望ましい。   It is desirable that the resin composition for encapsulating a semiconductor used in the present invention does not intentionally contain a halogen-based flame retardant, for the purpose of enhancing the heat resistance reliability of the joint. The flame retardant that can be used in the present invention is a flame retardant that does not intentionally contain a halogen element typified by bromine and chlorine in its main structure, specifically a metal oxide, a metal hydroxide, Phosphorus-based flame retardants, nitrogen-based flame retardants, and composite flame retardants using phosphorus and nitrogen can be used, and these may be used in combination. The resin component of the resin composition for encapsulating a semiconductor is not limited in type, but among them, a composition using an epoxy resin is desirable in consideration of moisture resistance reliability and reflow heat resistance, and further improves heat reliability and environmental problems. In consideration, it is more desirable not to contain a flame retardant that does not contain the halogen element.

ハロゲン元素を含有しない難燃剤をも含有せずに、良好な難燃性を得るためには、前記半導体封止用樹脂組成物の樹脂成分が、一般式(1)で表されるエポキシ樹脂、及び/又は一般式(2)で表されるフェノール樹脂硬化剤を含有するものが最も望ましい。
(nは平均値で、1〜5の正数である。)
(nは平均値で、1〜5の正数である。)
In order to obtain good flame retardancy without containing a flame retardant containing no halogen element, the resin component of the resin composition for semiconductor encapsulation is an epoxy resin represented by the general formula (1), And / or most preferably contain a phenol resin curing agent represented by the general formula (2).
(N is an average value and is a positive number from 1 to 5.)
(N is an average value and is a positive number from 1 to 5.)

以下に本発明の実施例を示すが、本発明はこれらに限定されるものではない。
[半導体封止用樹脂組成物の製造]
一般式(1)で示されるエポキシ樹脂(軟化点58℃、エポキシ当量272g/eq)
8.0重量部
Examples of the present invention are shown below, but the present invention is not limited thereto.
[Manufacture of resin composition for semiconductor encapsulation]
Epoxy resin represented by general formula (1) (softening point: 58 ° C., epoxy equivalent: 272 g / eq)
8.0 parts by weight

一般式(2)で示されるフェノール樹脂(軟化点65℃、水酸基当量200g/eq)
6.0重量部
Phenol resin represented by the general formula (2) (softening point 65 ° C., hydroxyl group equivalent 200 g / eq)
6.0 parts by weight

トリフェニルホスフィン 0.3重量部
溶融球状シリカ(平均粒径20μm) 85.2重量部
カーボンブラック 0.2重量部
離型剤1: 0.3重量部
をミキサーにて混合し、熱ロールを用いて、100℃で2分間混練して冷却後粉砕し、半導体封止用樹脂組成物を得た。
Triphenylphosphine 0.3 parts by weight Fused spherical silica (average particle size 20 μm) 85.2 parts by weight Carbon black 0.2 parts by weight Mold release agent 1: 0.3 parts by weight are mixed in a mixer and a hot roll is used. The mixture was kneaded at 100 ° C. for 2 minutes, cooled and pulverized to obtain a resin composition for semiconductor encapsulation.

実施例1
半導体素子と外部端子との接合方法として金線を用い、半導体素子と外部端子につながるリ−ドフレームを上記記載の半導体封止用樹脂組成物により封止した半導体装置において、半導体素子と金線との接合面に金・アルミによる合金層が形成される面積を全接合面積の90%とした半導体装置(16pDIP)を用い下記の信頼性試験を行った。接合面積の特定は確認評価が破壊試験であるため同一組み立て条件の半導体装置を使用した。結果を表1に示す。
Example 1
In a semiconductor device in which a gold wire is used as a bonding method between a semiconductor element and an external terminal, and a lead frame connected to the semiconductor element and the external terminal is sealed with the above-described resin composition for semiconductor sealing, the semiconductor element and the gold wire The following reliability test was performed using a semiconductor device (16 pDIP) in which the area where the alloy layer of gold and aluminum is formed on the bonding surface is 90% of the total bonding area. Since the confirmation evaluation is a destructive test for identifying the bonding area, a semiconductor device having the same assembly conditions was used. The results are shown in Table 1.

実施例2
金線との接合面に金・アルミによる合金層が形成される面積を全接合面積の40%としたほかは、実施例1と同様にして製造した半導体装置(16pDIP)を用い、実施例1と同様の信頼性試験を行った。結果を表1に示す。
比較例1
金線との接合面に金・アルミによる合金層が形成される面積を全接合面積の10%としたほかは、実施例1、2と同様にして製造した半導体装置(16pDIP)を用い、実施例1、2と同様の信頼性試験を行った。結果を表1に示す。
Example 2
A semiconductor device (16 pDIP) manufactured in the same manner as in Example 1 was used except that the area where the alloy layer of gold and aluminum was formed on the bonding surface with the gold wire was 40% of the total bonding area. The same reliability test was conducted. The results are shown in Table 1.
Comparative Example 1
Using a semiconductor device (16pDIP) manufactured in the same manner as in Examples 1 and 2 except that the area where the alloy layer of gold and aluminum is formed on the bonding surface with the gold wire is 10% of the total bonding area. The same reliability test as in Examples 1 and 2 was performed. The results are shown in Table 1.

信頼性試験方法
高温保管試験1
下記の条件で、高温保管処理した後の抵抗電流値を測定し、高温保管処理前の初期段階の測定値に対し1.2倍を越えた抵抗値を示したものを不合格と判定した。
評価数はn=10とし不良率は評価母数に対する不良数を百分率表示した。
処理条件:175℃ 1000hr放置
高温保管試験2
高温保管試験1を実施後の半導体装置を、パッケージ開封器を用いて開封する。開封後、ワイヤプルテスターによって金線とボンディングパッド部の接合強度を測定した。測定するワイヤー数は50本以上とし、接合強度4g以下が20%を越える発生率で且つ金線とアルミパッド部の界面で破壊するモードを不良と判定した。
Reliability test method High temperature storage test 1
Under the following conditions, the resistance current value after the high temperature storage treatment was measured, and the resistance value exceeding 1.2 times the measured value in the initial stage before the high temperature storage treatment was judged as rejected.
The number of evaluations was n = 10, and the defect rate was the percentage of defects with respect to the evaluation parameter.
Treatment conditions: 175 ° C, 1000 hr, high temperature storage test 2
The semiconductor device after performing the high-temperature storage test 1 is opened using a package opening device. After opening, the bonding strength between the gold wire and the bonding pad was measured with a wire pull tester. The number of wires to be measured was 50 or more, and the mode in which the bonding strength of 4 g or less exceeded 20% and the mode of breaking at the interface between the gold wire and the aluminum pad portion was determined to be defective.

本発明の方法に従うと、半導体素子の電気的導通のために行う金線による半導体素子と外部端子に通ずるリ−ドフレームまたはパターン加工された配線基板との接合信頼性を飛躍的に向上させること、すなわち従来の欠陥である高温での加熱処理後におけるボンディングパッド部の接合信頼性の向上が図られるので、本発明は金線とアルミパッドによる電気的接合を有する半導体装置全般用として好適である。   According to the method of the present invention, the reliability of bonding between a semiconductor element using a gold wire for electrical conduction of the semiconductor element and a lead frame or a patterned wiring board connected to an external terminal can be dramatically improved. That is, since the bonding reliability of the bonding pad portion after the heat treatment at a high temperature, which is a conventional defect, can be improved, the present invention is suitable for general semiconductor devices having electrical bonding using a gold wire and an aluminum pad. .

ボンディングパッド部の接合事例を示す垂直断面写真である。It is a vertical cross-sectional photograph which shows the joining example of a bonding pad part. 高温保管試験1を実施後のボンディングパッド部の接合事例(不良)を示す垂直断面写真である。It is a vertical cross-sectional photograph which shows the joining example (defect) of the bonding pad part after implementing the high temperature storage test 1. FIG. アルカリ溶液によってアルミを溶解、除去させた接部の裏面写真である。It is the back surface photograph of the contact part which dissolved and removed aluminum with the alkaline solution.

符号の説明Explanation of symbols

1 金線
2 半導体封止用樹脂組成物の硬化物
3 半導体素子
4 金−アルミ合金部
5 ボイド
6 腐食
7 クラック
8 金
9 金・アルミ合金部
DESCRIPTION OF SYMBOLS 1 Gold wire 2 Hardened | cured material of the resin composition for semiconductor sealing 3 Semiconductor element 4 Gold-aluminum alloy part 5 Void 6 Corrosion 7 Crack 8 Gold 9 Gold and aluminum alloy part

Claims (6)

半導体素子と外部端子との接合方法として金線を用い、半導体素子と外部端子につながるリ−ドフレームまたはパターン加工された配線基板とを半導体封止用樹脂組成物により封止してなる半導体装置において、半導体素子と金線との接合面に金・アルミによる合金層が形成される面積が全接合面積の20%以上であることを特徴とする半導体装置。 A semiconductor device using a gold wire as a bonding method between a semiconductor element and an external terminal, and sealing the semiconductor element and a lead frame connected to the external terminal or a patterned wiring board with a resin composition for semiconductor sealing The semiconductor device is characterized in that the area where the alloy layer of gold / aluminum is formed on the bonding surface between the semiconductor element and the gold wire is 20% or more of the total bonding area. 前記半導体封止用樹脂組成物がハロゲン系の難燃剤を含有しない樹脂組成物である請求項1記載半導体装置。 2. The semiconductor device according to claim 1, wherein the semiconductor sealing resin composition is a resin composition containing no halogen-based flame retardant. 前記半導体封止用樹脂組成物がエポキシ樹脂組成物であり、且つ難燃剤を含有しない樹脂組成物である請求項1又は2記載の半導体装置。 The semiconductor device according to claim 1, wherein the semiconductor sealing resin composition is an epoxy resin composition and is a resin composition not containing a flame retardant. 前記半導体封止用樹脂組成物が一般式(1)で表されるエポキシ樹脂を含有する樹脂組成物である請求項1、2、又は3記載の半導体装置。
(nは平均値で、1〜5の正数である。)
4. The semiconductor device according to claim 1, wherein the semiconductor sealing resin composition is a resin composition containing an epoxy resin represented by the general formula (1).
(N is an average value and is a positive number from 1 to 5.)
前記半導体封止用樹脂組成物が一般式(2)で表されるフェノール樹脂硬化剤を含有する樹脂組成物である請求項1、2、又は3記載の半導体装置。
(nは平均値で、1〜5の正数である。)
4. The semiconductor device according to claim 1, wherein the semiconductor sealing resin composition is a resin composition containing a phenol resin curing agent represented by the general formula (2).
(N is an average value and is a positive number from 1 to 5.)
前記半導体封止用樹脂組成物が一般式(1)で表されるエポキシ樹脂、及び一般式(2)で表されるフェノール樹脂硬化剤を含有する樹脂組成物である請求項1、2、又は3記載の半導体装置。
(nは平均値で、1〜5の正数である。)
(nは平均値で、1〜5の正数である。)
The resin composition for semiconductor encapsulation is a resin composition containing an epoxy resin represented by the general formula (1) and a phenol resin curing agent represented by the general formula (2). 3. The semiconductor device according to 3.
(N is an average value and is a positive number from 1 to 5.)
(N is an average value and is a positive number from 1 to 5.)
JP2004015839A 2004-01-23 2004-01-23 Semiconductor device Expired - Fee Related JP4556436B2 (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243308A (en) * 1991-11-20 1993-09-21 Nippon Steel Corp Method for bonding gold fine line and semiconductor device
JP2001072743A (en) * 1999-09-02 2001-03-21 Nitto Denko Corp Epoxy resin composition for sealing semiconductor and semiconductor device using same
JP2003082197A (en) * 2001-09-17 2003-03-19 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2003246847A (en) * 2002-02-25 2003-09-05 Sumitomo Bakelite Co Ltd Flame-retardant epoxy resin composition and semiconductor sealing material using the same, and semiconductor device
JP2003252961A (en) * 2002-03-05 2003-09-10 Toray Ind Inc Epoxy-based resin composition and semiconductor device using the composition
JP2003258022A (en) * 2002-03-07 2003-09-12 Hitachi Ltd Semiconductor device and its manufacturing method
JP2003292569A (en) * 2002-03-29 2003-10-15 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2004128184A (en) * 2002-10-02 2004-04-22 Nippon Steel Corp Gold bonding wire for semiconductor

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05243308A (en) * 1991-11-20 1993-09-21 Nippon Steel Corp Method for bonding gold fine line and semiconductor device
JP2001072743A (en) * 1999-09-02 2001-03-21 Nitto Denko Corp Epoxy resin composition for sealing semiconductor and semiconductor device using same
JP2003082197A (en) * 2001-09-17 2003-03-19 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2003246847A (en) * 2002-02-25 2003-09-05 Sumitomo Bakelite Co Ltd Flame-retardant epoxy resin composition and semiconductor sealing material using the same, and semiconductor device
JP2003252961A (en) * 2002-03-05 2003-09-10 Toray Ind Inc Epoxy-based resin composition and semiconductor device using the composition
JP2003258022A (en) * 2002-03-07 2003-09-12 Hitachi Ltd Semiconductor device and its manufacturing method
JP2003292569A (en) * 2002-03-29 2003-10-15 Sumitomo Bakelite Co Ltd Epoxy resin composition and semiconductor device
JP2004128184A (en) * 2002-10-02 2004-04-22 Nippon Steel Corp Gold bonding wire for semiconductor

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