JP2005197599A - Photoreceptor and method of manufacturing the same - Google Patents

Photoreceptor and method of manufacturing the same Download PDF

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JP2005197599A
JP2005197599A JP2004004458A JP2004004458A JP2005197599A JP 2005197599 A JP2005197599 A JP 2005197599A JP 2004004458 A JP2004004458 A JP 2004004458A JP 2004004458 A JP2004004458 A JP 2004004458A JP 2005197599 A JP2005197599 A JP 2005197599A
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conductive film
polysilicon
receiving element
light
layer
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JP4571807B2 (en
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Tomohiko Matsumae
友彦 松前
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Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
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Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a photoreceptor preventing impurities entering a translucent conductive film from diffusing to an underlying ground without adding an additional step or deteriorating translucency thereof, and also to provide a method of manufacturing the same. <P>SOLUTION: The photoreceptor 101 comprises a p-type diffusion layer 7 formed on the surface of an n-type epitaxial layer 4 of a device forming region, a thin silicon oxide film 8 provided on the surface of the diffusion layer 7, a polysilicon layer 102 of a translucent conductive film formed to cover the p-type diffusion layer 7 region on the polysilicon oxide film 8, and a aluminium 13 for shading which is electrically connected to the polysilicon layer 102. A portion underlying the polysilicon layer 102 is provided with a polysilicon oxide 103 characterized in the invention. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、定電位ラインと電気的に接続し外部ノイズを遮断する低抵抗化のための不純物を含んだ透光性導電膜を備えた受光素子及びその製造方法に関する。   The present invention relates to a light receiving element including a translucent conductive film containing an impurity for reducing resistance that is electrically connected to a constant potential line and blocks external noise, and a method of manufacturing the same.

光信号を電気信号に変換するフォトダイオードやフォトトランジスタなどの受光素子においては、電磁波などの外部ノイズに対する誤動作対策として、例えばグランド電位などの定電位ラインと電気的に接続された透光性導電膜で被覆することが知られている。   In a light-receiving element such as a photodiode or phototransistor that converts an optical signal into an electric signal, a translucent conductive film electrically connected to a constant potential line such as a ground potential, for example, as a countermeasure against malfunction due to external noise such as electromagnetic waves It is known to coat with.

従来の受光素子の一例として、フォトダイオードの断面図を図8に示す。   As an example of a conventional light receiving element, a cross-sectional view of a photodiode is shown in FIG.

従来のフォトダイオード1は、p型シリコン基板2に設けたn型埋込層3を含む表面に成長させたn型エピタキシャル層4と、そのn型エピタキシャル層4に設けて素子形成領域を区画するp型素子分離層5と、n型埋込層3に達するn型拡散層6と、素子形成領域のn型エピタキシャル層4の表面に形成したp型拡散層7と、これらの表面に設けた薄いシリコン酸化膜8と、このシリコン酸化膜8上にp型拡散層7領域を被覆するように形成した透光性導電膜であるポリシリコン層9と、これらの表面に設けた窒化シリコン膜10と、この窒化シリコン膜10やシリコン酸化膜8に設けたコンタクトホールを通してn型拡散層6,p型拡散層7,ポリシリコン層9に、それぞれ接続する電極11a,11b,11cと、これらを含む表面に設けた厚い窒化シリコン膜12と、この窒化シリコン膜12に設けたコンタクトホールを通して電極11cおよびポリシリコン層9と電気的に接続された遮光用アルミニウム13とを有している。   A conventional photodiode 1 includes an n-type epitaxial layer 4 grown on a surface including an n-type buried layer 3 provided on a p-type silicon substrate 2, and an n-type epitaxial layer 4 provided to partition an element formation region. p-type element isolation layer 5, n-type diffusion layer 6 reaching n-type buried layer 3, p-type diffusion layer 7 formed on the surface of n-type epitaxial layer 4 in the element formation region, and provided on these surfaces A thin silicon oxide film 8, a polysilicon layer 9 which is a translucent conductive film formed on the silicon oxide film 8 so as to cover the region of the p-type diffusion layer 7, and a silicon nitride film 10 provided on these surfaces And electrodes 11a, 11b, 11c connected to the n-type diffusion layer 6, the p-type diffusion layer 7, and the polysilicon layer 9 through contact holes provided in the silicon nitride film 10 and the silicon oxide film 8, respectively. On the surface A girder thick silicon nitride film 12, and an electrode 11c and the polysilicon layer 9 and electrically connected to the light-shielding aluminum 13 through a contact hole formed in the silicon nitride film 12.

ここで、ポリシリコン層9は、遮光用アルミニウム13を通じてグランド電位に保たれており、外部ノイズの影響を遮断するノイズシールドの役目を果たしている。   Here, the polysilicon layer 9 is maintained at the ground potential through the light shielding aluminum 13, and serves as a noise shield that blocks the influence of external noise.

また、ポリシリコン層9には、例えばリンなどの不純物が導入されており低抵抗化が図られている。(例えば、特許文献1,2参照。)。   Further, impurities such as phosphorus are introduced into the polysilicon layer 9 to reduce the resistance. (For example, see Patent Documents 1 and 2.)

次に、上記のフォトダイオード1の製造方法を図9〜図13に示す。尚、図9〜図13は工程順を示す断面図である。   Next, the manufacturing method of said photodiode 1 is shown in FIGS. 9 to 13 are cross-sectional views showing the order of steps.

先ず、図9(a)に示すように、p型シリコン基板2の所定領域にヒ素を注入してn型埋込層3を形成する。   First, as shown in FIG. 9A, arsenic is implanted into a predetermined region of the p-type silicon substrate 2 to form an n-type buried layer 3.

次に、図9(b)に示すように、n型エピタキシャル層4を成長させる。   Next, as shown in FIG. 9B, an n-type epitaxial layer 4 is grown.

次に、図9(c)に示すように、シリコン酸化膜14を成長させた後、その上に一般的なフォトリソグラフィ法を用いて、n型拡散層となる部分を開口したフォトレジストマスク15を形成後、シリコン酸化膜14をエッチングする。   Next, as shown in FIG. 9C, after a silicon oxide film 14 is grown, a photoresist mask 15 having an opening in a portion that becomes an n-type diffusion layer is formed thereon using a general photolithography method. After forming, the silicon oxide film 14 is etched.

次に、図10(d)に示すように、シリコン酸化膜14とフォトレジストマスク15をマスクとしてリンを注入後、高温アニール処理をしてn型拡散層6を形成する。   Next, as shown in FIG. 10D, phosphorus is implanted using the silicon oxide film 14 and the photoresist mask 15 as a mask, and then high-temperature annealing is performed to form the n-type diffusion layer 6.

その後、フォトレジストマスク15とシリコン酸化膜14を順次、除去する。   Thereafter, the photoresist mask 15 and the silicon oxide film 14 are sequentially removed.

次に、図10(e)に示すように、表面に薄いシリコン酸化膜8を成長させた後、その上に一般的なフォトリソグラフィ法を用いて、p型素子分離層となる部分を開口したフォトレジストマスク16を形成してボロンを注入し、p型素子分離層5を形成する。尚、シリコン酸化膜8は、上下を絶縁分離するとともに不純物注入時のダメージを減少させる目的で形成する。   Next, as shown in FIG. 10E, after a thin silicon oxide film 8 is grown on the surface, a portion that becomes a p-type element isolation layer is opened thereon by using a general photolithography method. A photoresist mask 16 is formed and boron is implanted to form the p-type element isolation layer 5. The silicon oxide film 8 is formed for the purpose of insulating the upper and lower sides and reducing damage during impurity implantation.

その後、フォトレジストマスク16を除去する。   Thereafter, the photoresist mask 16 is removed.

次に、図11(f)に示すように、一般的なフォトリソグラフィ法を用いて、p型拡散層となる部分を開口したフォトレジストマスク17を形成し、リンを注入してp型拡散層7を形成する。   Next, as shown in FIG. 11 (f), using a general photolithography method, a photoresist mask 17 having an opening at a portion to become a p-type diffusion layer is formed, and phosphorus is implanted to form a p-type diffusion layer. 7 is formed.

その後、フォトレジストマスク17を除去する。   Thereafter, the photoresist mask 17 is removed.

次に、図11(g)に示すように、化学気相成長(CVD)法によりポリシリコン膜9aを形成する。   Next, as shown in FIG. 11G, a polysilicon film 9a is formed by chemical vapor deposition (CVD).

次に、図12(h)に示すように、ポリシリコン膜9aに熱拡散法(または、イオン打ち込み法)などを用いてリンを導入し、外部ノイズを素早くグランド電位に落とせるように低抵抗化を図る。ところが、ここで、導入されたリンの一部は薄いシリコン酸化膜8を通過して不所望にも下地に拡散するおそれがあった。   Next, as shown in FIG. 12H, phosphorus is introduced into the polysilicon film 9a using a thermal diffusion method (or ion implantation method) or the like, and the resistance is lowered so that external noise can be quickly dropped to the ground potential. Plan. However, here, some of the introduced phosphorus may pass through the thin silicon oxide film 8 and undesirably diffuse into the underlying layer.

次に、図12(i)に示すように、ポリシリコン膜を一般的なフォトリソグラフィ法およびエッチング法を用いてパターニングし透光性導電膜としてのポリシリコン層9を形成する。   Next, as shown in FIG. 12I, the polysilicon film is patterned by using a general photolithography method and etching method to form a polysilicon layer 9 as a translucent conductive film.

次に、図13(j)に示すように、ポリシリコン層9を含む表面に窒化シリコン膜10を形成した後、一般的なフォトリソグラフィ法およびエッチング法を用いて、この窒化シリコン膜10やシリコン酸化膜8にコンタクトホールを設け、このコンタクトホールを通してn型拡散層6,p型拡散層7に、それぞれ接続する電極11a,11bや、ポリシリコン層9に接続する電極11cなどを形成する。   Next, as shown in FIG. 13J, after a silicon nitride film 10 is formed on the surface including the polysilicon layer 9, this silicon nitride film 10 and silicon are etched using a general photolithography method and etching method. Contact holes are provided in the oxide film 8, and electrodes 11a and 11b connected to the n-type diffusion layer 6 and the p-type diffusion layer 7 and electrodes 11c connected to the polysilicon layer 9 are formed through the contact holes, respectively.

最後に、図13(k)に示すように、電極11a,11b,11cを含む表面に窒化シリコン膜12を形成し、一般的なフォトリソグラフィ法およびエッチング法を用いて、この窒化シリコン膜12にコンタクトホールを設け、窒化シリコン膜12上に遮光用アルミニウム13を形成するとともに、このコンタクトホールを通して遮光用アルミニウム13と電極11cとを電気的に接続して完成する。
特開平4−85885号公報 特開昭59−125674号公報
Finally, as shown in FIG. 13 (k), a silicon nitride film 12 is formed on the surface including the electrodes 11a, 11b, and 11c, and this silicon nitride film 12 is formed using a general photolithography method and etching method. A contact hole is provided, and the light shielding aluminum 13 is formed on the silicon nitride film 12, and the light shielding aluminum 13 and the electrode 11c are electrically connected through the contact hole to complete.
Japanese Patent Laid-Open No. 4-85885 JP 59-125673 A

しかしながら、上記のようなフォトダイオード1においては、前述したように低抵抗化を目的にポリシリコン層9に導入したリンが、薄いシリコン酸化膜8を通過して下地へ拡散するおそれがあった。そして、これを防止するために新たな絶縁膜などを形成したりすると工程が増加する上に、透光性を悪化させるおそれがあった。   However, in the photodiode 1 as described above, phosphorus introduced into the polysilicon layer 9 for the purpose of reducing the resistance as described above may pass through the thin silicon oxide film 8 and diffuse to the base. In order to prevent this, if a new insulating film or the like is formed, the number of processes is increased and the translucency may be deteriorated.

本発明の目的は、新たに工程を増加させたり、透光性を悪化させたりすることなく、透光性導電膜に導入する不純物が下地へ拡散することを防止できる受光素子及びその製造方法を提供することである。   An object of the present invention is to provide a light receiving element capable of preventing impurities introduced into a light transmissive conductive film from diffusing into a base without newly increasing the number of steps or deteriorating the light transmissive property, and a method for manufacturing the same. Is to provide.

本発明の受光素子は、定電位ラインと電気的に接続し外部ノイズを遮断する低抵抗化のための不純物を含んだ透光性導電膜を備えた受光素子において、透光性導電膜は、不純物が下地に拡散することを防止するための少なくとも1層以上の酸化層をその内部に有することを特徴とする受光素子である。   The light-receiving element of the present invention includes a light-transmitting conductive film containing impurities for reducing resistance that is electrically connected to a constant potential line and blocks external noise. A light receiving element having at least one oxide layer for preventing impurities from diffusing into a base.

本発明の受光素子の製造方法は、定電位ラインと電気的に接続し外部ノイズを遮断する低抵抗化のための不純物を含んだ透光性導電膜を備えた受光素子の製造方法において、透光性導電膜は化学気相成長法で形成し、その化学気相成長の際、透光性導電膜を成長させる反応ガス中に一時的に酸素を添加して透光性導電膜の内部に少なくとも1層以上の酸化層を形成し、かつ、透光性導電膜形成後に低抵抗化のための不純物を透光性導電膜に導入することを特徴とする受光素子の製造方法である。   The light receiving element manufacturing method of the present invention is a light receiving element manufacturing method including a light transmitting conductive film containing an impurity for reducing resistance that is electrically connected to a constant potential line and blocks external noise. The photoconductive film is formed by chemical vapor deposition. During the chemical vapor deposition, oxygen is temporarily added to the reaction gas for growing the translucent conductive film, and the photoconductive film is formed inside the translucent conductive film. A method of manufacturing a light receiving element, comprising forming at least one oxide layer and introducing an impurity for reducing resistance into the light transmissive conductive film after forming the light transmissive conductive film.

本発明の受光素子によると、透光性導電膜の内部に少なくとも1層以上の不純物拡散防止膜としての酸化層を有するため、低抵抗化を目的に透光性導電膜に不純物を導入しても不純物が下地へ拡散することを防止できる。また、透光性導電膜とは別に新たな絶縁膜を設けたりしないため透光性を悪化させることがない。また、酸化層は、酸化ポリシリコンのような信頼できる絶縁体で形成するとよい。   According to the light receiving element of the present invention, since the light-transmitting conductive film has at least one oxide layer as an impurity diffusion preventing film, impurities are introduced into the light-transmitting conductive film for the purpose of reducing resistance. Can also prevent impurities from diffusing into the substrate. Further, since a new insulating film is not provided separately from the translucent conductive film, the translucency is not deteriorated. The oxide layer may be formed of a reliable insulator such as polysilicon oxide.

本発明の受光素子の製造方法によると、透光性導電膜を化学気相成長(CVD)法で形成する際に、酸素を一時的に添加し透光性導電膜の内部に少なくとも1層以上の不純物拡散防止膜としての酸化層を形成するため、新たに工程を増加させなくて済む。   According to the method for manufacturing a light receiving element of the present invention, when forming a light-transmitting conductive film by a chemical vapor deposition (CVD) method, oxygen is temporarily added and at least one layer is formed inside the light-transmitting conductive film. Since an oxide layer as an impurity diffusion prevention film is formed, it is not necessary to newly increase the number of steps.

本発明の受光素子の一例としてフォトダイオードの断面図を図1に示す。尚、図8と同一部分には同一符号を付す。   FIG. 1 shows a cross-sectional view of a photodiode as an example of the light receiving element of the present invention. The same parts as those in FIG.

本発明のフォトダイオード101は、p型シリコン基板2に設けたn型埋込層3を含む表面に成長させたn型エピタキシャル層4と、そのn型エピタキシャル層4に設けて素子形成領域を区画するp型素子分離層5と、n型埋込層3に達するn型拡散層6と、素子形成領域のn型エピタキシャル層4の表面に形成したp型拡散層7と、これらの表面に設けた薄いシリコン酸化膜8と、このシリコン酸化膜8上にp型拡散層7領域を被覆するように形成した透光性導電膜であるポリシリコン層102と、これらの表面に設けた窒化シリコン膜10と、この窒化シリコン膜10やシリコン酸化膜8に設けたコンタクトホールを通してn型拡散層6,p型拡散層7,ポリシリコン層102に、それぞれ接続する電極11a,11b,11cと、これらを含む表面に設けた厚い窒化シリコン膜12と、この窒化シリコン膜12に設けたコンタクトホールを通して電極11cおよびポリシリコン層102と電気的に接続された遮光用アルミニウム13とを有している。   The photodiode 101 of the present invention includes an n-type epitaxial layer 4 grown on a surface including an n-type buried layer 3 provided on a p-type silicon substrate 2, and an element formation region provided on the n-type epitaxial layer 4. P-type element isolation layer 5, n-type diffusion layer 6 reaching n-type buried layer 3, p-type diffusion layer 7 formed on the surface of n-type epitaxial layer 4 in the element formation region, and provided on these surfaces A thin silicon oxide film 8, a polysilicon layer 102 which is a translucent conductive film formed on the silicon oxide film 8 so as to cover the region of the p-type diffusion layer 7, and a silicon nitride film provided on these surfaces 10 and electrodes 11a, 11b and 11c connected to the n-type diffusion layer 6, the p-type diffusion layer 7 and the polysilicon layer 102 through contact holes provided in the silicon nitride film 10 and the silicon oxide film 8, respectively. A thick silicon nitride film 12 provided on the surface including, and an electrode 11c and the polysilicon layer 102 and electrically connected to the light-shielding aluminum 13 through a contact hole formed in the silicon nitride film 12.

ここで、ポリシリコン層102は、遮光用アルミニウム13を通じてグランド電位に保たれており、外部ノイズの影響を遮断するノイズシールドの役目を果たしている。   Here, the polysilicon layer 102 is maintained at the ground potential through the light shielding aluminum 13, and serves as a noise shield that blocks the influence of external noise.

また、ポリシリコン層102の下面側の一部には、本発明の特徴である不純物拡散防止膜としての酸化ポリシリコン層103が形成されている。   A polysilicon oxide layer 103 as an impurity diffusion preventing film, which is a feature of the present invention, is formed on a part of the lower surface side of the polysilicon layer 102.

そして、ポリシリコン層102のうち酸化ポリシリコン層103の部分を除く残りの部分には、リンなどの不純物が導入され低抵抗化が図られている。   The remaining portion of the polysilicon layer 102 excluding the portion of the oxidized polysilicon layer 103 is doped with impurities such as phosphorus to reduce the resistance.

次に、上記のフォトダイオード101の製造方法を図2〜図6に示す。尚、図2〜図6は工程順を示す断面図であり、図9〜図13と同一部分には同一符号を付す。   Next, a method for manufacturing the photodiode 101 is shown in FIGS. 2 to 6 are cross-sectional views showing the order of the steps, and the same parts as those in FIGS.

先ず、図2(a)に示すように、p型シリコン基板2の所定領域にヒ素を注入して、n型埋込層3を形成する。   First, as shown in FIG. 2A, arsenic is implanted into a predetermined region of the p-type silicon substrate 2 to form an n-type buried layer 3.

次に、図2(b)に示すように、n型エピタキシャル層4を成長させる。   Next, as shown in FIG. 2B, an n-type epitaxial layer 4 is grown.

次に、図2(c)に示すように、シリコン酸化膜14を成長させた後、その上に一般的なフォトリソグラフィ法を用いて、n型拡散層となる部分を開口したフォトレジストマスク15を形成後、シリコン酸化膜14をエッチングする。   Next, as shown in FIG. 2C, after a silicon oxide film 14 is grown, a photoresist mask 15 having an opening at a portion to become an n-type diffusion layer is formed thereon using a general photolithography method. After forming, the silicon oxide film 14 is etched.

次に、図3(d)に示すように、シリコン酸化膜14とフォトレジストマスク15をマスクとしてリンを注入後、高温アニール処理をしてn型拡散層6を形成する。   Next, as shown in FIG. 3D, phosphorus is implanted using the silicon oxide film 14 and the photoresist mask 15 as a mask, and then high-temperature annealing is performed to form the n-type diffusion layer 6.

その後、フォトレジストマスク15とシリコン酸化膜14を順次、除去する。   Thereafter, the photoresist mask 15 and the silicon oxide film 14 are sequentially removed.

次に、図3(e)に示すように、表面に薄いシリコン酸化膜8を成長させた後、その上に一般的なフォトリソグラフィ法を用いて、p型素子分離層となる部分を開口したフォトレジストマスク16を形成してボロンを注入し、p型素子分離層5を形成する。尚、シリコン酸化膜8は、上下を絶縁分離するとともに不純物注入時のダメージを減少させる目的で形成する。。   Next, as shown in FIG. 3E, after a thin silicon oxide film 8 is grown on the surface, a portion that becomes a p-type element isolation layer is opened thereon by using a general photolithography method. A photoresist mask 16 is formed and boron is implanted to form the p-type element isolation layer 5. The silicon oxide film 8 is formed for the purpose of insulating the upper and lower sides and reducing damage during impurity implantation. .

その後、フォトレジストマスク16を除去する。   Thereafter, the photoresist mask 16 is removed.

次に、図4(f)に示すように、一般的なフォトリソグラフィ法を用いて、p型拡散層となる部分を開口したフォトレジストマスク17を形成し、リンを注入してp型拡散層7を形成する。   Next, as shown in FIG. 4F, using a general photolithography method, a photoresist mask 17 having an opening at a portion to become a p-type diffusion layer is formed, and phosphorus is implanted to form a p-type diffusion layer. 7 is formed.

その後、フォトレジストマスク17を除去する。   Thereafter, the photoresist mask 17 is removed.

次に、図4(g)に示すように、化学気相成長(CVD)法によりポリシリコン膜102aを形成する。ここで、ポリシリコン膜102aを成長させる初期段階において、反応ガス中に酸化層を形成可能な量の酸素を一時的に添加する。これにより、ポリシリコン膜102aの下面側の一部に酸化ポリシリコン膜103aが形成される。   Next, as shown in FIG. 4G, a polysilicon film 102a is formed by chemical vapor deposition (CVD). Here, in an initial stage of growing the polysilicon film 102a, an amount of oxygen capable of forming an oxide layer is temporarily added to the reaction gas. As a result, a polysilicon oxide film 103a is formed on a part of the lower surface side of the polysilicon film 102a.

次に、図5(h)に示すように、ポリシリコン膜102aに熱拡散法(または、イオン打ち込み法)などを用いてリンを導入し、外部ノイズを素早くグランド電位に落とせるように低抵抗化を図る。尚、このとき、ポリシリコン膜102aの下面側の一部には不純物拡散防止膜としての酸化ポリシリコン膜103aが形成されているため、リンが下地へ拡散する心配がない。   Next, as shown in FIG. 5H, phosphorus is introduced into the polysilicon film 102a using a thermal diffusion method (or ion implantation method) or the like, and the resistance is lowered so that external noise can be quickly dropped to the ground potential. Plan. At this time, since the polysilicon film 103a as an impurity diffusion preventing film is formed on a part of the lower surface side of the polysilicon film 102a, there is no fear that phosphorus diffuses into the base.

次に、図5(i)に示すように、ポリシリコン膜を一般的なフォトリソグラフィ法およびエッチング法を用いてパターニングし透光性導電膜としてのポリシリコン層102および酸化ポリシリコン膜103を形成する。   Next, as shown in FIG. 5I, the polysilicon film is patterned using a general photolithography method and etching method to form a polysilicon layer 102 and a polysilicon oxide film 103 as a light-transmitting conductive film. To do.

次に、図6(j)に示すように、ポリシリコン層102を含む表面に窒化シリコン膜10を形成した後、一般的なフォトリソグラフィ法およびエッチング法を用いて、この窒化シリコン膜10やシリコン酸化膜8にコンタクトホールを設け、このコンタクトホールを通してn型拡散層6,p型拡散層7に、それぞれ接続する電極11a,11bや、ポリシリコン層102に接続する電極11cなどを形成する。   Next, as shown in FIG. 6J, after the silicon nitride film 10 is formed on the surface including the polysilicon layer 102, this silicon nitride film 10 and silicon are etched by using a general photolithography method and etching method. Contact holes are formed in the oxide film 8, and electrodes 11a and 11b connected to the n-type diffusion layer 6 and the p-type diffusion layer 7 and electrodes 11c connected to the polysilicon layer 102 are formed through the contact holes, respectively.

最後に、図6(k)に示すように、電極11a,11b,11cを含む表面に窒化シリコン膜12を形成し、一般的なフォトリソグラフィ法およびエッチング法を用いて、この窒化シリコン膜12にコンタクトホールを設け、窒化シリコン膜12上に遮光用アルミニウム13を形成するとともに、このコンタクトホールを通して遮光用アルミニウム13と電極11cとを電気的に接続して完成する。   Finally, as shown in FIG. 6 (k), a silicon nitride film 12 is formed on the surface including the electrodes 11a, 11b, and 11c, and this silicon nitride film 12 is formed using a general photolithography method and etching method. A contact hole is provided, and the light shielding aluminum 13 is formed on the silicon nitride film 12, and the light shielding aluminum 13 and the electrode 11c are electrically connected through the contact hole to complete.

尚、上記の例では、ポリシリコン膜102aの成長の初期段階に酸素を添加し、下面側の一部に酸化ポリシリコン層103aを形成することで説明したが、酸素の添加のタイミングは特にこれに限るものではなく、図7(a)に示すように、ポリシリコン膜の成長の中間段階に酸素を添加して、ポリシリコン層102の中間の一部に酸化ポリシリコン層103を形成することもできる。   In the above example, oxygen is added at the initial stage of the growth of the polysilicon film 102a and the oxidized polysilicon layer 103a is formed on a part of the lower surface side. As shown in FIG. 7A, oxygen is added to an intermediate stage of the growth of the polysilicon film to form a polysilicon oxide layer 103 in a part of the middle of the polysilicon layer 102 as shown in FIG. You can also.

また、図7(b)に示すように、ポリシリコン膜の成長の初期段階と中間段階に酸素を添加し、ポリシリコン層102の下面側の一部および中間の一部に2層の酸化ポリシリコン層103を形成することもできる。このようにすると不純物拡散防止膜としての効果が向上する。   Further, as shown in FIG. 7B, oxygen is added to the initial stage and the intermediate stage of the growth of the polysilicon film, and two layers of oxidized poly oxide are formed on a part of the lower surface side of the polysilicon layer 102 and a part of the middle. A silicon layer 103 can also be formed. This improves the effect as an impurity diffusion preventing film.

また、上記の例では、シリコン基板に形成したフォトダイオードを用いて説明したが、特にこれに限るものではなく、GaAs等の化合物半導体基板に形成したフォトダイオードであってもよく、また、受光素子としては、フォトダイオードに限らずフォトトランジスタなどでも同様の効果が得られることは言うまでもない。   In the above example, the photodiode formed on the silicon substrate has been described. However, the present invention is not limited to this, and may be a photodiode formed on a compound semiconductor substrate such as GaAs. Needless to say, the same effect can be obtained not only with a photodiode but also with a phototransistor or the like.

透光性導電膜に導入する低抵抗化のための不純物が下地へ拡散することを防止できる受光素子及びその製造方法に適用できる。   The present invention can be applied to a light receiving element that can prevent an impurity for reducing resistance introduced into a light-transmitting conductive film from diffusing into a base and a manufacturing method thereof.

本発明の受光素子の一例としてのフォトダイオードの断面図Sectional drawing of the photodiode as an example of the light receiving element of this invention 本発明の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the light receiving element of this invention 本発明の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the light receiving element of this invention 本発明の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the light receiving element of this invention 本発明の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the light receiving element of this invention 本発明の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the light receiving element of this invention 本発明の受光素子の一例としてのフォトダイオードの変形例の断面図Sectional drawing of the modification of the photodiode as an example of the light receiving element of this invention 従来の受光素子の一例としてのフォトダイオードの断面図Cross-sectional view of a photodiode as an example of a conventional light receiving element 従来の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the conventional light receiving element 従来の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the conventional light receiving element 従来の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the conventional light receiving element 従来の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the conventional light receiving element 従来の受光素子の一例としてのフォトダイオードの製造方法の工程順を示す断面図Sectional drawing which shows the process order of the manufacturing method of the photodiode as an example of the conventional light receiving element

符号の説明Explanation of symbols

1 従来の受光素子の一例としてのフォトダイオード
2 p型シリコン基板
3 n型埋込層
4 n型エピタキシャル層
5 p型素子分離層
6 n型拡散層
7 p型拡散層
8,14 シリコン酸化膜
9 ポリシリコン層
9a ポリシリコン膜
10 窒化シリコン膜
11a,11b,11c 電極
12 窒化シリコン膜
13 遮光用アルミニウム
15,16,17 フォトレジストマスク
101 本発明の受光素子の一例としてのフォトダイオード
102 ポリシリコン層
102a ポリシリコン膜
103 酸化ポリシリコン層
103a 酸化ポリシリコン膜
DESCRIPTION OF SYMBOLS 1 Photodiode as an example of a conventional light receiving element 2 p-type silicon substrate 3 n-type buried layer 4 n-type epitaxial layer 5 p-type element isolation layer 6 n-type diffusion layer 7 p-type diffusion layer 8, 14 Silicon oxide film 9 Polysilicon layer 9a Polysilicon film 10 Silicon nitride film 11a, 11b, 11c Electrode 12 Silicon nitride film 13 Light shielding aluminum 15, 16, 17 Photoresist mask 101 Photodiode 102 as an example of light receiving element of the present invention 102 Polysilicon layer 102a Polysilicon film 103 Oxide polysilicon layer 103a Oxide polysilicon film

Claims (8)

定電位ラインと電気的に接続し外部ノイズを遮断する低抵抗化のための不純物を含んだ透光性導電膜を備えた受光素子において、前記透光性導電膜は、前記不純物が下地に拡散することを防止するための少なくとも1層以上の酸化層をその内部に有することを特徴とする受光素子。   In a light receiving element including a light-transmitting conductive film containing impurities for reducing resistance, which is electrically connected to a constant potential line and blocks external noise, the light-transmitting conductive film diffuses into the ground. A light-receiving element having at least one oxide layer for preventing it from being formed therein. 前記酸化層は、前記透光性導電膜の下面側の一部または中間の一部に形成されたことを特徴とする請求項1に記載の受光素子。   2. The light receiving element according to claim 1, wherein the oxide layer is formed on a part of the lower surface side of the translucent conductive film or a part of an intermediate part thereof. 前記酸化層は、前記透光性導電膜の下面側の一部および中間の一部に形成されたことを特徴とする請求項1に記載の受光素子。   The light receiving element according to claim 1, wherein the oxide layer is formed on a part of the lower surface side and a part of the middle of the translucent conductive film. 前記透光性導電膜は、ポリシリコンで成り、前記酸化膜は、酸化ポリシリコンで成ることを特徴とする請求項1から3のいずれか1項に記載の受光素子。   4. The light receiving element according to claim 1, wherein the translucent conductive film is made of polysilicon, and the oxide film is made of polysilicon oxide. 5. 定電位ラインと電気的に接続し外部ノイズを遮断する低抵抗化のための不純物を含んだ透光性導電膜を備えた受光素子の製造方法において、前記透光性導電膜は化学気相成長法で形成し、その化学気相成長の際、前記透光性導電膜を成長させる反応ガス中に一時的に酸素を添加して前記透光性導電膜の内部に少なくとも1層以上の酸化層を形成し、かつ、前記透光性導電膜形成後に低抵抗化のための不純物を前記透光性導電膜に導入することを特徴とする受光素子の製造方法。   In a method of manufacturing a light receiving element including a light transmissive conductive film containing impurities for reducing resistance, which is electrically connected to a constant potential line and blocks external noise, the light transmissive conductive film is formed by chemical vapor deposition. At the time of the chemical vapor deposition, oxygen is temporarily added to a reaction gas for growing the translucent conductive film, and at least one oxide layer is formed inside the translucent conductive film And an impurity for reducing resistance is introduced into the light-transmitting conductive film after forming the light-transmitting conductive film. 前記酸素の添加は、前記透光性導電膜の成長の初期段階または中間段階に行うことを特徴とする請求項5に記載の受光素子の製造方法。   6. The method for manufacturing a light receiving element according to claim 5, wherein the addition of oxygen is performed at an initial stage or an intermediate stage of the growth of the light-transmitting conductive film. 前記酸素の添加は、前記透光性導電膜の成長の初期段階および中間段階に行うことを特徴とする請求項5に記載の受光素子の製造方法。   The method for manufacturing a light receiving element according to claim 5, wherein the addition of oxygen is performed in an initial stage and an intermediate stage of the growth of the translucent conductive film. 前記透光性導電膜はポリシリコンで形成し、前記酸化層は前記ポリシリコンを酸化させて得る酸化ポリシリコンで形成することを特徴とする請求項5から7のいずれか1項に記載の受光素子の製造方法。   8. The light receiving device according to claim 5, wherein the translucent conductive film is made of polysilicon, and the oxide layer is made of oxidized polysilicon obtained by oxidizing the polysilicon. 9. Device manufacturing method.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012089796A (en) * 2010-10-22 2012-05-10 Asahi Kasei Electronics Co Ltd Light-receiving element, method of manufacturing light-receiving element, and semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125674A (en) * 1983-01-07 1984-07-20 Toshiba Corp Photocoupling semiconductor device
JPS63281478A (en) * 1987-05-13 1988-11-17 Sharp Corp Semiconductor light receiving device
JPS642353A (en) * 1987-06-25 1989-01-06 Toshiba Corp Semiconductor device
JPH0485885A (en) * 1990-07-26 1992-03-18 Nec Corp Photocoupler
JPH08278193A (en) * 1995-04-07 1996-10-22 Mitsubishi Electric Corp Infrared detecting element and manufacture thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125674A (en) * 1983-01-07 1984-07-20 Toshiba Corp Photocoupling semiconductor device
JPS63281478A (en) * 1987-05-13 1988-11-17 Sharp Corp Semiconductor light receiving device
JPS642353A (en) * 1987-06-25 1989-01-06 Toshiba Corp Semiconductor device
JPH0485885A (en) * 1990-07-26 1992-03-18 Nec Corp Photocoupler
JPH08278193A (en) * 1995-04-07 1996-10-22 Mitsubishi Electric Corp Infrared detecting element and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012089796A (en) * 2010-10-22 2012-05-10 Asahi Kasei Electronics Co Ltd Light-receiving element, method of manufacturing light-receiving element, and semiconductor device

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