JP2005191783A - Display device and drive method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent an increase in the number of scanning lines, even if several kinds of compensation circuits are added to a transistor used for current drive of a light-emitting element in a source follower circuit structure, with respect to a display device and its drive method, especially for a current drive self-luminous display device, such as an organic electroluminescence display device or the like. <P>SOLUTION: As to a transistor TR2 for applying current drive to a light-emitting element 12 in a source follower circuit structure, the terminal voltage of a signal holding capacitor C2 located between the gate and source of the transistor TR2 is set to provide the tone of the light emitting element 12. When the tone is set, a switch circuit TR3 for connecting the source-side end of the capacitor C2 to a reference voltage and a switch circuit TR1 for connecting the capacitor C2 to a signal line SIG are controlled by the same control signal ds2. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device and a display device driving method, and can be applied to a self-luminous display device driven by current, such as a display device using organic EL (Electro Luminescence). The present invention sets the terminal voltage of a signal level holding capacitor provided between the gate and the source of a transistor that current-drives the light-emitting element with a source follower circuit configuration, thereby adjusting the gradation of the light-emitting element. By setting the gradation control, the switch circuit that connects the source side end of the capacitor to the reference voltage and the switch circuit that connects the capacitor to the signal line are controlled by the same control signal. Even if various correction circuits are provided in the transistor for current-driving the light emitting element with the source follower circuit configuration, an increase in the number of scanning lines can be prevented.

  Conventionally, in organic EL display devices, various applications to display devices have been proposed, for example, in US Pat. No. 5,684,365 and JP-A-8-234683.

  That is, as shown in FIG. 13, in this type of display device 1, the display unit 2 has scanning lines SCN provided in a horizontal direction in units of lines with respect to pixels (PX) 3 arranged in a matrix. A signal line SIG is provided in the vertical direction for each column so as to be orthogonal to the scanning line SCN. For the display unit 2 formed in this way, the display device 1 drives the scanning lines SCN by the vertical drive circuit 4 to sequentially select the pixels 3 of the display unit 2 in line units, and this pixel 3 The gray level of each pixel 3 is set by driving the signal line SIG by the horizontal drive circuit 5 so as to correspond to the selection.

  For this reason, the vertical drive circuit 4 generates a write signal ws for sequentially instructing writing to each pixel 3 in line units by the write scan circuit (WSCN) 4A, and outputs the write signal ws to the scan line SCN. The setting of gradation in the pixel 3 is controlled. The horizontal drive circuit 5 generates a drive signal in accordance with the gradation data D1 indicating the gradation of each pixel 3, distributes this drive signal to each signal line SIG by the horizontal selector (HSEL) 5A, and outputs it. Thus, the display device 1 is configured to set the gradation of each pixel 3 in line units.

  In the organic EL display device, each pixel 3 driven in this manner includes an organic EL element that is a self-luminous element driven by current driving, and a driving circuit (hereinafter referred to as a pixel driving circuit) that drives the organic EL element. (Referred to as a pixel circuit).

  In the display device thus formed, each pixel circuit is formed by an n-channel MOS type TFT (Thin Film Transistor), and the anode of the organic EL element is connected to the transistor. By driving with current, an organic EL element and a pixel circuit can be integrally formed on a glass substrate by applying an amorphous silicon process. As a result, as shown in FIG. It is conceivable to drive the element 12.

  That is, the display device 11 shown in FIG. 14 is formed in each pixel 3 so that the organic EL element 12 is current-driven by the transistor TR2 having a source follower circuit configuration in which the source is connected to the anode of the organic EL element 12. A signal level holding capacitor C1 is provided at the gate of the transistor TR2. Here, one end of the signal level holding capacitor C1 is connected to the gate of the transistor TR2, and the other end is connected to a reference voltage. In the example of FIG. 6, this reference voltage is set to the power supply voltage Vcc. The display device 11 outputs the write signal ws from the write scan circuit 4A provided in the vertical drive circuit 4, and this signal level holding capacitor C1 by the switch circuit by the transistor TR1 that is turned on by the write signal ws. Is connected to the signal line SIG, whereby the gate voltage Vg of the transistor TR2 is set according to the signal level of the drive signal output to the signal line SIG in response to the write signal ws. As a result, the display device 11 drives the organic EL element 12 with a current corresponding to the gate voltage Vg set in this way, and emits the organic EL element 12 of each pixel 3 with a gradation corresponding to the gradation data D1. Thus, a desired image can be displayed.

  However, in the organic EL element, as shown in FIG. 15, the current-voltage characteristic changes in a direction in which current hardly flows by use. In FIG. 15 and FIG. 16, symbol L1 indicates an initial characteristic, and symbol L2 indicates a characteristic due to a change with time. On the other hand, in the driving by the sofa follower circuit described above with reference to FIG. 14, as shown in FIG. 16, the characteristic curve due to the load intersects the characteristic curve of the drain-source voltage Vds−drain source current Ids of the transistor TR2. The intersecting point becomes the operating point. Accordingly, in the organic EL element, when the voltage-current characteristic is changed, the current flowing through the organic EL element is reduced correspondingly, thereby causing a problem that the luminance of each pixel is gradually lowered.

As one method for solving this problem, a method of controlling the drive current of the organic EL element 12 by setting the gradation by the gate-source voltage Vgs instead of the gradation setting by the gate voltage Vg can be considered. That is, in the drain current Ids of the TFT, it is expressed by (1/2) × μ × (W / L) Cox (Vgs−Vth) ² (1), thereby setting the gradation by the gate-source voltage Vgs. Thus, it is possible to prevent a change in drive current due to a change with time. Here, μ is the carrier mobility, W is the gate width, L is the gate length, Cox is the gate capacitance per unit area, and Vth is the threshold voltage.

  Therefore, as shown in FIG. 17 in comparison with FIG. 14, in each pixel 23, the signal level is held between the gate and source of this transistor TR2 instead of the arrangement of the capacitor C1 for holding the signal level at the gate of the transistor TR2. The capacitor C2 is disposed, and the terminal voltage of the signal level holding capacitor C2 is set according to the signal level of the signal line SIG. In addition, a transistor TR3 that is turned on by the drive scan signal ds is connected to the source of the transistor TR2, and the transistor TR3 is set during a period in which the terminal voltage of the signal level holding capacitor C2 is set by the signal level of the signal line SIG. Thus, the source potential of the transistor TR2 is set to a constant potential. In FIG. 17, this constant potential is the ground potential.

  Corresponding to the configuration of the display unit 22 with such pixels 23, the vertical drive circuit 24 outputs the write signal ws by the write scan circuit 24A in addition to the write scan circuit 24A that outputs the write signal ws. A drive scan circuit (DSCN) 24B that outputs the drive scan signal ds1 in synchronization is provided. The horizontal drive circuit 25 generates drive signals so as to correspond to these configurations.

  Further, the transistor TR3 has its gate connected to the power supply voltage Vcc by a switch circuit by the transistor TR4, and the transistor TR4 controls the power supply Vcc of the transistor TR2 during the period in which the transistor TR2 sets the source potential of the transistor TR2 to a constant potential. Thus, the through current flowing from the power source Vcc to the ground via the transistors TR2 and TR3 is prevented. Corresponding to the configuration of the pixel 23, the vertical drive circuit 24 further includes a second drive scan circuit (DSCN2) 24C. The transistor TR4 is synchronized with the output of the write signal ws from the write scan circuit 24A. A drive scan signal ds2 for on / off control is output.

  According to the configuration shown in FIG. 17, as shown in FIGS. 18A to 18E, the transistor TR4 is controlled to be turned on / off by the drive scan signal ds2, thereby controlling the power supply to the transistor TR2. Light emission and non-light emission of the pixel can be controlled by the drive scan signal ds2 (FIG. 18C). When the power supply to the transistor TR2 is stopped by the transistor TR4, the source potential Vs of the transistor TR2 gradually falls to the threshold voltage of the organic EL element 12 due to the discharge of the charge through the organic EL element 12 (FIG. 18 (E)), the drive signal ds1 is raised here, and the transistor TR3 sets the source potential Vs of the transistor TR2 to the ground potential which is the reference potential (FIGS. 18B and 18E), and then the write signal ws. By connecting the signal line SIG to the gate of the transistor TR2 by rising, the potential of the signal line SIG can be correctly set in the signal level holding capacitor C2 (FIGS. 18A, 18D, 18D). E)). Thus, the write signal ws, the drive scan signal ds1, and the drive scan signal ds2 are sequentially lowered, and the organic EL element 12 is driven by the drive current corresponding to the signal level of the signal line SIG set in the signal level holding capacitor C2. It is possible to prevent a change in luminance due to a change with time of the organic EL element 12. 19A to 19F are connection diagrams showing settings of the transistors TR1 to TR4 corresponding to the periods TA to TF in FIG.

  However, as shown in FIG. 20, in a color display device, in general, for each of the red, green, and blue pixels (PXR), (PXG), and (PXB) 23, the light emission and non-light emission periods are controlled. By setting the balance, when the gradation of each pixel 23 is controlled by the write signal ws, the drive scan signal ds1, and the drive scan signal ds2, as described above, the drive pulse signal ds2 is supplied for each pixel 23 of each color. As a whole, it is necessary to provide five scanning lines SCN, SCN1, SCN2R, SCN2G, and SCN2B.

  Accordingly, in the configuration described above, the number of scanning lines in the display unit 22 is increased, which makes it difficult to lay out the display unit 22 and to increase the resolution. In particular, in the case where these transistors are formed using amorphous silicon, it is difficult to achieve higher resolution due to the low mobility.

  Further, as can be seen from the above-described equation (1) in the configuration of FIG. 17, even when the change with time due to the organic EL element 12 is prevented in this way, when the threshold voltage Vth of the transistor TR2 varies. Accordingly, the drive current in each pixel 23 varies, and the image quality deteriorates. As a method for preventing such image quality deterioration due to the variation in the threshold voltage Vth of the transistor TR2, the threshold of the transistor TR2 is set in advance when the signal level of the signal line SIG is set in the signal level holding capacitor C2. A method of setting the value voltage Vth in the capacitor C2 for holding the signal level is conceivable.

  That is, in this case, as shown in FIG. 21 by comparison with FIG. 17, the signal level of the signal line SIG is set by the transistor TR1 via the capacitor Cs1 with respect to the signal level holding capacitor Cs2 provided between the gate and source of the transistor TR2. As described above, a switch circuit by a transistor TR5 that short-circuits the gate and drain of the transistor TR2 to switch the transistor TR2 to a diode connection, and a switch circuit by a transistor TR6 that sets the transistor TR1 side end of the capacitor Cs1 to a reference potential are provided. Thereby, in this display device 31, the terminal voltage of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG via the capacitor Cs1 by the transistor TR1. In this case, the voltage between the terminals of the signal level holding capacitor Cs2 due to the connection to the signal line SIG via the capacitor Cs1 is the voltage ΔVin = Vin obtained by dividing the signal level Vin of the signal line SIG by the capacitors Cs1 and Cs2. It will rise by (Cs1 / (Cs1 + Cs2)). Accordingly, the signal line SIG is driven by the horizontal drive circuit 35 in consideration of this relational expression.

  Accordingly, as shown in FIGS. 22 and 23, in this case as well, in the pixel 33, the organic EL element 12 is driven by the transistor TR2 by the gate-source voltage Vgs based on the voltage set in the signal level holding capacitor Cs2. Thus, image quality deterioration due to a change with time of the organic EL element 12 is prevented (FIGS. 22D to 22F and FIG. 23A).

  Thus, immediately before the terminal voltage of the capacitor Cs2 for holding the signal level is set by the signal level Vin of the signal line SIG, the display device 31 sets the transistor TR5 to the ON state by the control signal az and makes the transistor TR2 a diode. At the same time, the signal line side end of the coupling capacitor Cs1 is held at a predetermined reference potential (FIGS. 22B and 23B), and then the drive pulse signals ds1 and ds2 are switched to thereby convert the transistor The source of TR2 is set to the reference potential, and the supply of power to the transistor TR2 is stopped (FIGS. 22C, 22D, and 23C).

  As a result, in the transistor TR2, the gate voltage Vg that has risen temporarily decreases gradually, and when the gate-source voltage Vgs reaches the threshold voltage Vth, the decrease in the gate voltage Vg is stopped, thereby maintaining the signal level. The threshold voltage Vth of the transistor TR2 is set in the capacitor Cs2 (FIGS. 22E and 22F).

  As a result, the control signal az is switched to disconnect the signal line side end of the coupling capacitor Cs1 from the reference voltage, and after the diode connection of the transistor TR2 is stopped, the write signal ws is raised and the signal line SIG is passed through the capacitor Cs1. The terminal voltage of the signal level holding capacitor Cs2 is set by the signal level Vin. As a result, the signal level holding capacitor Cs2 is corrected by the threshold voltage Vth of the transistor TR2, and a voltage corresponding to the signal level of the signal line SIG is set. In the transistor TR2, the capacitor Cs2 is set. The organic EL element 12 is current-driven by the gate-source voltage Vgs due to the voltage (FIG. 23E), and variations due to the threshold voltage of the transistor TR2 can be prevented.

  Corresponding to the configuration of these pixels 33, in the display device 31, a write scan circuit 34A that outputs a write signal ws, a drive scan signal ds1, and a drive scan signal ds2 that output a write signal ws to the vertical drive circuit 34, respectively. 24B and 24C are provided, and an auto-zero circuit (ZERO) 34D that outputs a control signal az of the transistors TR5 and TR6 related to the correction of the threshold voltage Vth is provided. In the horizontal drive circuit 35, the horizontal selector 35A outputs a drive signal to each signal line SIG.

In this way, even when the threshold voltage Vth of the transistor TR2 that drives the organic EL element 12 varies, it is possible to prevent image quality deterioration due to this variation. However, in this case, as shown in FIG. 24, the number of scanning lines further increases.
USP 5,684,365 JP-A-8-234683

  The present invention has been made in consideration of the above points, and even if various correction circuits are provided in a transistor for current-driving a light emitting element by a source follower circuit configuration, an increase in the number of scanning lines can be prevented. It is intended to propose a display device that can be used and a method for driving the display device.

  In order to solve such a problem, in the invention of claim 1, the pixel is applied to a display device having a display unit in which pixels driven by current drive are arranged in a matrix and a drive circuit for driving the display unit. A light emitting element, a transistor for driving the light emitting element by a source follower circuit configuration, a signal level holding capacitor provided between the gate and source of the transistor, and a reference voltage switch circuit for connecting the source of the transistor to the reference voltage The signal line switch circuit for connecting the gate of the transistor to the signal line, and the drive circuit drives the reference voltage switch circuit and the signal line switch circuit to drive the signal level according to the signal level of the signal line. Set the terminal voltage of the capacitor for holding, and gate source by the terminal voltage of the capacitor for holding the signal level The current drive of the light emitting element with the transistor by the voltage, in the setting of the terminal voltage of the capacitor for holding the signal level, the control of the switch circuit for the signal line and the switch circuit for the reference voltage is executed by a common control signal, The connection of the signal line to the gate of the transistor by the switch circuit for the signal line and the connection to the source of the transistor to the reference voltage by the switch circuit for the reference voltage are performed simultaneously.

  According to a seventh aspect of the present invention, the pixel is applied to a display device in which pixels driven by current are arranged in a matrix. The pixel includes a light emitting element, a transistor for driving the light emitting element by a source follower circuit configuration, A signal level holding capacitor provided between the gate and the source; a signal line switch circuit for setting the terminal voltage of the signal level holding capacitor according to the signal level of the signal line by connecting the gate of the transistor to the signal line; For the reference voltage that operates by the control signal of the signal line switch circuit and connects the source of the transistor to the reference voltage during the period of setting the terminal voltage of the signal level holding capacitor by the signal line switch circuit The switch circuit is provided.

  According to a tenth aspect of the present invention, the pixel is applied to a display device in which pixels of an organic EL element are arranged in a matrix, and the pixel includes an organic EL element and a transistor that drives the organic EL element by a source follower circuit configuration. A signal level holding capacitor provided between the gate and source of the transistor and a signal line for setting the terminal voltage of the signal level holding capacitor by the signal level of the signal line by connecting the gate of the transistor to the signal line The transistor source is connected to the reference voltage during a period in which the terminal voltage of the capacitor for holding the signal level is set by the switch circuit for the signal line by the control signal of the switch circuit and the switch circuit for the signal line. A switch circuit for a reference voltage.

  According to a thirteenth aspect of the present invention, in a driving method of a display device having a display unit in which pixels driven by current driving are arranged in a matrix, the pixel is a transistor that drives the light emitting element by a light emitting element and a source follower circuit configuration. A signal level holding capacitor provided between the gate and source of the transistor, a power supply switch circuit for stopping supply of power to the transistor, and a reference voltage switch circuit for connecting the source of the transistor to the reference voltage And a signal line switch circuit for connecting the gate of the transistor to the signal line, and the display device is driven by driving the reference voltage switch circuit and the signal line switch circuit. The terminal voltage of the signal level holding capacitor is set according to the level, and the signal level holding The light-emitting element is driven by a transistor using the gate-source voltage based on the terminal voltage of the capacitor, and the signal line switch circuit and the reference voltage switch circuit are commonly controlled in setting the terminal voltage of the signal level holding capacitor. The signal line switch circuit connects the signal line to the transistor gate and the reference voltage switch circuit connects the reference voltage to the transistor source at the same time.

  According to the structure of claim 1, the pixel is applied to a display device having a display unit in which pixels driven by current drive are arranged in a matrix and a drive circuit for driving the display unit, and the pixel includes a light emitting element and a source follower circuit. A transistor for driving the light-emitting element according to the configuration, a signal level holding capacitor provided between the gate and source of the transistor, a reference voltage switch circuit for connecting the source of the transistor to the reference voltage, and a gate of the transistor as a signal line The signal line switch circuit connected to the drive circuit, the drive circuit is driven by the reference voltage switch circuit and the signal line switch circuit, and the signal level holding capacitor terminal is driven by the signal level of the signal line. The voltage is set, and the transistor is set by the voltage between the gate and source by the terminal voltage of the capacitor for holding the signal level. If the current drive light emitting elements with data, even when the characteristics of the light-emitting element varies, can drive the light emitting device by the driving current due to the gate-source voltage corresponding to the signal level of the signal line. At this time, in setting the terminal voltage of the capacitor for holding the signal level, control of the switch circuit for the signal line and the switch circuit for the reference voltage is executed by a common control signal, and the signal line by the switch circuit for the signal line If the connection to the gate of the transistor and the connection to the source of the transistor to the reference voltage by the reference voltage switch circuit are performed simultaneously, the signal line switch circuit and the reference voltage switch circuit are formed by one scanning line. And the number of scanning lines can be reduced accordingly.

  Thus, according to the seventh aspect of the present invention, there is provided a display device capable of preventing an increase in the number of scanning lines even if various correction circuits are provided in the transistor for current-driving the light emitting element by the source follower circuit configuration. Can be provided.

  Further, according to the configuration of claim 10, even if various correction circuits are provided in the transistor for current driving the light emitting element by the source follower circuit configuration, the display by the organic EL that can prevent the number of scanning lines from increasing. An apparatus can be provided.

  According to the configuration of the thirteenth aspect of the present invention, even if various correction circuits are provided in the transistor for current driving the light emitting element by the source follower circuit configuration, it is possible to prevent an increase in the number of scanning lines. A method can be provided.

  According to the present invention, it is possible to prevent an increase in the number of scanning lines even if various correction circuits are provided in a transistor for current-driving a light emitting element with a source follower circuit configuration.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings as appropriate.

(1) Configuration of Embodiment FIG. 2 is a block diagram showing a display apparatus according to Embodiment 1 of the present invention in comparison with FIG. In the display device 41, the display unit 42 includes red, green, and blue pixels (PXR, PXG, PXB) 43 that are driven by current, arranged in a matrix, and four scanning lines SCN are provided for these pixels 43. , SCN2R, SCN2G, and SCN2B are provided in the horizontal direction in units of lines. A signal line SIG is provided in the vertical direction for each column so as to be orthogonal to these scanning lines SCN, SCN2R, SCN2G, and SCN2B. In contrast to the display unit 42 formed in this way, the display device 41 drives the scanning lines SCN, SCN2R, SCN2G, and SCN2B by the vertical drive circuit 44, and is sequentially provided in the pixel 43 in units of lines. The horizontal drive circuit 45 drives the signal line SIG so as to correspond to the control of the pixel circuit, and the gradation of each pixel 43 is set.

  Therefore, the vertical drive circuit 44 generates a write signal ws for sequentially instructing writing to each pixel 43 in line units by the write scan circuit (WSCN) 44A, and emits light from each pixel 43 in synchronization with the write signal ws. The drive scan signal ds2 for controlling the non-light emission is generated by the drive scan circuit (DSCN2) 44C, and the write signal ws and the drive scan signal ds2 are output to the scan lines SCN, SCN2R, SCN2G, and SCN2B. It is designed to control key settings. Further, in such control, the drive scan signal ds2 is generated for each of the red, green, and blue pixels 43 and is output to the scan lines SCN2R, SCN2G, and SCN2B of the corresponding pixels 43, thereby the display device 41. In this case, the color balance is adjusted by controlling light emission and non-light emission in each of the red, green, and blue pixels 43.

  In the horizontal drive circuit 45, a drive signal is generated according to the gradation data D1 indicating the gradation of each pixel 43, and this drive signal is distributed to each signal line SIG by a horizontal selector (HSEL) 45A and output. It is made like that.

  FIG. 1 is a connection diagram showing each pixel 43 of the display device 41 in comparison with FIG. In the pixel 43 according to the display device 41, the transistor TR1 is set to the ON state, and the transistor TR3 is set together with the write signal ws that sets the terminal voltage of the capacitor C2 for holding the signal level according to the signal level of the signal line SIG. And the source of the transistor TR2 is set to the reference potential. Thereby, in this embodiment, a control signal for setting the terminal voltage of the capacitor C2 for holding the signal level according to the signal level of the signal line SIG, and a control signal for setting the source of the transistor TR2 to the reference potential for this setting. Thus, the number of scanning lines can be reduced and the resolution can be easily increased. In addition, by sharing the control signal in this way, the process of setting the voltage across the capacitor C2 for holding the signal level according to the signal level of the signal line SIG, and the source of the transistor TR2 is set to the reference potential for this setting. The processing to be executed is executed simultaneously in parallel. The transistors TR1 to TR4 constituting the pixel 43 are n-channel MOS type TFTs, and are integrally formed on the glass substrate together with the horizontal drive circuit 44 and the vertical drive circuit 45 by an amorphous process.

  That is, as shown in FIG. 3 and FIG. 4, in this display device 41, the transistor TR2 is connected to the power source Vcc by the transistor TR4, whereby the transistor V2 is connected to the gate-source voltage Vgs by the terminal voltage of the signal level holding capacitor C2. The organic EL element 12 is current-driven by TR2 (FIG. 4A), and the transistor TR4 is disconnected from the power supply Vcc by the control of the transistor TR4 by the drive scan signal ds2 (FIG. 3B and FIG. 4). B)). Thereby, in the transistor TR2, the source voltage Vs gradually decreases to the threshold voltage Vth of the organic EL element 12 (FIG. 3C), and in conjunction with this, the gate voltage Vg also gradually decreases (FIG. 3). (D)).

  In the state where the supply of the power supply Vcc is stopped in this way, the write signal ws is raised in the corresponding horizontal scanning period (FIG. 3A), so that in the display device 41, the transistor TR1 is turned on. Instead, the gate of the transistor TR2 is connected to the signal line SIG, and the transistor TR3 is turned on, and the source of the transistor TR2 is connected to the reference potential (in this case, the ground potential) (FIG. 4C). ). Thereby, in this pixel 43, the source voltage Vs of the transistor TR2 falls from the threshold voltage Vth of the organic EL element 12 to the ground potential, and the gate voltage Vg of the transistor TR2 changes to the signal level Vin of the signal line SIG. As a result, the signal level Vin of the signal line SIG is correctly set in the signal level holding capacitor C2 connected to the gate source of the transistor TR2.

  As a result, in this pixel 43, after the transistors TR1 and TR3 are subsequently turned off, the transistor TR2 is connected to the power source Vcc by the transistor TR4, and the signal line SIG held in the signal level holding capacitor C2 is connected. Even when the organic EL element 12 is driven by the gate-source voltage Vgs corresponding to the signal level Vin, and the voltage-current characteristic of the organic EL element 12 is changed, a change in luminance of the organic EL element 12 can be effectively avoided. Accordingly, the number of scanning lines can be reduced to prevent image quality deterioration.

(2) Operation of Embodiment In the above configuration, the display device 41 (FIG. 2) is configured so that the pixels 43 of the display unit 42 are sequentially line-by-line by driving the scanning lines SCN, SCN2R, SCN2G, and SCN2B by the vertical drive circuit 44. The signal level of the signal line SIG that is selected and driven by the horizontal drive circuit 45 is set in each pixel 43 by the selection of the pixel 43. In the display device 41, each pixel 43 emits light according to the signal level set for each pixel 43, and a desired image is displayed.

  In the display device 41, in each pixel 43, a signal level holding capacitor C2 is provided between the gate and source of the transistor TR2 having a source follower circuit configuration for driving the organic EL element 12, and the transistor TR2 includes a switch circuit formed by the transistor TR3. By setting the source to the ground potential which is the reference voltage and connecting the gate of the transistor TR2 to the signal line SIG by the switch circuit by the transistor TR1, the signal level of the signal line SIG is a capacitor for holding the signal level. Set to C2. Further, the organic EL element 12 is driven by the transistor TR2 by the gate-source voltage Vgs by the signal level holding capacitor C2 set in this way.

  Thereby, in this display device 41, even when the characteristics of the organic EL element 12 change with time, the organic EL element 12 can be driven by current driving according to the gradation data D1. Further, the organic EL element 12 can be driven from the anode side by a source follower circuit using an n-channel MOS type TFT transistor.

  When the signal level of the signal line SIG is set in the signal level holding capacitor C2 in this way, in this display device 41, the connection by the transistor TR4 to the reference potential of the source of the transistor TR2 and the gate of the transistor TR2 are connected. The connection to the signal line SIG by the transistor TR1 is simultaneously performed by controlling the transistors TR1 and TR4 with a common control signal, thereby preventing an increase in the scanning line, and reliably with the time-dependent change of the organic EL element 12. Degradation of image quality is prevented.

  Further, when the terminal voltage of the signal level holding capacitor C2 is set by the signal level Vin of the signal line SIG in this way, the supply of the power source Vcc to the transistor TR2 is stopped by the transistor TR4. During the period in which the terminal voltage of the signal level holding capacitor C2 is set by the signal level Vin of the signal line SIG, current consumption by the transistor TR2 can be prevented, and power consumption can be reduced correspondingly.

(3) Effects of the embodiment According to the above configuration, the terminal voltage of the signal level holding capacitor provided between the gate and the source of the light emitting element is driven by the source follower circuit configuration. A switch circuit for connecting the source side end of the capacitor to a reference voltage, and a switch circuit for connecting the capacitor to a signal line. Is controlled by the same control signal, it is possible to prevent an increase in the number of scanning lines even if various correction circuits are provided in the transistor for current-driving the light emitting element by the source follower circuit configuration. As a result, the resolution can be easily increased, the configuration of the vertical drive circuit and the like can be simplified, the overall configuration can be simplified correspondingly, and the so-called narrow frame can be further reduced.

  At this time, the power supply switch circuit that stops the power supply to the transistor is used to stop the power supply to the transistor, and then the terminal voltage of the signal level holding capacitor is set to drive the light emitting element. It is possible to reduce power consumption by preventing wasteful power consumption during periods when the power is not spent.

  Further, when the transistor, the reference voltage switch circuit, and the signal line switch circuit are formed of n-channel MOS transistors, they can be integrally formed on the glass substrate.

  FIG. 5 is a block diagram showing a display apparatus according to the second embodiment of the present invention in comparison with FIG. In the display device 51, the display unit 52 includes red, green, and blue pixels (PXR, PXG, PXB) 53 formed of organic EL elements in a matrix, and five scanning lines are provided for these pixels 53. SCN, SCN2R, SCN2G, SCN2B, and SCN3 are provided in the horizontal direction in units of lines. A signal line SIG is provided in the vertical direction for each column so as to be orthogonal to these scanning lines SCN, SCN2R, SCN2G, SCN2B, and SCN3. With respect to the display unit 42 formed in this way, the display device 41 is provided in the pixels 53 sequentially in line units by driving the scanning lines SCN, SCN2R, SCN2G, SCN2B, and SCN3 by the vertical drive circuit 54. The operation of the pixel circuit is controlled, and the signal line SIG is driven by the horizontal drive circuit 55 so as to correspond to the control of the pixel circuit, and the gradation of each pixel 53 is set.

  Therefore, the vertical drive circuit 54 generates a write signal ws for sequentially instructing writing to each pixel 53 in line units by the write scan circuit (WSCN) 54A, and emits light from each pixel 53 in synchronization with the write signal ws. A drive scan signal ds2 for controlling non-light emission and a control signal az for instructing correction of the threshold voltage Vth of the EL element are generated by a drive scan circuit (DSCN2) 54C and an auto zero circuit (ZERO) 54D, respectively, and these write signals The ws, the drive scan signal ds2, and the control signal az are output to the scan lines SCN, SCN2R, SCN2G, SCN2B, and SCN3 to control the gradation setting in each pixel 53. In such a control, the drive scan signal ds2 is generated for each of the red, green, and blue pixels 53 and is output to the corresponding scan lines SCN2R, SCN2G, and SCN2B of the pixel 53, thereby the display device 51. In this case, the color balance is adjusted by controlling light emission and non-light emission in each of the red, green, and blue pixels 53. In the horizontal drive circuit 55, a drive signal is generated according to the gradation data D1 indicating the gradation of each pixel 53, and this drive signal is distributed to each signal line SIG by a horizontal selector (HSEL) 55A and output. It is made like that.

  FIG. 6 is a connection diagram showing each pixel 53 of the display device 51 in comparison with FIG. In the pixel 53 according to the display device 51, a configuration for correcting the threshold voltage of the transistor TR2 described above with reference to FIG. 21 is added to the configuration of the pixel circuit 43 described with reference to the first embodiment. That is, in the pixel 53, in addition to the configuration of the pixel 43 described in connection with the first embodiment, a switch circuit is provided by a transistor TR5 in which the gate and drain of the transistor TR2 are short-circuited and the transistor TR2 is diode-connected. Further, a coupling capacitor Cs1 is provided between the switch circuit of the signal line transistor TR1 and the gate of the transistor TR2, and the signal level is held by the voltage Vin of the signal line SIG via the coupling capacitor Cs1. The terminal voltage of the capacitor Cs2 is set. A transistor TR6 is provided at the transistor TR1 side end of the capacitor Cs1, and a second reference voltage switch circuit for connecting the signal line side end of the capacitor Cs1 to a predetermined reference voltage is formed by the transistor TR6. The ground potential is also applied to the reference voltage related to the capacitor Cs1.

  Thus, also in this embodiment, the transistor TR3 for setting the source potential of the transistor TR2 to the ground potential and the transistor TR1 for setting the terminal voltage of the signal level holding capacitor Cs2 by the signal level Vin of the signal line SIG are written. Control is performed by the signal ws, and the number of scanning lines is reduced accordingly.

  Thus, as shown in FIGS. 7 and 8, in this display device 51, the organic EL element 12 is driven by the transistor TR2 by the gate-source voltage Vgs based on the terminal voltage of the signal level holding capacitor Cs2. The pixel 54 emits light with a desired gradation (FIGS. 7C to 7E and FIG. 8A), and immediately before the terminal voltage of the capacitor Cs2 for holding the signal level is set at the signal level of the signal line SIG. At the predetermined timing, the transistors TR5 and TR6 are turned on by the rise of the control signal az (FIGS. 7B to 7E and FIG. 8B). As a result, the transistor TR2 is switched to diode connection, and the signal line side end of the coupling capacitor Cs1 is set to the reference voltage.

  Thereafter, in the display device 51, the transistor TR4 is set to the OFF state by the drive scan signal ds2, and the supply of power to the transistor TR2 is stopped (FIGS. 7C and 8C). As a result, in the transistor TR2, the temporarily increased gate voltage Vg gradually decreases, and the source voltage Vs also gradually decreases. When the organic EL element 12 stops discharging due to the threshold voltage, the source voltage Vs In FIG. 5, the voltage drop is stopped by the threshold voltage of the organic EL element 12, and the gate voltage Vg is maintained at a voltage difference from the source voltage Vs by the threshold voltage Vth of the transistor TR2. The decline of the cease. As a result, in the display device 51, the threshold voltage Vth of the transistor TR2 is set in the signal level holding capacitor Cs2.

  Thereby, in the display device 51, the control signal az is lowered to return the transistors TR5 and TR6 to the original state, and then the write signal ws is raised to hold the source of the transistor TR2 at the reference potential and at the same time the capacitor Cs1 is set. The terminal voltage of the signal level holding capacitor Cs2 is set by the signal level Vin of the signal line SIG through this, and the signal level Vin of the signal line SIG is corrected by the threshold voltage Vth of the transistor TR2, thereby holding the signal level. Capacitor Cs2 (FIGS. 7A and 8D). As a result, in the display device 51, the organic EL element 12 is current-driven by the transistor TR2 with the voltage set in the signal level holding capacitor Cs2 (FIG. 8E). Image quality deterioration due to variations in threshold voltage of the transistor TR2 is effectively avoided.

  In this embodiment as well, a drive signal is generated by the horizontal drive circuit 55 and various drive signals are generated by the vertical drive circuit 54 so as to correspond to the voltage setting of the signal level holding capacitor Cs2. It is made like that. The transistors TR1 to TR6 are formed of n-channel MOS type TFTs, and are integrally formed on the glass substrate together with the horizontal drive circuit 54 and the vertical drive circuit 55 by an amorphous process.

  According to this embodiment, even when a mechanism for correcting variations in the threshold voltage of a transistor is provided, a switch circuit for connecting a signal holding capacitor provided between the gate and source of the transistor to a signal line By controlling the switch circuit that connects the source side end of the capacitor to the reference voltage with the same control signal, an increase in the number of scanning lines can be prevented.

  FIG. 9 is a block diagram showing a display apparatus according to a third embodiment of the present invention in comparison with FIG. In the display device 61, the drive scan signal ds2 for controlling light emission and non-light emission is shared by the red, green, and blue pixels (PXR, PXG, PXB) 63, and the number of scanning lines is reduced accordingly. Correspondingly, as shown in FIG. 10, in the red, green and blue pixels 63, each of the organic EL elements so that the red, green and blue pixels emit light and a desired color balance can be secured. The size of the transistor TR2 that drives the current 12 is set by a ratio corresponding to the color balance.

  The display device 61 is configured in the same way as the display device 41 according to the first embodiment except for the configuration related to the sharing of the drive scan signal ds2, thereby reducing the number of scanning lines and increasing the number of scanning lines easily. The resolution can be increased.

  FIG. 11 is a block diagram showing a display apparatus according to the fourth embodiment of the present invention in comparison with FIG. In the display device 71, the drive scan signal ds2 for controlling light emission and non-light emission is shared by red, green, and blue pixels (PXR, PXG, PXB) 73, and the number of scanning lines is reduced accordingly. Correspondingly, as shown in FIG. 12, in the red, green, and blue pixels 73, each of the organic EL elements so that the red, green, and blue pixels emit light and a desired color balance can be secured. The size of the transistor TR2 that drives the current 12 is set by a ratio corresponding to the color balance.

  The display device 71 is configured in the same manner as the display device 51 according to the second embodiment except for the configuration related to the sharing of the drive scan signal ds2, thereby reducing the number of scanning lines and increasing the number of scanning lines easily. The resolution can be increased.

  In the above-described embodiment, the case where the supply of power to the transistor TR2 is stopped by the transistor TR4 in almost all the non-light emitting periods has been described. However, the present invention is not limited to this, and the power consumption in this period is not limited. Can be ignored in practice, the entire configuration may be further simplified by omitting the control by the transistor TR4 if necessary.

  In the above embodiment, the case where the EL element and the pixel circuit are integrally formed on the glass substrate by applying the amorphous silicon process has been described. However, the present invention is not limited to this, and the transistor is formed of polysilicon. In the case of creation, the present invention can be widely applied to a case where a drive circuit is created with a silicon substrate separately from the display portion and connected to and integrated with the display portion.

  In the above-described embodiments, the case where the light emitting element by the organic EL element is current-driven has been described. However, the present invention is not limited to this, and can be widely applied to display devices using various light-emitting elements related to current driving. .

  The present invention relates to a display device and a display device driving method, and can be applied to a self-luminous display device driven by current, such as an organic EL display device.

It is a connection diagram which shows the pixel circuit of the display apparatus which concerns on Example 1 of this invention with a periphery structure. It is a block diagram which shows the display apparatus by the pixel circuit of FIG. 2 is a time chart for explaining the operation of the pixel circuit of FIG. 1. FIG. 4 is a connection diagram for explaining the time chart of FIG. 3. It is a block diagram which shows the display apparatus which concerns on Example 2 of this invention. FIG. 6 is a connection diagram illustrating a pixel circuit of the display device of FIG. 5 together with a peripheral configuration. 7 is a time chart for explaining the operation of the pixel circuit of FIG. 6. FIG. 8 is a connection diagram for explaining the time chart of FIG. 7. It is a block diagram which shows the display apparatus which concerns on Example 3 of this invention. FIG. 10 is a connection diagram illustrating a pixel circuit of the display device of FIG. 9 together with a peripheral configuration. It is a block diagram which shows the display apparatus which concerns on Example 4 of this invention. FIG. 12 is a connection diagram illustrating a pixel circuit of the display device of FIG. 11 together with a peripheral configuration. It is a block diagram which shows the structure of a display apparatus. FIG. 14 is a connection diagram illustrating a pixel circuit of the display device of FIG. 13 together with a peripheral configuration. It is a characteristic curve figure which shows the characteristic of an organic EL element. It is a characteristic curve figure with which it uses for description of the change of the operating point of an organic EL element. FIG. 3 is a connection diagram illustrating a pixel circuit having a source follower circuit configuration along with a peripheral configuration. 18 is a time chart for explaining the operation of the pixel circuit in FIG. 17. FIG. 19 is a connection diagram for explaining the time chart of FIG. 18. It is a block diagram which shows the display apparatus by the pixel circuit of FIG. FIG. 6 is a connection diagram illustrating a pixel circuit related to threshold voltage correction together with a peripheral configuration. 22 is a time chart for explaining the operation of the pixel circuit of FIG. FIG. 23 is a connection diagram for explaining the time chart of FIG. 22. It is a block diagram which shows the display apparatus by the pixel circuit of FIG.

Explanation of symbols

1, 11, 21, 31, 41, 51, 61, 71 ... Display device 2, 22, 32, 42, 52, 62, 72 ... Display unit 3, 23, 33, 43, 53, 63, 73... Pixel 4, 24, 34, 44, 54, 64, 74... Vertical drive circuit, 4 A, 24 A, 34 A, 44 A, 54 A, 64 A, 74 A... Light scan circuit 5, 25, 35, 45 , 55, 65, 75... Horizontal drive circuit, 12... Organic EL element, 24B, 24C, 34B, 34C, 44B, 44C, 54C, 64C, 74C... Drive scan circuit, 34D, 54D, 74D. Circuit, C1, C2, Cs1, Cs2 ... Capacitor, TR1 to TR6 ... Transistor

Claims (13)

In a display device having a display unit in which pixels driven by current are arranged in a matrix and a drive circuit for driving the display unit,
The pixel is
A light emitting element;
A transistor for driving the light emitting element by a source follower circuit configuration;
A signal level holding capacitor provided between the gate and source of the transistor;
A reference voltage switch circuit for connecting a source of the transistor to a reference voltage;
A signal line switch circuit for connecting the gate of the transistor to a signal line;
The drive circuit is
By driving the switch circuit for the reference voltage and the switch circuit for the signal line, the terminal voltage of the capacitor for holding the signal level is set according to the signal level of the signal line, and the terminal voltage of the capacitor for holding the signal level The transistor is current-driven by the gate-source voltage by the transistor,
In setting the terminal voltage of the signal level holding capacitor,
The control of the switch circuit for the signal line and the switch circuit for the reference voltage is executed by a common control signal, the connection of the signal line to the gate of the transistor by the switch circuit for the signal line, The display device, wherein the connection of the source of the transistor to the reference voltage is simultaneously performed by a reference voltage switch circuit. The drive circuit is
After the supply of power to the transistor is stopped by the power supply switch circuit for stopping the supply of power to the transistor,
The display device according to claim 1, wherein the terminal voltage of the capacitor for holding the signal level is set. The display device according to claim 1, wherein the transistor, the reference voltage switch circuit, and the signal line switch circuit are formed of n-channel MOS transistors. The pixel is
A switch circuit for a transistor that short-circuits the gate drain of the transistor;
A coupling capacitor disposed between the switch circuit for the signal line and the gate of the transistor and mediating connection of the signal line to the gate of the transistor by the switch circuit for the signal line;
A second reference voltage switch circuit for connecting the signal line switch circuit side end of the coupling capacitor to a predetermined reference voltage;
A power supply switch circuit for stopping supply of power to the transistor,
The drive circuit is
The second reference voltage switch circuit sets the potential of the signal line switch circuit side end of the coupling capacitor to the reference potential,
Short-circuit the gate drain of the transistor by the switch circuit for the transistor,
By stopping the supply of power to the transistor by the power supply switch circuit,
After setting the terminal voltage of the signal level holding capacitor to the threshold voltage of the transistor,
The display device according to claim 1, wherein control of the switch circuit for the signal line and the switch circuit for the reference voltage is executed. The transistor, the switch circuit for the reference voltage, the switch circuit for the signal line, the switch circuit for the second reference voltage, the switch circuit for the transistor, and the switch circuit for the power source are n-channel MOS transistors. The display device according to claim 4, wherein the display device is formed. The light emitting element is
The display device according to claim 1, wherein the display device is an organic EL. In a display device in which pixels driven by current are arranged in a matrix,
The pixel is
A light emitting element;
A transistor for driving the light emitting element by a source follower circuit configuration;
A signal level holding capacitor provided between the gate and source of the transistor;
A signal line switch circuit for connecting a gate of the transistor to a signal line and setting a terminal voltage of the signal level holding capacitor according to a signal level of the signal line;
The transistor is operated by a control signal of the signal line switch circuit, and the source of the transistor is connected to a reference voltage during a period in which the terminal voltage of the signal level holding capacitor is set by the signal line switch circuit. And a switching circuit for a reference voltage. The display device according to claim 7, further comprising: a power supply switch circuit that stops supply of power to the transistor during a period of setting the terminal voltage of the signal level holding capacitor. The pixel is
A coupling capacitor disposed between the switch circuit for the signal line and the gate of the transistor and mediating connection of the signal line to the gate of the transistor by the switch circuit for the signal line;
Before setting the terminal voltage of the signal level holding capacitor from the signal line switch circuit, the signal line switch circuit side end of the coupling capacitor is connected to a predetermined reference voltage. A switch circuit for two reference voltages;
A switch circuit for power supply for stopping supply of power to the transistor in a period in which the signal line switch circuit side end of the coupling capacitor is connected to a predetermined reference voltage;
A terminal of the capacitor for holding the signal level by short-circuiting the gate / drain of the transistor during a period in which the switch circuit side end for the signal line of the coupling capacitor is connected to a predetermined reference voltage. A switch circuit for a transistor that sets a terminal voltage of the capacitor for holding the signal level to a threshold voltage of the transistor before setting the voltage according to the signal level of the signal line. 9. The display device according to 8. In a display device in which pixels by organic EL elements are arranged in a matrix,
The pixel is
The organic EL element;
A transistor for driving the organic EL element by a source follower circuit configuration;
A signal level holding capacitor provided between the gate and source of the transistor;
A signal line switch circuit for connecting a gate of the transistor to a signal line and setting a terminal voltage of the signal level holding capacitor according to a signal level of the signal line;
The transistor is operated by a control signal of the signal line switch circuit, and the source of the transistor is connected to a reference voltage during a period in which the terminal voltage of the signal level holding capacitor is set by the signal line switch circuit. And a switching circuit for a reference voltage. 11. The display device according to claim 10, further comprising a power supply switch circuit that stops supply of power to the transistor during a period of setting the terminal voltage of the signal level holding capacitor. The pixel is
A coupling capacitor disposed between the switch circuit for the signal line and the gate of the transistor and mediating connection of the signal line to the gate of the transistor by the switch circuit for the signal line;
Before setting the terminal voltage of the signal level holding capacitor from the signal line switch circuit, the signal line switch circuit side end of the coupling capacitor is connected to a predetermined reference voltage. A switch circuit for two reference voltages;
A switch circuit for power supply for stopping supply of power to the transistor in a period in which the signal line switch circuit side end of the coupling capacitor is connected to a predetermined reference voltage;
A terminal of the capacitor for holding the signal level by short-circuiting the gate / drain of the transistor during a period in which the switch circuit side end for the signal line of the coupling capacitor is connected to a predetermined reference voltage. A switch circuit for a transistor that sets a terminal voltage of the capacitor for holding the signal level to a threshold voltage of the transistor before setting the voltage according to the signal level of the signal line. 10. The display device according to 10. In a method for driving a display device having a display unit in which pixels driven by current are arranged in a matrix,
The pixel is
A light emitting element;
A transistor for driving the light emitting element by a source follower circuit configuration;
A signal level holding capacitor provided between the gate and source of the transistor;
A reference voltage switch circuit for connecting a source of the transistor to a reference voltage;
A signal line switch circuit for connecting the gate of the transistor to a signal line;
The driving method of the display device is:
By driving the switch circuit for the reference voltage and the switch circuit for the signal line, the terminal voltage of the capacitor for holding the signal level is set according to the signal level of the signal line, and the terminal voltage of the capacitor for holding the signal level The transistor is current-driven by the gate-source voltage by the transistor,
In setting the terminal voltage of the signal level holding capacitor,
The control of the switch circuit for the signal line and the switch circuit for the reference voltage is executed by a common control signal, the connection of the signal line to the gate of the transistor by the switch circuit for the signal line, A method of driving a display device, comprising simultaneously performing connection to the source of the transistor to the reference voltage by a reference voltage switch circuit.

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