JP2005175327A - Semiconductor device, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can prevent the variation of the electric characteristic of the silicon substrate of a wafer-level CSP which is caused by its light irradiation performed from its exposed portion to the external. <P>SOLUTION: In the semiconductor device, a light shadowing film 26 is formed on the rear and side surfaces of a silicon substrate 11 whereon its second insulation layer 21 is not formed. Thereby, a semiconductor element formed in the silicon substrate 11 is so shielded as to shadow any light from the semiconductor element. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

The present invention relates to a semiconductor device that protects an integrated circuit portion of a semiconductor, enables electrical connection to the outside, and enables high-density mounting.
In particular, the present invention relates to a semiconductor device capable of facilitating the miniaturization and thinning of information communication equipment and office electronic equipment, and at the same time, preventing variation in electrical characteristics of an integrated circuit portion due to light, and a method for manufacturing the same.

  In recent years, miniaturization of information communication devices and office electronic devices has progressed, and higher speed and higher performance are also demanded in terms of performance. As a result, semiconductor devices are required to be smaller and thinner, and more pins and higher-density mounting are required. Recently, CSP (Chip Size Package) has been attracting attention as a means to fulfill these demands. CSP is a multi-terminal ultra-small package.

Among various CSPs, a CSP produced by a manufacturing method in which rewiring is performed on the element electrodes of the integrated circuit portion in the wafer state and the external electrode terminal portions are formed is referred to as a wafer level CSP.
The wafer level CSP has been attracting attention in recent years as a technology for producing the ultimate small package of the same size as a bare chip because it is separated into individual pieces after all processes are completed.

  The wafer level CSP is classified into two types, “post-type wafer level CSP” and “rewiring type wafer level CSP”, based on the structural characteristics. Here, a structure of a semiconductor device called “post-type wafer level CSP” will be described with reference to the drawings.

FIG. 8 shows the structure of the wafer level CSP.
A passivation film 102 having an element electrode portion opened is formed on a silicon substrate 101 including an integrated circuit portion on which an element electrode 103 is formed. A first insulating layer 104 having an opening exposing the device electrode 103 is formed thereon by photolithography. On the entire surface of the first insulating layer 104, a thin film metal layer formed by a sputtering method and a thick metal layer selectively formed by an electroplating method using a plating resist formed by a photolithography method as a mask. A metal wiring layer is formed. The plating resist in this step is removed after the thick metal layer is formed.

  Next, a plating resist is formed on the thick metal layer by photolithography, and the second metal wiring 106 is selectively formed on the thick metal layer. After the formation of the second metal wiring 106, the plating resist is removed.

  Next, the thin metal layer is etched using the thick metal layer as a mask to form a first metal wiring 105 composed of the thin metal layer and the thick metal layer. Thereafter, the second insulating layer 107 is formed by transfer molding, and the external metal terminal 108 is formed on the second metal wiring 106.

Finally, dicing is performed along a predetermined scribe line 109 to form the individual semiconductor device 100.
Thereby, the semiconductor device 100 having the same size as the bare chip is manufactured, and the ultimate miniaturization can be realized.
JP 11-297903 A

  In such a conventional manufacturing method, as shown in FIG. 8, the back and side surfaces of the wafer level CSP have a structure in which the silicon substrate 101 is exposed (referred to as a silicon exposed portion), and the processing is completely performed. Absent. Therefore, there are the following problems.

  When light is irradiated onto the silicon exposed portion, light having a wavelength shorter than the absorption limit wavelength of silicon is strongly absorbed in the silicon. The photon energy absorbed at that time excites the outermost electrons of the silicon atom from the valence band to the conduction band to become free electrons. Due to the generation of free electrons, electron-hole pairs are formed, and electrons that are minority carriers diffuse in the P-type substrate. These electrons are accelerated by the electric field and attracted to the N-type region. As a result, the number of electrons increases in the N-type region, causing a change in electrical characteristics such as an increase in power supply voltage.

Here, the influence of light irradiation on the wafer level CSP will be described with reference to the drawings.
FIG. 5 shows the result of measuring the leakage current when the wafer level CSP is irradiated with light. From the figure, the conventional wafer level CSP increases the leakage current as the light intensity increases. In the wafer level CSP, since the silicon substrate is exposed with a thin silicon thickness, the light cannot be attenuated and the electrical characteristics fluctuate.

  An object of this invention is to provide the semiconductor device which can prevent the fluctuation | variation of the electrical property by the light irradiation from the exposed part of a silicon substrate, and its manufacturing method.

  The semiconductor device according to claim 1 of the present invention has an element electrode for electrical connection to the outside on one surface of the substrate on which the semiconductor element is formed, an opening is formed in the element electrode, and the first surface is formed on the entire surface. A metal wiring having one end connected to the element electrode selectively formed on the first insulating layer, and the metal wiring and the first insulation excluding the other end of the metal wiring; In a semiconductor device in which an external metal terminal is formed at the other end of the metal wiring by covering the layer with a second insulating layer, a light-shielding film is provided on the non-element formation surface and the side surface of the substrate. .

A semiconductor device according to a second aspect of the present invention is characterized in that, in the first aspect, the light-shielding film is formed of any one of an organic system, an inorganic system, and a metal system.
According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a substrate on which a plurality of semiconductor elements are formed is cut by a scribe line and divided into a plurality of semiconductor elements to manufacture a semiconductor device. An element electrode for electrical connection to the outside is formed for each of the semiconductor elements on one surface of the previous substrate on which the plurality of semiconductor elements are formed, an opening is formed in the element electrode, and a first insulation is formed on the entire surface. Forming a metal layer, selectively forming a metal wiring having one end connected to the element electrode on the first insulating layer, the metal wiring excluding the other end of the metal wiring, and the first insulating layer; Is covered with a second insulating layer, an external metal terminal is formed at the other end of the metal wiring, and dicing is performed from the other surface of the substrate to reach at least the second insulating layer along the scribe line. Or above Forming a light-shielding film over the dicing groove, and cutting the light-shielding film and the second insulating layer in the dicing groove so as to leave the light-shielding film on a side surface of the substrate to divide into a plurality of semiconductor elements. It is characterized by.

  The light shielding property of the coating blocks the injection of photon energy into the substrate, eliminates the generation of carriers, and prevents fluctuations in the electrical characteristics of the semiconductor device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 shows a semiconductor device 10 according to the first embodiment of the present invention.

  In FIG. 1, reference numeral 11 denotes a silicon substrate on which a semiconductor element is formed, and internally includes a semiconductor integrated circuit including a transistor and the like. A plurality of electrical connections with the outside are provided on one surface of the silicon substrate 11. Element electrodes 13 are arranged. Here, a silicon substrate 11 having a thickness of 400 to 600 μm was used.

A passivation film 12 is formed so as to provide an opening for exposing the device electrode 13 on one surface of the silicon substrate 11 in order to protect the semiconductor integrated circuit.
Reference numeral 14 denotes a first insulating layer, 19 denotes a first metal wiring, 20 denotes a second metal wiring, 21 denotes a second insulating layer, and 22 denotes an external metal terminal.

  A light-shielding resin film 26 is formed so as to cover the exposed portion of the silicon substrate 11. More specifically, a light-shielding resin film 26 is formed on the non-element forming surface and side surfaces of the silicon substrate 11.

  According to this semiconductor device 10, as shown in FIG. 5, since the leakage current hardly occurs even when the light intensity is increased as compared with the characteristics of the conventional example, fluctuations in the electrical characteristics due to light irradiation can be prevented. .

Next, a specific method for manufacturing the semiconductor device will be described with reference to FIGS.
As shown in FIG. 2A, element electrodes 13 for electrical connection with the outside are arranged on one surface of the silicon substrate 11 including the integrated circuit portion, and a plurality of element electrodes 13 are exposed. A passivation film 12 having an opening is formed in advance.

  Next, an insulating material having photosensitivity is applied on the passivation film 12 by spin coating and dried, and a region in the device electrode 13 is selectively removed by photolithography, as shown in FIG. 2B. Then, a first insulating layer 14 having a thickness of about 4 μm and having openings through which the plurality of element electrodes 13 are exposed is formed. Note that the photosensitive first insulating layer 14 may be photosensitive.

  Thereafter, as shown in FIG. 2C, a thin film metal layer 15 having a thickness of 1 μm or less is formed on the entire surface of the first insulating layer 14 by sputtering. Examples of the thin film metal layer 15 include a thin film metal layer having a two-layer structure of a TiW film having a thickness of approximately 0.2 μm and a Cu film having a thickness of approximately 0.5 μm formed thereon.

  Next, the positive photosensitive resist film or the negative photosensitive resist film is covered by spin coating, and a plating resist (first metal wiring formation) 16 is formed on the thin metal layer 15 by photolithography. Except for the pattern portion of the plating resist (first metal wiring formation) 16, the thick metal layer 17 having a thickness of about 5 to 10 μm is formed on the thin metal layer 15 from the element electrode 13 to the first insulating layer 14. It forms selectively as shown in FIG.2 (d) by the plating method. After the thick metal layer 17 is formed, the plating resist (first metal wiring formation) 16 is removed.

  Next, a positive resist film or a negative photosensitive resist film is covered, and a plating resist (second metal wiring formation) 18 is formed by photolithography. Here, the plating resist (second metal wiring formation) 18 having photosensitivity may use a material previously formed in a film shape. Except for the pattern forming portion of the plating resist (second metal wiring formation) 18, the second metal wiring (post) 20 is selectively formed on the thick metal layer 17 by electroplating as shown in FIG. To form. In this case, for example, the second metal wiring 20 having a material of Cu and a height of about 100 μm can be used.

After forming the second metal wiring 20, the plating resist (second metal wiring formation) 18 is removed, and an etching solution capable of melting and removing the thin metal layer 15 is applied.
For example, when the entire surface is etched with a cupric chloride solution for the Cu film and with hydrogen peroxide solution for the TiW film, the thin metal layer 15 having a smaller thickness than the thick metal layer 17 precedes. Removed. By this step, a predetermined first metal wiring 19 is formed in the silicon substrate 11 as shown in FIG. For example, the first metal wiring 19 formed by Cu plating can form a wiring of Line / Space = 20/20 μm with respect to a thickness of 5 μm.

  On the first insulating layer 14, the first metal wiring 19, and the side surfaces of the second metal wiring 20, one assembly mold 23 is used to pressurize and apply an assembly of a plurality of semiconductor devices at a time. A second insulating layer 21 shown in FIG. 3B is formed by applying temperature so that the surface of the second metal wiring 20 is exposed.

  For example, the second insulating layer 21 is formed using an epoxy-based sealing resin with a thickness of 50 to 100 μm. At this time, the first metal wiring 19 and the second metal wiring 20 are protected from the outside by the second insulating layer 21.

  Thereafter, as shown in FIG. 3C, external metal terminals 22 are formed on the surface of the second metal wiring 20. The external metal terminal 22 may be either a solder ball and a solder printing bump or an electroplating bump.

  Next, the front and back surfaces of the wafer on which the external metal terminals 22 are formed are reversed and pasted on the dicing tape 25 with the external metal terminals 22 facing downward using an adhesive as shown in FIG. Thereafter, dicing is partially performed in a groove shape on the predetermined scribe line 24 to 400 to 600 μm having the same depth as the thickness of the silicon substrate 11. For example, the groove width at this time is 30 μm, and the shape of the cutting edge of the dicing blade may be anything.

  Thereafter, the insulating material is applied with a constant film thickness (for example, about 10 μm) by spin coating, and is baked and hardened by pre-baking. This insulating material is mainly a light-shielding resin and is used in a low-viscosity state during film formation. At this time, since the insulating material is applied in a low-viscosity state, the resin flows into the dicing groove 24A as shown in FIG. As a result, all exposed portions of the silicon substrate are covered with the resin film. The resin film thus formed is used as the light-shielding resin film 26.

  Finally, dicing 28 is performed again on the scribe line 24 as shown in FIG. That is, along the predetermined scribe line 24, the portion of the light-shielding resin film 26 formed earlier and the portion of the second insulating layer 21 that has not been diced at the time of dicing only the silicon substrate 11 are simultaneously diced. Can do. If the groove width at this time is 10 μm, the resin film 26 remains with a thickness of 10 μm on the side surface of the exposed portion of the silicon substrate 11.

  In this way, in FIG. 4C, the light shielding film 26 and the second insulating layer 21 are cut in the dicing groove 24A so that the light shielding film 26 remains on the side surface of the silicon substrate 11, and a plurality of the light shielding films 26 are cut. It is divided into semiconductor elements.

Through the above steps, the semiconductor device 10 is obtained in which the light-shielding resin coating 26 is provided on the entire exposed portion of the silicon substrate 11 and is separated into pieces.
Here, the first insulating layer 14 and the second insulating layer 21 protect and electrically insulate the silicon substrate 11. The external device such as the mounting substrate and the semiconductor device are fixed and the external device and the element electrode 13 are electrically connected by the external metal terminal 22. The element electrode 13 and the external metal terminal 22 are electrically connected through the first metal wiring 19 and the second metal wiring 20 connected to the element electrode 13. Further, the first insulating layer 14 and the second metal wiring 20 alleviate this stress when the semiconductor device is subjected to a stress caused by a difference in thermal expansion coefficient between the semiconductor device and the mounting substrate after the semiconductor device is mounted. It has the function to do.

  In the step of FIG. 4A of the above embodiment, dicing is performed in a groove shape to the same depth as the thickness of the silicon substrate 11, but this is applied from the other surface of the silicon substrate to the scribe line. Dicing that reaches at least the second insulating layer 21 may be performed.

(Second Embodiment)
FIG. 6 shows a semiconductor device according to the second embodiment of the present invention.
In the first embodiment, the light-shielding resin film 26 is formed on the back surface and the side surface of the silicon substrate 11. In this (second embodiment), the light-shielding metal thin film 27 is formed on the silicon substrate 11. The only difference is that formed.

  As a method of forming the metal thin film 27, from the state of FIG. 3C, a predetermined scribe line 24 is diced in an assembly of a plurality of semiconductor devices, the plurality of semiconductor devices 10 are separated into pieces, and the semiconductor device 10 is separated. obtain. A metal thin film 27 is formed on the separated semiconductor device 10 by a thin film formation technique such as sputtering, vacuum deposition, CVD, or electroless plating. Any material can be used for the light-shielding metal thin film 27 as long as it is metal, and a satisfactory result was obtained when the thickness was 1 μm or less.

(Third embodiment)
FIG. 7 shows a semiconductor device according to the third embodiment of the present invention.
In the first embodiment, the light-shielding resin film 26 is formed on the back surface and side surface of the silicon substrate 11, and in the second embodiment, the light-shielding metal thin film is formed on the back surface and side surface of the silicon substrate 11. In this (third embodiment), a light-shielding inorganic coating 28 is formed on the silicon substrate 11.

As a method of forming the inorganic coating 28, for example, black carbide is adhered to the back surface and side surfaces of the silicon substrate, with respect to the semiconductor device 10 separated into pieces as in the second embodiment. Examples of the black carbide include carbon paste.
Any material can be used for the inorganic coating 28 as long as it has a light shielding property other than the metal shown in the second embodiment, and a good result is obtained with a thickness of about 10 μm. .

  The semiconductor device according to the present invention can prevent variation in electrical characteristics due to light irradiation from the exposed portion of the silicon substrate, and the variation in electrical characteristics can be achieved even when the silicon substrate is made thinner by further downsizing the semiconductor device. Can be prevented.

Sectional drawing of the semiconductor device of (1st Embodiment) in this invention Process drawing of a specific method for manufacturing a semiconductor device of the embodiment Process drawing of a specific method for manufacturing a semiconductor device of the embodiment Process drawing of a specific method for manufacturing a semiconductor device of the embodiment The figure which shows the relationship between the irradiation light quantity and the leakage current in the silicon substrate of wafer level CSP Sectional drawing of the semiconductor device of (2nd Embodiment) in this invention Sectional drawing of the semiconductor device of (3rd Embodiment) in this invention Sectional view of conventional wafer level CSP (post type)

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Semiconductor device 11 Silicon substrate 12 Passivation film 13 Element electrode 14 1st insulating layer 15 Thin film metal layer 16 Plating resist (1st metal wiring formation)
17 Thick metal layer 18 Plating resist (second metal wiring formation)
19 First metal wiring 20 Second metal wiring 21 Second insulating layer 22 External metal terminal 23 Sealing type 24 Scribe line 25 Dicing tape 26 Light-shielding resin film 27 Light-shielding metal thin film 28 Light-shielding inorganic film

Claims (3)

An element electrode for electrical connection to the outside is provided on one surface of the substrate on which the semiconductor element is formed, an opening is formed in the element electrode, and a first insulating layer is formed on the entire surface. A metal wiring having one end connected to the element electrode is selectively formed on the metal wiring, and the metal wiring excluding the other end of the metal wiring and the first insulating layer are covered with a second insulating layer; In a semiconductor device in which an external metal terminal is formed at the other end of the metal wiring,
A semiconductor device comprising a light-shielding film on a non-element-forming surface and side surfaces of the substrate.   2. The semiconductor device according to claim 1, wherein the light-shielding film is formed of any one of an organic system, an inorganic system, and a metal system. When manufacturing a semiconductor device by cutting a substrate on which a plurality of semiconductor elements are formed with a scribe line and dividing the substrate into a plurality of semiconductor elements,
A device electrode for electrical connection with the outside is formed for each of the semiconductor elements on one surface where the plurality of semiconductor elements of the substrate before being cut by a scribe line are formed,
Forming an opening in the device electrode and forming a first insulating layer on the entire surface;
Forming a metal wiring having one end connected to the element electrode selectively on the first insulating layer;
Covering the metal wiring except the other end of the metal wiring and the first insulating layer with a second insulating layer, forming an external metal terminal at the other end of the metal wiring,
Performing dicing from the other surface of the substrate to reach at least the second insulating layer along the scribe line;
Form a light-shielding film over the dicing grooves from above,
A method of manufacturing a semiconductor device, wherein the light-shielding film and the second insulating layer are cut in the dicing groove so as to leave the light-shielding film on a side surface of the substrate and divided into a plurality of semiconductor elements.

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