JP2005166971A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a capacitor of high performance in which the deterioration of a leaked current characteristic is reduced even in the case of a dielectric film of which the high dielectric constant is obtained by high-temperature annealing in a capacitor element using perovskite type oxide film high dielectric thin film. <P>SOLUTION: The manufacturing method is provided with a process for forming a plasma SiO<SB>2</SB>film 102 on the surface of a GaAs epitaxial substrate 101, and then forming a Ti film 103 and a Pt film 104 which become lower electrodes of the capacity on the surface of the plasma SiO<SB>2</SB>film; a process for forming a SrTiO<SB>3</SB>film 105 on the Pt film 104 and annealing the SrTiO<SB>3</SB>film 105; a process for forming a Pt film 106 which becomes an upper electrode on the surface of the SrTiO<SB>3</SB>film 105; a process for forming a capacitor element by etching the SrTiO<SB>3</SB>film 105 and the Pt film 106 to be the upper electrode, while leaving a prescribed area; and a process for treating the sidewall surface of the capacitor element with ozone. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device having a capacitive element using a high dielectric thin film.

Capacitance using a perovskite oxide high dielectric thin film such as SrTiO ₃ is used as a high frequency GaAs MMIC capacitor because it has little loss in the quasi-microwave band and does not exhibit frequency dispersion up to 60 GHz (for example, Patent Document 1). reference).

In order to reduce the leakage current, these capacitors have a shape in which the end face of the dielectric film is separated from the end face of the electrode, and end face leakage is avoided, or oxygen leakage in the dielectric film is compensated by annealing in an oxygen atmosphere to suppress the leakage current. Used in.
JP-A-8-45925

  However, in order to further increase the capacity (high dielectric constant), it is necessary to improve the crystallinity by high-temperature annealing after forming the dielectric thin film. However, there is a problem that a donor level is formed due to oxygen vacancies generated by this high-temperature annealing treatment, and the leakage current level is deteriorated.

  The present invention has been made to solve the above-described problems, and a semiconductor that realizes the manufacture of a high-performance capacitive element with little deterioration of capacitance leakage characteristics by high-temperature annealing treatment for further increasing the dielectric constant of a dielectric thin film. An apparatus manufacturing method is provided.

  In order to achieve the above object, in the method of manufacturing a semiconductor device according to the present invention, after forming a high dielectric thin film, annealing is performed at a temperature of 600 ° C. to 700 ° C. for 2 seconds to 60 seconds, and then the capacitor end face is formed. After the formation, annealing treatment at 200 ° C. to 300 ° C. in an ozone atmosphere can sufficiently improve the crystallinity of the dielectric film and improve the dielectric constant, and compensates for oxygen vacancies at the end face of the dielectric film. , Capacity end leakage due to oxygen deficiency, which is the main element of leakage current, is reduced.

  For this reason, even if the capacitor electrode and the capacitor end face are made to coincide with each other, the leakage current is reduced, so that further capacity reduction can be realized.

  In addition, since a TeAs or Se-doped electron supply layer is used for the epitaxial layer of GaAs, GaAlAs, or InAlAs on the semiconductor substrate on which the capacitive element is formed, high-temperature annealing is performed to improve the dielectric constant of the capacitive element. Compared with the conventional bipolar Si-doped electron supply layer, the deterioration of the electrical characteristics of the epitaxial layer of the active element of GaAs MMIC is small.

  According to the present invention, in capacity formation using a perovskite oxide high dielectric thin film, oxygen vacancies caused by high temperature annealing for high capacity are forcibly compensated by performing heat treatment in an ozone atmosphere, It is possible to suppress a current leakage at the capacitor end face which is a main element of the leakage current, and to realize a high-performance capacitive element having a high capacity and a low leakage current.

  Hereinafter, the present invention will be described in more detail with reference to the drawings.

FIG. 1 is a cross-sectional view showing the structure of a semiconductor device manufactured according to an embodiment of the present invention. 101 is a GaAs epitaxial substrate, 102 is a plasma SiO ₂ film, 103 is a Ti film, 104 is a Pt film, and 105 is a high dielectric constant. SrTiO ₃ film, which is a body thin film, 106 is a Pt film, 108 is a plasma SiO ₂ film, and 109 and 110 are wirings.

FIG. 2 is a cross-sectional view showing a manufacturing process of the high dielectric capacitance element. As shown in FIG. 2A, a plasma SiO ₂ film (thickness 300 nm) 102 is formed on the GaAs epitaxial substrate 101 on the front surface of the substrate by plasma CVD. A Ti film (thickness 20 nm) 103 and a Pt film (thickness 250 nm) 104, which are lower electrodes, are formed thereon by EB vapor deposition.

Next, as shown in FIG. 2B, an SrTiO ₃ film (thickness 300 nm) 105 is formed on the Pt film 104 by RF sputtering in Ar plasma containing O ₂ at a substrate temperature of 300 ° C.

Next, as shown in FIG. 2C, annealing is performed at 650 ° C. for 30 seconds in a N ₂ atmosphere using a lamp annealing method to promote crystallization of the SrTiO ₃ film 105. A suitable annealing temperature is 600 to 700 ° C. and a time is 2 to 60 seconds. If an O ₂ atmosphere is used, the crystallization can be further improved.

Next, as shown in FIG. 2D, a Pt film (thickness 300 nm) 106 to be an upper electrode is formed on the SrTiO ₃ film 105 by using the EB vapor deposition method.

Next, as shown in FIG. 2E, by using a photoresist mask 107, a predetermined region that can become the upper electrode is divided into a Pt film 106 that becomes the upper electrode and an SrTiO that is a dielectric film using the Ar ion milling method. _{The three} films 105 are etched simultaneously to form the upper electrode.

Next, after removing the photoresist 107 (see FIG. 2E), as shown in FIG. 2F, annealing is performed in an ozone atmosphere at 300 ° C. for 30 seconds. Since oxygen vacancies formed on the end face of the SrTiO ₃ film 105 after ion milling may cause a leakage current, the oxygen vacancies are forcibly compensated by ozone annealing.

Next, as shown in FIG. 2G, a plasma SiO ₂ film (thickness: 500 nm) 108 is formed as the insulating film by plasma CVD. This bears protection of the capacitor end and insulation between the Au wiring formed in the next process and the capacitor.

  Next, as shown in FIG. 2 (h), wiring (thickness 3 μm) 109, 110 from the Pt film 106 serving as the upper electrode and the Pt film 104 serving as the lower electrode is formed using the Au plating method. Form a structure.

  FIG. 3 is a comparison of the electrical characteristics of a 100 μm × 100 μm size capacitor between the ozone annealed capacity of the present embodiment shown in FIG. 1 and the conventional capacity without the anneal process. FIG. The capacity in this embodiment, FIG. 3B, shows the conventional capacity. From the figure, it can be seen that the capacitance of the present embodiment has a larger capacitance value (about 1.5 times) and a good characteristic with less capacitance leakage.

In the above description, the case where SrTiO ₃ is employed as the high dielectric thin film has been described, but it goes without saying that other perovskite oxide dielectric thin films such as BaSrTiO ₃ have the same effect.

  Moreover, although the case where a GaAs epitaxial substrate is employed as the substrate has been described, the same applies to other InP epitaxial substrates. Furthermore, by using a Te or Se-doped electron supply layer, it is possible to suppress deterioration of the electrical characteristics of the epitaxial substrate during high-temperature annealing in the active element portion of the GaAsMMIC.

As a result, the dielectric constant of SrTiO ₃ can be increased while maintaining the electrical characteristics of the epitaxial substrate. Thereby, it is not necessary to make the dielectric film size smaller than the electrode in order to prevent end face leakage of the capacitive element, and the capacitive element can be downsized.

By the way, in the manufacturing method by heat treatment at a low temperature by increasing the film formation temperature of SrTiO ₃ , for example, forming SrTiO ₃ at 400 ° C. and annealing at 400 to 500 ° C., the dielectric constant of the SrTiO ₃ film Is only about 50% of the bulk. A positive correlation between the annealing temperature and the SrTiO ₃ dielectric constant has been confirmed, and it can be expected that the dielectric constant can be increased by 40% by high-temperature annealing at 600 to 700 ° C.

However, if the high temperature annealing time is long, oxygen is released from SrTiO ₃ , current leakage increases, and capacitance is formed on the epitaxial layer of the compound semiconductor substrate. Therefore, the electrical characteristics of the epitaxial layer may be deteriorated at 400 ° C. or higher.

  Therefore, according to the present embodiment, a short heat treatment (2 seconds) at a high temperature (600 to 700 ° C.) is performed by RTP (Rapid Thermal Process) using a Te, Se doped substrate having high heat resistance. Thus, current leakage can be reduced by ozone annealing at a low temperature (400 ° C. or lower, here, 200 to 300 ° C.) while suppressing thermal deterioration of the substrate. Further, by performing the annealing treatment not immediately after the film formation but immediately after the capacitor end face is exposed, the end face leak, which is a dominant component of the current leak, can be suppressed.

  According to the present invention, it is possible to realize a high-capacity element having a high capacity and a low leakage current by suppressing current leakage at the capacitor end face, which is a main element of leakage current, for example, a mobile phone. The present invention can be used in the field of manufacturing high-dielectric capacitor elements.

Sectional drawing which shows the structure of the semiconductor device manufactured by embodiment of this invention Sectional drawing which shows the manufacturing process of a high dielectric capacitance element The figure which compared the characteristic of the high dielectric capacitance in this embodiment and the conventional high dielectric capacitance

Explanation of symbols

101 GaAs epitaxial substrate 102 plasma SiO ₂ film 103 Ti film 104 Pt film 105 SrTiO ₃ film 106 Pt film 107 photoresist 108 plasma SiO ₂ film 109, 110 wiring

Claims (6)

  Forming a first metal serving as a lower electrode of a capacitor on one main surface of a semiconductor substrate; forming a high dielectric thin film on the first metal; and annealing the high metal; and Forming a second metal serving as an upper electrode of a capacitor on the thin film, and etching so as to leave only a predetermined region of the high-dielectric thin film and the second metal, and the first metal, the high dielectric A method for manufacturing a semiconductor device, comprising: a step of forming a capacitor element made of a thin body film and a second metal; and a step of ozone treatment of a side wall surface of the capacitor element.   The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is a compound semiconductor substrate.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate comprises an epitaxial layer of GaAs, GaAlAs or InAlAs having a Te or Se doped layer. The high dielectric thin film, a method of manufacturing a semiconductor device according to claim 1, wherein a is either SrTiO ₃ or BaSrTiO ₃ formed by the sputtering method.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the high dielectric thin film has an annealing temperature of 600 to 700 [deg.] C. and an annealing time of 2 to 60 seconds.   The method for manufacturing a semiconductor device according to claim 1, wherein a temperature of the ozone treatment is 200 to 300 ° C.

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