JP2005165258A - Display device and driving method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make good display possible by improving the controllability of a display operation by a video signal. <P>SOLUTION: The writing operations of the display device 1 include setting a voltage signal input terminal E at a first potential, opening an output control switch Sw 2 and closing first and second switches Sw 5b and Sw 5a to pass current as the video signal to a driving control element Tr, then opening the first switch Sw 5b, and at the same time or thereafter setting the voltage signal input terminal E at a second potential different from the first potential. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device and a driving method thereof, and more particularly, to a display device that controls optical characteristics of a display element by a current passed through the display device and a driving method thereof.

  In a display device such as an organic EL (electroluminescence) display device in which the optical characteristics of a display element are controlled by a drive current applied thereto, image quality defects such as luminance unevenness occur when the drive current varies. Therefore, when the active matrix driving method is adopted in such a display device, it is required that the characteristics of the driving transistor for driving the display element are substantially the same between the pixels. However, in this display device, since the transistor is usually formed on an insulator such as a glass substrate, variations in transistor characteristics are likely to occur.

  For this problem, the circuits shown in FIGS. 5 and 6 have been proposed in Patent Documents 1 and 2 below. Hereinafter, characteristic correction of the driving transistor using these circuits will be described.

  In the organic EL display device 1 using the circuit of FIG. 5 (threshold cancellation type), when any of the pixels 2 is brought into the display state, first, the output control switch Sw2 is opened using the scanning signal line 7 (OFF) In addition, the correction switch Sw3 is closed (ON) using the scanning signal line 15 to supply charges to the capacitors C1 and C2 until no current flows between the source and drain of the driving transistor Tr. In this state, since the drain and gate of the driving transistor Tr are connected, the potential of the node A becomes the threshold value Vth of the driving transistor Tr. During this time, a scanning signal is supplied from a scanning signal line driver (not shown) to the scanning signal line 6 to close the selection switch Sw1, and a reset signal Vrst is supplied from the video signal line driver (not shown) to the video signal line 9. .

  After completing the above operation, the correction switch Sw3 is opened and the output control switch Sw2 is closed, and the video signal Vsig is supplied to the video signal line 9 from the video signal line driver. As a result, the gate potential of the driving transistor Tr varies from the threshold value Vth by an amount equal to the variable amount from Vrst to Vsig. As a result, a drive current corresponding to the fluctuation amount is supplied from the power supply wiring 11 to the organic EL element 20 via the drive transistor Tr and the output control switch Sw2.

  Thus, according to the circuit of FIG. 5, the influence of the threshold value Vth on the drive current can be eliminated. Therefore, even if the threshold value of the driving transistor Tr varies between the pixels 2, the influence of such variations on the driving current supplied to the organic EL element 20 can be minimized.

  However, the drive current is affected not only by the threshold value of the drive transistor Tr but also by its mobility and size. Therefore, according to the circuit of FIG. 5, it is difficult to improve the light emission uniformity until the display unevenness is not visually recognized.

  On the other hand, in the organic EL display device 1 using the circuit of FIG. 6 (current copy type), when any one of the pixels 2 is brought into the display state, first, the output control switch Sw2 is opened, the selection switch Sw1 and the correction switch are corrected. / Close the write switch Sw4. Next, in this state, a current Isig corresponding to the video signal is caused to flow between the source and drain of the driving transistor Tr using a constant current circuit (not shown). By this operation, the voltage between both electrodes of the capacitor C2 becomes the gate-source voltage necessary for flowing the current Isig through the channel of the driving transistor Tr.

  Thereafter, the selection switch Sw1 and the correction / writing switch Sw4 are opened, and the output control switch Sw2 is closed. The potential of the node B is set such that a driving current substantially equal to the current Isig flows between the source and drain of the driving transistor Tr by the previous operation.

  As described above, according to the circuit of FIG. 6, a current having a magnitude almost equal to the current Isig supplied as the video signal in the writing period is applied between the source and drain of the driving transistor Tr in the holding period following the writing period. It can flow. Therefore, not only the threshold value Vth of the driving transistor Tr but also the influence of mobility and dimensions on the driving current can be eliminated.

However, in the circuit of FIG. 6, the following problems arise when the wiring capacity of the video signal wiring increases with an increase in the size of the pixel, or when the writing period becomes shorter as the configuration becomes thinner. That is, when the current Isig is small, insufficient writing occurs. In other words, it becomes difficult to write a desired video signal.
US Pat. No. 6,229,506 B1 US Pat. No. 6,373,454B1

  An object of the present invention is to improve the controllability of a display operation using a video signal and to enable good display.

  According to a first aspect of the present invention, there is provided a display device including a plurality of pixels arranged in a matrix, each of the plurality of pixels including a voltage signal input terminal to which a voltage signal is supplied, and a first power source. A drive control element including a first terminal connected to the terminal, a control terminal, and a second terminal that outputs a current corresponding to a voltage between them; and between the voltage signal input terminal and the control terminal A first capacitor connected to the first capacitor; a current signal input terminal to which a current signal is supplied; a first switch connected between the current signal input terminal and the control terminal; the current signal input terminal; A second switch connected between two terminals, an output control switch having an input terminal connected to the second terminal, and a display connected between a second power supply terminal and the output terminal of the output control switch Comprising the elements, In the writing operation of the apparatus, the voltage signal input terminal is set to a first potential, the output control switch is opened, the first and second switches are closed, and a video signal is generated between the first and second terminals. A display device is provided which includes passing a current, then opening a first switch, and simultaneously or subsequently setting the voltage signal input terminal to a second potential different from the first potential.

  According to a second aspect of the present invention, there is provided a display device including a plurality of pixels arranged in a matrix, each of the plurality of pixels including a display element having an organic layer sandwiched between opposing electrodes, and the display A thin film transistor connected in series with the element, a first switch connected between the drain of the thin film transistor and the display element, a first capacitor connected to the gate of the thin film transistor, and a second switch connected between the gate and drain of the thin film transistor And a third switch for connecting the drain of the thin film transistor and a signal input terminal, and a second capacitor for connecting the gate of the thin film transistor and a control terminal of the third switch. The

  According to a third aspect of the present invention, a plurality of pixels arranged in a matrix are provided, each of the plurality of pixels having a first terminal connected to a first power supply terminal, a control terminal, and a voltage therebetween. A drive control element including a second terminal for outputting a current corresponding to the above, a display element connected between the second terminal and the second power supply terminal, and the control terminal and the voltage signal input terminal. A display device comprising a capacitor connected therebetween, wherein the voltage signal input terminal is set to a first potential, the output control switch is opened, and the first and second switches are closed, A current as a video signal is passed between the first and second terminals, then the first switch is opened, and simultaneously or after that, the voltage signal input terminal is set to a second potential different from the first potential. Those who include There is provided.

  According to the present invention, the controllability of the display operation by the video signal can be improved, and a good display is possible.

  Hereinafter, some aspects of the present invention will be described in detail with reference to the drawings. In addition, in each figure, the same referential mark is attached | subjected to the same or similar component, and the overlapping description is abbreviate | omitted.

  FIG. 1 is a plan view schematically showing a display device according to a first aspect of the present invention. The display device 1 is an organic EL display device, for example, and includes a plurality of pixels 2. These pixels 2 are arranged in a matrix on the substrate 3.

  A scanning signal line driver 4 is further provided on the substrate 3. Here, the video signal line driver 25 is not provided on the substrate 3, but the video signal line driver 25 may be provided on the substrate 3. The scanning signal line driver 4 constitutes at least a part of the voltage signal supply circuit. Further, the video signal line driver 25 constitutes at least a part of the current signal supply circuit.

  On this substrate 3, scanning signal lines 7 and 8 connected to the scanning signal line driver 4 are provided so as to extend in the row direction of the pixels 2. The scanning signal lines 7 and 8 are supplied with scanning signals from the scanning signal line driver 4 as voltage signals.

  On the substrate 3, a video signal line 10 connected to the video signal line driver 25 and supplied with a current signal therefrom is provided so as to extend in the column direction of the pixels 2.

  Further, power wiring 11 is provided on the substrate 3.

  The pixel 2 includes a drive control element Tr, an output control switch Sw2, a selection switch Sw5a, a correction signal supply control switch Sw5b, capacitors C1 and C2, and a display element 20. These switches Sw2, Sw5a and Sw5b are, for example, thin film transistors (TFTs), and the capacitors C1 and C2 are, for example, thin film capacitors. Here, the drive control element Tr is assumed to be composed of TFTs.

  The display element 20 includes an anode and a cathode facing each other, and an active layer whose optical characteristics change according to a current flowing between them. Here, as an example, the display element 20 is an organic EL element including a light emitting layer as an active layer. Here, as an example, the anode is provided as a lower electrode, and is connected to the drive control element Tr via the output control switch Sw2. On the other hand, the cathode is provided, for example, as an upper electrode disposed opposite to the lower electrode through the active layer.

  The drive control element Tr is, for example, a p-channel TFT, and its gate is connected to one electrode of the capacitor C1. When the drive control element Tr is a p-channel TFT, its source is connected to the power supply wiring 11, and its drain is connected to the lower electrode of the organic EL element 20 via the output control switch Sw2.

  The output control switch Sw <b> 2 is connected between the drive control element Tr and the organic EL element 20. The switching operation of the output control switch Sw2 is controlled by a scanning signal supplied from the scanning signal line 7. The output control switch Sw2 is, for example, a p-channel TFT. In this case, the gate is connected to the scanning signal line 7, and the source and drain are connected to the drive control element Tr and the organic EL element 20, respectively.

  The selection switch Sw5a is connected between the drain of the drive control element Tr and the video signal line 10. Note that the node C on the video signal line 10 serves as a video signal supply terminal. The switching operation of the switch Sw5a is controlled by a scanning signal supplied from the scanning signal line 8. The selection switch Sw5a is, for example, a p-channel TFT. In this case, the gate is connected to the scanning signal line 8, and the source and drain are connected to the drain of the drive control element Tr and the video signal line 10, respectively.

  The correction signal supply control switch Sw5b is connected between the drain and gate of the drive control element Tr. The switching operation of the switch Sw5b is controlled by a scanning signal supplied from the scanning signal line 8. The correction signal supply control switch Sw5b is, for example, a p-channel TFT. In this case, the gate is connected to the scanning signal line 8, and the source and drain are connected to the drain and gate of the drive control element Tr, respectively.

  The connection relationship between the selection switch Sw5a and the correction signal supply control switch Sw5b is as shown in FIG. 1 if the connection / disconnection of the drain of the drive control element Tr, the gate of the drive control element Tr, and the video signal line 10 can be switched. You may have structures other than showing.

  For example, in FIG. 1, the switching operations of the selection switch Sw5a and the correction signal supply control switch Sw5b are controlled by one scanning signal line 8, but may be controlled by individual scanning signal lines.

  In FIG. 1, the correction signal supply control switch Sw5b is connected between the drain and gate of the drive control element Tr. However, the correction signal supply control switch Sw5b is connected to the video signal line 10 and the drive control element Tr. You may connect between gates.

  The capacitor C1 is connected between the scanning signal line 8 and the gate of the drive control element Tr. The capacitor C2 is connected between the source of the drive control element Tr and the gate of the drive control element Tr. Note that the node E on the wiring connected to the scanning signal line 8 serves as a voltage signal input terminal.

  The capacitances of the capacitors C1 and C2 do not have to be equal to each other, but are assumed to be equal to each other for simplicity. In addition, the capacitor C2 is, for example, a constant potential terminal insulated from the gate of the drive control element Tr and the source of the drive control element Tr instead of being connected between the source of the drive control element Tr and the gate of the drive control element Tr. You may connect between. That is, if one terminal of the capacitor C2 is connected to the gate of the drive control element Tr and can hold the gate-source voltage of the drive control element Tr corresponding to the video signal, the gate of the drive control element Tr is provided. -There is no need to connect between sources.

  FIG. 2 is a timing chart schematically showing an example of a method for driving the display device shown in FIG. In this driving method, the first writing period P3C and the second writing period P3V constitute one horizontal period, and the first writing period P3C, the second writing period P3V, and the holding period P4 constitute one vertical period.

  In the period for selecting the pixel 2 to display a certain gradation, first, the switch Sw2 is opened. The first write operation and the second write operation are sequentially performed within a period during which the switch Sw2 is opened.

  In the first writing period P3C in which the first writing operation is performed, the switches Sw5a and Sw5b are closed. In this state, the output current Iout output from the video signal line driver 25 to the video signal line 10 to which the previous pixel 2 is connected is set to a current Isig ′ substantially corresponding to the video signal. At this time, the potential V1 of the node E is constant regardless of the gradation to be displayed. As a result, the gate-source voltage of the driving transistor Tr is set to a value Vsig 'when the current Isig' flows between the source and drain. The first writing period P3C is ended by opening the switches Sw5a and Sw5b.

  In the second writing period P3V in which the second writing operation is performed, the switches Sw5a and Sw5b are closed. At this time, the potential V2 of the node E is constant regardless of the gradation to be displayed. The second writing period P3V ends when the node E is stabilized at the potential V2.

  At the end of the first writing period P3C, the potential of the node D is set to the value Vsig 'when the current Isig' flows between the source and drain of the driving transistor Tr. Therefore, in the second write period P3V, when the potential of the node E is changed from V1 to V2 by the operation of the switch Sw5 from on to off, the potential of the node D changes from Vsig ′ to Vsig ′ − (V1−V2). And change.

  In the holding period P4, the switch Sw2 is closed. A current Isig having a magnitude substantially corresponding to the potential Vsig ′ − (V1−V2) flows through the display element 20.

  In this example, since the p-channel TFT is used as the switches Sw5a and Sw5b, the potential V2 is higher than the potential V1. Therefore, the potential Vsig is higher than the potential Vsig ′. In this example, a p-channel TFT is used as the driving transistor Tr. Therefore, the current Isig 'is larger than the current Isig.

  As described above, in this aspect, the current signal Isig ′ is supplied as the video signal between the source and the drain of the driving transistor Tr in each writing operation. Thereby, the potential of the node D is set to a value Vsig ′ corresponding to the video signal. As described above, the current Isig 'is larger than the current Isig. Therefore, the potential Vsig 'faithfully reflects the characteristics of the driving transistor Tr. That is, according to this aspect, not only the threshold Vth of the driving transistor Tr but also the influence of mobility and dimensions on the driving current can be sufficiently eliminated.

Next, the second aspect of the present invention will be described.
FIG. 3 is a plan view schematically showing a display device according to the second aspect of the present invention. The display device 1 illustrated in FIG. 3 is, for example, an organic EL display device. The display device 1 has the same structure as the display device 1 of FIG. 1 except that the following configuration is adopted.

  That is, in the display device 1 of FIG. 3, the correction signal supply control switch Sw5f and the scanning signal line 17 are provided. The correction signal supply control switch Sw5f is connected between the output terminal of the correction signal supply control switch Sw5b and the gate of the driving transistor Tr. Switching of the correction signal supply control switch Sw5f is controlled by a scanning signal supplied from the scanning signal line 17.

  The display device 1 of FIG. 3 can be driven by the same method as described in the first embodiment. Therefore, in this aspect, the same effect as described in the first aspect can be obtained.

  In this aspect, the switching of the switch Sw5f can be controlled independently of the switching of the switch Sw5b. Therefore, in the first writing period P3C, the switch Sw5f can be opened prior to changing the potential of the node E to open the switch Sw5b. Therefore, undesired fluctuations in the potential of the node D can be prevented. Therefore, the characteristics of the driving transistor Tr can be reliably corrected. This effect can be obtained even when the switch Sw5b is not provided.

  In this embodiment, the switches Sw5f and Sw5b are connected in series between the gate and drain of the driving transistor Tr. Therefore, it is possible to suppress the charge accumulated in the capacitor C1 from leaking during the holding period P4. That is, it is possible to suppress the gate potential of the driving transistor Tr from changing in the holding period P4.

Next, the third aspect of the present invention will be described.
FIG. 4 is a plan view schematically showing a display device according to the third aspect of the present invention. The display device 1 illustrated in FIG. 4 is, for example, an organic EL display device. The display device 1 has the same structure as the display device 1 of FIG. 3 except that the following configuration is adopted.

  That is, in the display device 1 of FIG. 4, the scanning signal line 18 is provided. The node E is connected to the scanning signal line 18 instead of being connected to the scanning signal line 8.

  The display device 1 shown in FIG. 4 can be driven by the same method as described in the second embodiment. Therefore, also in this aspect, the same effect as described in the second aspect can be obtained. Even in this embodiment, even when the switch Sw5b is not provided, the characteristics of the driving transistor Tr can be reliably corrected.

  In this aspect, the potentials V1 and V2 of the node E can be arbitrarily set. In addition, in this aspect, the potential of the node E can be changed independently from the switching of the switches Sw5a and Sw5b.

  Further benefits and variations are readily apparent to those skilled in the art. Therefore, the invention in its broader aspects should not be limited to the specific descriptions and representative embodiments described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the generic concept of the invention as defined by the appended claims and their equivalents.

1 is a plan view schematically showing a display device according to a first aspect of the present invention. 2 is a timing chart schematically showing an example of a method for driving the display device shown in FIG. 1. The top view which shows roughly the display apparatus which concerns on the 2nd aspect of this invention. The top view which shows roughly the display apparatus which concerns on the 3rd aspect of this invention. 1 is an equivalent circuit diagram of an organic EL display device using a threshold cancellation type circuit. FIG. 3 is an equivalent circuit diagram of an organic EL display device using a current copy type circuit.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Display apparatus, 2 ... Pixel, 3 ... Substrate, 4 ... Scanning signal line driver, 6 ... Scanning signal line, 7 ... Scanning signal line, 8 ... Scanning signal line, 9 ... Video signal line, 10 ... Video signal line, DESCRIPTION OF SYMBOLS 11 ... Power supply wiring, 15 ... Scanning signal line, 17 ... Scanning signal line, 18 ... Scanning signal line, 20 ... Display element, 25 ... Video signal line driver, A ... Node, B ... Node, C ... Node, C1 ... Capacitor , C2 ... capacitor, D ... node, E ... node, Sw1 ... selection switch, Sw2 ... output control switch, Sw3 ... correction switch, Sw4 ... correction / write switch, Sw5a ... correction signal supply control switch, Sw5b ... correction signal supply control switch, Sw5f ... correction signal supply control switch, Tr ... drive control element.

Claims (10)

A display device comprising a plurality of pixels arranged in a matrix, wherein each of the plurality of pixels is
A voltage signal input terminal to which a voltage signal is supplied; and
A drive control element including a first terminal connected to the first power supply terminal, a control terminal, and a second terminal that outputs a current corresponding to a voltage therebetween;
A first capacitor connected between the voltage signal input terminal and the control terminal;
A current signal input terminal to which a current signal is supplied; and
A first switch connected between the current signal input terminal and the control terminal;
A second switch connected between the current signal input terminal and the second terminal;
An output control switch having an input terminal connected to the second terminal;
A display element connected between a second power supply terminal and an output terminal of the output control switch;
In the writing operation of the display device, the video signal is set between the first and second terminals by setting the voltage signal input terminal to a first potential, opening the output control switch, and closing the first and second switches. And then opening the first switch, and simultaneously or after that, setting the voltage signal input terminal to a second potential different from the first potential.   The display device according to claim 1, wherein a control terminal of the first switch is connected to the voltage signal input terminal.   The display device according to claim 1, wherein the first switch is connected to the current signal input terminal via the second switch.   2. The display device according to claim 1, wherein each of the plurality of pixels further includes a second capacitor having one electrode connected to the control terminal and the other electrode connected to a constant voltage source.   The display device according to claim 1, wherein the display element is an organic EL element. A display device comprising a plurality of pixels arranged in a matrix, wherein each of the plurality of pixels is
A display element having an organic layer sandwiched between opposing electrodes;
A thin film transistor connected in series with the display element;
A first switch connected between a drain of the thin film transistor and a display element;
A first capacitor connected to the gate of the thin film transistor;
A second switch for connecting between the gate and drain of the thin film transistor;
A third switch connecting the drain of the thin film transistor and a signal input terminal;
A display device comprising: a second capacitor connected to a gate of the thin film transistor and a control terminal of the third switch.   The display device according to claim 6, wherein the second switch control terminal and the control terminal of the third switch are connected to the same scanning signal line.   The display device according to claim 6, wherein the second switch control terminal and the control terminal of the third switch are connected to different scanning signal lines.   The display device according to claim 6, further comprising a fourth switch between the second switch and the second capacitor. A plurality of pixels arranged in a matrix, and each of the plurality of pixels outputs a first terminal connected to the first power supply terminal, a control terminal, and a current corresponding to a voltage between them; A drive control element including a terminal, a display element connected between the second terminal and the second power supply terminal, and a capacitor connected between the control terminal and the voltage signal input terminal. A display device driving method comprising:
The voltage signal input terminal is set to a first potential and the output control switch is opened and the first and second switches are closed to pass a current as a video signal between the first and second terminals. A method comprising: opening a first switch, and simultaneously or thereafter, setting the voltage signal input terminal to a second potential different from the first potential.

Images