JP2005150482A - Magnetoresistance effect element and magnetic memory device - Google Patents

Magnetoresistance effect element and magnetic memory device Download PDF

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JP2005150482A
JP2005150482A JP2003387331A JP2003387331A JP2005150482A JP 2005150482 A JP2005150482 A JP 2005150482A JP 2003387331 A JP2003387331 A JP 2003387331A JP 2003387331 A JP2003387331 A JP 2003387331A JP 2005150482 A JP2005150482 A JP 2005150482A
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magnetic
spin
magnetization
film
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Koujirou Ogami
公二郎 屋上
Yoshishige Suzuki
義茂 鈴木
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National Institute of Advanced Industrial Science and Technology AIST
Sony Corp
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Sony Corp
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<P>PROBLEM TO BE SOLVED: To provide a magnetoresistance effect element, an inverting current and inverting current density of which are reduced by enhancing the efficiency of spin injection magnetization reversal, while maintaining a high rate of a change in magnetic reluctance independently of the reduction in the in-plane size and the film thickness of a storage cell, and to provide a magnetic memory device. <P>SOLUTION: The magnetoresistance effect element comprises a spin injection magnetization reversal element 10 including a magnetization free layer (storage layer) 1, and a first spin filter layer 2 and a second spin filter layer 12 located at both sides of the magnetization free layer while being magnetically separated by nonmagnetic spacer layers 3, 13 respectively. The magnetization directions of the spin filter layers are reversely fixed, and the magnetic memory device comprises an MRAM the memory cell part of which is configured with the magnetoresistance effect element. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、電流によるスピン注入磁化反転で磁化自由層に情報が書き込まれ、電流によって記憶情報が読み出されるように構成された磁気抵抗効果素子、及びこの磁気抵抗効果素子を用いた磁気メモリ装置に関するものである。   The present invention relates to a magnetoresistive effect element configured such that information is written to a magnetization free layer by spin injection magnetization reversal by current, and stored information is read by current, and a magnetic memory device using the magnetoresistive effect element Is.

不揮発性メモリとして、高速、高集積化、低消費電力のMRAM(Random Access Memory)が知られている。MRAMは例えば図13に示す構造からなっていて、メモリセルの記憶素子となるTMR(Tunneling Magneto Resistive)素子100は、磁化が比較的容易に回転する記憶層101と磁化固定層102とを含み、記憶層101と磁化固定層102との間には、絶縁体からなるトンネルバリア層103が挟持されており、記憶層101と磁化固定層102との磁気的結合を切るとともに、トンネル電流を流すための役割を担う。なお、記憶層101上のトップコート層や、磁化固定層102下の下地導電層は図示省略している。   As a nonvolatile memory, an MRAM (Random Access Memory) with high speed, high integration, and low power consumption is known. The MRAM has a structure shown in FIG. 13, for example, and a TMR (Tunneling Magneto Resistive) element 100 serving as a memory element of a memory cell includes a memory layer 101 and a magnetization fixed layer 102 whose magnetization rotates relatively easily, A tunnel barrier layer 103 made of an insulator is sandwiched between the storage layer 101 and the magnetization fixed layer 102 so that the magnetic coupling between the storage layer 101 and the magnetization fixed layer 102 is cut and a tunnel current flows. Play the role of Note that the top coat layer on the storage layer 101 and the underlying conductive layer under the magnetization fixed layer 102 are not shown.

そして、例えば、p型シリコン半導体基板104内に形成されたp型ウェル領域105内にはソース領域106、ドレイン領域107が形成され、これらの両領域間に形成されたゲート絶縁膜108及びゲート電極109と共にn型の読み出し用の絶縁ゲート型電界効果トランジスタ110を構成している。このトランジスタ110上には、書き込み用ワード線111、TMR素子100、ビット線112が配置されている(但し、層間絶縁膜は図示省略している)。ソース領域106には、ソース電極113を介してセンスライン114が接続されている。電界効果トランジスタ110は、読み出しのためのスイッチング素子として機能し、ワード線111とTMR素子100との間から引き出された読み出し用バイパス配線115がドレイン電極116を介してドレイン領域107に接続されている。   For example, a source region 106 and a drain region 107 are formed in a p-type well region 105 formed in the p-type silicon semiconductor substrate 104, and a gate insulating film 108 and a gate electrode formed between these regions. An insulated gate field effect transistor 110 for n-type readout is configured together with 109. A write word line 111, a TMR element 100, and a bit line 112 are disposed on the transistor 110 (however, an interlayer insulating film is not shown). A sense line 114 is connected to the source region 106 via a source electrode 113. The field effect transistor 110 functions as a switching element for reading, and a read bypass wiring 115 drawn from between the word line 111 and the TMR element 100 is connected to the drain region 107 via the drain electrode 116. .

情報の書き込みは、マトリックス状に配線したビット線112とワード線111とに電流を流し、その交点の合成磁場によってセル(記憶層101)の磁性スピンを反転させて、その向きを図14に示すように“1”、“0”の情報として記録する。また、読み出しは、磁気抵抗効果を応用したTMR効果(磁性スピンの向きによって抵抗値が変化する現象)を利用して行い、磁性スピンが反平行の抵抗の高い状態と、磁性スピンが平行の抵抗の低い状態により、情報の“1”、“0”を読み出し電流によって検出する。   In writing information, current is passed through the bit lines 112 and the word lines 111 wired in a matrix, and the magnetic spin of the cell (memory layer 101) is inverted by the synthetic magnetic field at the intersection, and the direction is shown in FIG. Thus, information is recorded as “1” and “0” information. In addition, reading is performed using the TMR effect (a phenomenon in which the resistance value changes depending on the direction of the magnetic spin) applying the magnetoresistive effect, and the state in which the magnetic spin is antiparallel and the resistance is high. In the low state, information “1” and “0” are detected by the read current.

しかしながら、こうしたMRAMにおける書き込みは、互いに直交したビット線112とワード線111(共に電流線)から生じる電流磁界により行われているので、記憶容量を高めるためにメモリセルを小さくすると、反転磁界が急激に増加し、これに伴って必要電流が急激に増加するという問題がある。また、メモリセルのサイズが、容量をギガビット(Gbit)超にするために必要な200nmφ程度以下になると、配線の許容電流密度の上限を超え、もはや書き込みが困難になるという問題がある。   However, such writing in the MRAM is performed by the current magnetic field generated from the bit line 112 and the word line 111 (both current lines) orthogonal to each other. Therefore, when the memory cell is reduced in order to increase the storage capacity, the reversal magnetic field rapidly increases. There is a problem that the required current increases rapidly. In addition, when the size of the memory cell is about 200 nmφ or less, which is necessary to make the capacity exceed gigabit (Gbit), the upper limit of the allowable current density of the wiring is exceeded, and there is a problem that writing becomes difficult.

これに対し、偏極スピン電流の供給(スピン注入)によって磁化反転させるスピン注入磁化反転は、メモリセルサイズが小さくなるほど磁化反転に必要な電流が小さくなる特徴があり、大容量磁気メモリの作製に好適である。   In contrast, spin injection magnetization reversal, which is reversed by supplying a polarized spin current (spin injection), has a feature that the current required for magnetization reversal decreases as the memory cell size decreases. Is preferred.

図15には、後述の非特許文献1、2に示された従来構造のスピン注入磁化反転素子(スピン注入磁化反転が可能な磁気抵抗効果素子)の一例120を示す。この主要な膜構成は、磁性膜からなる記憶層(磁化自由層)121と、非磁性のスペーサー層123と、磁性膜からなるスピンフィルター層(磁化固定層)122とからなり、適当な基板(図示せず)、更には反強磁性層124からなる下地膜上に、図示した順に多層に積層された後、記憶層121及び反強磁性層124上に図示していない電極が設けられる(この多層膜の積層順が上下逆であっても構わない)。この多層膜では、磁気抵抗効果膜を構成する磁化固定層(参照層としての磁性膜とも称される。)が、偏極スピン電流を得るためのスピンフィルター層122を兼ねている。即ち、記憶層121とスピンフィルター層(磁化固定層)122の磁化方向の相対角度の違いにより抵抗変化が生じる磁気抵抗効果膜の構成となっている(平行配列のときは抵抗小、反平行配列のときは抵抗大)。   FIG. 15 shows an example 120 of a spin transfer magnetization reversal element (a magnetoresistive effect element capable of spin transfer magnetization reversal) having a conventional structure shown in Non-Patent Documents 1 and 2 described later. This main film structure is composed of a storage layer (magnetization free layer) 121 made of a magnetic film, a nonmagnetic spacer layer 123, and a spin filter layer (magnetization pinned layer) 122 made of a magnetic film. Further, after being laminated in the order shown in the figure on the base film made of the antiferromagnetic layer 124, electrodes (not shown) are provided on the memory layer 121 and the antiferromagnetic layer 124 (this is not shown). The stacking order of the multilayer film may be reversed upside down). In this multilayer film, a magnetization fixed layer (also referred to as a magnetic film as a reference layer) constituting the magnetoresistive film also serves as a spin filter layer 122 for obtaining a polarized spin current. That is, the magnetoresistive effect film is configured such that a resistance change is caused by a difference in relative angle between the magnetization directions of the storage layer 121 and the spin filter layer (magnetization pinned layer) 122 (when the parallel arrangement is used, the resistance is small and the antiparallel arrangement is used). In the case of resistance is large).

ここで、スピンフィルター層122の飽和磁化(MS:単位体積当りの磁気モーメント)×膜厚(t)が、記憶層(磁化自由層)121のそれより大きくなるように設定される。或いは、スピンフィルター層122の単位面積当たりの磁気モーメント数が、記憶層121のそれより大きくなるように設定される、と言ってもよい。或いは、スピンフィルター層122の膜厚はこの磁性膜のスピン拡散長より大きくし、記憶層121の膜厚はこの磁性膜のスピン拡散長より小さくする、と言ってもよい。スピンフィルター層122と記憶層121が同一磁性材料からなっていれば、スピンフィルター層122の膜厚>記憶層121の膜厚となる。 Here, the saturation magnetization (M S : magnetic moment per unit volume) × film thickness (t) of the spin filter layer 122 is set to be larger than that of the storage layer (magnetization free layer) 121. Alternatively, it may be said that the number of magnetic moments per unit area of the spin filter layer 122 is set to be larger than that of the storage layer 121. Alternatively, the film thickness of the spin filter layer 122 may be larger than the spin diffusion length of the magnetic film, and the film thickness of the storage layer 121 may be smaller than the spin diffusion length of the magnetic film. If the spin filter layer 122 and the storage layer 121 are made of the same magnetic material, the film thickness of the spin filter layer 122> the film thickness of the storage layer 121.

記憶層121は、面内サイズが〜200nmφ以下の大きさになるように加工され、ほぼ単磁区化した記憶セルとなっている。記憶セルは、形状磁気異方性を持たせるため、縦横比(アスペクト比)を持つ形状、例えば楕円形(図17(B)参照)としてある。記憶セルの加工領域は、図15ではスピンフィルター層122まで含まれるように示されているが、スピンフィルター層122の上面で加工を停止し、図17(B)のようにスピンフィルター層122からの漏洩磁界が記憶層121に及ぶことを防止する形としてもよい。記憶セルはその周囲の非磁性絶縁膜(SiO2、Al23など)125に埋め込まれ、上部に電極142が成膜される。 The memory layer 121 is a memory cell that is processed so that the in-plane size is ˜200 nmφ or less, and is substantially made into a single magnetic domain. The memory cell has a shape having an aspect ratio (aspect ratio), for example, an ellipse (see FIG. 17B) in order to have shape magnetic anisotropy. Although the processing region of the memory cell is shown to include up to the spin filter layer 122 in FIG. 15, the processing is stopped on the upper surface of the spin filter layer 122, and from the spin filter layer 122 as shown in FIG. The leakage magnetic field may be prevented from reaching the storage layer 121. The memory cell is embedded in a surrounding nonmagnetic insulating film (SiO 2 , Al 2 O 3, etc.) 125, and an electrode 142 is formed thereon.

図17は、スピン注入磁化反転素子120をMRAMに組み込んだ構造例(1トランジスタ−1記憶セル:1T1J)を示し、例えば、p型シリコン半導体基板内に形成されたp型ウェル領域135内には、ソース領域136、ドレイン領域137が形成され、これらの両領域間に形成されたゲート絶縁膜138及びゲート電極139と共にn型の書き込み兼読み出し用の絶縁ゲート型電界効果トランジスタ130を構成している。このトランジスタ130上には、スピン注入磁化反転素子120が図示していないキャップ層140を介してビット線142に接続されている(但し、層間絶縁膜141は簡略図示している)。ソース領域136にはプラグ143a及びソース電極143を介してセンスラインが接続されている。電界効果トランジスタ130のドレイン領域137は、ドレイン電極146及びプラグ146aを介して素子120に接続されている。なお、このMRAMでは、後述する書き込み及び読み出しには、TMR素子を用いた図13のメモリセルには必要である書き込み用ワード線や読み出し用バイパス配線は不要である。   FIG. 17 shows a structural example (1 transistor-1 memory cell: 1T1J) in which the spin transfer magnetization switching element 120 is incorporated in the MRAM. For example, in the p-type well region 135 formed in the p-type silicon semiconductor substrate, FIG. The source region 136 and the drain region 137 are formed, and together with the gate insulating film 138 and the gate electrode 139 formed between these regions, an n-type insulated gate field effect transistor 130 for writing and reading is configured. . On this transistor 130, the spin transfer magnetization switching element 120 is connected to the bit line 142 via a cap layer 140 (not shown) (however, the interlayer insulating film 141 is shown in a simplified manner). A sense line is connected to the source region 136 through a plug 143a and a source electrode 143. The drain region 137 of the field effect transistor 130 is connected to the element 120 via the drain electrode 146 and the plug 146a. In this MRAM, a write word line and a read bypass wiring which are necessary for the memory cell of FIG. 13 using a TMR element are unnecessary for writing and reading described later.

図15において、磁性膜中に描かれた矢印は、磁化方向を示す。記憶層(磁化自由層)121の磁化は、図において右又は左に自由に反転できる。スピンフィルター層122の磁化は、一方向に固定されており、膜面垂直に流れる偏極スピン電流を形成するためのスピンフィルターとして機能する。スピンフィルター層122の磁化は、図15では反強磁性層(AF層)124との交換結合により固定されている。こうしたAF層を用いずに、記憶層121とスピンフィルター層122の保磁力の違いを利用した、いわゆる保磁力差型としてもよい(以下、同様)。   In FIG. 15, an arrow drawn in the magnetic film indicates the magnetization direction. The magnetization of the storage layer (magnetization free layer) 121 can be freely reversed to the right or left in the figure. The magnetization of the spin filter layer 122 is fixed in one direction, and functions as a spin filter for forming a polarized spin current that flows perpendicular to the film surface. The magnetization of the spin filter layer 122 is fixed by exchange coupling with the antiferromagnetic layer (AF layer) 124 in FIG. Instead of using such an AF layer, a so-called coercive force difference type using the difference in coercivity between the memory layer 121 and the spin filter layer 122 may be used (the same applies hereinafter).

非磁性スペーサー層123の構成材料としては、Cu、Al23などが用いられる。前者ではGMR膜(巨大磁気抵抗効果膜)に、後者ではTMR膜(トンネル磁気抵抗効果膜)となる。スペーサー層123の厚みは、スペーサー材料、磁性膜間の磁気的層間相互作用、素子の抵抗値等を考慮して、適宜決められる。スペーサー層123に金属膜を用いたCPP−GMR膜(面直電流巨大磁気抵抗効果膜)としての構造を取る場合は、記憶層121とスピンフィルター層122との磁気的層間相互作用が生じないように、〜5nm以上の厚さとする。これが厚すぎると、伝導電子の散乱が増えるため、数十nm程度以下としておくのが望ましい。スペーサー層123にAl23を用いたTMR膜としての構造を取る場合は、印加電圧による絶縁破壊を防ぐため、TMR膜の抵抗と膜面積との積RAが数Ωμm2以下となるように、Al23膜厚を設定しなければならない(おおよそ、0.5〜0.7nm)。 As a constituent material of the nonmagnetic spacer layer 123, Cu, Al 2 O 3 or the like is used. The former is a GMR film (giant magnetoresistive film), and the latter is a TMR film (tunnel magnetoresistive film). The thickness of the spacer layer 123 is appropriately determined in consideration of the spacer material, the magnetic interlayer interaction between the magnetic films, the resistance value of the element, and the like. When the spacer layer 123 has a structure as a CPP-GMR film (a direct current giant magnetoresistive film) using a metal film, a magnetic interlayer interaction between the memory layer 121 and the spin filter layer 122 does not occur. And a thickness of ˜5 nm or more. If it is too thick, scattering of conduction electrons increases, so it is desirable that the thickness be about several tens of nm or less. When the spacer layer 123 has a structure as a TMR film using Al 2 O 3 , the product RA of the resistance and the film area of the TMR film is set to be several Ωμm 2 or less in order to prevent dielectric breakdown due to the applied voltage. , Al 2 O 3 film thickness must be set (approximately 0.5 to 0.7 nm).

屋上公二郎:第50回応用物理学関係連合講演会,(2003),27p-N-1;応用磁気学会第1回ナノマグネティクス専門研究会,(2003.4.25);産総研ワークショップ「スピントロニクスの新しい潮流」,(2003.6.3〜4),21;K.Yagami,A.Tulapurkar and Y.Suzuki:PASPS-9,(2003.6.11〜12),D7,228-231.Kojiro Rooftop: 50th Joint Conference on Applied Physics, (2003), 27p-N-1; 1st Technical Meeting on Nanomagnetics, Japan Society of Applied Magnetics, (2003.4.25); AIST Workshop “Spintronics New tides, ”(2003.6.3-4), 21; K. Yagami, A. Tulapurkar and Y. Suzuki: PASPS-9, (2003.6.11-12), D7, 228-231. 屋上公二郎・鈴木義茂:“まてりあ”第42巻 第9号(2003) P640〜647「スピン注入磁化反転の現状と課題」Kojiro Rooftop and Yoshishige Suzuki: “Materia” Vol. 42, No. 9 (2003) P640-647 “Current Status and Issues of Spin-Injection Magnetization Reversal”

しかしながら、現状では、スピン注入磁化反転には、数mAの電流及び107A/cm2台の電流密度が必要であり、TMR膜を用いた記憶素子の絶縁破壊、素子選択用FET(電界効果トランジスタ)のブレークダウン等の問題が生じる。また、反転電流又は電流密度を下げるために、関係する因子を調整すると、熱揺らぎ耐性の低下や磁化反転時間の増大を招くという問題がある。更に、磁化配列が平行から反平行になる反転電流IC と、反平行から平行になる反転電流IC -の値が異なる(|IC |>|IC -|)という、本質的な問題(反転電流の非対称性)を抱えるが、これについては詳細に後述する。 However, at present, the spin injection magnetization reversal requires a current of several mA and a current density of 10 7 A / cm 2 , and the dielectric breakdown of the memory element using the TMR film, the element selection FET (field effect) Problems such as breakdown of transistors) occur. In addition, adjusting related factors in order to lower the reversal current or current density has the problem of reducing the resistance to thermal fluctuations and increasing the magnetization reversal time. Further, the value of the reversal current I C + that changes the magnetization arrangement from parallel to anti-parallel and the reversal current I C that changes from anti-parallel to parallel are different (| I C + |> | I C |). However, this will be described later in detail.

反転電流を低減するために、例えば、記憶セルの面積を減らせば、それに比例して反転電流は減少するものの電流密度は減少しない。また、この方法では、反転電流が減少しても、記憶セル面積の減少に伴って素子抵抗が増大するため、素子に印加する電圧は減少せず、従って、素子の絶縁破壊やFETのブレークダウンを回避することはできない。   In order to reduce the reversal current, for example, if the area of the memory cell is reduced, the reversal current is reduced proportionally, but the current density is not reduced. In this method, even if the inversion current decreases, the element resistance increases as the memory cell area decreases, so the voltage applied to the element does not decrease. Therefore, the breakdown of the element or the breakdown of the FET Cannot be avoided.

また、記憶セルの厚みを低減すれば、反転電流と電流密度は共に減少するが、記憶層(磁化自由層)に隣接する上下の膜との界面反応等を考慮した実用上の下限厚み(2nm程度)まで減らしても、まだ不十分であり、しかも、膜厚をこれ以上に大幅に低減させることは困難である。   Further, if the thickness of the memory cell is reduced, both the reversal current and the current density are reduced, but a practical lower limit thickness (2 nm) in consideration of the interface reaction between the upper and lower films adjacent to the memory layer (magnetization free layer). However, it is difficult to significantly reduce the film thickness further.

以上のような記憶セルの面内サイズ又は膜厚の減少は、記憶セルの体積Vを減少させることとなり、従ってメモリセルの磁気異方性エネルギーKuVを低下させ、その結果、熱揺らぎ耐性(KUV/kBT)を低下させることとなるため、望ましくない。反転電流はメモリセル体積にほぼ比例するため、体積を一桁減らせば反転電流も一桁低減できる。しかし、熱揺らぎ耐性も一桁下がってしまい、磁気メモリとして必要とされているKUV/kB300K>60を維持することが困難となる(KU:単位体積当たりの磁気異方性エネルギー、kB:ボルツマン定数、T:温度、一般には300K)。 Decrease in plane size or thickness of the above-described memory cells, it becomes possible to reduce the volume V of the memory cell, thus reducing the magnetic anisotropic energy K u V of the memory cell, as a result, the thermal fluctuation resistance (K U V / k B T) is lowered, which is not desirable. Since the reversal current is substantially proportional to the memory cell volume, the reversal current can be reduced by an order of magnitude if the volume is reduced by an order of magnitude. However, the thermal fluctuation resistance is also reduced by an order of magnitude, making it difficult to maintain K U V / k B T 300K > 60, which is required as a magnetic memory (K U : magnetic anisotropy per unit volume). Energy, k B : Boltzmann constant, T: temperature, generally 300 K).

また、記憶層の飽和磁化MSの低減は、反転電流IC及び反転電流密度JCがMSの2乗にほぼ比例するため、反転電流及び反転電流密度の低減に有効であるが、熱揺らぎ耐性が低下する。 The reduction of the saturation magnetization M S of the memory layer is effective in reducing the reversal current and the reversal current density because the reversal current I C and the reversal current density J C are approximately proportional to the square of M S. Fluctuation resistance decreases.

記憶層の膜厚方向の反磁界を低減することは、反転電流及び反転電流密度の低減に有効であるが、磁化反転時間が増加する。   Reducing the demagnetizing field in the film thickness direction of the memory layer is effective in reducing the reversal current and reversal current density, but increases the magnetization reversal time.

記憶層の分極率を向上することは、熱揺らぎ耐性や反転時間に影響せず、反転電流及び反転電流密度を低減できるが、理想的な分極率1.0の材料(ハーフメタル)を用いても、反転電流及び反転電流密度は半分程度にしか減少しない。   Improving the polarizability of the memory layer does not affect the thermal fluctuation resistance and inversion time, and can reduce the inversion current and the inversion current density, but using an ideal polarizability 1.0 material (half metal) However, the reversal current and reversal current density are only reduced to about half.

一方、セルサイズを数μmのオーダーにして多磁区化し、膜面垂直に流す電流が生成する電流磁界を利用して磁化反転することにより、106A/cm2台の電流密度で磁化反転することも報告されているが、反転電流が数十mAと大きく、また、セルサイズが大きいため、メモリの大容量化ができないという問題がある。 On the other hand, magnetization is reversed at a current density of 10 6 A / cm 2 by using a magnetic field generated by a current flowing perpendicularly to the film surface by making the cell size into the order of several μm to form multiple magnetic domains. However, since the reversal current is as large as several tens mA and the cell size is large, there is a problem that the capacity of the memory cannot be increased.

TMR膜の抵抗を極めて小さくすることにより、絶縁破壊を起こすことなくスピン注入磁化反転を行うことは可能であるが、磁気抵抗変化率が減少するため、S/N比が低下し、磁気メモリとして用いることは困難である。例えば、抵抗と記憶セルの面積の積RAを数Ωμm2まで低減することにより、磁化反転に必要な電圧は0.5V程度となり、このときのTMR膜の絶縁破壊電圧を0.7〜0.8V以下とすることができる。しかし、このとき、磁気メモリとしてのS/N比を確保するために要求されるTMR比は40%以上であり、実際のTMR比が数%程度であることから、現状では使用が困難である。 By making the resistance of the TMR film extremely small, it is possible to perform spin injection magnetization reversal without causing dielectric breakdown. However, since the magnetoresistance change rate is reduced, the S / N ratio is lowered, and the magnetic memory It is difficult to use. For example, by reducing the product RA of the resistance and the area of the memory cell to several Ωμm 2 , the voltage required for the magnetization reversal becomes about 0.5 V, and the dielectric breakdown voltage of the TMR film at this time is 0.7 to 0. It can be 8 V or less. However, at this time, the TMR ratio required for securing the S / N ratio as a magnetic memory is 40% or more, and the actual TMR ratio is about several percent, so that it is difficult to use at present. .

以上のように、熱揺らぎ耐性を低下させず、反転時間を増大させずに、高い磁気抵抗変化率を持ちつつ、IC及びJCを低減することが望まれているが、未だ実現されていない。 As described above, it is desired to reduce I C and J C while maintaining a high rate of change in magnetic resistance without reducing thermal fluctuation resistance and without increasing the inversion time, but it has not yet been realized. Absent.

次に、スピン注入磁化反転のおおよその説明を行う。書き込みに必要な電流は、膜面に垂直(即ち、多層膜の積層方向)に流される。図15では、電子を記憶層(磁化自由層)121からスピンフィルター層122に流す向きを+電流(+I)、その逆を−電流(−I)と定義している。図中、電子は●で表されており、●上の矢印はスピンの向きを表す。   Next, an approximate description of spin injection magnetization reversal will be given. A current necessary for writing is passed in a direction perpendicular to the film surface (that is, the stacking direction of the multilayer film). In FIG. 15, the direction in which electrons flow from the storage layer (magnetization free layer) 121 to the spin filter layer 122 is defined as + current (+ I), and the opposite is defined as −current (−I). In the figure, electrons are represented by ●, and the arrow above ● represents the direction of spin.

−Iの場合、ダウンスピン(スピンフィルター層122の磁化方向と反平行のスピン)はスピンフィルター層122で反射されるが、アップスピン(スピンフィルター層122の磁化方向と平行のスピン)は抵抗なくスピンフィルター層122を通過し、記憶層121に入る。記憶層121に入ったアップスピン(s電子)は、記憶層121の磁気モーメント(d電子)と相互作用し(sd-interaction)、記憶層121の磁気モーメントに反転のためのトルクを与え、記憶層121の磁化をスピンフィルター層122のそれと平行に揃える。   In the case of −I, the down spin (spin parallel to the magnetization direction of the spin filter layer 122) is reflected by the spin filter layer 122, but the up spin (spin parallel to the magnetization direction of the spin filter layer 122) has no resistance. Passes through the spin filter layer 122 and enters the storage layer 121. The upspin (s electrons) that enters the memory layer 121 interacts with the magnetic moment (d electrons) of the memory layer 121 (sd-interaction), gives a torque for reversal to the magnetic moment of the memory layer 121, and stores the memory. The magnetization of the layer 121 is aligned parallel to that of the spin filter layer 122.

一方、+Iの場合、記憶層121は十分薄い(記憶層121の膜厚が記憶層磁性膜のスピン拡散長以下)ため、アップスピン、ダウンスピンともに通過できるが、アップスピンがスピンフィルター層122を抵抗なく通過するのに対し、ダウンスピンはスピンフィルター層122の表面で反射され、スピン角運動量を保ったまま(スピンの方向を変えずに)記憶層121内に戻る。この反射されたダウンスピンは電界の作用で再び記憶層121を通過し、スピンフィルター層122との界面で再び反射される。即ち、ダウンスピンは多重反射を起こし、見掛け上、記憶層121に流れ込むダウンスピン(s電子)はアップスピン(s電子)より多くなる。この結果、sd-interactionはダウンスピンの影響が勝り、記憶層121の磁化は図中の左向き、つまり、スピンフィルター層122の磁化と逆向きとなり、反平行配列が実現される。   On the other hand, in the case of + I, the storage layer 121 is sufficiently thin (the thickness of the storage layer 121 is equal to or less than the spin diffusion length of the storage layer magnetic film), so that both upspin and downspin can pass through, but upspin passes through the spin filter layer 122. While passing without resistance, the down spin is reflected by the surface of the spin filter layer 122 and returns to the storage layer 121 while maintaining the spin angular momentum (without changing the spin direction). The reflected down spin passes through the memory layer 121 again by the action of the electric field, and is reflected again at the interface with the spin filter layer 122. That is, the down spin causes multiple reflection, and apparently, the down spin (s electrons) flowing into the storage layer 121 is larger than the up spin (s electrons). As a result, the sd-interaction has the effect of downspin, and the magnetization of the storage layer 121 is directed to the left in the drawing, that is, opposite to the magnetization of the spin filter layer 122, thereby realizing an antiparallel arrangement.

上記した原理から分かるように、図16(A)に示すような反平行配列から平行配列への反転の実現においては、電流中のアップスピンのみが記憶層121の磁気モーメント(d電子)に作用するのに対し、図16(B)に示すような平行配列から反平行配列への反転の実現においては、電流中のダウンスピン電子とともにアップスピン電子の作用が加わる。後者の場合、ダウンスピン電子によって反転した磁気モーメントをアップスピン電子が元に戻そうとするトルクを与えるため、平行配列から反平行配列にするために必要な反転電流は、反平行配列から平行配列にするための反転電流より大きくなる。即ち、反転電流の非対称性が生じる。   As can be seen from the above principle, in the realization of the inversion from the antiparallel arrangement to the parallel arrangement as shown in FIG. 16A, only the upspin in the current acts on the magnetic moment (d electrons) of the memory layer 121. On the other hand, in the realization of the inversion from the parallel arrangement to the antiparallel arrangement as shown in FIG. 16B, the action of the up spin electrons is added together with the down spin electrons in the current. In the latter case, the reverse current required to change the parallel moment from the antiparallel arrangement to the parallel arrangement is applied to give the torque that the up spin electrons reverse the magnetic moment reversed by the down spin electrons. It becomes larger than the reversal current for That is, the asymmetry of the reversal current occurs.

ここで、文献“まてりあ” 第42巻 第9号(2003) P640〜647 「スピン注入磁化反転の現状と課題」において述べられている磁化反転の臨界電流式を示す。記憶層磁性膜の磁気モーメントがθ=0又はπに収束する(即ち、緩和する)と仮定して、スピントルク項を加えた拡張LLG(ランダウ・リフシッツ・ギルバート)方程式を解析的に解くと、反転電流としてのIC P→AP(磁化配列平衡状態が平行状態から反平行状態になる臨界電流値)及びIC AP→P(磁化配列平衡状態が反平行状態から平行状態になる臨界電流値)は、それぞれ次の(1)及び(2)式のように表される。 Here, the critical current equation of magnetization reversal described in the literature “Materia” Vol. 42 No. 9 (2003) P640-647 “Present state and problems of spin injection magnetization reversal” is shown. Assuming that the magnetic moment of the memory layer magnetic film converges to θ = 0 or π (that is, relaxes), an extended LLG (Landau-Lifschitz-Gilbert) equation with a spin torque term is solved analytically, I C P → AP (the critical current value at which the magnetization arrangement equilibrium is from the parallel state to the antiparallel state) and I C AP → P (the critical current value at which the magnetization arrangement equilibrium is from the antiparallel state to the parallel state) ) Are respectively expressed by the following equations (1) and (2).

Figure 2005150482
[ここで、eは電子の電荷、αは制動係数、γはジャイロ磁気定数(>0)、θは記憶層磁性膜の磁化方向とスピンフィルター層(磁化固定層)磁性膜の磁化方向との成す角、Hextは外部印加磁界、Haniは記憶層の異方性磁界であって、一軸異方性を持つ単磁区の記憶層においてはHCに等しい。MSは記憶層の飽和磁化、μBはボーア磁子、A及びdはそれぞれ記憶層の面積と厚さである。2πMSは、膜厚方向の反磁界に相当する(4πMSの1/2)。g(θ)(>0)はスピン注入磁化反転効率を表し、g(0)はθ=0、即ち、磁化平行配列から反平行配列への反転のとき、g(π)はθ=π、即ち、磁化反平行配列から平行配列への反転のときのスピン注入磁化反転効率である。]
Figure 2005150482
[Where e is the charge of the electron, α is the damping coefficient, γ is the gyromagnetic constant (> 0), θ is the magnetization direction of the magnetic film of the storage layer and the magnetization direction of the magnetic film of the spin filter layer (magnetization fixed layer). The angle formed, H ext is an externally applied magnetic field, and H ani is the anisotropic magnetic field of the memory layer, and is equal to H C in a single magnetic domain memory layer having uniaxial anisotropy. M S is the saturation magnetization of the storage layer, μ B is the Bohr magneton, and A and d are the area and thickness of the storage layer, respectively. 2πM S corresponds to a demagnetizing field in the film thickness direction (1/2 of 4πM S ). g (θ) (> 0) represents spin injection magnetization reversal efficiency, and g (0) is θ = 0, that is, g (π) is θ = π, when reversal from magnetization parallel arrangement to antiparallel arrangement is performed. That is, it is the spin injection magnetization reversal efficiency when reversing from the magnetization antiparallel arrangement to the parallel arrangement. ]

これらの式(1)、(2)において、g(θ)は、スピン依存透過率及び多層膜システム中で起こり得るスピン・フリップ散乱等に関係した幾何学的(geometric)なスカラー関数であり、次の(3)式のように表される。

Figure 2005150482
In these equations (1) and (2), g (θ) is a geometric scalar function related to the spin-dependent transmittance and the spin-flip scattering that can occur in the multilayer system. It is expressed as the following equation (3).
Figure 2005150482

この式(3)において、Pの値によらず、g(0)<g(π)であるから、上記の式(1)、(2)における分子の[ ]内の磁界項によらず、常に|IC P→AP|>|IC AP→P|となることが分かる(Hext=0とする)。 In this equation (3), g (0) <g (π) regardless of the value of P. Therefore, regardless of the magnetic field term in [] of the molecule in the above equations (1) and (2), It can be seen that | I C P → AP |> | I C AP → P | (H ext = 0).

本発明の目的は、記憶セルの面内サイズや膜厚の減少に依ることなしに、高い磁気抵抗変化率を保持しつつ磁化反転の効率を向上させ、反転電流及び反転電流密度を低減した磁気抵抗効果素子及び磁気メモリ装置を提供することにある。   The object of the present invention is to improve the efficiency of magnetization reversal while maintaining a high rate of change in magnetic resistance without reducing the in-plane size and film thickness of the memory cell, and to reduce the reversal current and reversal current density. A resistive effect element and a magnetic memory device are provided.

即ち、本発明は、磁化自由層(記憶層)と、この磁化自由層の両側に磁気的に分離されてそれぞれ配置された第1磁性層及び第2磁性層(スピンフィルター層又は磁化固定層)とを有し、これらの磁性層の磁化方向が互いに逆向きに固定されている磁気抵抗効果素子、及びこの磁気抵抗効果素子がメモリセル部を構成している磁気メモリ装置に係るものである。   That is, the present invention provides a magnetization free layer (storage layer), and a first magnetic layer and a second magnetic layer (spin filter layer or magnetization pinned layer) that are magnetically separated and arranged on both sides of the magnetization free layer, respectively. And a magnetoresistive effect element in which the magnetization directions of these magnetic layers are fixed to be opposite to each other, and a magnetoresistive memory device in which the magnetoresistive effect element constitutes a memory cell portion.

本発明によれば、磁化自由層(記憶層)の両側、具体的にはその上下に、磁化方向が互いに逆向きの第1及び第2磁性層を磁気的に絶縁して配置することにより、記憶層に偏極スピン電流を注入することによる磁化反転の効率、特に平行配列→反平行配列にするための反転効率(上述したg(0))が著しく向上し、その結果、磁化反転電流及び反転電流密度を共に従来構造より一桁以上低減することが可能となる。記憶セルの大きさ、非磁性スペーサーの材料、磁性膜の材料にもよるが、〜200nmφ以下の大きさの記憶セルにおける磁化反転電流を1mA以下、反転電流密度を〜5×106A/cm2以下にすることができる。 According to the present invention, the first and second magnetic layers whose magnetization directions are opposite to each other are magnetically insulated and arranged on both sides of the magnetization free layer (storage layer), specifically on the upper and lower sides thereof. The efficiency of magnetization reversal by injecting a polarized spin current into the memory layer, particularly the reversal efficiency (g (0) described above) for making the parallel arrangement → antiparallel arrangement significantly improved. As a result, the magnetization reversal current and Both reversal current densities can be reduced by an order of magnitude or more from the conventional structure. Depending on the size of the memory cell, the material of the nonmagnetic spacer, and the material of the magnetic film, the magnetization reversal current is 1 mA or less and the reversal current density is ~ 5 × 10 6 A / cm in a memory cell having a size of ~ 200 nmφ or less. Can be 2 or less.

このように、記憶セルにおける反転電流を1mA以下にできるため、従来のように記憶セルのRAを数Ωμm2と極端に小さくする必要がなく、数十Ωμm2のRAの記憶セルにおいてもスピン注入磁化反転が可能となる。このため、低抵抗化(数Ωμm2)によりスピン注入磁化反転を可能とした従来の磁気抵抗効果素子より製造が容易で、製造歩留まりが高く、信頼性も高くなり、また、従来の磁気抵抗効果素子より絶縁破壊電圧が高く、更に磁気抵抗比(磁気抵抗変化率)が高くなる。 As described above, since the reversal current in the memory cell can be reduced to 1 mA or less, it is not necessary to make the RA of the memory cell extremely small as several Ωμm 2 as in the prior art, and spin injection is also performed in the memory cell of several tens of Ωμm 2 RA. Magnetization reversal becomes possible. For this reason, it is easier to manufacture than conventional magnetoresistive elements that enable spin injection magnetization reversal due to low resistance (several Ωμm 2 ), high manufacturing yield, high reliability, and conventional magnetoresistive effect. The breakdown voltage is higher than that of the element, and the magnetoresistance ratio (magnetoresistivity change rate) is further increased.

従って、本発明によれば、記憶セルのMSや体積を下げることなく、スピン注入磁化反転の効率を向上することにより反転電流を低減するので、熱揺らぎ耐性の低下がなく、また、反転時間の増大もない。このように反転電流及び反転電流密度を低減した上で、熱揺らぎ耐性(KUV/kB300K)>60、及び反転時間(τ)<〜5nsecを実現できる。 Therefore, according to the present invention, without decreasing the M S and volume of the storage cell, since reducing the switching current by improving the efficiency of spin injection magnetization reversal, there is no reduction in thermal stability, also, the inversion time There is no increase. Thus, after reducing the inversion current and the inversion current density, it is possible to realize the thermal fluctuation resistance (K U V / k B T 300K )> 60 and the inversion time (τ) <˜5 nsec.

熱揺らぎ耐性は、記憶セルの形状に主に依存する保磁力HC(又は異方性磁界)を大きくすることにより向上できるが、反転電流も増大してしまう。本発明によれば、HC増大による反転電流増加を十分に上回る反転電流低減効果が得られるため、HCを従来の構造より一桁以上大きくすることが可能となる。これに伴い、磁化反転時間τの低減、書き込み状態に対する外乱磁界の影響の低減、外部磁界による反転電流の変動の低減等の効果が得られる。 Thermal fluctuation resistance can be improved by increasing the coercive force H C (or anisotropic magnetic field), which mainly depends on the shape of the memory cell, but the reversal current also increases. According to the present invention, since the effect of reducing the reversal current sufficiently exceeding the increase in reversal current due to the increase in H C can be obtained, it becomes possible to make H C larger by one digit or more than the conventional structure. Along with this, effects such as reduction of the magnetization reversal time τ, reduction of the influence of the disturbance magnetic field on the write state, and reduction of fluctuation of the reversal current due to the external magnetic field can be obtained.

また、本発明によれば、HCのばらつきの反転電流値への影響が小さいため、記憶セルの形状制御に対する要求が緩くなり、量産するに当たって有利である。 Further, according to the present invention, since the influence of HC variation on the reversal current value is small, the demand for memory cell shape control is relaxed, which is advantageous in mass production.

スピン注入磁化反転は、電流を流す向きを変えることにより記憶層の磁化方向を変えることができるが、本発明によれば、±両電流方向において電流のスピン偏極率を同じにすることができるため、IC ±の大きさに差が生じず、反転電流の非対称性の問題がなくなる。 Spin injection magnetization reversal can change the magnetization direction of the storage layer by changing the direction of current flow. However, according to the present invention, the current spin polarization can be made the same in both current directions. Therefore, there is no difference in the magnitude of I C ± , and the problem of asymmetry of the reversal current is eliminated.

また、本発明によれば、スピン偏極した電流(電子)が記憶層を通過しつつ多重反射するため、記憶層磁性膜の実効的な分極率が向上し、磁気抵抗比が向上する。即ち、記憶層の材料を変えることなく、その実効的分極率を向上できるのである。   According to the present invention, since the spin-polarized current (electrons) is reflected multiple times while passing through the storage layer, the effective polarizability of the storage layer magnetic film is improved and the magnetoresistance ratio is improved. That is, the effective polarizability can be improved without changing the material of the memory layer.

更に、本発明によれば、微小な電流によって磁気抵抗効果素子におけるスピン注入磁化反転が可能になるため、MRAMにおける書き込みをスピン注入磁化反転で効率良く行なうことが可能となる。このため、素子の微細化(記憶セルサイズが0.2μmφ以下)が可能となり、MRAMのGbit超の大容量化が可能になり、またスケーリングが可能であり、縮小する設計ルールに対応して容量を高めることができる。また、1bitに相当する素子面積を、理論上の最小面積である6F2(Fは設計ルールによる配線幅に相当)に低減できる。 Furthermore, according to the present invention, spin injection magnetization reversal in the magnetoresistive effect element can be performed by a minute current, and therefore, writing in the MRAM can be efficiently performed by spin injection magnetization reversal. For this reason, it is possible to miniaturize the element (memory cell size is 0.2 μmφ or less), to increase the capacity of the MRAM beyond Gbit, and to scale the capacity corresponding to the design rule to be reduced. Can be increased. Further, the element area corresponding to 1 bit can be reduced to 6F 2 (F is equivalent to the wiring width according to the design rule) which is the theoretical minimum area.

更に、スピン注入磁化反転が可能となることから構造も簡素化する。即ち、電流磁界発生用のワード線が不要になり、素子とFETのドレインをつなぐバイパス線が不要となり、電流磁界収束用に電流線の周りに磁性膜を配置するクラッド構造が不要となる。素子に流す電流の大きさを変えることにより書き込みと読み出しを制御できるため、制御回路が簡略になり、例えば、100μA程度の電流で書き込みが行われ、10μA程度の電流で信号の読み出しが行える。   Furthermore, since the spin injection magnetization can be reversed, the structure is simplified. That is, a current magnetic field generating word line is not required, a bypass line connecting the element and the drain of the FET is not required, and a clad structure in which a magnetic film is disposed around the current line for current magnetic field convergence is not required. Since writing and reading can be controlled by changing the magnitude of the current flowing through the element, the control circuit is simplified. For example, writing is performed with a current of about 100 μA, and a signal can be read with a current of about 10 μA.

以上により、超低消費電力で高速応答の大容量不揮発性磁気メモリ(MRAM)を実現できる。   As described above, a large-capacity nonvolatile magnetic memory (MRAM) with ultra-low power consumption and high-speed response can be realized.

本発明の磁気抵抗効果素子及び磁気メモリ装置においては、その磁気抵抗効果及びスピン注入磁化反転を効果的に生じさせるため、前記第1磁性層及び前記第2磁性層の単位面積当りの磁気モーメント数が前記磁化自由層のそれより大きいことが必要である。前記磁化自由層の厚さとしては、磁性膜材料にもよるが、例えば1〜10nm(望ましくは1〜5nm)とするのがよい。   In the magnetoresistive element and the magnetic memory device of the present invention, the number of magnetic moments per unit area of the first magnetic layer and the second magnetic layer in order to effectively cause the magnetoresistive effect and the spin transfer magnetization reversal. Needs to be larger than that of the magnetization free layer. The thickness of the magnetization free layer is, for example, 1 to 10 nm (preferably 1 to 5 nm), although it depends on the magnetic film material.

素子構造は、前記第1磁性層と、非磁性スペーサーとしての第1非磁性層と、前記磁化自由層と、非磁性スペーサーとしての第2非磁性層と、前記第2磁性層との積層体によって構成されているのがよい。   The element structure includes a laminate of the first magnetic layer, a first nonmagnetic layer as a nonmagnetic spacer, the magnetization free layer, a second nonmagnetic layer as a nonmagnetic spacer, and the second magnetic layer. It is good to be constituted by.

この場合、前記積層体の積層方向に流す電流によるスピン注入磁化反転で前記磁化自由層に情報が書き込まれると共に、前記第1磁性層及び前記第2磁性層がスピンフィルター層として機能し、かつ前記積層方向に流す電流によって記憶情報が読み出されるように構成されてよい。例えば、前記第1磁性層と前記第1非磁性層と前記磁化自由層とが第1巨大磁気抵抗効果膜を構成し、前記第2磁性層と前記第2非磁性層と前記磁化自由層とが第2巨大磁気抵抗効果膜を構成している。   In this case, information is written to the magnetization free layer by spin injection magnetization reversal by a current flowing in the stacking direction of the stacked body, the first magnetic layer and the second magnetic layer function as a spin filter layer, and The stored information may be read by a current flowing in the stacking direction. For example, the first magnetic layer, the first nonmagnetic layer, and the magnetization free layer constitute a first giant magnetoresistive film, and the second magnetic layer, the second nonmagnetic layer, and the magnetization free layer, Constitutes the second giant magnetoresistive film.

磁気抵抗効果を用いた情報の読み出し(出力)のためには、前記磁化自由層を中心として、その両側の積層構造が互いに非対称に形成されていることが望ましい。   In order to read (output) information using the magnetoresistive effect, it is desirable that the laminated structures on both sides of the magnetization free layer are formed asymmetric with respect to each other.

この場合、前記第1磁性層及び前記第2磁性層のそれぞれの側に、情報書き込み用及び情報読み出し用の端子が設けられていてよいが、磁化自由層の両側の積層構造が対称に形成されていても、前記第1磁性層及び前記第2磁性層のそれぞれの側に情報書き込み用及び情報読み出し用の端子が設けられていると共に、前記磁化自由層にも情報読み出し用の端子が設けられていると、所望の出力を得ることができる。   In this case, terminals for information writing and information reading may be provided on the respective sides of the first magnetic layer and the second magnetic layer, but the laminated structures on both sides of the magnetization free layer are formed symmetrically. However, information writing terminals and information reading terminals are provided on the respective sides of the first magnetic layer and the second magnetic layer, and information reading terminals are also provided in the magnetization free layer. If desired, a desired output can be obtained.

また、前記第1磁性層と前記第1非磁性層と前記磁化自由層とが巨大磁気抵抗効果膜を構成し、前記第2磁性層と前記第2非磁性層と前記磁化自由層とが巨大磁気抵抗効果膜を構成していなくてもよい。或いは、前記第1磁性層と前記第1非磁性層と前記磁化自由層とが巨大磁気抵抗効果膜を構成しているか或いは構成しておらず、前記第2磁性層と前記第2非磁性層と前記磁化自由層とがトンネル磁気抵抗効果膜を構成していると、このトンネル磁気抵抗効果膜によって十分な出力を取り出すことができる。   The first magnetic layer, the first nonmagnetic layer, and the magnetization free layer constitute a giant magnetoresistive film, and the second magnetic layer, the second nonmagnetic layer, and the magnetization free layer are giant. The magnetoresistive film need not be configured. Alternatively, the first magnetic layer, the first nonmagnetic layer, and the magnetization free layer may or may not constitute a giant magnetoresistive film, and the second magnetic layer and the second nonmagnetic layer And the magnetization free layer constitute a tunnel magnetoresistive film, a sufficient output can be taken out by the tunnel magnetoresistive film.

なお、前記第1磁性層及び/又は前記第2磁性層にそれぞれ、これらの各磁性層の磁化方向を交換結合により固定するための第1反強磁性層及び/又は第2反強磁性層が接合されているのがよい。   A first antiferromagnetic layer and / or a second antiferromagnetic layer for fixing the magnetization direction of each of the magnetic layers by exchange coupling to the first magnetic layer and / or the second magnetic layer, respectively. It should be joined.

また、前記第1磁性層又は前記第2磁性層と、第3強磁性層とが第3非磁性層を介して積層され、RKKY的相互作用により反強磁性的に結合される積層フェリ構造が形成されていると、前記第1及び第2磁性層の磁化方向を互いに逆向きに容易に固定できる。この場合、第3強磁性層には反強磁性層が接合され、その磁化が交換結合により固定されている。   In addition, the first magnetic layer or the second magnetic layer, and the third ferromagnetic layer are stacked via a third nonmagnetic layer, and a stacked ferrimagnetic structure in which antiferromagnetic coupling is performed by RKKY interaction is provided. If formed, the magnetization directions of the first and second magnetic layers can be easily fixed in opposite directions. In this case, an antiferromagnetic layer is joined to the third ferromagnetic layer, and its magnetization is fixed by exchange coupling.

本発明は、上記に記載した磁気抵抗効果素子がメモリセル部を構成している磁気メモリ装置に好適である。   The present invention is suitable for a magnetic memory device in which the magnetoresistive element described above constitutes a memory cell portion.

特に、前記第一磁性層の側がビット線に接続され、前記第2磁性層の側が電界効果トランジスタ等のスイッチング素子に接続されたMRAM(Magnetic Random Access Memory)に適用されるのがよい。   In particular, the present invention is preferably applied to an MRAM (Magnetic Random Access Memory) in which the first magnetic layer side is connected to a bit line and the second magnetic layer side is connected to a switching element such as a field effect transistor.

或いは、前記第1磁性層の側がビット線に接続され、前記第2磁性層の側がワード線に接続されたクロスポイント型のメモリ装置に適用されてもよい。   Alternatively, the present invention may be applied to a cross-point type memory device in which the first magnetic layer side is connected to a bit line and the second magnetic layer side is connected to a word line.

次に本発明の好ましい実施の形態を図面参照下に詳細に説明する。   Next, preferred embodiments of the present invention will be described in detail with reference to the drawings.

第1の実施の形態
図1〜図3は、本発明の第1の実施の形態を示すものである。
First Embodiment FIGS. 1 to 3 show a first embodiment of the present invention.

<スピン注入磁化反転素子の構造(スピンフィルター層2/Cuスペーサー層3/記憶層1/Cuスペーサー層13/スピンフィルター層12)>
本実施の形態による新規な多層膜構造からなるスピン注入磁化反転素子10は、図1に示すように、厚さ1〜10nmの記憶層(磁化自由層)1としての磁性膜の上下に、非磁性金属膜(スペーサー層)3及び13をそれぞれ介して、2つのスピンフィルター層2及び12としての磁性膜を配置した構造からなっている。この場合、2つのスピンフィルター層2及び12の磁化方向が互いに逆向きに固定されていることがポイントである。
<Structure of spin injection magnetization reversal element (spin filter layer 2 / Cu spacer layer 3 / memory layer 1 / Cu spacer layer 13 / spin filter layer 12)>
As shown in FIG. 1, the spin-injection magnetization reversal element 10 having a novel multilayer film structure according to the present embodiment is formed on the top and bottom of a magnetic film as a storage layer (magnetization free layer) 1 having a thickness of 1 to 10 nm. It has a structure in which magnetic films as two spin filter layers 2 and 12 are arranged via magnetic metal films (spacer layers) 3 and 13, respectively. In this case, the point is that the magnetization directions of the two spin filter layers 2 and 12 are fixed in opposite directions.

記憶層1とスピンフィルター層2、12の材料(組成)には、特に制限はなく、任意の磁性材料を使うことができる。記憶層1とスピンフィルター層2、12とを同一の磁性材としても、異なる磁性材としてもよい。ここでは、磁気異方性が面内方向であるCo系合金の軟磁性膜(例えばCo−Fe10)を用いる。但し、スピンフィルター層2、12の飽和磁化(MS:単位体積当たりの磁気モーメント)×膜厚(t)が、記憶層(磁化自由層)1のMS×tより大きくなければならない。或いは、スピンフィルター層2、12の単位面積当たりの磁気モーメント数が、記憶層1のそれより大きくなるようにする、と言ってもよい。或いは、スピンフィルター層2、12の膜厚はこれらの磁性膜のスピン拡散長より大きくする一方、記憶層1の膜厚はこの磁性膜のスピン拡散長より小さくする、と言ってもよい。スピンフィルター層2、12と記憶層1が同一磁性材料からなっていれば、スピンフィルター層膜厚>記憶層膜厚となる。 The material (composition) of the memory layer 1 and the spin filter layers 2 and 12 is not particularly limited, and any magnetic material can be used. The memory layer 1 and the spin filter layers 2 and 12 may be the same magnetic material or different magnetic materials. Here, a Co-based alloy soft magnetic film (for example, Co—Fe 10 ) whose magnetic anisotropy is in the in-plane direction is used. However, the saturation magnetization (M S : magnetic moment per unit volume) × film thickness (t) of the spin filter layers 2 and 12 must be larger than M S × t of the storage layer (magnetization free layer) 1. Alternatively, it may be said that the number of magnetic moments per unit area of the spin filter layers 2 and 12 is made larger than that of the storage layer 1. Alternatively, it can be said that the film thickness of the spin filter layers 2 and 12 is made larger than the spin diffusion length of these magnetic films, while the film thickness of the storage layer 1 is made smaller than the spin diffusion length of these magnetic films. If the spin filter layers 2 and 12 and the storage layer 1 are made of the same magnetic material, the spin filter layer thickness> the storage layer thickness.

非磁性金属スペーサー層3、13の材質は、磁性膜材料との組み合わせで磁気抵抗効果が現れるいかなる材料でも構わない。ここでは、2つのスペーサー層3、13共に、例えばCuを用いる。2つのスペーサー層3、13の材料を同じにする必要はないが、少なくとも一方のスペーサー材は、それを介して対向する両側の磁性膜との組み合せで磁気抵抗効果が発現する材料でなくてはならない。スペーサー層3、13の厚さは、記憶層1と2つのスピンフィルター層2、12との磁気的層間相互作用が生じないように、〜5nm以上の厚さとする。これが厚すぎると、伝導電子の散乱が増えるため、10nm程度以下としておくのが望ましい。   The material of the nonmagnetic metal spacer layers 3 and 13 may be any material that exhibits a magnetoresistive effect in combination with a magnetic film material. Here, for example, Cu is used for both of the two spacer layers 3 and 13. The materials of the two spacer layers 3 and 13 do not need to be the same, but at least one of the spacer materials must be a material that exhibits a magnetoresistive effect in combination with the magnetic films on both sides opposed thereto. Don't be. The thickness of the spacer layers 3 and 13 is set to ˜5 nm or more so that the magnetic interlayer interaction between the storage layer 1 and the two spin filter layers 2 and 12 does not occur. If this is too thick, scattering of conduction electrons increases, so it is desirable that the thickness be about 10 nm or less.

スピンフィルター層2、12の磁化は、反強磁性層(AF層)4、14との交換結合によりピン止め(固定)されている。これらのAF材としては、例えば一方をPtMn、もう一方をMn−Ir25とする。或いは、2つのAF層4、14に膜厚の異なるPtMnを用いてもよい。いずれも、2つのAF材のブロッキング温度が異なることを利用して、磁場中での熱処理温度を変えて2回処理することにより、2つのスピンフィルター層2、12との交換結合磁界方向を反対向きにする。 The magnetizations of the spin filter layers 2 and 12 are pinned (fixed) by exchange coupling with the antiferromagnetic layers (AF layers) 4 and 14. As these AF materials, for example, one is PtMn and the other is Mn—Ir 25 . Alternatively, PtMn having different thicknesses may be used for the two AF layers 4 and 14. In both cases, by utilizing the fact that the blocking temperatures of the two AF materials are different, the heat treatment temperature in the magnetic field is changed and the treatment is performed twice, so that the direction of the exchange coupling magnetic field with the two spin filter layers 2 and 12 is reversed. Orient.

記憶セルの面内サイズは、従来例において既述したものと同様であり、〜200nmφ以下の大きさとし、形状異方性を持たせるために概楕円形としてある(図3参照)。   The in-plane size of the memory cell is the same as that already described in the conventional example, and has a size of ˜200 nmφ or less, and has a substantially elliptical shape to give shape anisotropy (see FIG. 3).

この記憶セルの加工において、図1では図示した多層膜をすべて同一形状に打ち抜いてあるが、記憶層1の上下に、磁化が逆向きのスピンフィルター層2、12が存在するため、これらのスピンフィルター層からの漏洩磁界は記憶層1内で互いに打ち消し合うため、記憶層1への影響はほとんどなくなる。図3に示すように、記憶層1のみ又は記憶層1及びスペーサー層3、13を記憶セル形状に加工し、上下のスピンフィルター層2、12は加工しない(例えばべた膜のままの)構造として、スピンフィルター層からの漏洩磁界を遮断しても構わないことは言うまでもない。この場合、記憶セルの周囲は非磁性絶縁膜5で覆われており、その上、下にスピンフィルター層2及び12、反強磁性層4及び14、キャップ層20(反強磁性層4を成膜後に試料を大気中に取り出す場合には必要。)及び電極142と下部電極146とが設けられている。   In the processing of the memory cell, all the multilayer films shown in FIG. 1 are punched into the same shape. However, since spin filter layers 2 and 12 having opposite magnetizations exist above and below the memory layer 1, these spin films are formed. Since the leakage magnetic field from the filter layer cancels each other in the storage layer 1, the influence on the storage layer 1 is almost eliminated. As shown in FIG. 3, the memory layer 1 alone or the memory layer 1 and the spacer layers 3 and 13 are processed into a memory cell shape, and the upper and lower spin filter layers 2 and 12 are not processed (for example, as a solid film). Needless to say, the leakage magnetic field from the spin filter layer may be cut off. In this case, the periphery of the memory cell is covered with a nonmagnetic insulating film 5, and the spin filter layers 2 and 12, the antiferromagnetic layers 4 and 14, and the cap layer 20 (the antiferromagnetic layer 4 are formed thereon). Necessary when the sample is taken out into the atmosphere after film formation)) and an electrode 142 and a lower electrode 146 are provided.

<記憶セルへの情報の書き込み>
図2に書き込み時の動作を示すが、端子17と18との間で、図の上から下の方向に電子を流す場合を+電流(+I)、この逆方向に流す場合を−電流(−I)と定義する。
<Writing information to memory cell>
FIG. 2 shows the operation at the time of writing. When electrons are passed between the terminals 17 and 18 from the top to the bottom of the figure, + current (+ I), and when they flow in the opposite direction, −current (− I).

以下の説明では、下層スピンフィルター層12の磁化方向を基準にする。−Iの場合、図2(A)に示すように、下層スピンフィルター層12に対するダウンスピン電子(下層のスピンフィルター層12の磁化方向とスピンの向きが逆)は下層のフィルター層12にて反射され、アップスピン電子(下層のスピンフィルター層12の磁化方向とスピンの向きが同じ)は抵抗なく下層のスピンフィルター層12を通過した後、記憶層1に入り、記憶層1の磁化が下層のスピンフィルター層12の磁化方向と平行になるように、sd-interactionを通じて記憶層1の磁気モーメントにスピントルクを与える。記憶層1を通過したアップスピン電子は、上層のスピンフィルター層2にとってはダウンスピン電子となることから、界面で反射され、記憶層1内に戻され、再びsd-interactionを起こす。この反射されたアップスピン電子は、電界の作用で再び上層のスピンフィルター層2に突入して反射され、このようにしてアップスピン電子の多重反射が起こる。これにより、記憶層1が下層のスピンフィルター層12の磁化と平行配列となる。   In the following description, the magnetization direction of the lower spin filter layer 12 is used as a reference. In the case of -I, as shown in FIG. 2A, the down spin electrons (the magnetization direction of the lower spin filter layer 12 and the spin direction are reversed) with respect to the lower spin filter layer 12 are reflected by the lower filter layer 12 Up-spin electrons (the magnetization direction of the lower spin filter layer 12 and the spin direction are the same) pass through the lower spin filter layer 12 without resistance, and then enter the storage layer 1. Spin torque is applied to the magnetic moment of the storage layer 1 through sd-interaction so as to be parallel to the magnetization direction of the spin filter layer 12. The up-spin electrons that have passed through the storage layer 1 become down-spin electrons for the upper spin filter layer 2 and are reflected at the interface and returned to the storage layer 1 to cause sd-interaction again. The reflected upspin electrons enter the upper spin filter layer 2 again by the action of an electric field and are reflected, and thus multiple reflections of the upspin electrons occur. As a result, the storage layer 1 is aligned in parallel with the magnetization of the lower spin filter layer 12.

このように、既述した従来例と比べて、下層のスピンフィルター層12に入る際にダウンスピン電子が除かれることに加え、上層のスピンフィルター層2によって下層スピンフィルター層12に対するアップスピン電子の多重反射が起きるため、下層スピンフィルター層12を基準にした場合の反平行配列→平行配列へのスピン注入磁化反転効率(上述のg(π)に相当)が向上し、IC -(記憶層1の磁化が反転して下層のスピンフィルター層12の磁化と平行になるための臨界電流)が低減される。 In this way, compared to the conventional example described above, the down spin electrons are removed when entering the lower spin filter layer 12, and the up spin electrons of the lower spin filter layer 12 are removed by the upper spin filter layer 2. Since multiple reflection occurs, the spin-inversion magnetization reversal efficiency (corresponding to the above g (π)) from the antiparallel arrangement to the parallel arrangement when the lower spin filter layer 12 is used as a reference is improved, and I C (memory layer The critical current for reversing the magnetization of 1 to be parallel to the magnetization of the lower spin filter layer 12 is reduced.

一方、+Iの場合、図2(B)に示すように、既述した従来例と異なり、まず、スピン注入磁化反転の効率を落とす原因となるダウンスピン電子(図では右向き矢印のスピン。これは上層のスピンフィルター層2に対するダウンスピンである。)が上層のスピンフィルター層2の上面で反射されて除かれ、アップスピン電子は上層のスピンフィルター層2を抵抗なく通過した後、記憶層1に入り、記憶層1の磁化が上層のスピンフィルター層2の磁化方向と平行になるように、sd-interactionを通じて記憶層1の磁気モーメントにトルクを与える。記憶層1を通過したアップスピン電子は、下層のスピンフィルター層12にとってはダウンスピン電子となることから、界面で反射され、記憶層1内に戻され、再びsd-interactionを起こす。この反射されたアップスピン電子は電界の作用で再び下層のスピンフィルター層12に突入して反射され、このようにしてアップスピン電子の多重反射が起こる。これにより、記憶層1が上層のスピンフィルター層2の磁化と平行配列となる。−Iの場合と比べると、記憶層1の磁化方向は反転することとなる。   On the other hand, in the case of + I, as shown in FIG. 2 (B), unlike the above-described conventional example, first, down spin electrons (in the figure, the spin indicated by a right arrow.) Is reflected by the upper surface of the upper spin filter layer 2, and the up spin electrons pass through the upper spin filter layer 2 without resistance, and then enter the memory layer 1. Then, torque is applied to the magnetic moment of the storage layer 1 through sd-interaction so that the magnetization of the storage layer 1 is parallel to the magnetization direction of the upper spin filter layer 2. The up-spin electrons that have passed through the storage layer 1 become down-spin electrons for the lower spin filter layer 12 and are reflected at the interface and returned to the storage layer 1 to cause sd-interaction again. The reflected up-spin electrons enter the lower spin filter layer 12 again by the action of an electric field and are reflected, and thus multiple reflections of the up-spin electrons occur. As a result, the storage layer 1 is aligned in parallel with the magnetization of the upper spin filter layer 2. Compared to the case of -I, the magnetization direction of the storage layer 1 is reversed.

このように、既述した従来例と比べて、上層のスピンフィルター層2に入る際にダウンスピン電子が除かれるため、アップスピン電子とダウンスピン電子の競合現象がなく、スピン注入磁化反転効率(上述のg(0)に相当)が向上し、IC (記憶層の磁化が反転して下層のスピンフィルター層12の磁化と反平行になるための臨界電流)が低減される。 Thus, compared with the above-described conventional example, the down spin electrons are removed when entering the upper spin filter layer 2, so there is no competition phenomenon between the up spin electrons and the down spin electrons, and the spin injection magnetization reversal efficiency ( (Corresponding to the above g (0)) is improved, and I C + (critical current for reversing the magnetization of the storage layer and being antiparallel to the magnetization of the lower spin filter layer 12) is reduced.

上記のように、上下に各スピンフィルター層2、12を設けたダブルスピンフィルター構造とすることにより、反転電流及び反転電流密度は、従来例(図15、図16)と比べて一桁以上低減する。即ち、記憶層1として厚さ2.5nmのCo−Fe10を用い、記憶セルサイズを長径100〜200nm、短径50〜100nmの概楕円形とした場合の反転電流及び反転電流密度は、従来例の構造ではそれぞれ3〜7mA、3〜7×107A/cm2であったのに対し、本実施例の形態ではそれぞれ0.3〜0.7mA、106A/cm2台となる。また、熱揺らぎ耐性はKUV/kB300K>100、反転時間τ<〜2nsecであり、磁気メモリとして必要な条件を十分に満たしている。 As described above, by adopting a double spin filter structure in which the spin filter layers 2 and 12 are provided on the upper and lower sides, the inversion current and the inversion current density are reduced by an order of magnitude or more compared to the conventional example (FIGS. 15 and 16). To do. That is, the reversal current and the reversal current density in the case where Co—Fe 10 having a thickness of 2.5 nm is used as the memory layer 1 and the memory cell size is an elliptical shape having a major axis of 100 to 200 nm and a minor axis of 50 to 100 nm are conventionally obtained. In the structure of the example, they were 3 to 7 mA and 3 to 7 × 10 7 A / cm 2 , respectively, but in the form of this example, they were 0.3 to 0.7 mA and 10 6 A / cm 2 , respectively. . In addition, the thermal fluctuation resistance is K U V / k B T 300K > 100 and the inversion time τ <˜2 nsec, sufficiently satisfying the necessary conditions for the magnetic memory.

<情報の読み出し>
上記において、注意すべきことは、上記の多層膜構成において記憶層1を中心に完全に上下対称とすると、図2(C)、(D)に示すように書き込み情報を電流I(数〜10μA程度)によって読み出す際に、磁気抵抗変化が生じない(出力が出ない)ことである。即ち、上層のスピンフィルター層2/Cu層3/記憶層1において生じる第1のGMR膜(巨大磁気抵抗効果膜)15による磁気抵抗変化と、記憶層1/Cu層13/下層のスピンフィルター層12において生じる第2のGMR膜16による磁気抵抗変化とが互いに打ち消しあってしまう。
<Reading information>
In the above, it should be noted that, in the above multilayer film configuration, if the memory layer 1 is completely symmetrical, the write information is converted into the current I (several 10 μA) as shown in FIGS. In other words, no change in magnetoresistance occurs (no output). That is, the magnetoresistance change caused by the first GMR film (giant magnetoresistive film) 15 generated in the upper spin filter layer 2 / Cu layer 3 / memory layer 1, and the memory layer 1 / Cu layer 13 / lower spin filter layer 12 and the magnetoresistance change caused by the second GMR film 16 canceling each other out.

しかし、現実には、完全に上下対称となることはないので、微弱ながら出力信号が得られる。より積極的に、2つのスペーサー層3、13の厚さや2つのスピンフィルター層2、12の厚さを若干ずらし、或いは、それらの成膜条件を変化させて膜質や界面状態に違いを生じさせ、記憶層1の上下におけるスピン依存散乱に違いを持たせることによって、記憶層1の磁化が図中右向きのときと左向きのときとで磁気抵抗変化に差が出るようにし、CPP−GMR比で0.2%〜1%の出力を得ることが可能である。なお、読み出し電流Iは、図の上から下へ流してよいが、これとは逆向きに流してもよい。   However, in reality, since it is not completely symmetrical, an output signal can be obtained although it is weak. More positively, the thickness of the two spacer layers 3 and 13 and the thickness of the two spin filter layers 2 and 12 are slightly shifted, or the film forming conditions are changed to cause a difference in film quality and interface state. By making the spin-dependent scattering above and below the storage layer 1 different, the magnetoresistance change is different between when the magnetization of the storage layer 1 is directed rightward and leftward in the figure, and the CPP-GMR ratio An output of 0.2% to 1% can be obtained. The read current I may flow from the top to the bottom of the figure, but may flow in the opposite direction.

第2の実施の形態
図4は、本発明の第2の実施の形態を示すものである。
Second Embodiment FIG. 4 shows a second embodiment of the present invention.

<スピン注入磁化反転素子の構造(スピンフィルター層2/Cuスペーサー層3/記憶層1+端子19/Cuスペーサー層13/スピンフィルター層12)>
本実施の形態によるスピン注入磁化反転素子40は、上述した第1の実施の形態によるスピン注入磁化反転素子10が、素子の上下に端子(又は電極)17、18を配置した2端子素子であるのに比べて、記憶層1に第3の端子19を設けた3端子素子構造である。
<Structure of spin injection magnetization reversal element (spin filter layer 2 / Cu spacer layer 3 / memory layer 1 + terminal 19 / Cu spacer layer 13 / spin filter layer 12)>
The spin transfer magnetization switching element 40 according to the present embodiment is a two-terminal element in which the spin transfer magnetization switching element 10 according to the first embodiment described above has terminals (or electrodes) 17 and 18 arranged above and below the element. Compared to the three-terminal element structure, a third terminal 19 is provided in the memory layer 1.

この場合、書き込みは端子17−18間で行うが、読み出し時には、記憶層1と上下のスピンフィルター層2、12の磁化方向の相対角度の違いによる抵抗変化をそれぞれ個別に、即ち端子17−19間又は端子18−19間で読み出すことができるため、記憶層1の上下のGMR膜構造15、16が対称に設けられていても、それぞれの抵抗変化の打ち消し合いがなくなり、上記の第1の実施の形態より高い出力、例えばCPP−GMR比で数%以上の出力が得られる。   In this case, writing is performed between the terminals 17-18. At the time of reading, resistance changes due to differences in the relative angles of the magnetization directions of the storage layer 1 and the upper and lower spin filter layers 2, 12 are individually determined, that is, the terminals 17-19. Or between the terminals 18-19, even if the upper and lower GMR film structures 15 and 16 of the memory layer 1 are provided symmetrically, there is no cancellation of the respective resistance changes, and the first An output higher than that of the embodiment, for example, an output of several percent or more in the CPP-GMR ratio can be obtained.

素子構造はより複雑になるものの、CPP−GMR膜本来の抵抗変化に加え、上述した偏極スピン電子の多重反射効果に伴う記憶層1の実効的分極率の増加による抵抗変化の増大効果が得られる。なお、本実施の形態では、スペーサー層3、13の材料の組み合わせを変えることにより、以下の実施の形態と組み合わせて実施してもよい。   Although the device structure is more complicated, in addition to the original resistance change of the CPP-GMR film, the effect of increasing the resistance change by increasing the effective polarizability of the memory layer 1 due to the multiple reflection effect of the polarized spin electrons described above is obtained. It is done. In the present embodiment, the combination of the materials of the spacer layers 3 and 13 may be changed and combined with the following embodiments.

第3の実施の形態
図5は、本発明の第3の実施の形態を示すものである。
Third Embodiment FIG. 5 shows a third embodiment of the present invention.

<スピン注入磁化反転素子の構造(スピンフィルター層2/Cuスペーサー層3/記憶層1/Ruスペーサー層53/スピンフィルター層12)>
本実施の形態によるスピン注入磁化反転素子50では、上述した第1の実施の形態によるスピン注入磁化反転素子10において、2つのスペーサー層のうち一つ53を、使用する磁性膜との組み合わせにおいてGMR効果が生じにくい金属(磁性膜がCo系合金であれば、Cu以外の金属)、例えばRu、Ru/Ta/Ru複合膜などにする。
<Structure of spin injection magnetization reversal element (spin filter layer 2 / Cu spacer layer 3 / memory layer 1 / Ru spacer layer 53 / spin filter layer 12)>
In the spin transfer magnetization switching element 50 according to the present embodiment, one of the two spacer layers 53 is combined with the magnetic film to be used in the GMR in the spin transfer magnetization switching element 10 according to the first embodiment described above. A metal that hardly causes an effect (if the magnetic film is a Co-based alloy, a metal other than Cu), such as a Ru or Ru / Ta / Ru composite film, is used.

このように、記憶層1/Cu以外の非磁性金属層53/スピンフィルター層12の組み合せは、GMR効果がほとんど発現せず、スピンフィルター層12はスピンフィルターとしてのみ機能し、GMR膜の磁化参照層としては機能しない。従って、スピンフィルター層2(磁化参照層)/Cuスペーサー層3/記憶層1の組み合せのみがGMR膜として機能し、記憶層1の磁化反転に伴う抵抗変化を検出することができる。この結果、2端子素子ではあっても、上述した第2の実施の形態と同等の抵抗変化(出力)を得ることができる。   As described above, the combination of the nonmagnetic metal layer 53 other than the memory layer 1 / Cu / spin filter layer 12 exhibits almost no GMR effect, and the spin filter layer 12 functions only as a spin filter. Refer to the magnetization of the GMR film. It does not function as a layer. Therefore, only the combination of the spin filter layer 2 (magnetization reference layer) / Cu spacer layer 3 / memory layer 1 functions as a GMR film, and the resistance change accompanying the magnetization reversal of the memory layer 1 can be detected. As a result, even if it is a two-terminal element, a resistance change (output) equivalent to that in the second embodiment described above can be obtained.

ここで注意すべきことは、Cu以外の金属材料の選択である。スペーサー層53は、その上下に隣接する磁性膜と界面反応が生じにくい(固溶しにくい=合金化しにくい)材料で形成することが必要である。例えばTaは、非磁性であってGMR効果が現れないが、Co系磁性膜との界面反応が起こり易い。これに対し、Co系磁性膜と界面反応が生じにくいRuは好適である。   What should be noted here is the selection of a metal material other than Cu. The spacer layer 53 needs to be formed of a material that hardly causes an interface reaction with the magnetic films adjacent to the upper and lower sides thereof (i.e., less likely to be solid solution = less likely to be alloyed). For example, Ta is nonmagnetic and does not exhibit a GMR effect, but an interface reaction with a Co-based magnetic film is likely to occur. On the other hand, Ru, which does not easily cause an interface reaction with the Co-based magnetic film, is preferable.

スペーサー材としてCu以外の金属を記憶層1と接触させた場合、スピンポンピング効果により、記憶層1の磁気モーメントの歳差運動に対する制動因子が増大する場合があり、スピン注入磁化反転電流はそれに比例して増加してしまう。制動因子の増大は、スペーサー材料に依存し、更にその厚さや記憶層1の厚さ等にも関係する。Cuは、制動因子の増大効果がなく、界面反応が小さく、抵抗率も小さいことから、最も使い易い(副作用の少ない)非磁性金属スペーサー材と言える。Taも制動因子の増大を起こさないものの、上記したように磁性膜との界面反応が懸念される。   When a metal other than Cu is brought into contact with the memory layer 1 as a spacer material, the damping factor against the precession of the magnetic moment of the memory layer 1 may increase due to the spin pumping effect, and the spin injection magnetization reversal current is proportional to it. Will increase. The increase of the braking factor depends on the spacer material, and further relates to the thickness thereof, the thickness of the memory layer 1, and the like. Cu has no effect of increasing the braking factor, has a small interface reaction, and has a low resistivity. Therefore, it can be said that Cu is the most easy to use (with few side effects) nonmagnetic metal spacer material. Although Ta does not increase the braking factor, there is a concern about the interface reaction with the magnetic film as described above.

上記のRuをスペーサー材として使用する場合、制動因子の増大による反転電流の増加と、出力増加効果との兼ね合いを考慮した上で、適宜、採択されるべきものである。例えばRu(厚さ〜1nm)/Ta(厚さ数nm)/Ru(厚さ〜1nm)複合膜は、磁性膜との界面反応が少なく、制動因子の増大も生じにくい組み合わせであり、スペーサー材として有効である。   When Ru is used as a spacer material, it should be appropriately selected in consideration of the balance between an increase in reversal current due to an increase in braking factor and an effect of increasing output. For example, a Ru (thickness to 1 nm) / Ta (thickness several nm) / Ru (thickness to 1 nm) composite film is a combination that has a small interface reaction with a magnetic film and hardly causes an increase in a braking factor. It is effective as

第4の実施の形態
図6は、本発明の第4の実施の形態を示すものである。
Fourth Embodiment FIG. 6 shows a fourth embodiment of the present invention.

<スピン注入磁化反転素子の構造(スピンフィルター層2/Cuスペーサー層3/記憶層1/Al23スペーサー層63/スピンフィルター層12)>
本実施の形態によるスピン注入磁化反転素子60は、上述した第1の実施の形態によるスピン注入磁化反転素子10とは異なり、2つの非磁性スペーサー層のうち一方をAl23層63としている。
<Structure of spin injection magnetization reversal element (spin filter layer 2 / Cu spacer layer 3 / memory layer 1 / Al 2 O 3 spacer layer 63 / spin filter layer 12)>
Unlike the spin transfer magnetization switching element 10 according to the first embodiment described above, the spin transfer magnetization switching element 60 according to the present embodiment uses one of the two nonmagnetic spacer layers as the Al 2 O 3 layer 63. .

この場合、記憶層1/Cuスペーサー層3/スピンフィルター層2はGMR膜15として機能するが、記憶層1/Al23スペーサー層63/スピンフィルター層12(磁化参照層)はTMR膜65として機能する。Al23層63の膜厚は、素子抵抗を考慮して決められ、0.5〜1.5nmに選択する。本実施の形態のダブルスピンフィルター構造によれば、TMR膜65(例えば面積〜0.01μm2)におけるスピン注入磁化反転電流を1mA以下とすることができる。このため、TMR膜65のRAを数十Ωμm2以下として素子の絶縁破壊が生じないようにすることが可能である。 In this case, the storage layer 1 / Cu spacer layer 3 / spin filter layer 2 functions as the GMR film 15, but the storage layer 1 / Al 2 O 3 spacer layer 63 / spin filter layer 12 (magnetization reference layer) is the TMR film 65. Function as. The film thickness of the Al 2 O 3 layer 63 is determined in consideration of the element resistance, and is selected from 0.5 to 1.5 nm. According to the double spin filter structure of the present embodiment, the spin injection magnetization reversal current in the TMR film 65 (for example, an area of 0.01 μm 2 ) can be 1 mA or less. For this reason, the RA of the TMR film 65 can be set to several tens of Ωμm 2 or less so as not to cause dielectric breakdown of the element.

従って、本実施の形態による構造の特徴は、TMR膜構造65を持つことにより高い抵抗変化率が得られる点である。偏極スピン電子の多重反射効果に伴う記憶層1の実効的分極率の増加によって抵抗変化率が増大するという効果と相俟って、RAが数十Ωμm2以下であっても、数十%以上の抵抗変化率が得られる。一般のTMR膜の場合、抵抗の減少(Al23等の絶縁障壁層の厚さの減少)に伴い、TMR比は減少し、例えば、RAが数Ωμm2の場合、TMR比は〜10%以下となる。しかし、本実施の形態のダブルスピンフィルター構造によれば、前述した偏極スピン電子の多重反射効果に伴う記憶層の実効的分極率の増加により、抵抗変化率が増大するため、TMR膜65が低抵抗TMR膜であっても、数十%以上の抵抗変化率を得ることが可能となる。 Therefore, the feature of the structure according to the present embodiment is that a high rate of change in resistance can be obtained by having the TMR film structure 65. Combined with the effect that the rate of change in resistance increases due to the increase in effective polarizability of the memory layer 1 due to the multiple reflection effect of polarized spin electrons, even if RA is several tens of Ωμm 2 or less, several tens of% The above resistance change rate is obtained. In the case of a general TMR film, the TMR ratio decreases as the resistance decreases (the thickness of the insulating barrier layer such as Al 2 O 3 decreases). For example, when RA is several Ωμm 2 , the TMR ratio is −10 % Or less. However, according to the double spin filter structure of the present embodiment, the resistance change rate increases due to an increase in the effective polarizability of the memory layer due to the multiple reflection effect of the polarized spin electrons described above. Even with a low-resistance TMR film, it is possible to obtain a resistance change rate of several tens of percent or more.

一方、スピンフィルター層2/Cuスペーサー層3/記憶層1の部分はCPP−GMR膜15として機能するため、上記のTMR膜構造65による磁気抵抗変化率を減少させることとなるが、その抵抗変化率は数%以下と小さいため、素子全体としての抵抗変化率にほとんど影響を与えない。   On the other hand, since the portion of the spin filter layer 2 / Cu spacer layer 3 / memory layer 1 functions as the CPP-GMR film 15, the rate of change in magnetoresistance due to the TMR film structure 65 is reduced. Since the rate is as small as several percent or less, it hardly affects the resistance change rate of the entire element.

なお、上記した記憶層1/Al23層63/スピンフィルター層12の部分において、絶縁障壁層であるAl23層63を他の絶縁材料層、例えば、AlN、MgO層等としても構わない。また、上記したスピンフィルター層2/Cuスペーサー層3/記憶層1の部分において、Cuスペーサー層3を、上述した第3の実施の形態で述べたRu、Ru/Ta/Ru層などとしてもよい。この場合、GMR効果はほとんど現れず、スピンフィルター層2はスピンフィルターとしてのみ機能する。このため、TMR構造65における抵抗変化のみが素子の抵抗変化として現れ、好適である。 Incidentally, in the portion of the storage layer 1 / the Al 2 O 3 layer 63 / spin filter layer 12 described above, another insulating material layer the Al 2 O 3 layer 63 is an insulating barrier layer, for example, AlN, even MgO layer such I do not care. Further, in the above-described spin filter layer 2 / Cu spacer layer 3 / memory layer 1, the Cu spacer layer 3 may be the Ru, Ru / Ta / Ru layer described in the third embodiment. . In this case, the GMR effect hardly appears, and the spin filter layer 2 functions only as a spin filter. For this reason, only the resistance change in the TMR structure 65 appears as the resistance change of the element, which is preferable.

第5の実施の形態
図7は、本発明の第5の実施の形態を示すものである。
Fifth Embodiment FIG. 7 shows a fifth embodiment of the present invention.

<スピン注入磁化反転素子の構造(反強磁性層4/スピンフィルター層2/Cuスペーサー層3/記憶層1/Al23スペーサー層63/スピンフィルター層12/Ru層71/ピン層72/反強磁性層14)>
本実施の形態によるスピン注入磁化反転素子70は、上述した各実施の形態、例えば第4の実施の形態によるスピン注入磁化反転素子60において、2つのスピンフィルター層の一つを積層フェリ構造75とする。
<Structure of spin injection magnetization reversal element (antiferromagnetic layer 4 / spin filter layer 2 / Cu spacer layer 3 / memory layer 1 / Al 2 O 3 spacer layer 63 / spin filter layer 12 / Ru layer 71 / pinned layer 72 / Antiferromagnetic layer 14)>
The spin transfer magnetization reversal element 70 according to the present embodiment is the same as that of each of the above-described embodiments, for example, the spin transfer magnetization reversal element 60 according to the fourth embodiment. To do.

即ち、単層のスピンフィルター層をスピンフィルター磁性層12/Ru層71/磁性層(ピン層)72の3層構造とする。この積層フェリ構造75におけるRu層71の厚さは、2つの磁性層12と72の磁化がRKKY的相互作用により反強磁性的に結合するように、0.7〜0.8nmとする。また、この積層フェリ構造75を形成する2つの磁性層12、72の厚さは、同じであっても、或いは若干の差を持たせてもよい。   That is, the single-layer spin filter layer has a three-layer structure of the spin filter magnetic layer 12 / Ru layer 71 / magnetic layer (pinned layer) 72. The thickness of the Ru layer 71 in the laminated ferrimagnetic structure 75 is set to 0.7 to 0.8 nm so that the magnetizations of the two magnetic layers 12 and 72 are antiferromagnetically coupled by the RKKY interaction. The thicknesses of the two magnetic layers 12 and 72 forming the laminated ferri structure 75 may be the same or may have a slight difference.

また、各スピンフィルター層2、12の飽和磁化(MS:単位体積当たりの磁気モーメント)×膜厚(t)は、記憶層(磁化自由層)1のMS×tより大きくする。或いは、スピンフィルター層2、12の単位面積当たりの磁気モーメント数が、記憶層1のそれより大きくなるようにする、と言ってもよい。或いは、スピンフィルター層2、12の膜厚はこれらの磁性膜のスピン拡散長より大きくし、記憶層1の膜厚はこの磁性膜のスピン拡散長より小さくする、と言ってもよい。スピンフィルター層2、12と記憶層1が同一磁性材料からなっていれば、スピンフィルター層膜厚>記憶層膜厚となる。 Further, the saturation magnetization (M S : magnetic moment per unit volume) × film thickness (t) of each of the spin filter layers 2 and 12 is made larger than M S × t of the storage layer (magnetization free layer) 1. Alternatively, it may be said that the number of magnetic moments per unit area of the spin filter layers 2 and 12 is made larger than that of the storage layer 1. Alternatively, it can be said that the film thickness of the spin filter layers 2 and 12 is larger than the spin diffusion length of these magnetic films, and the film thickness of the storage layer 1 is smaller than the spin diffusion length of these magnetic films. If the spin filter layers 2 and 12 and the storage layer 1 are made of the same magnetic material, the spin filter layer thickness> the storage layer thickness.

本実施の形態による構造の特徴は、記憶層1と非磁性スペーサー層3、63を介して対向する上下2つのスピンフィルター層2、12の磁化方向を容易に反平行にすることができることである。この場合、上下2つの反強磁性層(AF層)4、14に、同一の材料を用いることができる。一回の磁場中での熱処理で、スピンフィルター層2とピン層72には、AF層4、14により同じ向きに交換結合磁界が誘導されると共に、スピンフィルター層12とピン層72は、積層フェリ構造75により反強磁性的に結合しているから、上記磁場中での熱処理により、スピンフィルター層2とスピンフィルター層12の磁化方向は反平行となるのである。   A feature of the structure according to this embodiment is that the magnetization directions of the upper and lower two spin filter layers 2 and 12 facing the storage layer 1 via the nonmagnetic spacer layers 3 and 63 can be easily antiparallel. . In this case, the same material can be used for the two upper and lower antiferromagnetic layers (AF layers) 4 and 14. By one heat treatment in a magnetic field, an exchange coupling magnetic field is induced in the spin filter layer 2 and the pinned layer 72 by the AF layers 4 and 14 in the same direction, and the spin filter layer 12 and the pinned layer 72 are laminated. Since the antiferromagnetic coupling is caused by the ferrimagnetic structure 75, the magnetization directions of the spin filter layer 2 and the spin filter layer 12 become antiparallel due to the heat treatment in the magnetic field.

本実施の形態では、AF層4、14としてPtMnを用い、スピンフィルター層2、12及びピン層72はすべてCo系合金、例えば、Co−Fe10、Co−Fe25などを用いる。これらの各磁性膜の厚さは5〜100nmであり、望ましくは5〜20nmである。記憶層1の厚さは1〜10nm、望ましくは2〜4nmである。Cu層3の厚さは5〜50nm、望ましくは5〜10nmである。Al23層63の厚さは0.5〜1.5nmである。これらの各層の厚さは、上述した各実施の形態に同様に採用してよい。また、上述した第4の実施の形態と同様、Cu層3の代わりにRu、Ru/Ta/Ru層等、またAl23層63の代わりにAlN、MgO層等を用いてもよい。 In this embodiment, PtMn is used as the AF layers 4 and 14, and the spin filter layers 2 and 12 and the pinned layer 72 are all made of a Co-based alloy, for example, Co—Fe 10 or Co—Fe 25 . Each of these magnetic films has a thickness of 5 to 100 nm, preferably 5 to 20 nm. The thickness of the memory layer 1 is 1 to 10 nm, preferably 2 to 4 nm. The thickness of the Cu layer 3 is 5 to 50 nm, desirably 5 to 10 nm. The thickness of the Al 2 O 3 layer 63 is 0.5 to 1.5 nm. The thicknesses of these layers may be similarly adopted in the above-described embodiments. Further, as in the fourth embodiment described above, a Ru, Ru / Ta / Ru layer or the like may be used instead of the Cu layer 3, and an AlN, MgO layer or the like may be used instead of the Al 2 O 3 layer 63.

第6の実施の形態
図8は、本発明の第6の実施の形態を示すものである。
<単結晶膜の使用>
上述した各実施の形態においては、磁性層やスペーサー層からなる多層膜は、多結晶膜又はアモルファス膜であるが、本実施の形態では、この多層膜の各層又はその一部に、エピタキシャル成長させた単結晶膜を用いる。
Sixth Embodiment FIG. 8 shows a sixth embodiment of the present invention.
<Use of single crystal film>
In each of the above-described embodiments, the multilayer film composed of the magnetic layer and the spacer layer is a polycrystalline film or an amorphous film. In this embodiment, each multilayer layer or a part thereof is epitaxially grown. A single crystal film is used.

例えば、上述した第1の実施の形態による素子において、図8(A)に示すように、GMR膜15、16としてCo層1/Cu層3、13/Co層2、12をそれぞれエピタキシャル膜で形成したスピン注入磁化反転素子80Aを構成する。或いは、例えば上述した第4の実施の形態において、図8(B)に示すように、TMR膜65としてFe層12/MgO層63/Fe層1をそれぞれエピタキシャル膜で形成したスピン注入磁化反転素子80Bを構成する。   For example, in the element according to the first embodiment described above, as shown in FIG. 8A, as the GMR films 15 and 16, the Co layer 1 / Cu layer 3 and 13 / Co layers 2 and 12 are epitaxial films, respectively. The formed spin injection magnetization reversal element 80A is configured. Alternatively, for example, in the fourth embodiment described above, as shown in FIG. 8B, the spin transfer magnetization switching element in which the Fe layer 12 / MgO layer 63 / Fe layer 1 is formed as an epitaxial film as the TMR film 65, respectively. 80B is configured.

ここで、単結晶膜をエピタキシャル成長させる方法として、MgO単結晶基板((001)面)81上に成膜するか、或いは、SiO2基板等の上にスパッタ等でMgO膜(〜5nm以上)を成膜し、この上に上記の各種メタル膜を成膜することにより得られる。 Here, as a method of epitaxially growing a single crystal film, an MgO film (up to 5 nm or more) is formed on an MgO single crystal substrate ((001) surface) 81 or by sputtering or the like on an SiO 2 substrate or the like. It is obtained by forming a film and forming the above various metal films thereon.

MgO膜は例えばSiO2上に成膜された場合、〜5nm以上の厚みになると単結晶状の膜((001)面配向)となり、この上にFe等を成膜すると単結晶膜がエピタキシャル成長する。 For example, when the MgO film is formed on SiO 2 , it becomes a single crystal film ((001) plane orientation) when the thickness is ˜5 nm or more, and when a film such as Fe is formed thereon, the single crystal film is epitaxially grown. .

また、TMR膜の構成をすべて単結晶にするのであれば、単結晶下層膜/Fe(スピンフィルター層)/MgO(トンネル絶縁障壁膜)/Fe(記憶層)のように、トンネル絶縁障壁膜も単結晶膜にする。   If the structure of the TMR film is all made of a single crystal, the tunnel insulating barrier film can also be a single crystal lower layer film / Fe (spin filter layer) / MgO (tunnel insulating barrier film) / Fe (memory layer). A single crystal film is formed.

また、単結晶下層膜/Fe(スピンフィルター層)/Al23など/記憶層磁性膜のように、トンネル絶縁障壁膜を多結晶膜又はアモルファス膜とすれば、スピンフィルター層までが単結晶膜となる。この場合も、Al23膜を形成する際には、まずメタルのAlを成膜するため、この時点では単結晶のAl膜が形成され、これを酸化してAl23膜を得るので極めて平坦なAl23膜が得られる。このため、多結晶TMR膜に比べ、単結晶スピンフィルター層/Al23膜界面のみならず、Al23膜/記憶層(多結晶あるいはアモルファス)界面も極めて平坦にできる特徴がある。この構造の方が、作製が容易である。 Moreover, if the tunnel insulating barrier film is a polycrystalline film or an amorphous film, such as single crystal underlayer film / Fe (spin filter layer) / Al 2 O 3 / memory layer magnetic film, a single crystal is formed up to the spin filter layer. Become a film. Also in this case, when the Al 2 O 3 film is formed, first, a metal Al film is formed. At this time, a single crystal Al film is formed, and this is oxidized to obtain an Al 2 O 3 film. Therefore, an extremely flat Al 2 O 3 film can be obtained. Therefore, as compared with the polycrystalline TMR film, not only the single crystal spin filter layer / Al 2 O 3 film interface but also the Al 2 O 3 film / memory layer (polycrystalline or amorphous) interface can be made extremely flat. This structure is easier to manufacture.

このように、多層膜の少なくとも一部に用いる単結晶膜は、多結晶膜に比べて、界面が原子レベルで平坦になり、また、膜内に粒界がないため、偏極スピン電流の散乱が減少し、より高いスピン注入磁化反転効率が得られる。   As described above, the single crystal film used for at least a part of the multilayer film has a flat interface at the atomic level compared to the polycrystalline film, and there is no grain boundary in the film. And a higher spin injection magnetization reversal efficiency can be obtained.

第7の実施の形態
図9及び図10は、本発明の第7の実施の形態を示すものである。
Seventh Embodiment FIGS. 9 and 10 show a seventh embodiment of the present invention.

<MRAMへの適用>
図9(A)は、本発明をMRAMに適用した場合のMRAM構造の例を示し、また図9(B)は、その要部拡大図である。このMRAMは、1トランジスタ−1磁化反転素子(1T1J)で1bitを形成するものであって、例えば図7に示したスピン注入磁化反転素子70をメモリセル部に組み込む以外は、図17に示したMRAM構造と基本的に同じ構成からなっており、共通部分には共通符号を付して説明を省略する。
<Application to MRAM>
FIG. 9A shows an example of an MRAM structure when the present invention is applied to an MRAM, and FIG. 9B is an enlarged view of a main part thereof. This MRAM forms 1 bit by 1 transistor-1 magnetization reversal element (1T1J). For example, the MRAM shown in FIG. 17 except that the spin injection magnetization reversal element 70 shown in FIG. 7 is incorporated in the memory cell portion. The structure is basically the same as that of the MRAM structure, and common portions are denoted by common reference numerals and description thereof is omitted.

即ち、スピン注入磁化反転素子70は、図7に示した多層構造に形成されていて、図9(B)に示すように、その上部はTa等のキャップ層90を介してビット線142に接続され、その下部はTa等の下地導電層91を介してドレイン電極146に接続されている。そして、記憶層1及びこの上下の非磁性スペーサー層3、63は、面内サイズが〜200nmφ以下の大きさになるように加工され、ほぼ単磁区化した記憶セルとなっている。   That is, the spin transfer magnetization switching element 70 is formed in the multilayer structure shown in FIG. 7, and its upper part is connected to the bit line 142 via a cap layer 90 of Ta or the like as shown in FIG. 9B. The lower part thereof is connected to the drain electrode 146 through a base conductive layer 91 such as Ta. The storage layer 1 and the upper and lower nonmagnetic spacer layers 3 and 63 are processed so that the in-plane size is about 200 nmφ or less, thereby forming a storage cell having a substantially single magnetic domain.

記憶セルは、形状磁気異方性を持たせるため、縦横比(アスペクト比)を持つ形状、例えば楕円形(図3参照)としてある。記憶セルの加工領域は、第2のスピンフィルター層12上面で加工を停止してスピンフィルター層12の面積を大きくし、そこからの漏洩磁界が記憶層1に及ぶことを防止する形としている。これは、上部の第1のスピンフィルター層2についても同様であり、記憶セルを埋め込む非磁性絶縁膜(SiO2、Al23など)95上に、記憶セルより大きい面積で第1のスピンフィルター層2、更には反強磁性層4を積層している。なお、図中の96aは絶縁膜、96b、96c、96dはそれぞれ層間絶縁膜を表わす。 The memory cell has a shape having an aspect ratio (aspect ratio), for example, an ellipse (see FIG. 3) in order to have shape magnetic anisotropy. The processing region of the memory cell is configured such that the processing is stopped on the upper surface of the second spin filter layer 12 to increase the area of the spin filter layer 12 and prevent the leakage magnetic field from reaching the storage layer 1. The same applies to the upper first spin filter layer 2. The first spin filter has a larger area than the storage cell on the nonmagnetic insulating film (SiO 2 , Al 2 O 3, etc.) 95 that embeds the storage cell. A filter layer 2 and further an antiferromagnetic layer 4 are laminated. In the figure, 96a represents an insulating film, and 96b, 96c, and 96d represent interlayer insulating films.

このスピン注入磁化反転素子70は、膜面垂直に電流を流すだけのシンプルな構造からなり、書き込み(記憶層1の磁化反転)は、図2(A)、(B)に示したように、膜面垂直に流す電流の方向を変えることにより行なう。大電流(100μA程度)で書き込みが、小電流(10μA程度)で読み出しが可能である。   This spin-injection magnetization reversal element 70 has a simple structure in which a current flows only perpendicularly to the film surface, and writing (magnetization reversal of the storage layer 1) can be performed as shown in FIGS. This is done by changing the direction of the current flowing perpendicular to the film surface. Writing is possible with a large current (about 100 μA), and reading is possible with a small current (about 10 μA).

素子の膜構成は、上述した各種実施の形態を使えるが、抵抗変化量が大きくて製造が容易なものとして、上述した第5の実施の形態の構造が好適である。ここでは、FET130のドレイン上に設けた電極146の上にTa下地層を設け、PtMn層14(厚さ20〜40nm)/Co−Fe層72(厚さ5〜10nm)/Ru層71(厚さ0.7〜0.8nm)/Co−Fe層12(厚さ5〜10nm)/Al23層63(厚さ0.5〜1.5nm)/Co−Fe層1(厚さ2〜3nm)/Cu層3(厚さ5〜10nm)/Co−Fe層2(厚さ5〜10nm)/PtMn層4(厚さ20〜40nm)の多層膜を形成し、更にTaキャップ層90を成膜する。 Although the various embodiments described above can be used for the film structure of the element, the structure of the above-described fifth embodiment is preferable as the resistance change is large and the manufacturing is easy. Here, a Ta underlayer is provided on the electrode 146 provided on the drain of the FET 130, and the PtMn layer 14 (thickness 20 to 40 nm) / Co—Fe layer 72 (thickness 5 to 10 nm) / Ru layer 71 (thickness). 0.7 to 0.8 nm) / Co—Fe layer 12 (thickness 5 to 10 nm) / Al 2 O 3 layer 63 (thickness 0.5 to 1.5 nm) / Co—Fe layer 1 (thickness 2) -3 nm) / Cu layer 3 (thickness 5-10 nm) / Co—Fe layer 2 (thickness 5-10 nm) / PtMn layer 4 (thickness 20-40 nm), and a Ta cap layer 90 Is deposited.

各Co−Fe磁性層の組成は、Fe5〜50at%としたが、MS>400emu/cm3(400kA/m)の任意の磁性材料を用いてよい。MSが400emu/cm2(400kA/m)以下では、記憶セル体積が微小であるため、熱揺らぎ耐性を維持することが困難となる。記憶セルの大きさは、長径100〜200nm、短径50〜100nmの概楕円形とする。ドレイン上における記憶セルの配置の向きは任意である。記憶セルの保磁力は、数百Oe〜1kOe(数十kA/m)と十分大きくとることができる。 The composition of each Co—Fe magnetic layer is 5 to 50 at% Fe, but any magnetic material with M S > 400 emu / cm 3 (400 kA / m) may be used. When M S is 400 emu / cm 2 (400 kA / m) or less, the memory cell volume is very small, and it becomes difficult to maintain the thermal fluctuation resistance. The size of the memory cell is approximately elliptical with a major axis of 100 to 200 nm and a minor axis of 50 to 100 nm. The orientation of the memory cells on the drain is arbitrary. The coercive force of the memory cell can be as large as several hundred Oe to 1 kOe (several tens of kA / m).

本実施の形態によるMRAMは、磁化反転時間が〜2nsec以下であり、磁気メモリの特徴である高速応答が実現される。書き込みに必要な電圧は1V以下、必要電流は1mA以下となり、記憶層1の膜厚及び記憶セルサイズの最適化により、それぞれ0.2V、0.2mA程度に低減できる。   The MRAM according to this embodiment has a magnetization reversal time of ˜2 nsec or less, and realizes a high-speed response that is characteristic of a magnetic memory. The voltage required for writing is 1 V or less and the necessary current is 1 mA or less, and can be reduced to about 0.2 V and 0.2 mA, respectively, by optimizing the thickness of the storage layer 1 and the storage cell size.

スピン注入磁化反転を行う磁気抵抗効果素子70を記憶セルに用いた場合のMRAMを、電流磁界による磁化反転を行う従来例と比較して図10に示す。図10(A)には、図13に示した電流磁界による磁化反転を用いたMRAMの要部断面図とその平面図を概略的に示し、図10(B)には、本実施の形態による偏極スピン電流の注入による磁化反転を用いたMRAMの要部断面図とその平面図を概略的に示す。   FIG. 10 shows an MRAM in the case where a magnetoresistive effect element 70 that performs spin-injection magnetization reversal is used in a memory cell, as compared with a conventional example that performs magnetization reversal by a current magnetic field. FIG. 10A schematically shows a cross-sectional view and a plan view of the main part of the MRAM using the magnetization reversal by the current magnetic field shown in FIG. 13, and FIG. 10B shows the present embodiment. The main part sectional drawing and the top view of MRAM using magnetization reversal by injection | pouring of a polarized spin current are shown roughly.

上述した理由から、本実施の形態によるMRAMは、記憶セルの面内サイズを0.1μmφ程度のオーダーまで微小化することができるため、半導体プロセスで言うところのスケーリングが可能となり、最先端の設計ルールを使用できる。磁界発生用の電流線(書き込み用ワード線)が不要となり、従って、磁束集中用のクラッド構造150、151及びバイパス線115も不要となる。この結果、1bit当たりの素子面積は、従来の約20F2(Fは設計ルール)から、理論上の最小面積である6F2となる。設計ルールの微小化に伴い、メモリセル部の面積は0.06μm2程度にまで減少する。これにより、Gbit超の大容量化が可能となる。書き込み電流は100μA程度、読み出し電流は10μA以下であるから、超低消費電力のメモリとなり、応答速度は1nsec程度と極めて高速である。SRAM(スタティック・ランダム・アクセス・メモリ)、DRAM(ダイナミック・ランダム・アクセス・メモリ)等の既存のメモリの長所を併せ持つ大容量で不揮発性の固体メモリが実現する。 For the reason described above, the MRAM according to the present embodiment can reduce the in-plane size of the memory cell to the order of about 0.1 μmφ, so that the scaling in the semiconductor process is possible and the most advanced design. Rules can be used. A current line for generating a magnetic field (write word line) is not required, and therefore the magnetic flux concentration clad structures 150 and 151 and the bypass line 115 are also unnecessary. As a result, the element area per bit is 6F 2 which is the theoretical minimum area from the conventional 20 F 2 (F is a design rule). With the miniaturization of design rules, the area of the memory cell portion is reduced to about 0.06 μm 2 . This makes it possible to increase the capacity exceeding Gbit. Since the write current is about 100 μA and the read current is 10 μA or less, the memory has an extremely low power consumption, and the response speed is as high as about 1 nsec. A large-capacity, nonvolatile solid-state memory having the advantages of existing memories such as SRAM (Static Random Access Memory) and DRAM (Dynamic Random Access Memory) is realized.

第8の実施の形態
図11は、本発明の第8の実施の形態を示すものである。
Eighth Embodiment FIG. 11 shows an eighth embodiment of the present invention.

<クロスポイント型素子への適用>
図11は、本発明をクロスポイント型のメモリ(米国特許第5,640,343号公報参照)に適用したものであって、直交する二つの配線142と160との間に上述したスピン注入磁化反転素子10〜80のいずれかが配置されたものである。
<Application to cross-point element>
FIG. 11 shows a case where the present invention is applied to a cross-point type memory (see US Pat. No. 5,640,343), and the above-described spin-injection magnetization reversal elements 10 to 10 are provided between two orthogonal wirings 142 and 160. Any one of 80 is arranged.

この例の場合、スイッチング用のトランジスタを用いる図9に示した如きMRAMと比べて、書き込み及び読み出しをトランジスタを介して行わず、ビット線142とワード線160との間の電流のみによって行うが、上述した第7の実施の形態で述べたと同様の効果は得られる。   In this example, as compared with the MRAM as shown in FIG. 9 using a switching transistor, writing and reading are not performed through the transistor, but only by a current between the bit line 142 and the word line 160. The same effect as described in the seventh embodiment can be obtained.

第9の実施の形態
図12は、本発明の第9の実施の形態を示すものである。
Ninth Embodiment FIG. 12 shows a ninth embodiment of the present invention.

<記憶セルの形状>
記憶セルの形状は、図12(A)に示すように、上述した各実施の形態で述べた概楕円形の他、図12(B)、(C)に示すような長方形、リング状等、一軸の形状磁気異方性を有するいかなる形状でもよい(図中の矢印は磁化容易軸方向を示す)。
<Shape of memory cell>
As shown in FIG. 12A, the shape of the memory cell is not limited to the approximate ellipse described in each of the above embodiments, but also a rectangle, a ring shape, etc., as shown in FIGS. Any shape having a uniaxial magnetic anisotropy may be used (the arrow in the figure indicates the direction of the easy axis of magnetization).

但し、記憶層の磁性膜が、結晶磁気異方性など、形状に依らない何らかの磁気異方性を有する場合には、形状磁気異方性は必ずしも必要でない。例えば、面内に2軸の結晶磁気異方性を持つ正方形又は円形の記憶セルとしてもよい。これは、例えばfcc構造を有する磁性材(Co系合金など)にて、例えば(001)面を優先成長させた単結晶膜を作製すればよい。この場合、例えば<±1,0,0>方向及び<0,±1,0>方向の2軸が、磁化容易軸となり、2値(2bit)記録が可能となる。記憶セルの面内に複数の磁気異方性が存在する場合は、多値記録が可能となる。   However, when the magnetic film of the storage layer has some magnetic anisotropy such as crystal magnetic anisotropy, the shape magnetic anisotropy is not necessarily required. For example, a square or circular memory cell having biaxial magnetocrystalline anisotropy in the plane may be used. For example, a single crystal film in which, for example, the (001) plane is preferentially grown using a magnetic material (Co-based alloy or the like) having an fcc structure may be manufactured. In this case, for example, the two axes of the <± 1,0,0> direction and the <0, ± 1,0> direction become easy magnetization axes, and binary (2-bit) recording is possible. When there are a plurality of magnetic anisotropies in the plane of the memory cell, multilevel recording is possible.

以上に述べた本発明の実施の形態は、本発明の技術的思想に基づいて種々に変形可能である。   The embodiment of the present invention described above can be variously modified based on the technical idea of the present invention.

例えば、記憶層の両側(上下)を磁化方向が逆向きのスピンフィルター層で挟んだ上述した基本構造を有していれば、多層膜の構成は種々に変更できるし、その構成材料や物性、形状、サイズ等も適宜変更してよい。また、上述したスピン注入磁化反転素子を組み込んだメモリの種類や構造についても、上述したものに限定されることはない。   For example, if it has the basic structure described above with both sides (upper and lower) of the storage layer sandwiched between spin filter layers with opposite magnetization directions, the configuration of the multilayer film can be variously changed, and its constituent materials and physical properties, The shape, size, etc. may be changed as appropriate. Also, the type and structure of the memory incorporating the above-described spin-injection magnetization switching element are not limited to those described above.

また、上述した例では、スピン注入磁化反転素子の要部となる多層膜は、適当な基板/下地膜上に成膜され、上部には電極が配置されるが、その多層膜の積層順は、上下のどちらから積層してもよく、作製のし易さを考えて適宜、選択される。下地膜は、上述したFETを含む適当なCMOS(Complementary Metal-Oxide-Semiconductor)構成を有する複合膜であってよいが、他の下地構成であってもよい。   In the above example, the multilayer film that is the main part of the spin transfer magnetization reversal element is formed on an appropriate substrate / underlayer film, and an electrode is disposed on the upper part. The upper and lower layers may be laminated, and are appropriately selected in consideration of ease of production. The base film may be a composite film having an appropriate CMOS (Complementary Metal-Oxide-Semiconductor) configuration including the above-described FET, but may have other base configurations.

磁化自由層(記憶層)の両側に、磁気的に分離された磁性層がそれぞれ配置され、これらの磁性層の磁化方向が互いに逆向きに固定されている磁気抵抗効果素子において、膜面に垂直に電流を流すことにより、磁化自由層の磁化方向を反転させる磁化反転(即ち、スピン注入磁化反転)の効果を高めた磁気抵抗効果素子、及びその磁化反転方法を用いたMRAM等の磁気メモリを提供できる。   In a magnetoresistive effect element in which magnetically separated magnetic layers are arranged on both sides of a magnetization free layer (storage layer) and the magnetization directions of these magnetic layers are fixed in opposite directions, the film is perpendicular to the film surface. A magnetoresistive effect element in which the effect of magnetization reversal (that is, spin injection magnetization reversal) for reversing the magnetization direction of the magnetization free layer by flowing a current to the magnetic free layer, and a magnetic memory such as MRAM using the magnetization reversal method are provided. Can be provided.

本発明の第1の実施の形態によるスピン注入磁化反転素子の概略断面図である。1 is a schematic cross-sectional view of a spin-injection magnetization switching element according to a first embodiment of the present invention. 同、書き込み(A)、(B)及び読み出し(C)、(D)の原理を示す概略断面図である。It is a schematic sectional drawing which shows the principle of writing (A), (B) and reading (C), (D). 同、スピン注入磁化反転素子の要部拡大断面図である。FIG. 3 is an enlarged cross-sectional view of a main part of the spin injection magnetization switching element. 本発明の第2の実施の形態によるスピン注入磁化反転素子の概略断面図である。It is a schematic sectional drawing of the spin injection magnetization reversal element by the 2nd Embodiment of this invention. 本発明の第3の実施の形態によるスピン注入磁化反転素子の概略断面図である。It is a schematic sectional drawing of the spin injection magnetization reversal element by the 3rd Embodiment of this invention. 本発明の第4の実施の形態によるスピン注入磁化反転素子の概略断面図である。It is a schematic sectional drawing of the spin injection magnetization reversal element by the 4th Embodiment of this invention. 本発明の第5の実施の形態によるスピン注入磁化反転素子の概略断面図である。It is a schematic sectional drawing of the spin injection magnetization reversal element by the 5th Embodiment of this invention. 本発明の第6の実施の形態によるスピン注入磁化反転素子の概略断面図である。It is a schematic sectional drawing of the spin injection magnetization reversal element by the 6th Embodiment of this invention. 本発明の第7の実施の形態によるスピン注入磁化反転素子を用いたMRAMの要部断面図(A)及びその要部拡大図(B)である。It is principal part sectional drawing (A) and its principal part enlarged view (B) of MRAM using the spin-injection magnetization inversion element by the 7th Embodiment of this invention. 同、スピン注入磁化反転を用いたMRAMを、電流磁界による磁化反転を用いたMRAMと比較した概略断面図及びその平面図である。FIG. 6 is a schematic cross-sectional view and a plan view of an MRAM using spin injection magnetization reversal compared to an MRAM using magnetization reversal by a current magnetic field. 本発明の第8の実施の形態によるスピン注入磁化反転素子を用いたクロスポイント型メモリの要部断面図である。It is principal part sectional drawing of the cross point type | mold memory using the spin injection magnetization switching element by the 8th Embodiment of this invention. 本発明の第9の実施の形態によるスピン注入磁化反転素子を用いた記憶セルの各種形状を示す平面図である。It is a top view which shows the various shapes of the memory cell using the spin injection magnetization reversal element by the 9th Embodiment of this invention. 従来例による電流磁界での磁化反転を用いたMRAMの要部断面図である。It is principal part sectional drawing of MRAM using the magnetization reversal by the current magnetic field by a prior art example. 同、書き込みと読み出しの原理を示す概略断面図である。It is a schematic sectional drawing which shows the principle of writing and reading similarly. 他の従来例によるスピン注入磁化反転素子の概略断面図である。It is a schematic sectional drawing of the spin injection magnetization reversal element by another prior art example. 同、書き込みの原理を示す概略断面図である。It is a schematic sectional drawing which shows the principle of writing similarly. 同、スピン注入磁化反転素子を用いたMRAMの要部断面図(A)及びその要部拡大図(B)である。FIG. 4 is a cross-sectional view (A) of a main part and an enlarged view (B) of a main part of the MRAM using the spin injection magnetization switching element.

符号の説明Explanation of symbols

1、121…記憶層(磁化自由層)、2、12、122…スピンフィルター層、
3、13、53、63、123…非磁性スペーサー層、4、14、124…反強磁性層、
5、30、95、96、125、141…絶縁膜、
10、40、50、60、70、80、120…スピン注入磁化反転素子、
15、16…GMR膜、17、18、19…端子、20、90、140…キャップ層、
65…TMR膜、71…Ru層、72…ピン層、75…積層フェリ構造、
91…下地導電層、130…書き込み兼読み出し用電界効果トランジスタ、
135…ウェル領域、136…ソース領域、137…ドレイン領域、
138…ゲート絶縁膜、139…ゲート電極、142…電極(ビット線)、
143…ソース電極、143a、146a…プラグ、146…ドレイン電極
DESCRIPTION OF SYMBOLS 1,121 ... Memory layer (magnetization free layer) 2, 12, 122 ... Spin filter layer,
3, 13, 53, 63, 123 ... nonmagnetic spacer layer, 4, 14, 124 ... antiferromagnetic layer,
5, 30, 95, 96, 125, 141 ... insulating film,
10, 40, 50, 60, 70, 80, 120 ... spin-injection magnetization reversal element,
15, 16 ... GMR film, 17, 18, 19 ... terminal, 20, 90, 140 ... cap layer,
65 ... TMR film, 71 ... Ru layer, 72 ... pinned layer, 75 ... laminated ferrimagnetic structure,
91 ... underlying conductive layer, 130 ... field effect transistor for writing and reading,
135 ... well region, 136 ... source region, 137 ... drain region,
138 ... Gate insulating film, 139 ... Gate electrode, 142 ... Electrode (bit line),
143 ... Source electrode, 143a, 146a ... Plug, 146 ... Drain electrode

Claims (15)

磁化自由層と、この磁化自由層の両側に磁気的に分離されてそれぞれ配置された第1磁性層及び第2磁性層とを有し、これらの磁性層の磁化方向が互いに逆向きに固定されている磁気抵抗効果素子。   It has a magnetization free layer and a first magnetic layer and a second magnetic layer that are magnetically separated and arranged on both sides of the magnetization free layer, and the magnetization directions of these magnetic layers are fixed opposite to each other. Magnetoresistive effect element. 前記第1磁性層及び前記第2磁性層の単位面積当りの磁気モーメント数が、前記磁化自由層のそれより大きい、請求項1に記載した磁気抵抗効果素子。   The magnetoresistive element according to claim 1, wherein the number of magnetic moments per unit area of the first magnetic layer and the second magnetic layer is larger than that of the magnetization free layer. 前記第1磁性層と、第1非磁性層と、前記磁化自由層と、第2非磁性層と、前記第2磁性層との積層体によって構成されている、請求項1に記載した磁気抵抗効果素子。   2. The magnetoresistive element according to claim 1, wherein the magnetoresistive element is configured by a stacked body of the first magnetic layer, the first nonmagnetic layer, the magnetization free layer, the second nonmagnetic layer, and the second magnetic layer. Effect element. 前記積層体の積層方向に流す電流によるスピン注入磁化反転で前記磁化自由層に情報が書き込まれると共に、前記第1磁性層及び前記第2磁性層がスピンフィルター層として機能し、かつ前記積層方向に流す電流によって記憶情報が読み出されるように構成された、請求項3に記載した磁気抵抗効果素子。   Information is written in the magnetization free layer by spin injection magnetization reversal by a current flowing in the stacking direction of the stacked body, the first magnetic layer and the second magnetic layer function as a spin filter layer, and in the stacking direction. The magnetoresistive effect element according to claim 3, wherein stored information is read out by a flowing current. 前記第1磁性層と前記第1非磁性層と前記磁化自由層とが第1巨大磁気抵抗効果膜を構成し、前記第2磁性層と前記第2非磁性層と前記磁化自由層とが第2巨大磁気抵抗効果膜を構成している、請求項4に記載した磁気抵抗効果素子。   The first magnetic layer, the first nonmagnetic layer, and the magnetization free layer constitute a first giant magnetoresistive film, and the second magnetic layer, the second nonmagnetic layer, and the magnetization free layer are the first The magnetoresistive effect element according to claim 4, comprising two giant magnetoresistive effect films. 前記磁化自由層を中心として、その両側の積層構造が互いに非対称に形成されている、請求項5に記載した磁気抵抗効果素子。   The magnetoresistive effect element according to claim 5, wherein a laminated structure on both sides of the magnetization free layer is formed asymmetrically with respect to each other. 前記第1磁性層及び前記第2磁性層の側に、情報書き込み用及び情報読み出し用の端子がそれぞれ設けられている、請求項6に記載した磁気抵抗効果素子。   7. The magnetoresistive element according to claim 6, wherein terminals for writing information and reading information are provided on the first magnetic layer and the second magnetic layer, respectively. 前記第1磁性層及び前記第2磁性層の側に情報書き込み用及び情報読み出し用の端子がそれぞれ設けられ、前記磁化自由層にも情報読み出し用の端子が設けられている、請求項5に記載した磁気抵抗効果素子。   The information writing terminal is provided on each of the first magnetic layer and the second magnetic layer, and the information reading terminal is provided on the magnetization free layer. Magnetoresistive effect element. 前記第1磁性層と前記第1非磁性層と前記磁化自由層とが巨大磁気抵抗効果膜を構成し、前記第2磁性層と前記第2非磁性層と前記磁化自由層とが巨大磁気抵抗効果膜を構成していない、請求項4に記載した磁気抵抗効果素子。   The first magnetic layer, the first nonmagnetic layer, and the magnetization free layer constitute a giant magnetoresistive film, and the second magnetic layer, the second nonmagnetic layer, and the magnetization free layer comprise a giant magnetoresistance. The magnetoresistive effect element according to claim 4 which does not constitute an effect film. 前記第1磁性層と前記第1非磁性層と前記磁化自由層とが巨大磁気抵抗効果膜を構成しているか或いは構成しておらず、前記第2磁性層と前記第2非磁性層と前記磁化自由層とがトンネル磁気抵抗効果膜を構成している、請求項4に記載した磁気抵抗効果素子。   The first magnetic layer, the first nonmagnetic layer, and the magnetization free layer may or may not constitute a giant magnetoresistive film, and the second magnetic layer, the second nonmagnetic layer, and the The magnetoresistive element according to claim 4, wherein the magnetization free layer constitutes a tunnel magnetoresistive film. 前記第1磁性層及び/又は前記第2磁性層にそれぞれ、これらの各磁性層の磁化方向を交換結合により固定するための第1反強磁性層及び/又は第2反強磁性層が接合されている、請求項1に記載した磁気抵抗効果素子。   A first antiferromagnetic layer and / or a second antiferromagnetic layer for fixing the magnetization direction of each magnetic layer by exchange coupling is joined to the first magnetic layer and / or the second magnetic layer, respectively. The magnetoresistive effect element according to claim 1. 前記第1磁性層又は前記第2磁性層と、第3強磁性層とが第3非磁性層を介して積層され、RKKY的相互作用により反強磁性的に結合される積層フェリ構造が形成されている、請求項1に記載した磁気抵抗効果素子。   The first magnetic layer or the second magnetic layer and the third ferromagnetic layer are stacked via a third nonmagnetic layer, and a stacked ferrimagnetic structure is formed in which antiferromagnetic coupling is achieved by RKKY interaction. The magnetoresistive effect element according to claim 1. 請求項1〜12のいずれか1項に記載した磁気抵抗効果素子がメモリセル部を構成している磁気メモリ装置。   A magnetic memory device in which the magnetoresistive effect element according to claim 1 constitutes a memory cell unit. 前記第1磁性層の側がビット線に接続され、前記第2磁性層の側がスイッチング素子に接続されたMRAM(Magnetic Random Access Memory)として構成された、請求項13に記載した磁気メモリ装置。   14. The magnetic memory device according to claim 13, wherein the magnetic memory device is configured as an MRAM (Magnetic Random Access Memory) in which the first magnetic layer side is connected to a bit line and the second magnetic layer side is connected to a switching element. 前記第1磁性層の側がビット線に接続され、前記第2磁性層の側がワード線に接続されたクロスポイント型に構成された、請求項13に記載した磁気メモリ装置。


14. The magnetic memory device according to claim 13, wherein the magnetic memory device is configured as a cross-point type in which a side of the first magnetic layer is connected to a bit line and a side of the second magnetic layer is connected to a word line.


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