JP2005142707A - Imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an imaging apparatus for decreasing a delay of display on a monitor during continuous shooting. <P>SOLUTION: An imaging circuit alternately carries out still mode photographing and monitor mode photographing during the continuous shooting, a signal processing circuit puts off the still image processing and earlier carries out monitor image processing, immediately processes the monitor image and displays the processed image on an LCD to thus suppress a display time lag nearly equal to that in the monitor mode. Alternatively the signal processing circuit starts earlier the still picture processing and may interrupt the monitor image processing when data of the monitor image are completed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a digital camera that improves the visibility of a subject during continuous shooting.

  Digital cameras have a function of displaying an image captured by an image sensor on an LCD panel, and many digital cameras do not have an optical viewfinder. Instead of looking through the viewfinder and pressing the shutter like a silver halide camera, the shooting style is generally that you press the shutter while looking at the LCD panel, so that the display quality of the LCD panel affects the success or failure of shooting. It is becoming.

  Hereinafter, as an example of a conventional imaging apparatus, a digital still camera described in Patent Document 1 will be taken and an outline will be described with reference to FIG. FIG. 4 is a block diagram showing a simplified configuration of the digital still camera described in Patent Document 1. In FIG. In FIG. 4, 11 is an imaging circuit, 12 is an image processing circuit, 14 is a bus, 16 is a main memory, 17 is a display circuit, and 19 is a recording / reproducing circuit.

  The image pickup circuit 11 includes an image pickup element such as a CCD and an A / D converter. The image of incident light is separated into RGB three primary colors, digitized, and output as RGB format image data. An imaging circuit of a digital still camera has a monitor mode and a still mode, and the operation differs depending on the mode. In the monitor mode, input image data for one screen is output every 1 / 60th of a second, but the number of output pixels is small and the resolution is the same as that of a video camera. On the other hand, in the still mode, image data with higher resolution and higher pixels is output. However, since the number of pixels is large, a relatively long time is required for output. In the following description, an output image in the still mode is called a still image, and an output image in the monitor mode is called a still image.

  All data exchange between the circuits is performed via the bus 14. The imaging circuit 11 writes RGB format image data to the main memory 16 via the bus 14, and the image processing circuit 12 reads RGB format image data from the main memory 16 via the bus 14.

  The image processing circuit 12 converts the RGB format image data into YC format image data suitable for display and compression and writes it back to the main memory 16. The photographed still image is converted into YC format image data, further converted into compressed data, and written into the main memory 16. The image processing circuit 12 also performs an operation for converting the resolution of the captured still image into the number of pixels suitable for display.

  The recording / reproducing circuit 19 reads the compressed data from the main memory 16 and records it on a medium such as a flash memory at the time of shooting. During playback, the compressed data is read from the medium and written back to the main memory 16.

  The display circuit 17 reads out image data in YC format from the main memory 16, converts it into a video signal, and displays it on the LCD. Here, the image data in the YC format read by the display circuit 17 is for the monitor image when the imaging circuit 11 is in the monitor mode, and the still image is displayed by the image processing circuit 12 when the imaging circuit 11 is in the still mode. It is converted.

  FIG. 5 is a diagram showing a change over time in the operation of the imaging apparatus. In (A), (B), and (C) of FIG. 5, the upper 41 is a bar graph representing the time change of the output of the imaging circuit, and the middle 43 is a bar graph representing the time change of the operation of the image processing circuit. The lower graph 44 is a bar graph representing the operation of the display circuit. The numbers in the squares represent the frame numbers of the images. If the numbers are the same, it means the same frame.

  FIG. 5A shows the operation when the image pickup circuit is in the monitor mode, and the image pickup apparatus updates the output image within a short time as in the upper stage 41. The image processing circuit starts processing with a slight delay from the output of the imaging device as in the middle stage 43, and processes the image at the same speed as the output of the imaging device. The display circuit displays it on the LCD in a form delayed by one frame from the operation of the image processing circuit as shown in the lower section 44. The reason for not displaying the frame being processed is that an unnatural image may be displayed when reading and writing of image data are mixed. As described above, in the monitor mode, the output of the imaging device is updated one after another and is reflected on the LCD display, so that the user can follow the movement of the subject by looking at the LCD display.

FIG. 5B shows an operation when the imaging circuit is in the still mode, and can be called a continuous shooting mode because a continuous shooting operation in which still shooting is performed continuously. Even in the continuous shooting mode, the signal flow is the same as in the monitor mode as a whole, and the LCD always displays the latest image, but the image processing circuit converts the resolution of the image data and converts the resolution. Processing is added, and the display circuit displays the resolution-converted image.
JP 2000-115704 A

  Here, attention is paid to the delay of the LCD display in the monitor mode and the still mode. In (A), (B), and (C) of FIG. 5, 45 represents the time from the start of image output of the imaging circuit until the frame is displayed on the LCD, and this is called a display time lag. To. As shown in FIG. 5A, in the monitor mode, the display time lag 45 is small and corresponds to a time of just over one frame. Even in the continuous shooting mode, as shown in FIG. 5B, it can be said that the display time lag 45 corresponds to a time of just over one frame.

  However, as is clear from a comparison between FIGS. 5A and 5B, since the still image has a large number of pixels, the output period of one frame becomes longer in the output of the imaging device as in the upper stage 41, and the image In the processing circuit, the processing time for one frame becomes longer as in the middle stage 43. Therefore, in the continuous shooting mode, the display time lag is extremely larger than that in the monitor mode.

  FIG. 5B is a diagram based on the assumption that the pixel data output of the imaging circuit is in progressive order, whereas FIG. 5C is a case where the pixel data output is in interlaced order of three field divisions. FIG. If the pixel output is in the interlaced order, conversion from RGB data to YC data cannot be performed until the final field data is output, so that the operation start of the image processing circuit is delayed, and as a result, the LCD display is also delayed. As is apparent from a comparison between FIGS. 5B and 5C, when the pixel data output of the imaging circuit is in the interlaced order, the display time lag 45 is larger than that in the progressive order.

  Since the display time lag is the time difference until the movement of the subject appears on the LCD display, if this is large, the user will be delayed in recognizing the subject, and the camera will not be able to point the subject correctly at the subject. An image that is not correctly captured will be recorded.

  The image pickup apparatus of the present invention is characterized in that still mode shooting and monitor mode shooting are alternately performed during continuous shooting, and that monitor images are processed with priority over still images in signal processing.

  The image pickup apparatus of the present invention has an advantage that the display time lag can be suppressed to the same level as in the monitor mode by periodically taking the monitor mode during continuous shooting and processing the monitor image immediately and displaying it on the LCD. is there.

  Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS.

  FIG. 1 is a block diagram illustrating the configuration of a digital still camera according to the present invention. In FIG. 1, 11 is an imaging circuit, 14 is a bus, 15 is a display memory, 16 is a main memory, 17 is a display circuit, 18 is a compression / expansion circuit, 19 is a recording / playback circuit, 21 is an image processing unit, and 22 is the number of lines. A signal 23 is a mode switching signal.

  The imaging circuit 11 decomposes the incident light image into RGB three primary colors and converts them into digitized RGB image data. The photoelectric conversion element is a three-field interlace readout type CCD, and the operation is different between a monitor mode for outputting a monitor image and a still mode for outputting a still image. The still image is divided into three fields and output. The output of each field requires 6/60 seconds, and the total of the three fields requires 18/60 seconds. On the other hand, the monitor image outputs one screen every 1/60 second.

  The imaging circuit 11 writes an input image into the main memory 16 via the bus 12. At that time, the imaging circuit 11 notifies the control circuit 20 of the number of lines written as a line number signal 22. The main memory 16 has a still image area and a monitor image area, and the imaging circuit 11 selects an area to be written according to the image.

  The image processing unit 21 reads out RGB format image data from the main memory 16 and converts it into YC format image data. The image processing unit 21 has two modes, a monitor mode and a still mode, and the mode is switched by a mode switching signal 23. In the still mode, the RGB image data is read from the still image area of the main memory 16, and the YC image data is written back to the YC data area of the main memory. Conversely, in the monitor mode, RGB image data is read from the monitor image area of the main memory 16 and YC image data is written to the display memory 15.

  The display circuit 17 reads YC data from the display memory 15, converts it into a video signal, and displays it on the LCD. When the monitor image input is interrupted to shoot a still image, the LCD is set to a black screen. The compression / decompression circuit 18 reads the YC data from the main memory 16, converts it into sub-compression data with a reduced capacity, and writes it back to the main memory 16. The recording / reproducing circuit 19 reads the compressed data from the main memory 16 and writes it into the flash memory.

  Next, the configuration of the image processing unit 21 will be described with reference to FIG. FIG. 2 is a block diagram illustrating a configuration example of the image processing unit 21.

  In FIG. 2, 12 is an image processing circuit, 21 is an image processing unit, 23 is a mode switching signal, 24 is a selector, 25 is a gate circuit, 26 is an output switching circuit, 27 is a register F group, 28 is a register B group, and 29 is It is a trigger pulse group. The mode switching signal 23 switches the operation of the image processing unit 21 and controls the selector 24, the gate circuit 25, and the output switching circuit 26. The register F group 27 and the register B group 28 each instruct the operation of the image processing circuit 12, and the contents of the instruction include the start address of the RGB data area and the start address of the YC data area. The outputs of the registers F and B are selected by the selector 24, and only one instruction is given to the image processing circuit 12. The image processing circuit 12 reads the RGB data, converts the data, and writes the YC data according to the instruction, and outputs the trigger pulse group 29 in synchronization with the reading and writing. The trigger pulse group 29 is a pulse for updating the leading address of RGB data and the leading address of YC data in accordance with the progress of writing and reading. The gate circuit 25 operates to select the selector among the register F group and the register B group. It is given only to the register group selected in 24, and the value of each register is updated. The output switching circuit 26 switches the output destination of the image processing circuit 12 according to the mode switching signal 23.

  Here, the operation in mode switching will be described. In the still mode, the register B group is selected, and the leading address of the RGB data and the leading address of the YC data in the register B group are incremented as the processing proceeds. When the mode switching signal 23 changes at a certain point and the monitor mode is switched, the register F group is selected instead of the register B group, and the register B group does not change. When the mode switching signal 23 changes again and switches to the still mode, the start address of the RGB data of the register B group and the start address of the YC data are maintained in a state immediately before the still image processing is stopped. No. 12 can restart the still image processing from the interrupted location.

  Next, the flow of operations from shooting to monitor display will be described with reference to FIG. FIG. 3 is a diagram showing operations of the imaging circuit 11, the control circuit 20, the image processing unit 21, and the display circuit 17, and (A) and (B) show application examples of two different control methods. In FIG. 3, 41 is a bar graph showing the time change of the output state of the imaging circuit 11, 42 is the waveform of the mode switching signal 23 that is the output of the control circuit 20, and 43 is the time of the processing operation in the image processing unit 21. A bar graph showing the change, 44 is a bar graph showing the time change of the LCD display in the display circuit 17, and 45 shows a display time lag.

  First, the operation will be described with reference to FIG. When still image shooting is started, the image pickup circuit 11 divides and outputs the still image into three fields as indicated by 41 and 43 in FIG. 3A, so that an image processing unit is provided between the first field and the second field. No. 21 cannot process a still image. During this time, there is no YC data suitable for display, so the image processing unit 21 makes the LCD display black out as shown at 44 in FIG.

  When the imaging circuit 11 starts outputting the RGB data of the third field, the control circuit 20 changes the mode switching signal of 42 in FIG. 3A according to the line number signal output from the imaging circuit 11, and the image processing unit 21 is set to the still mode. Then, as indicated by 43 in FIG. 3A, the image processing unit 21 converts the RGB data of the still image into YC data and outputs it to the main memory 16.

  When the imaging circuit 11 finishes outputting the RGB data of the third field and starts outputting the RGB data of the monitor image, the control circuit 20 changes the reference numeral 42 in FIG. 3A according to the line number signal output by the imaging circuit 11. The mode switching signal is changed to set the image processing unit 21 to the monitor mode. Then, as indicated by 43 in FIG. 3A, the image processing unit 21 converts the RGB data of the monitor image into YC data and outputs it to the display memory 15. When the image processing unit 21 finishes processing the monitor image, the display circuit 17 starts LCD display. At the same time, the control circuit 20 changes the mode switching signal as indicated by 42 in FIG. 21 again enters the still mode and resumes still image processing. Thereafter, when the image processing unit 21 completes the processing of the first still image, the control circuit 20 initializes the still mode register group and the monitor mode register group, and the imaging circuit 11 causes the third still image to be the third still image. Waiting for the start of outputting field image data, processing of the second still image is started.

  FIG. 3B is a diagram illustrating an example in which a simpler control method is adopted. In this control method, as indicated by 43 in FIG. 3B, the image processing unit 21 does not perform signal processing while the imaging circuit 11 outputs the RGB data of the still image of the first frame, and the first monitor. The image is processed first.

  The white balance may be off due to the color temperature of the light source when shooting with flash or twilight. To correct the white balance correctly, the RGB data for one screen is statistically evaluated before the signal is received. Ideally, the process begins. It is advantageous to process image data as soon as possible in terms of memory consumption, but in terms of image quality, it is advantageous to process after capturing RGB data for one screen.

  In this example of the control method, the processing of the still image for the first frame is started after the processing of the monitor image for the first frame is finished. Thereafter, similarly, the processing of the still image of the second frame is started after the processing of the monitor image of the second frame. According to this method, as indicated by 43 in FIG. 3B, still image processing is not interrupted in the same way as monitor image processing, so two sets of register groups are formed as shown in FIG. There is no need to have a means for updating the contents of a set of registers each time image processing for one screen is completed.

  In both cases (A) and (B) of FIG. 3, the display time lag 45 is the same as the display time lag in the monitor mode shown in FIG. In FIG. 3A, the LCD is blacked out after one frame is displayed, while in FIG. 3B, the LCD display is maintained until the next monitor image update. The latter is better because the LCD display does not flicker, but visual interpolation does not work because the still image continues to be displayed, and the LCD display appears to be delayed from the display method of (A). There is. Since both have advantages and disadvantages, either may be selected.

  As described above, during continuous shooting, monitor mode shooting is periodically inserted, and the monitor image is immediately processed and displayed on the LCD, so that the display time lag can be suppressed to the same level as in the monitor mode.

  The image pickup apparatus according to the present invention periodically shoots in the monitor mode during continuous shooting, and the monitor image is immediately processed and displayed on the LCD, so that the display time lag can be suppressed to the same level as in the monitor mode. It can be applied to cameras and mobile phone terminals with cameras.

1 is a block diagram illustrating the configuration of a digital still camera according to the present invention. 1 is a block diagram illustrating the configuration of an image processing unit according to the present invention. The figure explaining the flow of operation | movement from imaging | photography to a monitor display by this invention Block diagram illustrating the configuration of a conventional digital still camera The figure explaining the flow of operation from the conventional photography to the monitor display

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Image pickup circuit 12 Image processing circuit 14 Bus 16 Main memory 17 Display circuit 18 Compression / decompression circuit 19 Recording / playback circuit 21 Image processing unit 22 Line number signal 23 Mode switching signal 24 Selector 25 Gate circuit 26 Output switching circuit 27 Register F group 28 Register Group B 29 Trigger pulse group 41 Bar graph showing time change of output state of imaging circuit 42 Waveform of mode switching signal which is output of control circuit 43 Bar graph showing time change of processing operation in image processing unit 44 LCD display in display circuit Bar graph showing time change of 45 display time lag

Claims (8)

An imaging circuit, a storage unit, an image processing circuit, a display circuit, and a control circuit are provided, the imaging circuit has a still image shooting function and a moving image shooting function, and the storage unit is a still image output by the imaging circuit. The image processing circuit has a function of storing image data or moving image data, the image processing circuit has a function of processing still image data or moving image data, and the display circuit displays image data processed by the image processing circuit. And the control circuit controls the image pickup circuit and the image processing circuit, and controls the image pickup circuit to alternately perform still image shooting and moving image shooting, giving priority to moving image data over still image data. An image pickup apparatus that controls the image processing circuit to perform processing. The imaging apparatus according to claim 1, wherein in the control of processing the moving image data with priority over still image data, the processing order of the still image data and the moving image data captured immediately thereafter is switched, and An image pickup apparatus, comprising: controlling the image processing circuit so as to process still image data immediately before the processing of the moving image data photographed in step (1). The imaging apparatus according to claim 1, wherein in the control for processing the moving image data in preference to the still image data, the processing of the still image data is interrupted after starting the moving image shooting following the still image shooting. Then, the imaging apparatus controls the image processing circuit to start the processing of the moving image data and restart the processing of the still image data after the processing of the moving image data ends. 2. The image pickup apparatus according to claim 1, wherein in the control for processing the moving image data in preference to the still image data, the processing of the still image data and the moving image are started after the moving image shooting is started after the still image shooting. An image pickup apparatus that controls the image processing circuit to alternately process data and controls the image processing circuit to process still image data after the processing of moving image data ends. 5. The imaging apparatus according to claim 1, further comprising a timer, wherein the control circuit monitors the timer, and switches between processing of still image data and processing of moving image data in the image processing circuit according to a timer value. An imaging circuit characterized by things. 5. The imaging apparatus according to claim 1, wherein the imaging circuit has means for notifying a control circuit of an output data amount, and the control circuit according to the notified data amount. An imaging circuit characterized by controlling the above. 7. The imaging apparatus according to claim 1, further comprising a still image register group and a moving image register group, wherein the control circuit selects an effective register group, and the image processing circuit includes: An imaging circuit that performs processing in accordance with an instruction of a selected register group. The imaging apparatus according to claim 1, further comprising a register group and a save unit, wherein the save unit stores contents of the register group, and the image processing circuit is configured to store the register group. An imaging circuit, which performs processing according to an instruction, and wherein the control circuit has a function of exchanging the contents of the register group and the contents of the saving means.

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