JP2005136207A - Wiring circuit board, method for manufacturing same and method for manufacturing multilayer wiring board - Google Patents

Wiring circuit board, method for manufacturing same and method for manufacturing multilayer wiring board Download PDF

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JP2005136207A
JP2005136207A JP2003370851A JP2003370851A JP2005136207A JP 2005136207 A JP2005136207 A JP 2005136207A JP 2003370851 A JP2003370851 A JP 2003370851A JP 2003370851 A JP2003370851 A JP 2003370851A JP 2005136207 A JP2005136207 A JP 2005136207A
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bump
circuit board
wiring
insulating film
metal layer
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JP4523261B2 (en
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Kazuo Sakuma
和男 佐久間
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North Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring circuit board and its manufacturing method by which the top face of a bump can be sufficiently exposed without crushing the tip of the bump when forming an insulating film. <P>SOLUTION: The wiring circuit board 100 comprises a metallic film 101 consisting of copper foil of about 18μm thickness and prepared for forming wiring, and the bump 106 of about 80μm height which is formed on the surface of the metallic layer 101 through an etching stopper layer 107 consisting of Ni of about 2μm thickness. The bump 106 comprises a lower bump 106a, and an upper bump 106b formed on the lower bump 106a. Since the hardness of the lower bump 106a is about 80[Hv], and the hardness of the upper bump 106b is about 150[Hv]; the hardness of the upper bump 106b is higher than that of the lower bump 106a. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、例えばICやLSI等の電子デバイス実装用の配線回路基板及びその製造方法並びに多層配線基板の製造方法に関する。   The present invention relates to a printed circuit board for mounting an electronic device such as an IC or LSI, a manufacturing method thereof, and a manufacturing method of a multilayer wiring board.

近年の半導体製造技術の進歩は非常に目覚しく、電子デバイスの微細化は、マスクプロセス技術及びエッチング技術等の微細パターン形成技術の飛躍的な進歩により実現されている。そして、電子デバイスをプリント配線基板に高密度に実装し、電子デバイス実装用のプリント配線基板を高集積化するためには、プリント配線基板を多層化し、且つ上下配線間の接続を高信頼度で且つ微細に形成する必要がある。そのために、例えば銅箔等の金属膜を一方の表面側からウェットエッチングによりエッチングすることにより縦断面形状が略台形のバンプを形成し、そのバンプが形成された基板をプリント配線基板として使用している(例えば特許文献1)。   Advances in semiconductor manufacturing technology in recent years have been very remarkable, and miniaturization of electronic devices has been realized by dramatic advances in fine pattern formation technology such as mask process technology and etching technology. In order to mount electronic devices on a printed wiring board at a high density and to highly integrate printed wiring boards for mounting electronic devices, the printed wiring board is multilayered and the connection between the upper and lower wirings is highly reliable. And it is necessary to form finely. For that purpose, for example, a metal film such as copper foil is etched from one surface side by wet etching to form a bump having a substantially trapezoidal longitudinal section, and the substrate on which the bump is formed is used as a printed wiring board. (For example, Patent Document 1).

ここで、図5を参照しつつ、銅からなるバンプが形成された配線回路基板(プリント配線基板)の製造方法について説明する。図5は、従来技術における配線回路基板の製造方法を工程順に示す基板の断面図である。   Here, a method of manufacturing a printed circuit board (printed wiring board) on which bumps made of copper are formed will be described with reference to FIG. FIG. 5 is a cross-sectional view of a substrate showing a method of manufacturing a printed circuit board in the prior art in the order of steps.

まず、図5(a)に示すように、多層金属板300を用意する。この多層金属板300は、厚さ約18μmの銅箔からなる配線形成用金属層301上に積層された、厚さ約2μmのNi(ニッケル)からなるエッチングストッパー層302と、更にエッチングストッパー層302の上に積層された、厚さ約80μmの銅箔からなるバンプ形成用金属層303とからなる。また、バンプ形成用金属膜303に用いられる銅箔には、硬度が約100[Hv]の銅箔が使用される。   First, as shown in FIG. 5A, a multilayer metal plate 300 is prepared. The multilayer metal plate 300 includes an etching stopper layer 302 made of Ni (nickel) having a thickness of about 2 μm, which is laminated on a wiring forming metal layer 301 made of a copper foil having a thickness of about 18 μm, and an etching stopper layer 302. And a bump-forming metal layer 303 made of a copper foil having a thickness of about 80 μm. Further, as the copper foil used for the bump forming metal film 303, a copper foil having a hardness of about 100 [Hv] is used.

次に、バンプ形成用金属層303の上にレジスト(図示しない)を塗布又はラミネートする。そして、複数の円形パターンが形成された露光マスクを使用して露光を行い、続いて現像を行うことにより、図5(b)に示すように、レジストマスク304を形成する。円形パターンが形成された露光マスクを使用することにより、レジストマスク304は円形パターンをなしている。   Next, a resist (not shown) is applied or laminated on the bump forming metal layer 303. Then, exposure is performed using an exposure mask in which a plurality of circular patterns are formed, and then development is performed, thereby forming a resist mask 304 as shown in FIG. 5B. By using an exposure mask on which a circular pattern is formed, the resist mask 304 has a circular pattern.

次に、図5(c)に示すように、レジストマスク304をマスクとしてバンプ形成用金属層303をウェットエッチングによりエッチングして、上下配線間を導通する層間膜導通手段のバンプ305を形成する。   Next, as shown in FIG. 5C, the bump forming metal layer 303 is etched by wet etching using the resist mask 304 as a mask to form the bumps 305 of the interlayer film conduction means that conducts between the upper and lower wirings.

レジストマスク304は円形パターンをなしているため、バンプ305の横断面形状は円形となる。また、ウェットエッチングによりエッチングを行うため、バンプ形成用金属層303は等方的にエッチングされる。従って、縦方向と同時に横方向にもエッチングが進行し(サイドエッチ)、レジストマスク304の下側にもエッチング溶液が入り込みレジストマスク304の下側もエッチングされる(アンダーカット)。その結果、バンプ305の縦断面形状は略台形となる。また、このエッチングにおいて、エッチングストッパー層302はバンプ形成用金属層303のエッチング時に配線形成用金属層301がエッチングされるのを防止する。   Since the resist mask 304 has a circular pattern, the cross-sectional shape of the bump 305 is circular. Further, since etching is performed by wet etching, the bump forming metal layer 303 is isotropically etched. Accordingly, etching proceeds in the vertical direction as well as in the horizontal direction (side etching), the etching solution enters the lower side of the resist mask 304, and the lower side of the resist mask 304 is also etched (undercut). As a result, the longitudinal sectional shape of the bump 305 is substantially trapezoidal. In this etching, the etching stopper layer 302 prevents the wiring forming metal layer 301 from being etched when the bump forming metal layer 303 is etched.

そして、図5(d)に示すように、レジストマスク304を剥離した後、バンプ305をマスクとしてエッチングストッパー層302をエッチングして除去する。このとき、バンプ305と配線形成用金属層301との間にエッチングストッパー層306が介在する。   Then, as shown in FIG. 5D, after removing the resist mask 304, the etching stopper layer 302 is etched and removed using the bumps 305 as a mask. At this time, an etching stopper layer 306 is interposed between the bump 305 and the wiring forming metal layer 301.

次に、バンプ305が形成されている面に、厚さ約25μmのポリイミド等の樹脂からなる絶縁シートを密着させ、更に、その絶縁シートの上に図示しないが、厚さ約55μmのポリプロピレン等の樹脂からなる保護シートを密着させる。そして、約50〜100[kg/cm]の圧力を加えて絶縁シートを圧着させ、図5(e)に示すように、絶縁膜307を形成する。 Next, an insulating sheet made of resin such as polyimide having a thickness of about 25 μm is brought into intimate contact with the surface on which the bump 305 is formed. Further, although not shown on the insulating sheet, such as polypropylene having a thickness of about 55 μm is used. A protective sheet made of resin is adhered. And the pressure of about 50-100 [kg / cm < 2 >] is applied, an insulating sheet is crimped | bonded, and the insulating film 307 is formed as shown in FIG.5 (e).

そして、図5(f)に示すように、バンプ305の頂面が露出するまでバンプ305の上に形成された絶縁膜307を研磨した後、保護シートを除去する。このように、バンプ305の頂面が絶縁膜307から突出した構成の配線回路基板310を作製する。   Then, as shown in FIG. 5F, after the insulating film 307 formed on the bump 305 is polished until the top surface of the bump 305 is exposed, the protective sheet is removed. In this way, the printed circuit board 310 having a configuration in which the top surface of the bump 305 protrudes from the insulating film 307 is manufactured.

そして、配線回路基板310をコア基板や他の配線回路基板に積層することにより、多層配線基板を作製する。その一例を図5(g)に示す。同図に示すように、ポリイミド等の樹脂からなる絶縁膜321の両面に配線322が形成された配線回路基板320を用意し、その配線回路基板320の一方の面に配線回路基板310を積層して圧着する。このとき、配線回路基板310に形成されたバンプ305が配線回路基板320に形成された配線322と接触するように積層し、50〜100[kg/cm]の圧力を加えてバンプ305を押し潰すことにより、バンプ305と配線322とを接続する。 Then, the multilayer circuit board is manufactured by laminating the wiring circuit board 310 on the core board or another wiring circuit board. An example is shown in FIG. As shown in the figure, a wiring circuit board 320 having wirings 322 formed on both surfaces of an insulating film 321 made of a resin such as polyimide is prepared, and the wiring circuit board 310 is laminated on one surface of the wiring circuit board 320. And crimp. At this time, the bumps 305 formed on the wiring circuit board 310 are stacked so as to come into contact with the wirings 322 formed on the wiring circuit board 320, and a pressure of 50 to 100 [kg / cm 2 ] is applied to press the bumps 305. By crushing, the bump 305 and the wiring 322 are connected.

特開2001−111189号公報(段落[0025]―[0029])JP 2001-111189 A (paragraphs [0025]-[0029])

しかしながら、上述のように、バンプ305が形成された面に絶縁膜307を形成するときにバンプ305の先端部が潰れてしまい、先端部の横断面積が小さくなってしまう。そして、絶縁膜307を研磨してバンプ305の頂面を露出させても、露出する頂面の面積が小さいため、他の配線回路基板等と接触させたときに良好に導通をとることができないといった問題があった。この問題について、図6を参照しつつ詳しく説明する。   However, as described above, when the insulating film 307 is formed on the surface on which the bump 305 is formed, the tip of the bump 305 is crushed and the cross-sectional area of the tip is reduced. Even if the top surface of the bump 305 is exposed by polishing the insulating film 307, the exposed top surface has a small area, so that it cannot conduct well when brought into contact with another wiring circuit board or the like. There was a problem. This problem will be described in detail with reference to FIG.

図6は、絶縁膜を形成する従来の方法を工程順に示した基板の断面図であり、図5(d)〜(f)を拡大した図である。図6(a)はバンプ305が形成された状態の基板の断面図であり、図5(d)の一部を拡大した図である。   6 is a cross-sectional view of a substrate showing a conventional method of forming an insulating film in the order of steps, and is an enlarged view of FIGS. 5 (d) to 5 (f). FIG. 6A is a cross-sectional view of the substrate on which the bumps 305 are formed, and is an enlarged view of a part of FIG.

そして、図6(b)に示すように、バンプ305が形成されている面に、樹脂からなる絶縁シートを約50〜100[kg/cm]の圧力を加えて圧着させることにより、絶縁膜307を形成する。このとき、同図に示すように、バンプ305の先端部の角が潰れてしまい、先端部の横断面積は絶縁膜307を形成する前と比べて小さくなってしまう。この現象は特に、靭性の強い絶縁樹脂シート、例えば、ポリイミドフィルム、液晶フィルム、ポリマーフィルム、PPS樹脂フィルム、PES樹脂フィルム、PEEK樹脂フィルム等の場合は顕著となる。 And as shown in FIG.6 (b), by applying the pressure of about 50-100 [kg / cm < 2 >] to the surface in which the bump 305 is formed, and applying pressure of about 50-100 [kg / cm < 2 >], an insulating film 307 is formed. At this time, as shown in the figure, the corner of the tip of the bump 305 is crushed, and the cross-sectional area of the tip is smaller than before the insulating film 307 is formed. This phenomenon is particularly remarkable in the case of an insulating resin sheet having strong toughness, for example, a polyimide film, a liquid crystal film, a polymer film, a PPS resin film, a PES resin film, a PEEK resin film, and the like.

このような状態でバンプ305の頂面を露出させるために絶縁膜307を研磨すると、図6(c)に示すように、バンプ305の頂面は僅かしか露出しないこととなる。これは、バンプ305の先端部の横断面積が小さいからである。このため、配線が形成された他の配線回路基板等と積層したときに、バンプと配線との間で導通を良好にとることができなくなる。   If the insulating film 307 is polished to expose the top surface of the bump 305 in such a state, the top surface of the bump 305 is only slightly exposed as shown in FIG. This is because the cross-sectional area of the tip of the bump 305 is small. For this reason, when it laminates | stacks with the other wiring circuit board etc. in which wiring was formed, it becomes impossible to take favorable continuity between a bump and wiring.

そこで、バンプ305の硬度を高くすれば、絶縁膜307を基板に圧着してもバンプ305の先端部は潰されないと考えられるが、硬度の高いバンプを形成した場合には、配線回路基板310を他の配線回路基板等に積層すると、バンプ305に突き当てられた配線322がへこんでしまい、それが原因でポリイミド等の樹脂からなる絶縁膜321がへこんでしまうといった問題が生じる。その結果、多層配線基板の層間の絶縁性を損なうおそれがあった。この問題について、図7を参照しつつ詳しく説明する。   Therefore, if the hardness of the bump 305 is increased, it is considered that the tip of the bump 305 is not crushed even if the insulating film 307 is pressed against the substrate. When laminated on another printed circuit board or the like, the wiring 322 abutted against the bump 305 is dented, which causes a problem that the insulating film 321 made of resin such as polyimide is dented. As a result, there is a possibility that the insulation between the layers of the multilayer wiring board is impaired. This problem will be described in detail with reference to FIG.

図7は、従来の製造方法によって作製された配線回路基板310と配線回路基板320とを積層して多層配線基板を作製するときの基板の断面図である。   FIG. 7 is a cross-sectional view of a substrate when a multilayer circuit board is manufactured by stacking a printed circuit board 310 and a printed circuit board 320 manufactured by a conventional manufacturing method.

図7(a)に示すように、配線回路基板310と配線回路基板320とを用意する。配線回路基板310のバンプ305には硬度が約150[Hv]の銅を使用した。そして、図7(b)に示すように、配線回路基板320の一方の面に配線回路基板310を積層し、50〜100[kg/cm]の圧力を加えてバンプ305を押し潰すことにより、バンプ305と配線322とを接続する。しかしながら、バンプ305の硬度が約150[Hv]と高いため、バンプ305に突き当てられた配線322は絶縁膜321の内部にへこんでしまう。それに伴い、ポリイミド等の樹脂からなる絶縁膜321も内側にへこんでしまい、へこみ部分の絶縁性が悪くなり絶縁不良が生じてしまうおそれがあった。 As shown in FIG. 7A, a printed circuit board 310 and a printed circuit board 320 are prepared. Copper having a hardness of about 150 [Hv] was used for the bumps 305 of the printed circuit board 310. Then, as shown in FIG. 7B, the wiring circuit board 310 is laminated on one surface of the wiring circuit board 320, and the bumps 305 are crushed by applying a pressure of 50 to 100 [kg / cm 2 ]. The bump 305 and the wiring 322 are connected. However, since the hardness of the bump 305 is as high as about 150 [Hv], the wiring 322 abutted against the bump 305 is recessed into the insulating film 321. Along with this, the insulating film 321 made of a resin such as polyimide is also dented inward, so that the insulating property of the dent portion is deteriorated and insulation failure may occur.

本発明は上記の問題を解決するものであり、絶縁膜を形成するときにバンプの先端部が潰れず、バンプの頂面を十分に露出させることができ、他の配線回路基板等と積層したときに良好に導通をとることができる配線回路基板及びその製造方法を提供するものである。更に、他の配線回路基板と積層したときに、他の配線回路基板の絶縁膜のへこみを少なくすることができ、その結果、絶縁性の良い多層配線基板を製造することができる配線回路基板及び配線回路基板の製造方法を提供するものである。   The present invention solves the above-described problem, and when the insulating film is formed, the tip of the bump is not crushed, the top surface of the bump can be sufficiently exposed, and is laminated with another wiring circuit board or the like. It is an object of the present invention to provide a printed circuit board and a method for manufacturing the same, which can sometimes conduct well. Furthermore, when laminated with another wiring circuit board, the dent of the insulating film of the other wiring circuit board can be reduced, and as a result, a wiring circuit board capable of manufacturing a multilayer wiring board with good insulation and A method for manufacturing a printed circuit board is provided.

請求項1に記載の発明は、配線形成用金属層の上に直接又はエッチングストッパー層を介してバンプが形成された配線回路基板であって、前記バンプは、バンプ下部と、バンプ上部とからなり、該バンプ上部は前記バンプ下部の硬度よりも高い硬度を有することを特徴とするものである。   The invention according to claim 1 is a printed circuit board in which bumps are formed on a metal layer for wiring formation directly or via an etching stopper layer, and the bumps include a lower bump portion and an upper bump portion. The bump upper portion has a hardness higher than that of the bump lower portion.

請求項2に記載の発明は、請求項1に記載の配線回路基板の前記バンプが形成された面に樹脂からなる絶縁シートを圧着させることにより絶縁膜を形成する絶縁膜形成ステップと、前記バンプ下部が露出するまで前記絶縁膜及び前記バンプ上部を研磨する研磨ステップと、を含むことを特徴とする配線回路基板の製造方法である。   According to a second aspect of the present invention, there is provided an insulating film forming step of forming an insulating film by pressure-bonding an insulating sheet made of a resin to the surface of the wired circuit board according to the first aspect on which the bump is formed, and the bump And a polishing step of polishing the insulating film and the upper portion of the bump until the lower portion is exposed.

請求項3に記載の発明は、配線形成用金属層の上にエッチングストッパー層を介して第1のバンプ形成用金属層が形成され、該第1のバンプ形成用金属層の上に該第1のバンプ形成用金属層の硬度よりも高い硬度を有する第2のバンプ形成用金属層が形成された多層金属板に対して、前記第2のバンプ形成用金属層の上にレジストを塗付又はラミネートし、パターニングすることによりレジストマスクを形成するレジストマスク形成ステップと、前記レジストマスクをマスクとして前記第1のバンプ形成用金属層及び前記第2のバンプ形成用金属層をエッチングすることにより、バンプ下部と、該バンプ下部の硬度よりも高い硬度を有するバンプ上部とからなるバンプを形成するバンプ形成ステップと、を含むことを特徴とする配線回路基板の製造方法である。   According to a third aspect of the present invention, a first bump forming metal layer is formed on the wiring forming metal layer via an etching stopper layer, and the first bump forming metal layer is formed on the first bump forming metal layer. A resist is applied on the second bump forming metal layer on the multilayer metal plate on which the second bump forming metal layer having a hardness higher than the hardness of the bump forming metal layer is formed. A resist mask forming step of forming a resist mask by laminating and patterning, and a bump by etching the first bump forming metal layer and the second bump forming metal layer using the resist mask as a mask. And a bump forming step for forming a bump comprising a lower portion and a bump upper portion having a hardness higher than the hardness of the lower portion of the bump. It is a manufacturing method.

請求項4に記載の発明は、請求項3に記載の配線回路基板の製造方法であって、前記バンプ形成ステップの後、前記バンプが形成された面に樹脂からなる絶縁シートを圧着させることにより絶縁膜を形成する絶縁膜形成ステップと、前記バンプ下部が露出するまで前記絶縁膜及び前記バンプ上部を研磨する研磨ステップと、を含むことを特徴とするものである。   Invention of Claim 4 is a manufacturing method of the printed circuit board of Claim 3, Comprising: After the said bump formation step, the insulating sheet which consists of resin is crimped | bonded to the surface in which the said bump was formed. An insulating film forming step for forming an insulating film and a polishing step for polishing the insulating film and the upper portion of the bump until the lower portion of the bump is exposed are included.

請求項5に記載の発明は、絶縁膜の上下両面に配線が形成された配線回路基板に、請求項2又は請求項4に記載の配線回路基板の製造方法によって製造された配線回路基板を積層することを特徴とする多層配線基板の製造方法である。   According to a fifth aspect of the present invention, a printed circuit board manufactured by the printed circuit board manufacturing method according to the second or fourth aspect is laminated on a printed circuit board in which wiring is formed on both upper and lower surfaces of an insulating film. A method for manufacturing a multilayer wiring board.

請求項6に記載の発明は、請求項2又は請求項4に記載の配線回路基板の製造方法によって製造された配線回路基板を複数枚重ねて積層することを特徴とする多層配線基板の製造方法である。   A sixth aspect of the present invention is a method of manufacturing a multilayer wiring board, wherein a plurality of wiring circuit boards manufactured by the method of manufacturing a wiring circuit board according to claim 2 or claim 4 are stacked and stacked. It is.

請求項1に記載の発明によると、バンプを下部と上部とに分けた構造にし、上部には下部よりも硬度が高い金属を使用したことにより、バンプが形成されている面に絶縁膜を圧着するときにバンプの先端部が潰れなくなる。その結果、バンプ先端部の横断面の面積を十分確保することができるため、他の配線回路基板と積層した場合に、十分に導通をとることが可能となる。更に、下部には上部よりも硬度が低い金属を使用したことにより、他の配線回路基板と積層した場合にバンプが十分に潰れるため、バンプに突き当てられた配線や絶縁膜がへこむことがなくなり、その結果、層間の絶縁性が低下するおそれがなくなる。   According to the first aspect of the present invention, the bump is divided into the lower part and the upper part, and the upper part is made of a metal having higher hardness than the lower part, so that the insulating film is crimped to the surface on which the bump is formed. When you do, the tip of the bump will not be crushed. As a result, a sufficient area of the cross section of the bump tip can be ensured, so that sufficient conduction can be achieved when the bump is laminated with another printed circuit board. Furthermore, because the lower part is made of a metal whose hardness is lower than that of the upper part, the bumps are sufficiently crushed when laminated with other printed circuit boards, so that the wiring and insulating film hit against the bumps will not dent. As a result, there is no possibility that the insulating properties between the layers are lowered.

また、請求項2及び請求項4に記載の発明によると、絶縁膜及びバンプ上部を研磨することにより、硬度が低いバンプ下部の頂面が露出した配線回路基板を製造することが可能となる。その結果、他の配線回路基板等と積層しても、他の配線回路基板の配線や絶縁膜がへこむことがなく、層間の絶縁性が低下するおそれがなくなる。   Further, according to the second and fourth aspects of the invention, by polishing the insulating film and the upper portion of the bump, it is possible to manufacture a printed circuit board in which the top surface of the lower portion of the bump having low hardness is exposed. As a result, even when laminated with another printed circuit board or the like, the wiring or insulating film of the other printed circuit board does not dent, and there is no possibility that the insulation between the layers is lowered.

更に、請求項3に記載の発明によると、硬度の低いバンプ形成用金属膜の上にそれより硬度が高いバンプ形成用金属膜が形成された多層金属板を用いることにより、硬度が低いバンプ下部と、その上に形成された硬度が高いバンプ上部とからなるバンプが形成された配線回路基板を製造することが可能となる。   Furthermore, according to the invention described in claim 3, by using a multilayer metal plate in which a bump forming metal film having a higher hardness is formed on a bump forming metal film having a lower hardness, a lower bump portion having a lower hardness is used. Then, it is possible to manufacture a printed circuit board on which bumps formed on the bumps having high hardness formed thereon are formed.

また、請求項5及び請求項6に記載の発明によると、硬度が低いバンプ下部の頂面が露出した配線回路基板を複数枚又は他の配線回路基板に積層することにより、バンプに突き当てられた配線や絶縁膜がへこむことがないため、層間の絶縁性の低下のおそれがない多層配線基板を製造することが可能となる。   In addition, according to the invention described in claim 5 and claim 6, a plurality of wiring circuit boards having exposed top surfaces of the lower parts of the bumps with low hardness are laminated on a plurality of sheets or other wiring circuit boards, so that they are abutted against the bumps. Since the wiring and insulating film do not dent, it is possible to manufacture a multilayer wiring board that does not cause a decrease in insulation between layers.

以下、本発明の実施の形態について、図1乃至図4を参照しつつ説明する。   Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 4.

本発明の実施形態に係る配線回路基板の構成及び作用(用途)について、図1を参照しつつ説明する。図1は、本発明の実施形態に係る配線回路基板の構造を示す基板の断面図である。   The configuration and operation (use) of the printed circuit board according to the embodiment of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view of a substrate showing the structure of a printed circuit board according to an embodiment of the present invention.

図1に示すように、本実施形態に係る配線回路基板100は、厚さ約18μmの銅箔からなる配線形成用金属膜101と、その配線形成用金属層101の上に厚さ約2μmのNiからなるエッチングストッパー層107を介して形成された、高さ約80μmのバンプ106とからなる。尚、エッチングストッパー層107を介さずに、配線形成用金属層101の上に直接バンプ106が形成されていてもよい。   As shown in FIG. 1, the printed circuit board 100 according to the present embodiment has a wiring forming metal film 101 made of a copper foil having a thickness of about 18 μm, and a wiring forming metal layer 101 having a thickness of about 2 μm. A bump 106 having a height of about 80 μm is formed through an etching stopper layer 107 made of Ni. Note that the bump 106 may be formed directly on the wiring forming metal layer 101 without using the etching stopper layer 107.

更に、バンプ106は、エッチングストッパー層107と接するバンプ下部106aと、バンプ下部106aの上に形成されたバンプ上部106bとからなる。バンプ下部106aの高さは約55μmで、バンプ上部106bの高さは約25μmとなっている。また、バンプ下部106aの硬度は、ビッカーズ硬度で約80[Hv]で、バンプ上部106bの硬度は約150[Hv]となっている。従って、バンプ下部106aの硬度に比べてバンプ106bの硬度の方が高くなっている。   Further, the bump 106 includes a bump lower portion 106a in contact with the etching stopper layer 107, and a bump upper portion 106b formed on the bump lower portion 106a. The height of the lower bump portion 106a is about 55 μm, and the height of the upper bump portion 106b is about 25 μm. Further, the bump lower portion 106a has a Vickers hardness of about 80 [Hv], and the bump upper portion 106b has a hardness of about 150 [Hv]. Therefore, the hardness of the bump 106b is higher than the hardness of the bump lower portion 106a.

尚、バンプ上部106bは、配線回路基板100に絶縁膜を形成した後、研磨により除去される。そして、配線が形成された他の配線回路基板等を積層するときには、バンプ下部106aと配線とを接触させることにより導通をとることとなる。絶縁膜を形成する工程及び積層工程については、後で詳述する。   The bump upper portion 106b is removed by polishing after an insulating film is formed on the printed circuit board 100. When another wiring circuit board or the like on which wiring is formed is stacked, conduction is achieved by bringing the bump lower portion 106a into contact with the wiring. The step of forming the insulating film and the stacking step will be described in detail later.

バンプ106の横断面形状は図示しないが略円形であり、縦断面形状は同図に示すように、略台形となっている。尚、バンプ106の縦断面の略台形状は、図示する上で便宜的なものであり、その斜辺は曲線状となる場合もある。また、縦断面形状は略矩形状であってもよく、更に、バンプ下部106aの断面幅がバンプ上部106bの断面幅よりも狭くてもよい。従って、バンプ106の形状は略円錐状の他、略円柱状となってもよい。そのような場合であっても、斜面は曲線状となる場合もある。   The cross-sectional shape of the bump 106 is not shown, but is substantially circular, and the vertical cross-sectional shape is substantially trapezoidal as shown in FIG. Note that the substantially trapezoidal shape of the vertical cross section of the bump 106 is convenient for illustration, and the hypotenuse may have a curved shape. The vertical cross-sectional shape may be a substantially rectangular shape, and the cross-sectional width of the bump lower portion 106a may be narrower than the cross-sectional width of the bump upper portion 106b. Therefore, the shape of the bump 106 may be a substantially cylindrical shape in addition to a substantially conical shape. Even in such a case, the slope may be curved.

以上のようなバンプが形成された配線回路基板100を用いることにより、次のような好適な作用が奏される。   By using the printed circuit board 100 on which the bumps as described above are formed, the following preferable effects are exhibited.

第1に、バンプ上部106bの硬度が約150[Hv]と高いため、バンプ106が形成されている面に絶縁膜を形成するときにバンプ106の先端部の特に端部が潰れなくなる。その結果、バンプ106の先端部の横断面積、特にバンプ下部106aの頂面の面積を十分に確保することができるため、他の配線回路基板と積層したときに十分に導通をとることが可能となる。   First, since the hardness of the bump upper portion 106b is as high as about 150 [Hv], when the insulating film is formed on the surface on which the bump 106 is formed, the end portion of the bump 106 is not particularly crushed. As a result, the cross-sectional area of the tip of the bump 106, particularly the area of the top surface of the bump lower portion 106a, can be sufficiently secured, so that sufficient conduction can be obtained when laminated with another printed circuit board. Become.

また、第2に、バンプ下部106aの硬度が約80[Hv]と低いため、本実施形態の配線回路基板100を他の配線回路基板等に積層して多層配線基板を製造する場合であっても、バンプ106に突き当てられた他の配線回路基板の配線や絶縁膜がへこむことがないため、多層配線基板の絶縁性を良くすることが可能となる。   Second, since the hardness of the lower bump portion 106a is as low as about 80 [Hv], the multilayer circuit board is manufactured by stacking the wiring circuit board 100 of this embodiment on another wiring circuit board or the like. However, since the wiring and the insulating film of the other printed circuit board abutted against the bump 106 do not dent, the insulating property of the multilayer wiring board can be improved.

まず、第1の作用及び効果について図2を参照しつつ詳しく説明し、続いて、第2の作用及び効果について図3を参照しつつ説明する。   First, the first operation and effect will be described in detail with reference to FIG. 2, and then the second operation and effect will be described with reference to FIG.

図2は、本実施形態における配線回路基板100に絶縁膜を形成する工程を工程順に示す基板の断面図である。まず、図2(a)に示すように、本実施形態の配線回路基板100を用意する。   FIG. 2 is a cross-sectional view of the substrate showing the steps of forming an insulating film on the printed circuit board 100 in this embodiment in the order of steps. First, as shown in FIG. 2A, a printed circuit board 100 of this embodiment is prepared.

そして、図2(b)に示すように、バンプ106が形成されている面に、両面に接着層を有し、総厚が約25μmのポリイミド等の樹脂からなる絶縁シート(絶縁膜)108を密着させる。更に、その樹脂シートの上に厚さ約30μmのポリプロピレン等の樹脂からなる保護シート109及び図示しないクッション紙を密着させて、それらを介して、約50〜100[kg/cm]の圧力を加えて圧着させる。 Then, as shown in FIG. 2B, an insulating sheet (insulating film) 108 made of a resin such as polyimide having adhesive layers on both sides and a total thickness of about 25 μm is provided on the surface on which the bumps 106 are formed. Adhere closely. Further, a protective sheet 109 made of a resin such as polypropylene having a thickness of about 30 μm and a cushion paper (not shown) are brought into close contact with the resin sheet, and a pressure of about 50 to 100 [kg / cm 2 ] is applied through them. In addition, crimp.

同図に示すように、バンプ106aの硬度は約150[Hv]であり、従来のバンプ305の硬度(約100[Hv])と比べて高いため、バンプ106aの先端部は絶縁シート(絶縁膜)108を圧着させても潰れない。その結果、従来技術に係るバンプ305の先端部における横断面積よりも、本実施形態に係るバンプ106の先端部における横断面積の方が大きくなる。また、バンプ下部106aの高さは約55μmで、絶縁シート(絶縁膜)108の膜厚は約25μmで、保護シート109の膜厚は約30μmであるため、バンプ上部106bを保護シート109の面まで研磨した後のバンプ106の高さは、絶縁シート(絶縁膜)108の厚さと保護シート109の厚さの和である、約55μmとなる。   As shown in the figure, since the hardness of the bump 106a is about 150 [Hv], which is higher than the hardness of the conventional bump 305 (about 100 [Hv]), the tip of the bump 106a has an insulating sheet (insulating film). ) 108 is not crushed even if it is crimped. As a result, the cross-sectional area at the front end portion of the bump 106 according to this embodiment is larger than the cross-sectional area at the front end portion of the bump 305 according to the prior art. Further, the height of the bump lower portion 106a is about 55 μm, the thickness of the insulating sheet (insulating film) 108 is about 25 μm, and the thickness of the protective sheet 109 is about 30 μm. The height of the bump 106 after polishing to about 55 μm is the sum of the thickness of the insulating sheet (insulating film) 108 and the thickness of the protective sheet 109.

そして、図2(c)に示すように、バンプ上部106bの上に形成されている絶縁シート(絶縁膜)108と保護シート109とバンプ上部106bとを研磨し、配線回路基板110を製造する。バンプ下部106aの高さは約55μmで、絶縁シート(絶縁膜)108の厚さ(約25μm)と保護シート109の厚さ(約30μm)の和は約55μmであり、バンプ106が形成されていない部分にはバンプ下部106aの高さまで絶縁シート(絶縁膜)108と保護シート109とが形成されているため、このように研磨すると、バンプ下部106aの頂面が絶縁シート(絶縁膜)108と保護シート109とから露出することとなる。そして、保護シート109を除去することにより、絶縁シート(絶縁膜)108の面から約30μm突出したバンプ106aが現れることとなる。   Then, as shown in FIG. 2C, the insulating sheet (insulating film) 108, the protective sheet 109, and the bump upper portion 106b formed on the bump upper portion 106b are polished to manufacture the printed circuit board 110. The height of the bump lower portion 106a is about 55 μm, and the sum of the thickness of the insulating sheet (insulating film) 108 (about 25 μm) and the thickness of the protective sheet 109 (about 30 μm) is about 55 μm, and the bump 106 is formed. Since the insulating sheet (insulating film) 108 and the protective sheet 109 are formed up to the height of the bump lower portion 106a in the portion that does not exist, the top surface of the bump lower portion 106a becomes the insulating sheet (insulating film) 108 when polished in this way. It will be exposed from the protective sheet 109. Then, by removing the protective sheet 109, bumps 106a projecting about 30 μm from the surface of the insulating sheet (insulating film) 108 appear.

従来技術に係るバンプ305の先端部における横断面積よりも、本実施形態に係るバンプ106の先端部における横断面積の方が大きいため、バンプ下部106aの頂面の面積は、従来技術において研磨した後のバンプ106の頂面の面積よりも大きくなる。その結果、配線が形成された他の配線回路基板等と積層したときに、バンプと配線とで良好に導通をとることが可能となる。   Since the cross-sectional area at the front end portion of the bump 106 according to this embodiment is larger than the cross-sectional area at the front end portion of the bump 305 according to the prior art, the area of the top surface of the bump lower portion 106a is after polishing in the prior art. It becomes larger than the area of the top surface of the bump 106. As a result, when laminated with another printed circuit board or the like on which wiring is formed, it is possible to achieve good conduction between the bump and the wiring.

次に、第2の作用及び効果について図3を参照しつつ詳しく説明する。図3は、本実施形態における配線回路基板100(配線回路基板110)を利用した多層配線基板の製造方法を工程順に示す基板の断面図である。   Next, the second operation and effect will be described in detail with reference to FIG. FIG. 3 is a cross-sectional view of a substrate showing a manufacturing method of a multilayer wiring board using the wiring circuit board 100 (wiring circuit board 110) in this embodiment in the order of steps.

まず、図3(a)に示すように、配線回路基板110と配線回路基板120を用意する。配線回路基板110は、上述したように配線回路基板100に絶縁膜108を形成した基板であり、既にバンプ上部106bが研磨されている基板である。また、配線回路基板120は、樹脂等からなる絶縁膜121と、その絶縁膜121の両面に形成された銅等の金属からなる配線122とからなる。   First, as shown in FIG. 3A, a printed circuit board 110 and a printed circuit board 120 are prepared. The printed circuit board 110 is a board in which the insulating film 108 is formed on the printed circuit board 100 as described above, and the bump upper part 106b has already been polished. The printed circuit board 120 includes an insulating film 121 made of resin or the like and wirings 122 made of metal such as copper formed on both surfaces of the insulating film 121.

次に、図3(b)に示すように、配線回路基板120の片面に本実施形態に係る配線回路基板110を積層する。このとき、約50〜100[kg/cm]の高い圧力を加えてバンプ下部106aを押し潰すことにより、バンプ下部106aと配線122とを接続する。バンプ下部106aの硬度は約80[Hv]と低いため、上記のような圧力を加えることで容易に押し潰すことができる。その結果、バンプ下部106aが突き当てられた部分の配線122のへこみは従来技術と比較して小さくなり、押し当てられた部分の絶縁膜121のへこみも小さくなるため、層間の絶縁性が低下するおそれがない。 Next, as shown in FIG. 3B, the printed circuit board 110 according to the present embodiment is laminated on one side of the printed circuit board 120. At this time, the bump lower portion 106 a and the wiring 122 are connected by applying a high pressure of about 50 to 100 [kg / cm 2 ] to crush the bump lower portion 106 a. Since the hardness of the bump lower portion 106a is as low as about 80 [Hv], it can be easily crushed by applying the pressure as described above. As a result, the dent of the wiring 122 at the portion where the bump lower portion 106a is abutted is smaller than that of the conventional technique, and the dent of the insulating film 121 at the pressed portion is also reduced, so that the insulation between the layers is lowered. There is no fear.

尚、本実施形態においては、配線回路基板120の片面に配線回路基板110を積層したが、両面に配線回路基板110に積層してもよい。そのような場合であっても、バンプ下部106aが突き当てられた部分の配線122のへこみは従来技術と比較して小さくなる。更に、配線回路基板110を複数枚重ねて、スルーホールが形成されたコア基板等に配線回路基板110を積層してもよい。   In the present embodiment, the printed circuit board 110 is stacked on one side of the printed circuit board 120, but may be stacked on the printed circuit board 110 on both sides. Even in such a case, the dent of the wiring 122 in the portion where the bump lower portion 106a is abutted becomes smaller than that in the conventional technique. Furthermore, a plurality of wiring circuit boards 110 may be stacked and the wiring circuit board 110 may be stacked on a core board or the like in which through holes are formed.

また、本実施形態に係る配線回路基板110の配線形成用金属層101の上にレジストを塗付又はラミネートし、パターニングすることによりレジストマスクを形成し、そのレジストマスクをマスクとして配線形成用金属層101をエッチングすることにより配線を形成することもできる。この配線を形成する工程は、配線回路基板110を他の配線回路基板等と積層する前であっても積層した後であっても構わない。   Further, a resist is applied or laminated on the wiring forming metal layer 101 of the wiring circuit board 110 according to the present embodiment and patterned to form a resist mask, and the wiring forming metal layer is formed using the resist mask as a mask. Wiring can also be formed by etching 101. The step of forming the wiring may be before or after the wiring circuit board 110 is laminated with another wiring circuit board or the like.

(製造方法)
次に、本発明の実施形態に係る配線回路基板の製造方法について、図4を参照しつつ説明する。まず、図4(a)に示すように、多層金属板130を用意する。この多層金属板130は、厚さ約18μmの銅箔からなる配線形成用金属層101の上に積層された、厚さ約2μmのNiからなるエッチングストッパー層102と、更にその上に積層された、厚さ約80μmの銅箔からなるバンプ形成用金属層103とからなる。
(Production method)
Next, a method for manufacturing a printed circuit board according to an embodiment of the present invention will be described with reference to FIG. First, as shown in FIG. 4A, a multilayer metal plate 130 is prepared. The multilayer metal plate 130 is laminated on a wiring forming metal layer 101 made of a copper foil having a thickness of about 18 μm, and an etching stopper layer 102 made of Ni having a thickness of about 2 μm, and further laminated thereon. And a bump-forming metal layer 103 made of a copper foil having a thickness of about 80 μm.

また、バンプ形成用金属層103は、バンプ形成用金属層103aと103bの2層の金属層からなり、エッチングトッパー層102上にバンプ形成用金属層103aが形成され、バンプ形成用金属層103aの上にバンプ形成用金属層103bが形成されている。バンプ形成用金属層103bはバンプ形成用金属層103aよりも硬度が高い材料からなる。尚、バンプ形成用金属層103aが本発明の「第1のバンプ形成用金属層」に相当し、バンプ形成用金属層103bが本発明の「第2のバンプ形成用金属層」に相当する。   The bump forming metal layer 103 is composed of two metal layers, bump forming metal layers 103a and 103b. The bump forming metal layer 103a is formed on the etching topper layer 102. A bump forming metal layer 103b is formed thereon. The bump forming metal layer 103b is made of a material having higher hardness than the bump forming metal layer 103a. The bump forming metal layer 103a corresponds to the “first bump forming metal layer” of the present invention, and the bump forming metal layer 103b corresponds to the “second bump forming metal layer” of the present invention.

具体的には、バンプ形成用金属層103bに硬度が約150[Hv]の銅箔を使用し、バンプ形成用金属層103aに硬度が約80[Hv]の銅箔を使用する。硬度が低い銅箔(約80[Hv]の銅箔)は、例えば、硬度が高い銅箔(約150[Hv]の銅箔)を約250〜300℃で焼きなましすることにより得られる。   Specifically, a copper foil having a hardness of about 150 [Hv] is used for the bump forming metal layer 103b, and a copper foil having a hardness of about 80 [Hv] is used for the bump forming metal layer 103a. A copper foil having a low hardness (copper foil of about 80 [Hv]) is obtained, for example, by annealing a copper foil having a high hardness (copper foil of about 150 [Hv]) at about 250 to 300 ° C.

尚、多層金属板130は、銅箔からなる配線形成用金属膜101の上に電気めっき法等によりNiからなるエッチングストッパー層102を形成し、更に、その上に、常温真空クラッド法や電気めっき法等によりバンプ形成用金属膜103a、103bを形成することにより作製される。   In the multilayer metal plate 130, an etching stopper layer 102 made of Ni is formed on a wiring forming metal film 101 made of copper foil by an electroplating method or the like, and a room temperature vacuum cladding method or electroplating is further formed thereon. The bump forming metal films 103a and 103b are formed by a method or the like.

次に、図4(b)に示すように、バンプ形成用金属層103b上にレジスト104を塗布又はラミネートする。そして、複数の円形パターンが形成された露光マスクを使用して露光を行い、続いて現像を行うことにより、図4(c)に示すように、レジストマスク105を形成する。例えば、ネガ型のレジストを塗布し、複数の円形パターンが形成された露光マスクを使用してレジスト104を露光する。その後現像することにより露光されていないレジストを除去し、円形パターンのレジストマスク105を形成する。   Next, as shown in FIG. 4B, a resist 104 is applied or laminated on the bump forming metal layer 103b. Then, exposure is performed using an exposure mask on which a plurality of circular patterns are formed, followed by development, thereby forming a resist mask 105 as shown in FIG. For example, a negative resist is applied, and the resist 104 is exposed using an exposure mask on which a plurality of circular patterns are formed. Thereafter, the resist that has not been exposed is removed by development, and a resist mask 105 having a circular pattern is formed.

そして、図4(d)に示すように、レジストマスク105をマスクとしてバンプ形成用金属層103a、103bをエッチングすることによりバンプ106を形成する。このエッチングはウェットエッチングにより行い、使用するエッチング液はNiからなるエッチングストッパー層102をエッチングし得ないが、銅からなるバンプ形成用金属層103a、103bをエッチングできるエッチング液を使用する。   Then, as shown in FIG. 4D, bumps 106 are formed by etching the bump forming metal layers 103a and 103b using the resist mask 105 as a mask. This etching is performed by wet etching, and the etching solution used cannot etch the etching stopper layer 102 made of Ni, but uses an etching solution that can etch the bump forming metal layers 103a and 103b made of copper.

レジストマスク105は円形パターンをなしているため、バンプ106の横断面形状は円形となる。また、ウェットエッチングによりエッチングを行なうため、バンプ形成用金属層103a、103bは等方的にエッチングされ、縦断面形状は略台形となる。   Since the resist mask 105 has a circular pattern, the cross-sectional shape of the bump 106 is circular. Further, since the etching is performed by wet etching, the bump forming metal layers 103a and 103b are isotropically etched, and the vertical cross-sectional shape is substantially trapezoidal.

また、バンプ形成用金属層103をエッチングすることにより、バンプ106は2層構造を有し、硬度が低いバンプ下部106aと、バンプ下部より硬度が高く、バンプ下部106aの上に形成されたバンプ上部106bとからなる構造を有している。バンプ下部106aはバンプ形成用金属層103aがエッチングされることにより形成され、バンプ上部106bはバンプ形成用金属層103bがエッチングされることにより形成される。   Further, by etching the bump forming metal layer 103, the bump 106 has a two-layer structure, the bump lower portion 106a having a low hardness, and the bump upper portion formed on the bump lower portion 106a having a higher hardness than the bump lower portion. 106b. The bump lower portion 106a is formed by etching the bump forming metal layer 103a, and the bump upper portion 106b is formed by etching the bump forming metal layer 103b.

このエッチング工程において、エッチングストッパー層102は配線形成用金属膜101がエッチングされるのを防止する。そして、エッチングマスクとして使用したレジストマスク105を剥離する。尚、図4(d)はレジストマスク105を剥離した後の状態を示すものである。   In this etching step, the etching stopper layer 102 prevents the wiring forming metal film 101 from being etched. Then, the resist mask 105 used as an etching mask is removed. FIG. 4D shows a state after the resist mask 105 is peeled off.

そして、図4(e)に示すように、バンプ106をマスクとしてエッチングストッパー層102をエッチングして除去することにより配線回路基板100を作製する。このとき、バンプ106と配線形成用金属層101bとの間にエッチングストッパー層107が介在する。このエッチングには、バンプ106を構成する金属(本実施形態においては銅である。)をエッチングしないが、エッチングストッパー層102を構成する金属(本実施形態においてはNiである。)をエッチングするエッチング液(Ni剥離液)を使用する。   Then, as shown in FIG. 4E, the wiring circuit board 100 is manufactured by etching and removing the etching stopper layer 102 using the bumps 106 as a mask. At this time, the etching stopper layer 107 is interposed between the bump 106 and the wiring forming metal layer 101b. In this etching, the metal constituting the bump 106 (copper in this embodiment) is not etched, but the metal constituting the etching stopper layer 102 (Ni in this embodiment) is etched. Liquid (Ni stripping solution) is used.

以上のように、硬度が低い層と硬度が高い層とからなバンプ形成用金属層103が形成された多層金属板130を用いることにより、硬度が低いバンプ下部106aと硬度が高いバンプ上部106bとからなるバンプ106が形成された配線回路基板100を製造することが可能となる。   As described above, by using the multilayer metal plate 130 on which the bump forming metal layer 103 is formed of the low hardness layer and the high hardness layer, the low hardness bump lower portion 106a and the high hardness bump upper portion 106b It is possible to manufacture the printed circuit board 100 on which the bumps 106 made of are formed.

また、上述したように、配線回路基板100に絶縁膜108を形成し、バンプ上部106bの上に形成されている絶縁膜108とバンプ上部106bを研磨することにより、配線回路基板110を製造することができる。更に、このようにして製造した配線回路基板110を複数枚重ねるか、又は他の配線回路基板やコア基板等に積層して多層配線基板を製造することが可能となる。   Further, as described above, the printed circuit board 110 is manufactured by forming the insulating film 108 on the printed circuit board 100 and polishing the insulating film 108 and the bump upper part 106b formed on the bump upper part 106b. Can do. Furthermore, it is possible to manufacture a multilayer wiring board by stacking a plurality of wiring circuit boards 110 manufactured in this way or by stacking them on other wiring circuit boards, core boards, or the like.

本発明の実施形態における配線回路基板の構造を示す基板の断面図である。It is sectional drawing of the board | substrate which shows the structure of the wired circuit board in embodiment of this invention. 本発明の実施形態における配線回路基板に絶縁膜を形成する工程を示す基板の断面図である。It is sectional drawing of a board | substrate which shows the process of forming an insulating film in the wired circuit board in embodiment of this invention. 本発明の実施形態のおける配線回路基板を用いた多層配線基板の製造方法を工程順に示す基板の断面図である。It is sectional drawing of the board | substrate which shows the manufacturing method of the multilayer wiring board using the wired circuit board in embodiment of this invention in process order. 本発明の実施形態における配線回路基板の製造方法を工程順に示す基板の断面図である。It is sectional drawing of the board | substrate which shows the manufacturing method of the printed circuit board in embodiment of this invention in process order. 従来技術における配線回路基板の製造方法を工程順に示す基板の断面図である。It is sectional drawing of the board | substrate which shows the manufacturing method of the printed circuit board in a prior art in order of a process. 従来技術における配線回路基板に絶縁膜を形成する工程を示す基板の断面図である。It is sectional drawing of a board | substrate which shows the process of forming an insulating film in the wiring circuit board in a prior art. 従来技術における配線回路基板を用いた多層配線基板の製造方法を工程順に示す基板の断面図である。It is sectional drawing of the board | substrate which shows the manufacturing method of the multilayer wiring board using the wiring circuit board in a prior art in order of a process.

符号の説明Explanation of symbols

100 配線回路基板
101 配線形成用金属層
102、107 エッチングストッパー層
103 バンプ形成用金属層
104 レジスト
105 レジストマスク
106 バンプ
108 絶縁シート(絶縁膜)
109 保護シート
110、120 配線回路基板
130 多層金属板
DESCRIPTION OF SYMBOLS 100 Wiring circuit board 101 Metal layer for wiring formation 102,107 Etching stopper layer 103 Metal layer for bump formation 104 Resist 105 Resist mask 106 Bump 108 Insulating sheet (insulating film)
109 Protective sheet 110, 120 Wiring circuit board 130 Multi-layer metal plate

Claims (6)

配線形成用金属層の上に直接又はエッチングストッパー層を介してバンプが形成された配線回路基板であって、
前記バンプは、バンプ下部と、バンプ上部とからなり、該バンプ上部は前記バンプ下部の硬度よりも高い硬度を有することを特徴とする配線回路基板。
A wiring circuit board in which bumps are formed directly or via an etching stopper layer on a metal layer for wiring formation,
The bump includes a bump lower part and a bump upper part, and the bump upper part has a hardness higher than that of the bump lower part.
請求項1に記載の配線回路基板の前記バンプが形成された面に樹脂からなる絶縁シートを圧着させることにより絶縁膜を形成する絶縁膜形成ステップと、
前記バンプ下部が露出するまで前記絶縁膜及び前記バンプ上部を研磨する研磨ステップと、
を含むことを特徴とする配線回路基板の製造方法。
An insulating film forming step of forming an insulating film by pressure-bonding an insulating sheet made of resin to the surface on which the bumps of the printed circuit board according to claim 1 are formed;
A polishing step of polishing the insulating film and the upper part of the bump until the lower part of the bump is exposed;
A method of manufacturing a printed circuit board, comprising:
配線形成用金属層の上にエッチングストッパー層を介して第1のバンプ形成用金属層が形成され、該第1のバンプ形成用金属層の上に該第1のバンプ形成用金属層の硬度よりも高い硬度を有する第2のバンプ形成用金属層が形成された多層金属板に対して、
前記第2のバンプ形成用金属層の上にレジストを塗付又はラミネートし、パターニングすることによりレジストマスクを形成するレジストマスク形成ステップと、
前記レジストマスクをマスクとして前記第1のバンプ形成用金属層及び前記第2のバンプ形成用金属層をエッチングすることにより、バンプ下部と、該バンプ下部の硬度よりも高い硬度を有するバンプ上部とからなるバンプを形成するバンプ形成ステップと、
を含むことを特徴とする配線回路基板の製造方法。
A first bump forming metal layer is formed on the wiring forming metal layer via an etching stopper layer, and the hardness of the first bump forming metal layer is determined on the first bump forming metal layer. For the multilayer metal plate on which the second bump forming metal layer having a high hardness is formed,
A resist mask forming step of forming a resist mask by applying or laminating a resist on the second bump-forming metal layer and patterning;
By etching the first bump forming metal layer and the second bump forming metal layer using the resist mask as a mask, the bump lower portion and the bump upper portion having a hardness higher than the hardness of the bump lower portion. A bump forming step for forming a bump,
A method of manufacturing a printed circuit board, comprising:
前記バンプ形成ステップの後、前記バンプが形成された面に樹脂からなる絶縁シートを圧着させることにより絶縁膜を形成する絶縁膜形成ステップと、
前記バンプ下部が露出するまで前記絶縁膜及び前記バンプ上部を研磨する研磨ステップと、
を含むことを特徴とする請求項3に記載の配線回路基板の製造方法。
After the bump forming step, an insulating film forming step of forming an insulating film by pressure-bonding an insulating sheet made of resin to the surface on which the bump is formed;
A polishing step of polishing the insulating film and the upper part of the bump until the lower part of the bump is exposed;
The manufacturing method of the printed circuit board of Claim 3 characterized by the above-mentioned.
絶縁膜の上下両面に配線が形成された配線回路基板に、請求項2又は請求項4に記載の配線回路基板の製造方法によって製造された配線回路基板を積層することを特徴とする多層配線基板の製造方法。 5. A multilayer circuit board, wherein a circuit board produced by the method for producing a circuit board according to claim 2 is laminated on a circuit board on which wiring is formed on both upper and lower surfaces of an insulating film. Manufacturing method. 請求項2又は請求項4に記載の配線回路基板の製造方法によって製造された配線回路基板を複数枚重ねて積層することを特徴とする多層配線基板の製造方法。


A method for manufacturing a multilayer wiring board, comprising stacking a plurality of wiring circuit boards manufactured by the method for manufacturing a wiring circuit board according to claim 2 or 4.


JP2003370851A 2003-10-30 2003-10-30 Wiring circuit board, method for manufacturing wiring circuit board, and method for manufacturing multilayer wiring board Expired - Fee Related JP4523261B2 (en)

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