JP2005106500A - Method and device for inspecting electric characteristic of electric component - Google Patents

Method and device for inspecting electric characteristic of electric component Download PDF

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JP2005106500A
JP2005106500A JP2003337143A JP2003337143A JP2005106500A JP 2005106500 A JP2005106500 A JP 2005106500A JP 2003337143 A JP2003337143 A JP 2003337143A JP 2003337143 A JP2003337143 A JP 2003337143A JP 2005106500 A JP2005106500 A JP 2005106500A
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voltage
electromigration
value
measurement
measured
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JP4079865B2 (en
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Yoshihiro Maesaki
義博 前崎
Hiroshi Teshigawara
寛 勅使河原
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Fujitsu Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To surely confirm formation of electromigration in trouble investigation in a semiconductor maker and a semiconductor production department, by stopping inspection under the condition where the electromigration is formed. <P>SOLUTION: When connecting a resistor R and an electric power source E in series to measuring points T1, T2 to impress a voltage to the measuring points, phenomena of bringing a measured voltage by a voltmeter VM into 0V or into a power source voltage (5V) are continuously and repeatedly appeared in the case of generating the electromigration. A value of the resistor R is switched therein when the measured voltage becomes a prescribed value or less, so as to maintain the electromigration, and the impression of the voltage from the power source E is stopped under this condition to finish the inspection. The inspection is stopped under the condition where the electromigration is formed between the measuring points to be fed back to the trouble investigation in the semiconductor maker and the semiconductor production department. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は半導体装置等の電気部品のリード端子間の電気的特性を検査するための検査方法及び装置に関し、さらに詳細には、上記リード端子間におけるエレクトロマイグレーションの発生の有無を検査し、エレクトロマイグレーションが発生したとき、その状態を保持させるようにした電気部品のリード端子間の電気的特性の検査方法および装置に関するものである。   The present invention relates to an inspection method and apparatus for inspecting electrical characteristics between lead terminals of an electrical component such as a semiconductor device. More specifically, the present invention examines whether or not electromigration occurs between the lead terminals, and performs electromigration. The present invention relates to a method and an apparatus for inspecting electrical characteristics between lead terminals of an electrical component that is kept in a state when the above occurs.

エレクトロマイグレーションにより、配線や接続部が劣化したり、配線が断線するといった現象が生じたり、あるいは、リード端子間の絶縁劣化が生じ、短絡状態になるといった現象が発生することが知られている。
特に、半導体装置の集積度の向上に伴い、上記エレクトロマイグレーションの問題は、半導体装置の信頼性を確保する上で、重要視されるようになってきている。
このため、半導体装置の受け入れ、出荷段階ではエレクトロマイマイグレーション試験を行い、エレクトロマイグレーションが発生する半導体装置を摘出し、半導体メーカや半導体製造部門にフィードバックして、品質改善を図っている。
It is known that electromigration causes phenomena such as deterioration of wiring and connection portions, disconnection of wiring, or deterioration of insulation between lead terminals, resulting in a short circuit state.
In particular, with the improvement in the degree of integration of semiconductor devices, the above-mentioned electromigration problem has come to be regarded as important in ensuring the reliability of semiconductor devices.
For this reason, an electromigration test is performed at the stage of accepting and shipping a semiconductor device, and a semiconductor device in which electromigration occurs is picked up and fed back to a semiconductor manufacturer or a semiconductor manufacturing department to improve quality.

従来からエレクトロマイグレーションを評価するための手法は種々提案されており、例えば、特許文献1には、金属配線サンプルに直列に可変抵抗を接続するとともに、金属配線サンプルに並列に電圧計を接続して、金属配線サンプル間の電圧を測定し、金属配線サンプルの抵抗値の増大に伴い、上記抵抗値を減少させて金属配線に一定の電流を流すことで、エレクトロマイグレーションを評価する半導体測定装置が提案されている。
実開平6−70237号公報
Various methods for evaluating electromigration have been proposed. For example, in Patent Document 1, a variable resistance is connected in series to a metal wiring sample, and a voltmeter is connected in parallel to the metal wiring sample. A semiconductor measurement device that evaluates electromigration by measuring the voltage between metal wiring samples and decreasing the resistance value and causing a constant current to flow through the metal wiring as the resistance value of the metal wiring sample increases is proposed. Has been.
Japanese Utility Model Publication No. 6-70237

前記したようにエレクトロマイグレーションにより、半導体装置のリード端子間の絶縁状態が劣化したり短絡することがある。これは、半導体装置などのパッケージの有機リンなどが原因で生ずるものと考えられる。
上記エレクトロマイグレーションの発生を検査するため、現状では、図8に示すように、リード端子T1,T2間に直列に負荷抵抗(例えば50kΩ)Rと電源E(例えば5V)を接続するとともに、リード端子間に並列に電圧計VMを接続し、電圧計VMでリード端子間の電圧を測定して、リード端子間の電圧の低下を検出している。
ところで、上記のようにリード端子T1,T2間の電圧を電圧計VMにより観測していると、エレクトロマイグレーションが発生した場合、上記測定電圧が0Vになったり、電源電圧 (5V)になったりする現象が、連続的に繰り返し、かつ頻繁に発生することがわ
かった。
測定電圧が0Vになる場合は、リード端子T1,T2間の抵抗値が0(Ω)になっている状態(状態1という)であり、エレクトロマイグレーションが完全に形成されている状態である。また、測定電圧が例えば5Vになる場合は、リード端子T1,T2間の抵抗値が∞(Ω)になっている状態(状態2という)であり、エレクトロマイグレーションが完全に形成されていない状態である。上記状態1、状態2は、数十msの間隔で繰り返し現れた。
As described above, due to electromigration, the insulation state between the lead terminals of the semiconductor device may be deteriorated or short-circuited. This is considered to be caused by organic phosphorus in a package of a semiconductor device or the like.
In order to inspect the occurrence of the electromigration, at present, as shown in FIG. 8, a load resistance (for example, 50 kΩ) R and a power source E (for example, 5 V) are connected in series between the lead terminals T1 and T2, and the lead terminal A voltmeter VM is connected in parallel between them, and the voltage between the lead terminals is measured by the voltmeter VM to detect a decrease in the voltage between the lead terminals.
By the way, when the voltage between the lead terminals T1 and T2 is observed with the voltmeter VM as described above, when electromigration occurs, the measured voltage becomes 0V or the power supply voltage (5V). It was found that the phenomenon occurred continuously and repeatedly.
When the measurement voltage is 0 V, the resistance value between the lead terminals T1 and T2 is 0 (Ω) (referred to as state 1), and electromigration is completely formed. When the measurement voltage is 5 V, for example, the resistance value between the lead terminals T1 and T2 is ∞ (Ω) (referred to as state 2), and electromigration is not completely formed. is there. State 1 and state 2 repeatedly appeared at intervals of several tens of ms.

前記したように、エレクトロマイグレーションが発生すると、エレクトロマイグレーションが発生した半導体装置を半導体メーカや半導体製造部門にフィードバックして、品質改善を図っている。しかし、上記のようにエレクトロマイグレーションの形成された状態、形成されていない状態が繰り返し交互に現れると、前記検査の段階でエレクトロマイグレーションが発生することがわかっても、半導体メーカや半導体製造部門にフィードバックして障害調査を行う際には、必ずしもリード端子間が短絡状態になっていない場合もあり、上記障害調査の段階でエレクトロマイグレーションが形成されていることを確認できない場合が生ずる。
本発明は、上記事情を考慮してなされたものであって、エレクトロマイグレーションの形成を維持した状態でリード端子間への電圧の供給を停止して前記検査を停止することにより、半導体メーカや半導体製造部門での障害調査で、エレクトロマイグレーションが形成されていることを確実に確認できるようにすることである。
As described above, when electromigration occurs, the semiconductor device in which electromigration has occurred is fed back to a semiconductor manufacturer or semiconductor manufacturing department to improve quality. However, if the state where electromigration is formed and the state where it is not formed repeatedly appear alternately as described above, even if it is found that electromigration occurs at the stage of inspection, it is fed back to the semiconductor manufacturer and the semiconductor manufacturing department. When investigating a fault, the lead terminals may not necessarily be short-circuited, and it may be impossible to confirm that electromigration has been formed at the stage of the fault investigation.
The present invention has been made in consideration of the above circumstances, and by stopping the inspection by stopping the supply of voltage between the lead terminals while maintaining the formation of electromigration, the semiconductor manufacturer and the semiconductor It is to make sure that the electromigration is formed in the trouble investigation in the manufacturing department.

上記課題を解決するため、本発明においては、図1(a)に示すように、測定点T1,T2と直列に抵抗器Rと電源Eを接続し、測定点T1,T2に並列に電圧計VMを接続した測定回路において、抵抗Rの値を切り換え可能にする。そして、エレクトロマイグレーションにより上記測定点T1,T2間に電流が流れ、測定点T1,T2間の電圧が減少したとき、上記抵抗器の抵抗値を増大させ、エレクトロマイグレーションを維持させた状態で上記電源から電圧の印加を停止し検査を終了する。
エレクトロマイグレーションは、図1(a)に模式的に示すように+側端子から成長して、−側端子に至り測定点間が短絡状態(前記した状態1)になるが、測定点間が短絡状態となり測定点間に流れる電流が増大すると、エレクトロマイグレーションによる短絡状態が解消され、測定点間は再び絶縁状態(前記した状態2)となる現象を繰り返し、前記したように状態1、状態2が繰り返し交互に現れるものと考えられる。
そこで、上記のように、抵抗Rの値を測定点間の電圧に応じて切り換えることで、エレクトロマイグレーションの形成状態を維持することができる。
図1(b)は、上記電圧計VMによりモニタされる測定点T1,T2の電圧の変化を示す図であり、横軸は時間tである。なお、横軸には時間tとともに測定点T1,T2間の内部抵抗を示している。
同図のBに示すように、測定点T1,T2間の内部抵抗は、ある値(同図では50(kΩ))を越えると急激に低下するが、このとき、上記抵抗Rの値を50(kΩ)→70(kΩ)→90(kΩ)のように増大させることで、同図のAに示すように測定点T1,T2間の内部抵抗の減少率を小さくし、エレクトロマイグレーションの形成状態を維持させることができる。
前記したように、状態1、状態2は数十msの間隔で繰り返し現れるため、エレクトロマイグレーションが形成された状態で検査を終了しようとしても、検査を終了するタイミングを決定するのが難しく、また、数十ms以下の間隔でデータを取得すると情報量が膨大となるが、上記のように抵抗Rの値を増大させることで、エレクトロマイグレーションの形成状態をある程度の時間維持させることができ、エレクトロマイグレーションが形成された状態で測定点間への電圧の印加を停止して試験を終了するタイミングを比較的容易に決めることができる。また、エレクトロマイグレーションが形成された状態を維持させることで、データの取得も比較的容易になる。
また、半導体装置の複数のリード端子間に電源と抵抗器の直列回路を接続し、上記複数のリード端子間の電圧をそれぞれ測定する電圧測定手段を設け、上記電圧測定手段により測定されたそれぞれの測定電圧を予め設定された判定値と比較し、上記測定電圧のうちのうち少なくとも1つの測定電圧が上記判定値より小さくなったとき、上記判定値を変更するように構成し、測定電圧が上記判定値より小さくなった測定点間の電圧および判定値を出力するようにしてもよい。
これにより、半導体装置のリード端子間の内、最も電圧の低下が大きいリード端子間の電圧の推移を観測することができ、また、全測定点間の測定電圧を出力する場合と比べ、出力されるデータも少なく、データの整理、分析が容易となる。
In order to solve the above problems, in the present invention, as shown in FIG. 1A, a resistor R and a power source E are connected in series with measurement points T1 and T2, and a voltmeter is connected in parallel with measurement points T1 and T2. In the measurement circuit to which the VM is connected, the value of the resistor R can be switched. When the current flows between the measurement points T1 and T2 due to electromigration and the voltage between the measurement points T1 and T2 decreases, the resistance value of the resistor is increased and the power supply is maintained in a state where electromigration is maintained. Then, the voltage application is stopped and the inspection is finished.
Electromigration grows from the + side terminal as shown schematically in FIG. 1A and reaches the − side terminal, and the measurement points are short-circuited (state 1 described above), but the measurement points are short-circuited. If the current flowing between the measurement points increases and the short-circuit state due to electromigration is eliminated, the phenomenon that the measurement points are again in an insulating state (state 2 described above) is repeated. It is thought that it appears alternately repeatedly.
Therefore, as described above, the state of electromigration can be maintained by switching the value of the resistance R according to the voltage between the measurement points.
FIG. 1B is a diagram showing changes in voltage at the measurement points T1 and T2 monitored by the voltmeter VM, and the horizontal axis is time t. The horizontal axis shows the internal resistance between the measurement points T1 and T2 with time t.
As shown in B of the figure, the internal resistance between the measurement points T1 and T2 rapidly decreases when it exceeds a certain value (50 (kΩ) in the figure). At this time, the value of the resistance R is set to 50. By increasing (kΩ) → 70 (kΩ) → 90 (kΩ), the decrease rate of the internal resistance between the measurement points T1 and T2 is reduced as shown in FIG. Can be maintained.
As described above, since the state 1 and the state 2 repeatedly appear at intervals of several tens of ms, it is difficult to determine the timing to end the inspection even if the inspection is finished in a state where the electromigration is formed, If data is acquired at intervals of several tens of ms or less, the amount of information becomes enormous. However, by increasing the value of the resistance R as described above, the electromigration formation state can be maintained for a certain period of time. The timing at which the test is terminated by stopping the application of the voltage between the measurement points in a state where is formed can be determined relatively easily. Further, by maintaining the state in which electromigration is formed, data acquisition becomes relatively easy.
Further, a series circuit of a power source and a resistor is connected between a plurality of lead terminals of the semiconductor device, and voltage measuring means for measuring voltages between the plurality of lead terminals is provided, and each of the voltage measured by the voltage measuring means is measured. The measurement voltage is compared with a preset determination value, and when at least one of the measurement voltages is smaller than the determination value, the determination value is changed. You may make it output the voltage between the measurement points and the determination value which became smaller than the determination value.
As a result, it is possible to observe the transition of the voltage between the lead terminals where the voltage drop is the greatest among the lead terminals of the semiconductor device, and it is output compared to the case where the measurement voltage between all measurement points is output. There are few data, and data can be easily organized and analyzed.

本発明においては、上記のようにエレクトロマイグレーションにより測定点間の電圧が低下したとき、測定点間に直列に接続された抵抗器の抵抗値を増大させ、エレクトロマイグレーションを維持させた状態で上記電源から電圧の印加を停止し検査を終了するようにしたので、エレクトロマイグレーションが形成された状態で検査を終了することが可能となり、半導体メーカや半導体製造部門での障害調査で、エレクトロマイグレーションが形成されていることを確実に確認することができる。
このため、半導体装置などの受け入れ、出荷時の検査ではエレクトロマイグレーションが発生したにもかかわらず、半導体メーカや半導体製造部門にフィードバックして、障害調査を行う際、エレクトロマイグレーションを確認できないといった問題が生ずることがなく、エレクトロマイグレーション発生の原因の調査等を確実に行うことができる。
また、上記電圧測定手段により測定されたそれぞれの測定電圧を予め設定された判定値と比較し、上記測定電圧のうちのうち少なくとも1つの測定電圧が上記判定値より小さくなったとき、上記判定値を変更するように構成し、測定電圧が上記判定値より小さくなった測定点間の電圧および判定値を出力することで、半導体装置のリード端子間の内、最も電圧の低下が大きいリード端子間の電圧の推移を観測することができ、また、出力されるデータも少ないので、データの整理、分析が容易となる。
In the present invention, when the voltage between the measurement points is reduced by electromigration as described above, the resistance value of the resistor connected in series between the measurement points is increased, and the power supply is maintained in the state where electromigration is maintained. Since the application of the voltage is stopped and the inspection is finished, the inspection can be finished with the electromigration formed, and the electromigration is formed in the failure investigation in the semiconductor manufacturer or the semiconductor manufacturing department. It can be confirmed with certainty.
For this reason, there is a problem in that, even when electromigration occurs in the acceptance and shipment inspection of a semiconductor device, the electromigration cannot be confirmed when performing a fault investigation by feeding back to the semiconductor manufacturer or the semiconductor manufacturing department. Therefore, it is possible to reliably investigate the cause of the occurrence of electromigration.
Further, each measurement voltage measured by the voltage measuring means is compared with a predetermined determination value, and when at least one of the measurement voltages becomes smaller than the determination value, the determination value Between the lead terminals of the semiconductor device with the largest voltage drop by outputting the voltage between the measurement points where the measurement voltage is smaller than the above judgment value and the judgment value. The transition of the voltage can be observed, and since the output data is small, the data can be easily organized and analyzed.

図2は、本発明の実施例の測定回路の構成例を示す図である。同図において、D1〜Dmは、被検査対象となる半導体装置であり、半導体装置D1〜Dmのリード端子11〜1n,m1〜mnには、それぞれ並列に電圧計VM11〜VM1n,VMm1〜VMmnが接続され、半導体装置D1〜Dmのリード端子11〜1n,m1〜mnには直列に、スイッチSW11〜SW1n,スイッチSWm1〜SWmnと、これらのスイッチにより切換接続される抵抗R1〜R3と、電源Eが接続されている。上記抵抗R1の抵抗値は、例えば50kΩ、70kΩ、90kΩであり、電源Eの電圧は例えば5Vである。
上記スイッチSW11〜SW1n,スイッチSWm1〜SWmnは、前記したように、上記電圧計VM11〜VM1n,VMm1〜VMmnにより測定された測定電圧に応じて切り換えられ、上記リード端子11〜1n,m1〜mnに直列に接続される抵抗は、抵抗R1→抵抗R2→抵抗R3となる。
FIG. 2 is a diagram illustrating a configuration example of the measurement circuit according to the embodiment of the present invention. In the figure, D1 to Dm are semiconductor devices to be inspected, and voltmeters VM11 to VM1n and VMm1 to VMmn are connected in parallel to the lead terminals 11 to 1n and m1 to mn of the semiconductor devices D1 to Dm, respectively. The switches SW11 to SW1n, the switches SWm1 to SWmn, resistors R1 to R3 that are switched and connected by these switches, and the power source E are connected in series to the lead terminals 11 to 1n and m1 to mn of the semiconductor devices D1 to Dm. Is connected. The resistance value of the resistor R1 is, for example, 50 kΩ, 70 kΩ, and 90 kΩ, and the voltage of the power source E is, for example, 5V.
As described above, the switches SW11 to SW1n and the switches SWm1 to SWmn are switched according to the measurement voltages measured by the voltmeters VM11 to VM1n and VMm1 to VMmn, and are switched to the lead terminals 11 to 1n and m1 to mn. The resistors connected in series are resistance R1 → resistance R2 → resistance R3.

図3は、上記スイッチSW11〜SW1n,スイッチSWm1〜SWmnの切換を制御するとともに検査結果を記録する検査制御システムの構成例を示す図である。
上記電圧計VM11〜VM1n,VMm1〜VMmnにより測定された各半導体装置D1〜Dmのリード端子間の測定電圧V11〜V1n,Vm1〜Vmnは、AD変換器20により、デジタル信号に変換され、所定のサンプリング周期で処理装置30に取り込まれる。
処理装置30は、後述するように、各リード端子の測定電圧V11〜V1n,Vm1〜Vmnを予め設定された判定値と比較し、この判定値より各半導体装置の測定電圧V11〜V1n、Vm1〜Vmnの内の、少なくともひとつのリード端子の電圧が小さくなると、そのときの測定電圧、判定値及び検査を開始してから経過した時間(経過時間という)を、検査結果を記録するファイル50に出力し、これと同時に上記判定値を測定電圧の値から所定の値(例えば0.1V)だけ小さい値とする。
また、所定時間(例えば60秒)経過する毎に、上記判定値を初期値(例えば4.9V)に戻し、ついで、判定値を直前の値にする。
上記処理を繰り返し、上記測定電圧が第1の設定値(例えば3.0V)より小さくなると、出力インタフェース40を介して、スイッチSW11〜SW1n,スイッチSWm1〜SWmnの切換信号を出力し、測定電圧が第1の設定値より小さくなったリード端子に直列に接続される抵抗の値を増大させ(例えば50kΩから70kΩする)、さらに、第2の設定値(例えば2.5V)より小さくなると、上記スイッチSW11〜SW1n,スイッチSWm1〜SWmnを切り替えて、測定電圧が第2の設定値より小さくなったリード端子に直列に接続される抵抗の値をさらに増大させる(例えば70kΩから90kΩする)。
そして、上記測定電圧が第3の設定値(例えば、2.0V)より小さくなると、上記スイッチスイッチSW11〜SW1n,スイッチSWm1〜SWmnの内、測定電圧が第3の設定値より小さくなったスイッチをオフ状態に切り替える。また、上記測定電圧が第1〜第3の設定値より小さくなったときの経過時間、そのときの測定電圧、および判定値を上記ファイル50に出力する。
FIG. 3 is a diagram illustrating a configuration example of an inspection control system that controls switching of the switches SW11 to SW1n and the switches SWm1 to SWmn and records an inspection result.
The measured voltages V11 to V1n and Vm1 to Vmn between the lead terminals of the semiconductor devices D1 to Dm measured by the voltmeters VM11 to VM1n and VMm1 to VMmn are converted into digital signals by the AD converter 20, The data is taken into the processing device 30 at a sampling period.
As will be described later, the processing device 30 compares the measurement voltages V11 to V1n and Vm1 to Vmn of each lead terminal with preset determination values, and the measurement voltages V11 to V1n and Vm1 of each semiconductor device are determined based on the determination values. When the voltage of at least one lead terminal in Vmn becomes small, the measured voltage, the judgment value, and the time elapsed since the start of inspection (called elapsed time) are output to the file 50 for recording the inspection results. At the same time, the determination value is set to a value smaller than the measurement voltage by a predetermined value (for example, 0.1 V).
Each time a predetermined time (for example, 60 seconds) elapses, the determination value is returned to the initial value (for example, 4.9 V), and then the determination value is set to the immediately preceding value.
When the above processing is repeated and the measured voltage becomes smaller than a first set value (for example, 3.0 V), switching signals of the switches SW11 to SW1n and switches SWm1 to SWmn are output via the output interface 40, and the measured voltage is When the value of the resistor connected in series to the lead terminal that has become smaller than the first set value is increased (for example, 50 kΩ to 70 kΩ), and when the value is smaller than the second set value (for example, 2.5 V), the switch SW11 to SW1n and switches SWm1 to SWmn are switched to further increase the value of the resistor connected in series to the lead terminal whose measured voltage is smaller than the second set value (for example, 70 kΩ to 90 kΩ).
When the measured voltage becomes smaller than a third set value (for example, 2.0 V), among the switch switches SW11 to SW1n and switches SWm1 to SWmn, the switch whose measured voltage is smaller than the third set value is selected. Switch to off state. The elapsed time when the measured voltage becomes smaller than the first to third set values, the measured voltage at that time, and the determination value are output to the file 50.

図4は、上記処理装置30の処理内容を示す機能ブロック図、図5は処理装置30における処理内容を示すフローチャートであり、図4、図5により、上記処理装置30における処理を説明する。なお、図4ではひとつの半導体装置D1について示しているが、被検査対象となる半導体装置が複数ある場合は、他の半導体装置についても同様の処理が行われる。
まず、図4に示す第1のタイマ36、第2のタイマ37をスタートさせる(図5のステップS1)。なお、第1のタイマ36は、検査開始時にスタートし、検査終了時間がくるとタイムアップ(例えば検査を開始してから48時間後にタイムアップ)するタイマであり、第2のタイマ37は例えば60秒毎にタイムアップするタイマである。
次に、半導体素子D1のリード端子間の電圧V11〜V1nを経過時間とともに出力する(図5のステップS2)。すなわち、図4に示す測定値/判定値記録手段38は、電圧V11〜V1nと時間を、検査結果を格納するファイル50に出力する。
FIG. 4 is a functional block diagram showing the processing contents of the processing device 30, and FIG. 5 is a flowchart showing the processing contents in the processing device 30. The processing in the processing device 30 will be described with reference to FIGS. Although FIG. 4 shows one semiconductor device D1, when there are a plurality of semiconductor devices to be inspected, the same processing is performed for other semiconductor devices.
First, the first timer 36 and the second timer 37 shown in FIG. 4 are started (step S1 in FIG. 5). The first timer 36 is a timer that starts at the start of the inspection and times up when the inspection end time comes (for example, the time is up 48 hours after the start of the inspection). The second timer 37 is, for example, 60 It is a timer that times up every second.
Next, the voltages V11 to V1n between the lead terminals of the semiconductor element D1 are output together with the elapsed time (step S2 in FIG. 5). That is, the measured value / judgment value recording means 38 shown in FIG. 4 outputs the voltages V11 to V1n and the time to the file 50 that stores the inspection result.

図4に示す第1の比較手段31は、半導体素子のリード端子間の電圧V11〜V1nと判定値(初期値は例えば4.9V)とを比較し、P/F判定手段32は上記電圧V11〜V1nの内のいずれか一つの電圧が上記判定値より小さいとFAILと判定し、電圧V11〜V1nのどれもが上記判定値より大きければ、PASSと判定する(図5のステップS3)。なお、被検査対象となる半導体装置が複数ある場合には、各半導体装置について、上記FAIL、PASSの判定が行われる。
P/F判定手段32でFAILと判定されると、測定値/判定値記録手段38は、FAILと判定されたリード端子のそのときの測定電圧、判定値および時間をファイル50に出力する(図5のステップS4)。
また、判定値変更手段33は判定値31aを変更し、そのときの測定電圧−0.1Vを新しい判定値とする(図5のステップS5)。また、P/F判定手段32でPASSと判定された場合には、何もせずに図6のステップS6に行く。
図5のステップS6で、タイマ37をスタートしてから60秒を経過したかを判定する。60秒経過すると、判定値変更手段33は、判定値を初期値(4.9V)に戻し、上記と同様、F/P判定手段32でFAILかPASSかの判定を行う(図5のステップS13,S14)。そして、FAILであれば、FAILと判定されたリード端子のそのときの測定値、判定値及び時間を出力し(ステップS15)、判定値変更手段33は判定値を上記初期値に戻す前の値に戻す(ステップS16)。また、タイマ37は計数を再スタートする(ステップS17)。
The first comparison means 31 shown in FIG. 4 compares the voltages V11 to V1n between the lead terminals of the semiconductor element with a determination value (initial value is, for example, 4.9 V), and the P / F determination means 32 compares the voltage V11. When any one voltage of ~ V1n is smaller than the determination value, it is determined as FAIL, and when any of the voltages V11 to V1n is higher than the determination value, it is determined as PASS (step S3 in FIG. 5). If there are a plurality of semiconductor devices to be inspected, the determination of FAIL and PASS is performed for each semiconductor device.
When the P / F determination unit 32 determines FAIL, the measurement value / determination value recording unit 38 outputs the current measurement voltage, determination value, and time of the lead terminal determined to be FAIL to the file 50 (FIG. 5). 5 step S4).
Further, the determination value changing means 33 changes the determination value 31a and sets the measured voltage −0.1 V at that time as a new determination value (step S5 in FIG. 5). If the P / F determination means 32 determines PASS, the process goes to step S6 in FIG. 6 without doing anything.
In step S6 of FIG. 5, it is determined whether 60 seconds have elapsed since the timer 37 was started. When 60 seconds have elapsed, the determination value changing unit 33 returns the determination value to the initial value (4.9 V), and similarly to the above, the F / P determination unit 32 determines whether it is FAIL or PASS (step S13 in FIG. 5). , S14). If it is FAIL, the measured value, determination value and time of the lead terminal determined to be FAIL are output (step S15), and the determination value changing means 33 is a value before returning the determination value to the initial value. (Step S16). The timer 37 restarts counting (step S17).

図4に示す第2の比較手段34は、リード端子間の電圧V11〜V1nと、抵抗値の切り換えを行う電圧を設定した第1、第2の設定値(例えば3.0V,2.5V)、電源オフにする電圧を設定した電源オフ設定値(例えば2.0V)と比較する(図5のステップS7,S8,S9)。
そして、上記電圧V11〜V1nが第1の抵抗切り換え設定値(3.0V)より小さくなると、スイッチ操作手段35は、スイッチSW11〜SW1nの内、電圧が上記設定値(3.0V)より小さくなったリード端子に接続されたスイッチを切り換え、該リード端子に接続された抵抗の値を70kΩにする。
また、上記電圧V11〜V1nが第2の抵抗切り換え設定値(2.5V)より小さくなると、スイッチ操作手段35は、スイッチSW11〜SW1nの内、電圧が上記設定値(2.5V)より小さくなったリード端子に接続されたスイッチを切り換え、該リード端子に接続された抵抗の値を90kΩにする。
さらに、上記電圧V11〜V1nが電源オフ設定値(2.0V)より小さくなると、スイッチ操作手段35は、スイッチSW11〜SW1nの内、電圧が上記設定値(2.0V)より小さくなったリード端子に接続されたスイッチをオフ状態にし、上記リード端子への電圧の印加を停止する。
以上の動作を第1のタイマ36がタイムアップするまで繰り返し、タイマ36がタイムアップすると、リード端子に接続されすべてのスイッチSW11〜SW1nをオフにして、検査を終了する。
The second comparison unit 34 shown in FIG. 4 has first and second set values (for example, 3.0 V and 2.5 V) in which voltages V11 to V1n between the lead terminals and a voltage for switching the resistance value are set. Then, the voltage for turning off the power is compared with a set power-off setting value (for example, 2.0 V) (steps S7, S8, and S9 in FIG. 5).
When the voltages V11 to V1n are smaller than the first resistance switching set value (3.0V), the switch operating means 35 has the voltage of the switches SW11 to SW1n smaller than the set value (3.0V). The switch connected to the lead terminal is switched to set the resistance connected to the lead terminal to 70 kΩ.
Further, when the voltages V11 to V1n become smaller than the second resistance switching set value (2.5V), the switch operating means 35 causes the voltage of the switches SW11 to SW1n to become smaller than the set value (2.5V). The switch connected to the lead terminal is switched to set the value of the resistor connected to the lead terminal to 90 kΩ.
Further, when the voltages V11 to V1n become smaller than the power-off setting value (2.0V), the switch operating means 35 is a lead terminal whose voltage is smaller than the setting value (2.0V) among the switches SW11 to SW1n. The switch connected to is turned off, and the application of voltage to the lead terminal is stopped.
The above operation is repeated until the first timer 36 expires. When the timer 36 expires, all the switches SW11 to SW1n connected to the lead terminal are turned off, and the inspection is terminated.

本実施例では、上記のように、半導体装置のリード端子間の電圧V11〜V1nのうちのうち少なくとも1つのリード端子間の測定電圧が判定値より小さくなったとき、判定値を所定値(例えば0.1V)だけ小さくし、そのときの測定電圧と判定値および時間を出力するようにしたので、半導体装置のリード端子間の内、最も電圧の低下が大きいリード端子間の電圧の推移を観測することができる。特に、判定値を所定の値ずつ低下させながら、上記動作を繰り返し、測定電圧と判定値および時間を出力するようにしているので、リード端子間の電圧低下率の大きさにかかわらず、一定量のデータを取得することができる。
例えば、一定時間毎にリード端子間の電圧を取得して記録する場合には、リード端子間の電圧低下率が大きいときにも十分なデータ量を得ようとすると、電圧を記録する頻度を多くする必要があり、記録されるデータ量も膨大となるが、上記のように、判定値を所定の値ずつ低下させながら測定電圧と判定値および時間を出力することで、記録されるデータ量を少なくすることができ、事後にデータを整理して検証する際の作業も容易となる。 また、半導体装置のリード端子電圧V11〜V1nの内のいずれか一つの電圧が上記判定値より小さいとFAILと判定し、測定電圧、判定値、および時間を記録するようにしたので、測定電圧が最も低いリード端子に着目してリード端子の電圧推移を記録することがでる。
さらに、第2のタイマ37に設定された時間(例えば60秒)毎に、判定値を初期値に戻しているので、測定電圧が最も低いリード端子以外のリード端子の電圧を観測して、記録することができる。
In this embodiment, as described above, when the measured voltage between at least one lead terminal among the voltages V11 to V1n between the lead terminals of the semiconductor device becomes smaller than the determination value, the determination value is set to a predetermined value (for example, 0.1V), and the measured voltage, judgment value, and time at that time are output, so the transition of the voltage between the lead terminals with the greatest voltage drop is observed among the lead terminals of the semiconductor device. can do. In particular, the above operation is repeated while decreasing the determination value by a predetermined value, and the measurement voltage, the determination value, and the time are output. Therefore, a fixed amount regardless of the magnitude of the voltage decrease rate between the lead terminals. Data can be obtained.
For example, when the voltage between the lead terminals is acquired and recorded at regular time intervals, if a sufficient amount of data is obtained even when the voltage drop rate between the lead terminals is large, the frequency of recording the voltage is increased. However, as described above, the amount of data to be recorded can be reduced by outputting the measurement voltage, the determination value, and the time while decreasing the determination value by a predetermined value as described above. It can be reduced, and the work for organizing and verifying the data after the fact becomes easy. Further, if any one of the lead terminal voltages V11 to V1n of the semiconductor device is smaller than the determination value, it is determined as FAIL, and the measurement voltage, the determination value, and the time are recorded. Focusing on the lowest lead terminal, the voltage transition of the lead terminal can be recorded.
Further, since the determination value is returned to the initial value every time set in the second timer 37 (for example, 60 seconds), the voltage of the lead terminal other than the lead terminal having the lowest measured voltage is observed and recorded. can do.

図6は、本実施例の検査装置により得られる半導体装置のリード端子間の測定電圧及び判定値(測定データ)の時間推移を示す図である。同図の○印は上記測定データを出力する時点を示し、×では測定データを出力しない。
同図に示すように、測定開始時に測定電圧、そのときの判定値を出力した後、所定のサンプリング周期で測定電圧を処理装置に取り込んで前記したようにFAIL、PASS判定を行い、測定電圧が判定値より小さくなる毎に、測定データを出力し、判定値をそのときの測定電圧より−0.1V低い電圧に変更する。また、60秒経過する毎に判定値を4.9Vに戻して、そのとき測定電圧が4.9Vより小さいとき、そのリード端子の測定電圧を出力する。
図7は、複数の半導体装置を検査した場合に出力される測定データの時間的推移を示す図である。
同図に示すように、測定開始時点では、全リード端子間の測定電圧を出力し、その後は、各半導体装置についてFAIL判定される毎にリード端子間の測定データを出力する。そして、リード端子間の電圧が2.0Vより小さくなると、そのリード端子への電圧の印加を停止する。また、リード端子間の電圧が2.0Vより小さくならない場合には、上記測定データの出力を繰り返し、例えば48時間経過すると、検査を終了する。
FIG. 6 is a diagram illustrating the time transition of the measurement voltage and the determination value (measurement data) between the lead terminals of the semiconductor device obtained by the inspection apparatus of this example. The circles in the figure indicate the time point when the measurement data is output, and the measurement data is not output with a cross.
As shown in the figure, after the measurement voltage is output at the start of measurement and the determination value at that time is output, the measurement voltage is taken into the processing device at a predetermined sampling period, and the FAIL and PASS determination is performed as described above. Each time it becomes smaller than the judgment value, measurement data is output, and the judgment value is changed to a voltage lower by -0.1V than the measurement voltage at that time. Further, the judgment value is returned to 4.9 V every 60 seconds, and when the measured voltage is smaller than 4.9 V, the measured voltage of the lead terminal is output.
FIG. 7 is a diagram showing a temporal transition of measurement data output when a plurality of semiconductor devices are inspected.
As shown in the figure, at the start of measurement, the measurement voltage between all the lead terminals is output, and thereafter, the measurement data between the lead terminals is output every time the FAIL determination is made for each semiconductor device. When the voltage between the lead terminals becomes smaller than 2.0 V, the application of the voltage to the lead terminals is stopped. If the voltage between the lead terminals does not become smaller than 2.0 V, the measurement data is output repeatedly, and for example, when 48 hours have elapsed, the inspection is terminated.

本発明の概要を説明する図である。It is a figure explaining the outline | summary of this invention. 本発明の実施例の測定回路の構成例を示す図である。It is a figure which shows the structural example of the measurement circuit of the Example of this invention. 本発明の実施例の検査制御システムの構成例を示す図である。It is a figure which shows the structural example of the test | inspection control system of the Example of this invention. 図3に示した処理装置の機能構成を示す機能ブロック図である。It is a functional block diagram which shows the function structure of the processing apparatus shown in FIG. 図3に示した処理装置における処理フローを示す図である。It is a figure which shows the processing flow in the processing apparatus shown in FIG. 本実施例の検査装置により得られる半導体装置のリード端子間の測定電圧、判定値の時間推移を示す図である。It is a figure which shows the time transition of the measurement voltage between the lead terminals of the semiconductor device obtained by the test | inspection apparatus of a present Example, and a judgment value. 複数の半導体装置を検査した場合に出力される測定データの時間的推移を示す図である。It is a figure which shows the time transition of the measurement data output when a several semiconductor device is test | inspected. 従来例を示す図である。It is a figure which shows a prior art example.

符号の説明Explanation of symbols

D1〜Dm 半導体装置
11〜1n,m1〜mn リード端子
VM11〜VM1n 電圧計
VMm1〜VMmn 電圧計
SW11〜SW1n スイッチ
SWm1〜SWmn スイッチ
20 AD変換器
30 処理装置
50 ファイル
40 出力インタフェース
D1 to Dm Semiconductor device 11 to 1n, m1 to mn Lead terminal VM11 to VM1n Voltmeter VMm1 to VMmn Voltmeter SW11 to SW1n Switch SWm1 to SWmn Switch 20 AD converter 30 Processing device 50 File 40 Output interface

Claims (3)

電気部品の測定点間で生ずるエレクトロマイグレーションの発生の有無を検査する電気部品の電気的特性の検査方法であって、
上記測定点間に電源と抵抗器の直列回路を接続し、該測定点間の電圧を測定することにより、エレクトロマイグレーションの発生の有無を検査し、
エレクトロマイグレーションにより上記測定点間の内部抵抗が小さくなったとき、上記抵抗器の抵抗値を増大させ、エレクトロマイグレーションが発生した状態で上記電源から電圧の印加を停止し、エレクトロマイグレーション発生した状態を保持させる
ことを特徴とする電気部品の電気的特性の検査方法。
A method for inspecting the electrical characteristics of an electrical component for inspecting the occurrence of electromigration occurring between measurement points of the electrical component,
By connecting a series circuit of a power source and a resistor between the measurement points, and measuring the voltage between the measurement points, the presence or absence of electromigration is inspected,
When the internal resistance between the measurement points becomes smaller due to electromigration, the resistance value of the resistor is increased and the application of voltage from the power supply is stopped in the state where electromigration occurs, and the state where electromigration occurs is maintained. A method for inspecting electrical characteristics of an electrical component, characterized in that:
エレクトロマイグレーションの発生の有無を検査する検査装置であって、
上記電気部品の測定点間に接続された電源と抵抗器の直列回路と、測定点間の電圧を測定する電圧測定手段と、
エレクトロマイグレーションの発生により、上記電圧測定手段により測定された電圧が予め設定された第1の値より小さくなったとき、上記抵抗器の抵抗値を増大する手段と、
上記測定された電圧が、予め設定された第2の値より小さくなったとき、上記測定点間への電圧の印加を停止し、エレクトロマイグレーションが発生した状態を保持させる手段とを備えた
ことを特徴とする電気部品の電気的特性の検査装置。
An inspection device for inspecting the occurrence of electromigration,
A series circuit of a power source and a resistor connected between the measurement points of the electrical component, a voltage measurement means for measuring a voltage between the measurement points, and
Means for increasing the resistance value of the resistor when the voltage measured by the voltage measuring means becomes smaller than a preset first value due to the occurrence of electromigration;
Means for stopping the application of the voltage between the measurement points and maintaining the state in which electromigration has occurred when the measured voltage becomes smaller than a preset second value. A device for inspecting the electrical characteristics of a featured electrical component.
エレクトロマイグレーションの発生の有無を検査する半導体装置の検査装置であって、
上記半導体装置の複数のリード端子間に接続された電源と抵抗器の直列回路と、
上記複数のリード端子間の電圧をそれぞれ測定する電圧測定手段と、
上記電圧測定手段により測定されたそれぞれの測定電圧を予め設定された判定値と比較し、上記測定電圧が判定値より小さくなったとき出力を発生する判定手段と、
上記測定電圧のうちのうち少なくとも1つの電圧が上記判定値より小さくなったとき、上記判定値を変更する判定値変更手段と、
エレクトロマイグレーションの発生により、上記測定電圧が予め設定された第1の値より小さくなったとき、当該リード端子に直列に接続された上記抵抗器の抵抗値を増大する手段と、
上記測定電圧が、予め設定された第2の値より小さくなったとき、当該リード端子への電圧の印加を停止し、エレクトロマイグレーションが発生した状態を保持させる手段と、
上記判定手段が出力を発生したときの判定値、および判定手段が出力を発生したときの上記電圧測定手段により測定されたリード端子間の電圧を記録する記録手段を備えた
ことを特徴とする半導体装置の検査装置。
A semiconductor device inspection device for inspecting the occurrence of electromigration,
A series circuit of a power source and a resistor connected between a plurality of lead terminals of the semiconductor device;
Voltage measuring means for measuring voltages between the plurality of lead terminals,
A determination means for comparing each measured voltage measured by the voltage measuring means with a predetermined determination value, and generating an output when the measured voltage becomes smaller than the determination value;
Determination value changing means for changing the determination value when at least one of the measurement voltages becomes smaller than the determination value;
Means for increasing the resistance value of the resistor connected in series to the lead terminal when the measured voltage becomes lower than a preset first value due to the occurrence of electromigration;
Means for stopping the application of the voltage to the lead terminal and holding the state in which electromigration has occurred when the measured voltage becomes smaller than a preset second value;
A semiconductor comprising recording means for recording a judgment value when the judgment means generates an output, and a voltage between the lead terminals measured by the voltage measurement means when the judgment means generates an output. Equipment inspection device.
JP2003337143A 2003-09-29 2003-09-29 Method and apparatus for inspecting electrical characteristics of electrical components Expired - Fee Related JP4079865B2 (en)

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