CN111381146A - Test system and test method thereof - Google Patents
Test system and test method thereof Download PDFInfo
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- CN111381146A CN111381146A CN201811624558.1A CN201811624558A CN111381146A CN 111381146 A CN111381146 A CN 111381146A CN 201811624558 A CN201811624558 A CN 201811624558A CN 111381146 A CN111381146 A CN 111381146A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2817—Environmental-, stress-, or burn-in tests
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
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Abstract
The embodiment of the invention discloses a test system and a test method thereof, wherein the test system is used for carrying out aging test on a circuit board, and the test method comprises the following steps: determining power-on stage information of a first circuit module of a circuit board; and powering down and powering up the circuit board at the power-up stage of the first circuit module according to the power-up stage information of the first circuit module. In the embodiment of the invention, whether the circuit board can be normally electrified or not is detected after continuous and repeated power-on and power-off tests, so that the pressure aging reliability test of the circuit board is realized; the voltage pulse of outage probably causes the damage to the first circuit module of being electrified, detects the outage damage ageing degree of first circuit module after test of going up and down electricity many times in succession, has detected the interference killing feature of first circuit module to the voltage pulse of outage, can go deep into the hardware circuit of detection circuit board from this, has solved the problem that the hardware circuit of PCBA can't go deep to detect in the current test of going up and down electricity.
Description
Technical Field
The embodiment of the invention relates to an aging test technology, in particular to a test system and a test method thereof.
Background
The PCB (assembly of PCB) is a PCB (Printed Circuit Board) that has been mounted by an SMT (Surface Mount Technology) and then by a DIP (dual inline-package) process.
At present, when a PCBA (assembly of pcb) electronic factory produces a PCBA, an aging test is performed according to customer requirements or characteristics of a PCBA product. The aging test is a process of carrying out corresponding condition strengthening experiments on the condition that various factors related to the product in actual use conditions age the product, and the aging test can expose the defects of the PCBA, such as power-on and power-off abnormity, poor welding, unmatched element parameters, temperature drift and faults caused in the debugging process so as to be removed and play a role in stabilizing parameters for a non-defective function board.
At present, one of the aging tests of the PCBA, i.e. the electrical aging test method, is to power on the PCBA board normally, then power off, and repeat this for 5000 times to detect the aging of the PCBA board. Obviously, the up-down electrical aging test result is single, and the hardware circuit of the PCBA cannot be deeply detected.
Disclosure of Invention
The embodiment of the invention provides a test system and a test method thereof, which aim to solve the problem that the existing vertical electrical aging test cannot deeply detect a hardware circuit of a PCBA.
The embodiment of the invention provides a test method of a test system, wherein the test system is used for carrying out aging test on a circuit board, and the test method comprises the following steps:
determining power-on stage information of a first circuit module of the circuit board;
and powering down and powering up the circuit board at the power-up stage of the first circuit module according to the power-up stage information of the first circuit module.
Further, the power-on phase information of the first circuit module at least includes: the set power-on time difference Tdel of the first circuit module and the set power-on time length Trise of the first circuit module;
the power-on stage of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the inlet power-on time of the circuit board.
Further, the determining the power-on phase information of the first circuit module of the circuit board includes:
controlling the circuit board to be continuously powered up and down for n times, and acquiring the inlet power-on time of the circuit board, the initial power-on time of the first circuit module and the power-on time length of the first circuit module during each power-on, wherein n is a positive integer and is greater than or equal to 5;
and determining the calculated average value of the difference value of the electrifying time between the inlet electrifying time of the circuit board and the initial electrifying time of the first circuit module as the set electrifying time difference of the first circuit module, and determining the calculated average value of the electrifying time length of the first circuit module as the set electrifying time length of the first circuit module.
Further, a specific execution process of powering down the circuit board in the power-up stage of the first circuit module is as follows: powering down the circuit board at a power-up node Tdq + Tdel +0.5 × Trise of the first circuit module.
An embodiment of the present invention further provides a test system, where the test system includes: the device comprises a circuit board, a voltage monitoring device and a power supply analysis device;
the voltage monitoring device is used for determining power-on stage information of a first circuit module of the circuit board;
the power analysis device is used for powering down and powering up the circuit board at the power-up stage of the first circuit module according to the power-up stage information of the first circuit module.
Further, the power-on phase information of the first circuit module at least includes: the set power-on time difference Tdel of the first circuit module and the set power-on time length Trise of the first circuit module;
the power-on stage of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the inlet power-on time of the circuit board.
Further, the voltage monitoring device includes:
the power-on control module is used for controlling the circuit board to be powered on and off for n times continuously, and acquiring the inlet power-on time of the circuit board, the initial power-on time of the first circuit module and the power-on time length of the first circuit module during each power-on, wherein n is a positive integer and is greater than or equal to 5;
and the power-on calculation module is used for determining the calculated average value of the power-on time difference between the entrance power-on time of the circuit board and the initial power-on time of the first circuit module as the set power-on time difference of the first circuit module, and determining the calculated average value of the power-on time length of the first circuit module as the set power-on time length of the first circuit module.
Further, the power analysis device is specifically configured to power down the circuit board at a power-up node Tdq + Tdel +0.5 × Trise of the first circuit module.
Further, the voltage monitoring device is an oscilloscope, and the power supply analysis device is a high-precision direct-current power supply analyzer.
In the embodiment of the invention, the power-on stage information of the first circuit module of the circuit board is determined firstly, and then the circuit board is powered off and powered on again in the power-on stage of the first circuit module according to the power-on stage information of the first circuit module so as to carry out a test. In the embodiment of the invention, whether the circuit board can be normally electrified or not is detected after continuous and repeated power-on and power-off tests, so that the pressure aging reliability test of the circuit board is realized; the voltage pulse of outage probably causes the damage to the first circuit module of being electrified, detects the outage damage ageing degree of first circuit module after test of going up and down electricity many times in succession, has detected the interference killing feature of first circuit module to the voltage pulse of outage, can go deep into the hardware circuit of detection circuit board from this, has solved the problem that the hardware circuit of PCBA can't go deep to detect in the current test of going up and down electricity.
Drawings
In order to more clearly illustrate the technical solutions in the prior art or the embodiments of the present invention, the drawings needed to be used in the description of the prior art or the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the prior art or the present invention, and other drawings can be obtained according to these drawings by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of a testing method of a testing system according to an embodiment of the present invention;
FIG. 2 is a block diagram of a test system according to an embodiment of the present invention;
fig. 3 is a timing diagram of power-up of a circuit board according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described through embodiments with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic diagram illustrating a testing method of a testing system according to an embodiment of the present invention. The test method can be used for carrying out up-down electrical aging test on the PCBA, and can be executed through a test system. Specifically, the test system is used for performing burn-in testing on a circuit board, which is a printed circuit board mounted with a chip, namely a PCBA.
The test method provided by the embodiment comprises the following steps:
In this embodiment, the test system includes a voltage monitoring device, and the voltage monitoring device is configured to determine power-on stage information of a first circuit module of the circuit board. The circuit board includes a plurality of circuit modules, each circuit module in the circuit board starts to be powered on after the circuit board is powered on, and the power-on time of each circuit module may be different, and the first circuit module of the circuit board is taken as an example for description.
The power-on stage of the first circuit module is a time interval formed by the initial power-on time of the first circuit module and the normal power-on time of the first circuit module, the initial power-on time is the moment when the first circuit module starts to be powered on, and the normal power-on time is the moment when the first circuit module finishes the power-on process and enters the normal power-on stage. The method comprises the steps that a first circuit module is known to be powered on after a certain period of time passes after a circuit board is powered on, so that the initial power-on time and the normal power-on time of the first circuit module are both related to the inlet power-on time of the circuit board, the inlet power-on time of each time of power-on of the circuit board changes, based on the change, the voltage monitoring device obtains power-on stage information of the first circuit module related to the power-on stage of the first circuit module through voltage monitoring, and the power-on stage of the first circuit module can be specifically determined when the circuit board is powered on each time according to the power-on stage information of the first circuit module and the inlet power-on time of the circuit board during each.
And step 120, powering down and powering up the circuit board in the power-up stage of the first circuit module according to the power-up stage information of the first circuit module.
In this embodiment, the test system includes a power analysis device, where the power analysis device is configured to control the circuit board to be powered on and power down the circuit board in a power-up stage of the first circuit module, so as to perform a power-up and power-down burn-in test of the circuit board. Specifically, after the power analysis device controls the circuit board to perform the current power-on, the power-on stage of the first circuit module when the circuit board is powered on is determined according to the power-on stage information of the first circuit module, and the circuit board is controlled to be powered off when the first circuit module is detected to be in the power-on stage. Given that the aging test needs repeated tests, the power analysis device can continuously perform over 1000 times of power-on and power-off aging tests on the circuit board according to step 120, so as to detect whether the circuit board can be normally powered on, and realize the pressure aging reliability test of the circuit board.
In this embodiment, the power analysis apparatus selects to power down the circuit board in the power-up stage of the first circuit module, and the corresponding first circuit module is also powered off in the power-up stage, so that the power-off voltage pulse may damage the first circuit module. After a plurality of times of power-on and power-off tests, the power-off damage aging degree of the first circuit module can be detected, and the anti-interference capability of the first circuit module on the power-off voltage pulse is realized.
It should be noted that, for a circuit board, the power-on stage information of different circuit modules may be different, so that the power-on stage information of each circuit module to be tested of the circuit board needs to be obtained in advance, and then the power-on and power-off aging test is performed. It can be understood by those skilled in the art that the first circuit module may be any functional module on the circuit board, such as an MCU, or any electronic device on the circuit board, such as a MOSFET, and the first circuit module is not specifically limited in the present invention.
The test method provided in this embodiment first determines the power-on stage information of the first circuit module of the circuit board, and then powers down and powers up the circuit board at the power-on stage of the first circuit module according to the power-on stage information of the first circuit module to perform an aging test. In the embodiment, whether the circuit board can be normally electrified or not is detected after continuous and repeated power-on and power-off tests, so that the pressure aging reliability test of the circuit board is realized; the voltage pulse of outage probably causes the damage to the first circuit module of being electrified, detects the outage damage ageing degree of first circuit module after test of going up and down electricity many times in succession, has detected the interference killing feature of first circuit module to the voltage pulse of outage, can go deep into the hardware circuit of detection circuit board from this, has solved the problem that the hardware circuit of PCBA can't go deep to detect in the current test of going up and down electricity.
The power-on phase information of the optional first circuit module at least comprises: the set power-on time difference Tdel of the first circuit module and the set power-on time length Trise of the first circuit module; the power-on phase of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the power-on time of the inlet of the circuit board.
The set power-on time difference Tdel is a difference value of the initial power-on time of the first circuit module and the inlet power-on time of the circuit board, which is obtained through pre-calculation, and the inlet power-on time of the circuit board is the initial power-on time of the first circuit module after the time length of Tedl. The inlet power-on time of the circuit board is different when the circuit board is powered on each time, and the relationship between the initial power-on time of the first circuit module and the inlet power-on time of the circuit board is represented by the set power-on time difference Tdel, so that the initial power-on time of the first circuit module, namely Tdq + Tdel, can be conveniently determined when the circuit board is powered on each time. The set power-on time duration Trise is the power-on time length of the first circuit module obtained through pre-calculation, and the initial power-on time of the first circuit module plus the set power-on time duration Trise is the normal power-on time of the first circuit module, namely Tdq + Tdel + Trise.
Correspondingly, the power-on phase of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the power-on time of the inlet of the circuit board. It should be noted that, at the time of Tdq + Tdel, the first circuit module starts to be powered on, and at the time of Tdq + Tdel + Trise, the first circuit module ends to be powered on, and at the two power-on nodes, the interference of the power-off voltage pulse to the first circuit module is small, so it is preferable to perform the anti-interference test of the power-off voltage pulse of the first circuit module with (Tdq + Tdel, Tdq + Tdel + Trise) as an interval.
Optionally determining power-up stage information of a first circuit module of the circuit board comprises: step one, controlling a circuit board to be continuously electrified up and down for n times, and acquiring inlet electrifying time of the circuit board, initial electrifying time of a first circuit module and electrifying time length of the first circuit module during each electrifying, wherein n is a positive integer and is greater than or equal to 5; and step two, determining the calculated average value of the difference value of the electrifying time between the inlet electrifying time of the circuit board and the initial electrifying time of the first circuit module as the set electrifying time difference of the first circuit module, and determining the calculated average value of the electrifying time length of the first circuit module as the set electrifying time length of the first circuit module. The optional voltage monitoring device is an oscilloscope, and the power supply analysis device is a high-precision direct-current power supply analyzer.
In this embodiment, given that the inlet voltage of the circuit board is Vo and the module voltage of the first circuit module is Vi, the high-precision dc power analyzer controls to supply power to the circuit board Vo, and the circuit board converts Vo to provide the module voltage Vi for the first circuit module.
Two detection channels of the oscilloscope are respectively monitoredThe high-precision direct-current power supply analyzer is connected with the inlet of the circuit board and controls power supply Vo to the circuit board. High-precision direct-current power supply analyzer for reading inlet voltage time T of circuit board monitored by oscilloscopeVoAnd a starting power-on time T of the first circuit moduleViAnd the normal power-on time of the first circuit module, and calculating the power-on time difference TVi-TVoThe power-on time is equal to the normal power-on time-TVi. And then controlling the circuit board to be powered down.
And optionally n is 10, continuously testing for at least 10 times to obtain at least 10 power-on time difference values, and removing the maximum value and the minimum value to obtain an average value, namely the set power-on time difference Tdel of the first circuit module. Meanwhile, at least 10 power-on time length values are obtained, the maximum value and the minimum value are removed, and an average value is obtained, namely the set power-on time length Trise of the first circuit module.
The specific execution process of powering down the circuit board in the power-up stage of the first circuit module may be: the circuit board is powered down at a power-up node Tdq + Tdel +0.5 × Trise of the first circuit module. Through multiple practices, the power is cut off at the power-on node Tdel +0.5 Trise in the power-on stage of the first circuit module, the interference of the power-off voltage pulse on the first circuit module is the largest, and the Tdel +0.5 Trise is used as the power-off node of the circuit board, so that the anti-interference capability of the first circuit module on the power-off voltage pulse can be effectively detected, and the detection accuracy is improved.
An embodiment of the present invention further provides a test system, as shown in fig. 2, the test system includes: a circuit board 10, a voltage monitoring device 20 and a power analysis device 30; the voltage monitoring device 20 is used for determining the power-on stage information of the first circuit module of the circuit board 10; the power analysis device 30 is configured to power down and power up the circuit board 10 at the power-up stage of the first circuit module according to the power-up stage information of the first circuit module.
The power-on phase information of the optional first circuit module at least comprises: the set power-on time difference Tdel of the first circuit module and the set power-on time length Trise of the first circuit module; the power-on phase of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the power-on time of the inlet of the circuit board.
The optional voltage monitoring device 20 includes: the power-on control module is used for controlling the circuit board 10 to be powered on and off for n times continuously, and acquiring the inlet power-on time of the circuit board, the initial power-on time of the first circuit module and the power-on time length of the first circuit module during each power-on, wherein n is a positive integer and is greater than or equal to 5; and the power-on calculation module is used for determining the calculated average value of the power-on time difference between the inlet power-on time of the circuit board 10 and the initial power-on time of the first circuit module as the set power-on time difference of the first circuit module, and determining the calculated average value of the power-on time length of the first circuit module as the set power-on time length of the first circuit module.
The optional power source analysis device 30 is specifically configured to power down the circuit board at the power-up node Tdq + Tdel +0.5 × Trise of the first circuit module.
The optional voltage monitoring device 20 is an oscilloscope, and the power supply analysis device 30 is a high-precision direct-current power supply analyzer.
The test system provided by the embodiment can be applied to the pressure aging test of the PCBA single board, and is suitable for further testing the internal circuit of the PCBA to find problems and improve the product quality. Specifically, in this embodiment, the high-precision dc power supply analyzer can be used to quickly control the circuit board to be powered on (within 1 μ s, for example), and the module voltage of the circuit module to be detected is selected, and through multiple tests, the set power-on time duration Trise and the set power-on time difference Tdel of each circuit module to be detected can be obtained. And after the direct-current power supply analyzer acquires the Trise and the Tdel of each circuit module, performing power-on and power-off tests, specifically, the direct-current power supply analyzer powers on the circuit board, controls the circuit board to be powered off after the time length of Tdel-Tdel + Trise, continuously performs power-on and power-off tests for 1000 times, detects whether the circuit board can be normally powered on, and realizes the reliability of the pressure test hardware PCBA single board.
In this embodiment, the power-on and power-off test of the circuit board is performed based on the power-on timing sequence of the first circuit module, so that on one hand, the interference resistance of each circuit module of the circuit board and an internal electronic device (such as MosFet) to a power-off voltage pulse is detected more deeply, and meanwhile, the high-quality pressure aging reliability test of the hardware single board is also increased.
Taking the power-up timing diagram of the circuit module shown in fig. 3 as an example, VCC _12V is the inlet voltage of the circuit board, and VCC _5V and VCC _3V are the voltages of the circuit module and the electronic devices therein, respectively. The point S represents that the 12V voltage is successfully electrified, T1 is the electrification time difference between VCC _12V and VCC _5V, T2 is the rising edge duration of the VCC _5V electrification, T3 is the electrification time difference between VCC _5V and VCC _3V, and T4 is the rising edge duration of the VCC _3V electrification.
According to the test method, the power-off operation can be carried out when VCC _5V or VCC _3V is powered on, ① 12V is powered on, 12V is controlled to be powered off when VCC _5V is powered on, namely the power-off is carried out at the T2 stage, namely the power-off is carried out after the T1+0.5T2 time, the power-on is carried out again, whether power-on abnormity occurs is observed, the power-off pulse anti-interference capability of a module or a device corresponding to VCC _5V can also be detected, ② 12V is powered on, 12V is controlled to be powered off at the VCC _3V power-on, namely the power-off is carried out at the T4 stage, namely the power-off is carried out after the power-off is carried out at T1+ T2+ T3+0.5T4 time, the power-on.
It should be noted that the oscilloscope may be used to monitor voltage, the dc power analyzer may power up and power down the circuit board, and the testing device may be used to calculate the power-up stage information of the first circuit module and determine the power-up stage, and also used to trigger the dc power analyzer to power up and power down. The testing device can stand alone or be integrated in other devices.
Obviously, the test system can detect the problem of the hardware circuit more deeply, and can also quickly locate the cause of the problem, such as a specific problem-occurring device or circuit module, if the circuit board has the problem.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (9)
1. A test method of a test system, wherein the test system is used for burn-in testing a circuit board, the test method comprising:
determining power-on stage information of a first circuit module of the circuit board;
and powering down and powering up the circuit board at the power-up stage of the first circuit module according to the power-up stage information of the first circuit module.
2. The test method of claim 1, wherein the power-up phase information of the first circuit module comprises at least: the set power-on time difference Tdel of the first circuit module and the set power-on time length Trise of the first circuit module;
the power-on stage of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the inlet power-on time of the circuit board.
3. The testing method of claim 2, wherein the determining power-up phase information for a first circuit module of the circuit board comprises:
controlling the circuit board to be continuously powered up and down for n times, and acquiring the inlet power-on time of the circuit board, the initial power-on time of the first circuit module and the power-on time length of the first circuit module during each power-on, wherein n is a positive integer and is greater than or equal to 5;
and determining the calculated average value of the difference value of the electrifying time between the inlet electrifying time of the circuit board and the initial electrifying time of the first circuit module as the set electrifying time difference of the first circuit module, and determining the calculated average value of the electrifying time length of the first circuit module as the set electrifying time length of the first circuit module.
4. The test method according to claim 2, wherein the specific execution process of powering down the circuit board in the power-up stage of the first circuit module is as follows: powering down the circuit board at a power-up node Tdq + Tdel +0.5 × Trise of the first circuit module.
5. A test system, characterized in that the test system comprises: the device comprises a circuit board, a voltage monitoring device and a power supply analysis device;
the voltage monitoring device is used for determining power-on stage information of a first circuit module of the circuit board;
the power analysis device is used for powering down and powering up the circuit board at the power-up stage of the first circuit module according to the power-up stage information of the first circuit module.
6. The test system of claim 5, wherein the power-up phase information of the first circuit module comprises at least: the set power-on time difference Tdel of the first circuit module and the set power-on time length Trise of the first circuit module;
the power-on stage of the first circuit module is as follows: (Tdq + Tdel, Tdq + Tdel + Trise), wherein Tdq is the inlet power-on time of the circuit board.
7. The test system of claim 6, wherein the voltage monitoring device comprises:
the power-on control module is used for controlling the circuit board to be powered on and off for n times continuously, and acquiring the inlet power-on time of the circuit board, the initial power-on time of the first circuit module and the power-on time length of the first circuit module during each power-on, wherein n is a positive integer and is greater than or equal to 5;
and the power-on calculation module is used for determining the calculated average value of the power-on time difference between the entrance power-on time of the circuit board and the initial power-on time of the first circuit module as the set power-on time difference of the first circuit module, and determining the calculated average value of the power-on time length of the first circuit module as the set power-on time length of the first circuit module.
8. The test system according to claim 6, wherein the power analysis device is specifically configured to power down the circuit board at a power-up node Tdq + Tdel +0.5 × Trise of the first circuit module.
9. The test system of claim 5, wherein the voltage monitoring device is an oscilloscope and the power supply analysis device is a high-precision DC power supply analyzer.
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Application publication date: 20200707 |