JP2005087768A5 - - Google Patents

Description

Game machine

  The present invention relates to gaming machines represented by pachinko machines and slot machines.

For example, pachinko machine games are controlled mainly by the main control board. The main control board includes a payout control board that performs payout control of prize balls and rental balls, a sound effect control board that performs output control of sound effects, and a display control board that performs display control such as symbol variation display. It is connected. The control of each control board is performed by a command transmitted from the main control board to each control board in one direction.

However, the time required for the start-up process performed on the plurality of substrates described above when the power is turned on differs for each substrate depending on the devices connected to each substrate, so it is difficult to start control smoothly when the power is turned on. There was a problem.

The present invention has been made to solve the above-described problems, and an object thereof is to provide a gaming machine capable of smoothly starting control when power is turned on .

In order to achieve this object, a gaming machine according to claim 1 includes a main control means for controlling a game and a sub-control for controlling an electric device connected based on a command output from the main control means. Control means, wherein the main control means is a main startup process that is executed when power is turned on, a command transmission process that outputs a predetermined control command to the sub-control means, and a plurality of A main normal process for repeatedly executing the process, and the sub-control unit executes a sub-startup process that is executed when power is turned on and until the predetermined control command is input from the main control unit A standby process for waiting for a transition to a predetermined process and a sub-normal process for repeatedly executing a plurality of processes, wherein the main control means performs the main startup process when the power is turned on. Execute the main startup After executing the command, the command transmission process is executed to shift to the main normal process, and the sub-control unit executes the sub-startup process when the power is turned on, and the sub-startup process The standby process is executed after execution of the process, and when the predetermined control command is input from the main control means during the execution of the standby process, the standby process is terminated and the process proceeds to the sub normal process. .
The gaming machine according to claim 2 is the gaming machine according to claim 1, wherein the sub control means is a payout control means, and the electrical device connected to the payout control means is at least a payout motor for a game ball. The payout control means controls the payout motor in the sub normal process .
The gaming machine according to claim 3 is the gaming machine according to claim 1 or 2, wherein the gaming machine is a pachinko gaming machine .

According to the gaming machine of the present invention, in the main control means for controlling the game, when the power is turned on, the main startup process is executed. A command transmission process for outputting a control command is executed, and then a plurality of processes are repeatedly executed by the main normal process. The sub-control means for controlling the connected electrical device based on the command output from the main control means executes the sub-startup process when the power is turned on. After the execution of the process, a standby process for waiting for the transition to the predetermined process is executed until a predetermined control command is input from the main control means, and after the predetermined control command is input during the execution of the standby process, A plurality of processes are repeatedly executed by the sub-normal process. Therefore, the main control means outputs a predetermined control command after executing the main start-up process and executes the main normal process, and the sub-control means receives the predetermined control command after executing the sub-startup process. Subnormal processing is executed later. Therefore, since the sub normal process of the sub control unit is executed in the state where the main normal process of the main control unit is executed, there is an effect that the control can be started smoothly when the power is turned on.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. In this embodiment, a pachinko machine that is a kind of a ball game machine, in particular, a first type pachinko game machine will be described as an example of the game machine. Of course, the present invention can be used for other gaming machines such as a third-class pachinko gaming machine, a coin gaming machine, and a slot machine.

  FIG. 1 is a front view of a game board of a pachinko machine P according to the present embodiment. Around the game board 1, there are provided a plurality of winning holes 2 through which five to fifteen balls are paid out when a ball wins. In the center of the game board 1, a liquid crystal (LCD) display 3 for displaying symbols as a plurality of types of identification information is provided. The display screen of the LCD display 3 is divided into three in the horizontal direction. In each of the three divided display areas, the symbols are displayed in a variable manner while scrolling from right to left in the horizontal direction.

  Below the LCD display 3, a symbol operating port (first type starting port) 4 is provided, and when the sphere passes through the symbol operating port 4, the above-described variation display of the LCD display 3 is started. Below the symbol operating port 4, a specific winning port (large winning port) 5 is provided. The specific winning opening 5 is a predetermined time (for example, 30 seconds) so that the ball is a big hit and the ball is easy to win when the display result after the fluctuation of the LCD display 3 matches one of the predetermined symbol combinations. Open until seconds have passed or 10 balls have been won).

  A V zone 5a is provided in the specific winning opening 5, and when the ball passes through the V zone 5a while the specific winning opening 5 is opened, a continuation right is established and the specific winning opening 5 is closed. Thereafter, the specific winning opening 5 is opened again for a predetermined time (or until a predetermined number of balls win the specific winning opening 5). The opening / closing operation of the specific winning opening 5 can be repeated up to 16 times (16 rounds), and the state in which the opening / closing operation can be performed is a state in which a predetermined game value is given (special game state). is there.

  FIG. 2 is a block diagram showing the electrical configuration of the pachinko machine P, and in particular, a main control board C that controls the game contents of the pachinko machine P, and a payout control board that performs payout control of prize balls and rental balls. It is the block diagram which showed the electric constitution with H.

  The main control board C of the pachinko machine P includes an MPU 11 that is an arithmetic device, a ROM 12 that stores various control programs executed by the MPU 11 and fixed value data, and a RAM 13 that is used as a work memory. Yes. The programs shown in the flowcharts of FIGS. 3 to 5 are stored in the ROM 12 as a part of the control program. The RAM 13 is provided with a prize ball buffer 13a, a prize ball pointer 13b, a remaining prize ball number counter 13c, a power failure flag 13d, and a backup area 13e, and a backup rechargeable battery 13x is connected for backup. It is configured to be possible. With the backup battery 13x, each value in the RAM 13 is retained (backed up) even when the power of the pachinko machine P is turned off.

  The winning ball buffer 13a is a buffer for storing the number of winning balls to be paid out when a ball that has been driven into the game area 1 wins the normal winning slot 2 or the like. Since the number of winning balls to be paid out is stored in the winning ball buffer 13a for each winning ball, the winning ball buffer 13a is composed of a plurality of bytes. When the prize ball data stored in the prize ball buffer 13a is transmitted to the payout control board H as a prize ball command, it is erased from the prize ball buffer 13a. Specifically, after the number of prize balls stored in the 0th prize ball buffer 13a is transmitted to the payout control board H, the values of the 1st and later prize ball buffers 13a are sequentially shifted to the smaller address side by 1 byte. As a result, the value of the 0th prize ball buffer 13a is erased.

  Here, the prize ball command is a command for instructing the payout control board H of the number of prize balls to be paid out, and is composed of 2 bytes. The first byte data of the prize ball command is data (for example, “A0H”) indicating that the command is a prize ball command, and the second byte data indicates the number of prize balls to be paid out. The data is shown. Since the maximum number of winning balls for one winning is 15 balls, 15 types of data “01H” to “0FH” corresponding to the maximum number of winning balls are used as the second byte data of the winning ball command. Yes.

  The prize ball command may be composed of 1 byte. As described above, since the maximum number of winning balls for one winning is 15 balls, when the winning ball command is composed of 1 byte, “01H” to “0FH” corresponding to the maximum winning ball number. Fifteen types of data are used as prize ball commands. In other words, when the upper 4 bits of a command composed of 1 byte are “0”, a winning ball command is set.

  The prize ball pointer 13b is a pointer indicating the position of the prize ball buffer 13a for storing the number of prize balls, and the number of prize balls to be paid out is stored in the value-th prize ball buffer 13a of the prize ball pointer 13b. The value of the prize ball pointer 13b is incremented by "1" by writing the number of prize balls in the prize ball buffer 13a, and conversely, the value of the 0th prize ball buffer 13a is transmitted to the payout control board H. “1” is subtracted.

  The remaining prize ball number counter 13c is a counter for storing the number of unpaid prize balls, and is a counter for managing the number of prize balls to be paid out by the payout control board H on the main control board C. Each time the main control board C instructs the payout control board H to pay out the prize ball, the value of the remaining prize ball counter 13c is incremented, and conversely, the payout control board H pays out the prize ball. Each time the award ball count switch 22 detects the paid-out prize ball, “1” is subtracted. The value of the remaining prize ball number counter 13c is also used as the second byte data of the prize ball payout permission command.

  Here, the winning ball payout permission command is a command transmitted from the main control board C to the payout control board H at the end of the startup process of the main control board C when the backup is valid. This prize ball payout permission command instructs the payout control board H after the start-up process to be permitted to pay out prize balls. The prize ball payout permission command is composed of 2 bytes. The first byte data is data (for example, “A1H”) indicating that the command is a prize ball payout permission command, and the second byte data is data indicating the number of unpaid prize balls. It is said that. Specifically, the value of the remaining winning ball number counter 13c is set as the second byte data.

  When the payout control board H receives the prize ball payout permission command, it reads out the second byte of data, writes it into the remaining prize ball number counter 33a, and calculates the number of unpaid prize balls before paying out the prize ball. The value of the remaining prize ball number counter 33a to be stored is matched with the remaining prize ball number counter 13c of the main control board C. Therefore, a prize ball over error that occurs when a prize ball is paid out exceeding the value of the remaining prize ball counter 13c stored in the main control board C, or a prize ball is paid out on the main control board C. It is possible to suppress the occurrence of a prize ball under error that occurs when the value of the remaining prize ball counter 13c stored is less than the value, and the game state can be smoothly restored after the power failure is eliminated.

  The prize ball payout permission command may be composed of 1 byte as in the case of the prize ball command. In this case, the value of the remaining prize ball counter 13c of the main control board C is not set as the value of the prize ball payout permission command. Therefore, in the start-up process after backup, the main control board C and the payout control board H The remaining ball counters 13c and 33a cannot be matched. Further, the main control board C is configured to transmit a command indicating the state of the pachinko machine P to the payout control board H after the start-up process is completed, instead of the prize ball payout permission command. Then, it may be configured to wait for the payout of the winning ball until a command transmitted from the main control board C is received. The state of the pachinko machine P is not necessarily the same before the power is turned off and after the power is turned on. Despite the fact that prize balls can be paid out before the power is turned off, after the power is turned on again, for example, there are not enough tank balls to store the prize balls to be paid out. In that case, the prize ball cannot be paid out. Therefore, after starting up the main control board C, a command indicating the state of the pachinko machine P is transmitted to the payout control board H, and the payout control board H pays out the winning ball only after receiving the command. It is configured not to be able to. Some commands indicating the state of the pachinko machine P stop the payout of the prize ball, so if the state of the pachinko machine P after the power is turned on cannot pay out the prize ball, A command for stopping the payout of the prize ball is transmitted, and the payout of the prize ball by the payout control board H is further waited.

  The power failure flag 13d is a flag for reporting a power failure due to the occurrence of a power failure or the like. When a power failure or the like occurs and the power is cut off, a power failure signal 51 is output from a power failure monitoring circuit 50 described later to an NMI (Non Maskable Interrupt) terminal (non-maskable interrupt terminal) of the MPU 11. Then, the MPU 11 executes the NMI (non-maskable) interrupt process shown in FIG. 3, and the power failure flag 13d is turned on. When the power failure flag 13d is turned on, a power failure process for saving each data indicating the game state is executed by the main process of the main control board C (see FIG. 4) (S20 to S24). Since the power failure flag 13d once turned on by the NMI interrupt processing is turned off by power failure processing (S21), the start-up processing after the power failure is resolved can be started with the power failure flag 13d turned off. it can.

  In the backup area 13e, when the power is cut off due to the occurrence of a power failure or the like, the power of the pachinko machine P is restored to the state before the power is turned off when the power is turned on again. This is an area for storing stack pointers, values of registers, I / O, and the like. The writing to the backup area 13e is executed in the power failure process when the power failure flag 13d is on (when the power is cut off) (see S22 to S24 in FIG. 4), and each value written to the backup area 13e is reversed. Is performed in the initialization process at the time of power-on (including power-on due to power failure cancellation, the same applies hereinafter) (see S14 and S15 in FIG. 4).

  The MPU 11, ROM 12, and RAM 13 are connected to each other via a bus line 14 constituted by an address bus and a data bus. The bus line 14 is also connected to the input / output port 15. The input / output port 15 is connected to the payout control board H via buffers (inverter gates) 16 and 37 whose inputs and outputs are fixed, a plurality of normal winning switches 17, a first type start port switch 18, and the like. The V count switch 19, 10 count switch 20, prize ball count switch 22, clear switch 23, and other input / output device 25 are connected to each other.

  The normal winning switch 17 is a switch for detecting each of the balls that have won the plurality of normal winning ports 2 in the game area 1, and is provided near the entrance of each of the normal winning ports 2. The first type starting port switch 18 is a switch for detecting a sphere that has passed through the symbol operating port (first type starting port) 4, and is provided in the vicinity of the symbol operating port 4. When a ball is detected by any one of the normal winning switches 17 or the first type start port switch 18, six payout balls are paid out by the payout control board H.

  The V count switch 19 is a switch for detecting a ball won in the V zone 5 a in the specific winning opening 5, and the 10 count switch 20 is a ball won in a place other than the V zone 5 a in the specific winning opening 5. It is a switch for detecting. When a ball is detected by the V count switch 19 or the 10 count switch 20, 15 prize balls are paid out by the payout control board H.

  The prize ball count switch 22 is a switch for detecting a prize ball paid out by the prize ball payout motor 21 and is mounted in the prize ball payout unit S together with the prize ball payout motor 21. The winning ball payout motor 21 is a motor for paying out a winning ball, and the driving of the winning ball payout motor 21 is controlled by a payout control board H.

  The clear switch 23 is a switch for clearing data backed up in the RAMs 13 and 33 of the main control board C and the payout control board H, and is configured as a push button type switch. When the power of the pachinko machine P is turned on while the clear switch 23 is pressed (including power-on due to power failure cancellation), the data in the RAMs 13 and 33 are cleared by the main control board C and the payout control board H, respectively. (See S7: Yes, S10 in FIG. 4, S73: Yes, S76 in FIG. 7).

  As described above, the main control board C is connected to the payout control board H via the buffers (inverter gates) 16 and 37 whose inputs and outputs are fixed. Therefore, transmission / reception of a prize ball command or the like between the main control board C and the payout control board H is performed only in one direction from the main control board C to the payout control board H, and the payout control board H to the main control board C. Can not be done. The main control board C and the payout control board H are connected by eight data lines and one strobe line, and when the data on the strobe line becomes active, the data is output onto the eight data lines. The transmitted data is transmitted from the main control board C to the payout control board H as a command.

  The payout control board H performs payout control of prize balls and lending balls, and is used as an MPU 31, which is an arithmetic unit, a ROM 32 storing a control program executed by the MPU 31, fixed value data, and a work memory. The RAM 33 is provided. 3 and 6 to 8 are stored in the ROM 32 as a part of the control program.

  The RAM 33 of the payout control board H is provided with a remaining prize ball counter 33a, an initialization flag 33b, a prize ball payout permission flag 33c, a power failure flag 33d, and a backup area 33e, and a rechargeable battery for backup. 33x is connected and configured to be backed up. Each value in the RAM 33 is retained (backed up) by the backup rechargeable battery 33x even when the power of the pachinko machine P is cut off.

  The remaining prize ball number counter 33a is a counter that stores the number of unpaid prize balls in the same manner as the remaining prize ball number counter 13c of the main control board C described above. The value of the remaining prize ball number counter 33a is incremented every time the prize ball is instructed from the main control board C to the payout control board H by the prize ball command. Conversely, every time the prize ball count switch 22 detects the paid out prize ball, “1” is subtracted. The payout control board H operates the award ball payout motor 21 to pay out the award balls until the value of the remaining award ball number counter 33a reaches “0”. Since the value of the counter 33a is backed up by the rechargeable battery 33x, even when the power of the pachinko machine P is cut off during the payout of the winning ball, the payout control board H is turned on by turning on the power of the pachinko machine P again. Can pay out the remaining prize balls (unpaid prize balls) accurately.

  The initialization flag 33b is a flag that is turned on when the dispensing control board H receives an initialization command transmitted from the main control board C. The initialization command is a command that is transmitted when the backup data is cleared in the startup process of the main control board C (see S12 in FIG. 4). This is a command for giving a payout permission. Upon receiving this initialization command, the payout control board H turns on the initialization flag 33b. If the initialization process (S76) has already been completed in the payout control board H, the payout control board H turns off the initialization flag 33b. (S80), the process proceeds to each process (S89), and a state in which a prize ball can be paid out is set. On the other hand, when the initialization command is received in the state where the data backup is effectively performed in the payout control board H, the initialization process (S87) is executed in accordance with the main control board C, and then each process is performed. The process proceeds to the processing (S89) to make it possible to pay out a prize ball. In this case, the initialization flag 33b once turned on is turned off by the initialization process of S87.

  The prize ball payout permission flag 33c is a flag that is turned on when the payout control board H receives a prize ball payout permission command transmitted from the main control board C, and is used to instruct permission for payout of prize balls. Flag. As described above, when receiving the prize ball payout permission command, the payout control board H turns on the prize ball payout permission flag 33c in order to store the prize ball payout permission (S65) and 2 bytes of the prize ball payout permission command. The eye data is written to the remaining winning ball counter 33a (S64), and the value of the remaining winning ball counter 33a is made to coincide with the value of the remaining winning ball counter 13c of the main control board C. When the prize ball payout permission flag 33c is turned on, the payout control board H ends the start-up process, and after turning off the prize ball payout permission flag 33c (S80, S87), the process goes to each process (S89). Transition to a state where award balls can be paid out.

  Similarly to the power failure flag 13d of the main control board C described above, the power failure flag 33d is a flag for reporting a power failure due to the occurrence of a power failure or the like. When a power failure or the like occurs and the power is cut off, a power failure signal 51 is output from a power failure monitoring circuit 50 described later to an NMI (Non Maskable Interrupt) terminal (non-maskable interrupt terminal) of the MPU 31 of the payout control board H. Then, the MPU 31 executes an NMI (non-maskable) interrupt process shown in FIG. 3, and the power failure flag 33d is turned on. When the power failure flag 33d is turned on, the main process (see FIG. 7) of the payout control board H executes a power failure process for saving each data indicating the payout state (S90 to S94). Since the power failure flag 33d once turned on by the NMI interruption processing is turned off by the power failure processing (S91), the start-up processing of the payout control board H after the power failure is resolved is in a state where the power failure flag 33d is turned off. You can start with.

  As with the backup area 13e of the main control board C described above, when the power is cut off due to a power failure or the like, the backup area 33e returns the state of the pachinko machine P to the state before the power is turned off when the power is turned on again. Therefore, it is an area for storing a stack pointer at the time of power-off (including when a power failure occurs, the same applies hereinafter), values of registers, I / O, and the like. The writing to the backup area 33e is executed in the power failure process when the power failure flag 33d is on (when the power is cut off) (see S92 to S94 in FIG. 7), and each value written to the backup area 33e is reversed. Is executed in the initialization process at the time of power-on (including power-on due to power failure cancellation, the same applies hereinafter) (see S82 and S83 in FIG. 7).

  The MPU 31, ROM 32, and RAM 33 are connected to each other by a bus line 35 that includes an address bus and a data bus. The bus line 35 is also connected to an input / output port 36. The input / output port 36 is connected to the main control board C via the buffers (inverter gates) 16 and 37 whose inputs and outputs described above are fixed, as well as the prize ball payout motor 21 and the prize of the prize ball payout unit S. The ball count switch 22, the clear switch 23, and other input / output devices 40 are respectively connected.

  The power failure monitoring circuit 50 is a circuit for outputting a power failure signal 51 to the NMI terminals of the MPUs 11 and 31 of the main control board C and the payout control board H when the power is cut off due to the occurrence of a power failure or the like. This power failure monitoring circuit 50 is mounted on a power supply unit (not shown), and monitors the voltage of DC stable 24 volts, which is the largest voltage output from the power supply unit, and this voltage becomes less than 22 volts. In the event of a power failure, it is determined that a power failure (power failure) has occurred, and a power failure signal 51 is output. Based on the output of the power failure signal 51, the main control board C and the payout control board H recognize the occurrence of the power failure and execute the power failure process (S20 to S24 in FIG. 4, S90 to S94 in FIG. 7). Note that the power supply unit has a sufficient time for execution of the power failure process even after the DC stable voltage of 24 volts is less than 22 volts (including a suitable execution timing waiting time for the power failure process), The main control board C and the payout control board H can normally execute the power outage process because the control system drive voltage of 5 volts is maintained at a normal value.

  Next, each process performed in the main control board C and the payout control board H will be described with reference to the flowcharts shown in FIGS. 3A is executed by the main control board C when the power failure monitoring circuit 50 outputs the power failure signal 51 due to the occurrence of a power failure or the like, and FIG. 3B is executed separately by the payout control board H. It is a flowchart of a NMI interruption process.

  First, in the NMI interrupt process of FIG. 3A executed by the main control board C, when an NMI interrupt occurs, the process at power failure from S21 to S24 (including the loop after the process of S24) (see FIG. 4). Is checked (S1). If the process from S21 to S24 is not being executed (S1: No), the power failure flag 13d is turned on (S2). Conversely, if it is being executed (S1: Yes), the process of S2 is skipped, and this The NMI interrupt process is terminated. Note that the process being executed when an NMI interrupt occurs is checked by checking the address saved in the stack when the NMI interrupt occurs.

  Similarly, in the NMI interrupt process of FIG. 3B executed by the payout control board H, when an NMI interrupt occurs, the process at the time of power failure from S91 to S94 (including the loop after the process of S94) (see FIG. 7). ) Is being executed (S3). If the processing from S91 to S94 is not being executed (S3: No), the power failure flag 33d is turned on (S4). Conversely, if it is being executed (S3: Yes), the processing of S4 is skipped, and this The NMI interrupt process is terminated.

  As described above, the power failure flags 13d and 33d are turned on only when the NMI interrupt processing is executed other than during the power failure processing (S21 to S24, S91 to S94). When the NMI interrupt processing is executed during the execution of the power failure, the power failure flags 13d and 33d are not turned on, so that the output of the power failure signal 51 from the power failure monitoring circuit 50 is disturbed and multiple NMI interrupt processing occurs. In addition, the pachinko machine P can be returned to normal after the power failure is resolved. This is because after the power failure flag 13d, 33d is turned off by the processing of S21 or S91, the power failure flag 13d, 33d is not turned on until the power is turned on by the recovery of the power failure and the processing of S5 or S71 is started. . That is, since the recovery process from S5 or S7 after the power failure is canceled can be started with the power failure flags 13d and 33 being turned off, the NMI interrupt processing is executed even though the power failure has not occurred. In spite of this, the power failure process (S20 to S24, S90 to S94) is not executed after the power is turned on.

  FIG. 4 is a flowchart of start-up processing executed on the main control board C when the pachinko machine P is turned on. In this process, if the backup is valid, each data stored in the backup area 13e is returned to the original state, and the game control is continued from the state before the power is turned off. On the other hand, if the backup is not valid, or if the clear switch 23 is pressed when the power is turned on even if the backup is valid, an initialization process is executed.

  First, interrupts are prohibited (S5), and then a temporary stack pointer is set so as not to destroy the data stacked in the original stack area (S6). It is confirmed whether or not the clear switch 23 is turned on (S7), and if it is turned on (S7: Yes), the process proceeds to S9 and the initialization process is executed. If the clear switch 23 is not turned on (S7: No), it is confirmed whether the backup is valid (S8). This confirmation is determined by whether or not the keyword written in a predetermined area of the RAM 13 is correctly stored. If the keyword is stored correctly, the backup is valid. On the other hand, if the keyword is not correct, the backup data is destroyed, so the backup is not valid. If the backup is valid (S8: Yes), the process proceeds to S14, and each state of the main control board C is returned to the state before the power is turned off. On the other hand, if the backup is not valid (S8: No), the process proceeds to S9 to execute the initialization process.

  In the initialization process from the process of S9, first, a normal stack pointer is set, the contents of the stack are arranged (S9), RAM clearing and initialization process are executed (S10), and the RAM 13 and I / O Initialize each value such as. Thereafter, the interruption is permitted (S11), an initialization command is transmitted to the payout control board H using the interrupt (S12), and the payout control board indicates that the initialization process has been executed on the main control board C. Tell H. Since the payout control board H is lighter in processing than the main control board C, the start-up process ends before the main control board C. Therefore, the payout control board H can reliably receive the initialization command transmitted from the main control board C. After transmitting the initialization command, the main control board C executes a wait process so that the payout control board H that has received the initialization command waits for a sufficient time to complete the initialization process (S13). , And wait for a predetermined time to shift to the next processing. After the execution of the wait process, the payout control board H is also surely started up, so the process proceeds to S18 and game control is started.

  In the return processing from S14, first, data such as each register and I / O saved in the backup area 13e is read from the backup area 13e, and these data are written to the original register and I / O (S14). . Further, the value of the stack pointer is read from the backup area 13e, written to the stack pointer, and returned to the state before the power is turned off (before the power failure) (S15). Thereafter, an interrupt is permitted (S16), the value of the remaining ball counter 13c is set as the second byte data of the winning ball payout permission command, and the winning ball payout permission command is set using the permitted interrupt. It transmits to the payout control board H (S17). When the payout control board H receives the prize ball payout permission command, the payout ball can be paid out. Thereafter, the process proceeds to S18, and the control of the game that was interrupted due to the power-off is continued from the state before the power-off by each process (S19) executed after the process of S18.

  In the process of S18, it is confirmed whether or not the power failure flag 13d is turned on (S18). If it is not turned on (S18: No), a power failure has not yet occurred. Each process is executed (S19), and the game of the pachinko machine P is controlled. Each control of the game of the pachinko machine P including the prize ball process shown in FIG. 5 is executed in each process (S19).

  In the process of S18, if the power failure flag 13d is turned on (S18: Yes), it means that the power has already been cut off due to the occurrence of a power failure or the like. Therefore, in such a case, interrupts are first prohibited (S20), and the progress of each interrupt process is stopped. Next, the power failure flag 13d is turned off (S21), and the value of the stack pointer is written to the backup area 13e (S22) in preparation for the recovery processing (S14, S15) after the power failure is eliminated. Are written in the backup area 13e (S23), and the state when the power is cut off due to the occurrence of a power failure or the like is stored. Further, another power failure process is executed (S24), and thereafter, the process is looped until the drive voltage of the control system decreases and the process cannot be executed.

  In this way, when the power is cut off due to the occurrence of a power failure, it is immediately recognized by the non-maskable interrupt (Fig. 3) that cannot be set to prohibit the interruption, and the occurrence of the power failure can be reported by the non-maskable interrupt. Only the power failure flag 13d is turned on. And the process at the time of a power failure (S20-S24) is comprised so that it may be performed in a main process (FIG. 4), when the power failure flag 13d is turned on. Therefore, the power outage process is not executed during the execution of each process (S19) for controlling the game of the pachinko machine P. That is, the power failure process can be executed at a suitable timing that does not interfere with other controls. Thereby, simplification of the control program and reduction in capacity can be realized.

  FIG. 5 is a flowchart of the winning ball process executed in each process (S19 in FIG. 4) of the main control board C. The winning ball process includes a winning detection process for detecting a winning ball in the normal winning slot 2, the first type starting port 4 or the big winning slot 5 (S30), and a winning ball command for transmitting a winning ball command to the payout control board H. The process consists of three processes: a transmission process (S40) and a prize ball detection process (S50) for detecting a prize ball paid out by the payout control board H.

  In the winning detection process (S30), first, it is confirmed whether or not a ball is detected by any of the normal winning switch 17 or the first type start port switch 18 (S31). When a ball is detected by any of the switches 17 and 18 (S31: Yes), “6” is set to the value-th prize ball buffer 13a of the prize ball pointer 13b in order to pay out six prize balls. Write (S32) and add "1" to the value of the prize ball pointer 13b (S33). On the other hand, when a sphere is not detected by any of the switches 17 and 18 (S31: No), the process of S32 and S33 is skipped and the process proceeds to S34.

  In the process of S34, it is confirmed whether or not a sphere is detected by the V count switch 19 or the 10 count switch 20 (S34). When a ball is detected by any of the switches 19 and 20 (S34: Yes), “15” is set to the value-th prize ball buffer 13a of the prize ball pointer 13b in order to pay out 15 prize balls. Write (S35), and add "1" to the value of the prize ball pointer 13b (S36). On the other hand, if a ball is not detected by any of the switches 19 and 20 (S34: No), the process of S35 and S36 is skipped, the winning detection process (S30) is terminated, and a prize ball command transmission process of S40 is performed. Migrate to

  In the prize ball command transmission process (S40), it is first checked whether or not the value of the prize ball pointer 13b is "0" (S41). If the value of the prize ball pointer 13b is not “0” (S41: No), it means that the prize ball data to be paid out is stored in the prize ball buffer 13a, and therefore the value of the 0th prize ball buffer 13a. Is set as the second byte data of the prize ball command, and the prize ball command is transmitted to the payout control board H (S42). After the prize ball command is transmitted, the value of the 0th prize ball buffer 13a, which is the prize ball number data transmitted by the prize ball command, is added to the remaining prize ball counter 13c (S43). Then, the value of the first and subsequent prize ball buffers 13a is shifted one byte at a time toward the smaller address side (S44), the value of the prize ball buffer 13a is updated, and the value of the transmitted 0th prize ball buffer 13a is updated. Further, “1” is subtracted from the value of the prize ball pointer 13b (S45). On the other hand, in the process of S41, if the value of the prize ball pointer 13b is “0” (S41: Yes), the data of the number of prize balls to be paid out is not stored in the prize ball buffer 13a. Each process is skipped, the prize ball command transmission process (S40) is terminated, and the process proceeds to a prize ball detection process of S50.

  In the prize ball detection process (S50), it is first determined whether or not the prize ball count switch 22 is turned on (S51). If it is detected that the prize ball count switch 22 is turned on (S51: Yes), it means that one prize ball has been paid out, so the value of the remaining prize ball counter 13c is confirmed (S52), If “0” is not “0” (S52: No), “1” is subtracted from the value of the remaining winning ball counter 13c corresponding to the paid-out winning ball (S53). On the other hand, if the turn-on of the winning ball count switch 22 is not detected (S51: No), the winning ball is not paid out, and even if the turning-on of the winning ball count switch 22 is detected, the remaining winning ball number counter If the value of 13c is “0” (S51: Yes, S52: Yes), the value of the remaining prize ball number counter 13c cannot be subtracted, so the process of S53 is skipped and a prize ball detection process (S50). ) Ends. Thereby, the prize ball processing of FIG. 5 ends.

  Next, each process performed on the payout control board H will be described with reference to FIGS. FIG. 6 is a flowchart of command reception processing executed in the interruption processing of the payout control board H. When the payout control board H receives a command transmitted from the main control board C, an interrupt is generated each time, and this command reception process is executed. Note that the interrupt for executing this command reception processing is not a non-maskable interrupt that cannot be set for interrupt prohibition, but an interrupt that can be set for interrupt prohibition.

  In the command reception process, first, it is determined whether or not the received command is an initialization command (S61). If the command is an initialization command (S61: Yes), the initialization flag 33b is turned on to store the reception of the initialization command (S62), and the command reception process is terminated. On the other hand, if the received command is not an initialization command (S61: No), it is determined whether or not the command is a prize ball payout permission command (S63). If the received command is a winning ball payout permission command (S63: Yes), a value indicated as the second byte data of the winning ball payout permission command is written to the remaining ball number counter 33a (S64). The value of the ball counter 33a is made to coincide with the value of the remaining prize ball counter 13c of the main control board C. Further, in order to store the reception of the winning ball payout permission command, the winning ball payout permission flag 33c is turned on (S65), and the command receiving process is terminated.

  If the received command is neither an initialization command nor a prize ball payout permission command (S61: No, S63: No), it is determined whether or not the command is a prize ball command (S66). If the received command is a prize ball command (S66: Yes), the number of prize balls designated as the second byte data of the prize ball command is added to the remaining prize ball number counter 33a (S67). End the process. On the other hand, if the received command is not a prize ball command (S66: No), processing according to the received command is executed (S68), and this command reception processing is terminated.

  FIG. 7 is a flowchart of start-up processing executed by the payout control board H when the pachinko machine P is powered on. In this process, if the backup is valid, each data stored in the backup area 33e is returned to the original state, and the prize ball payout control is continued from the state before the power is turned off. On the other hand, if the backup is not valid, or if the clear switch 23 is pressed when the power is turned on even if the backup is valid, an initialization process is executed.

  First, interrupts are prohibited (S71), and then a temporary stack pointer is set so as not to destroy the data stacked in the original stack area (S72). It is confirmed whether or not the clear switch 23 is turned on (S73). If it is turned on (S73: Yes), the process proceeds to S75, and the initialization process is executed. If the clear switch 23 is not turned on (S73: No), it is confirmed whether the backup is valid (S74). This confirmation is determined by whether or not the keyword written in the predetermined area of the RAM 33 is correctly stored. If the keyword is stored correctly, the backup is valid. On the other hand, if the keyword is not correct, the backup data is destroyed, so the backup is not valid. If the backup is valid (S74: Yes), the process proceeds to S82, and each state of the main control board C is returned to the state before the power is turned off. On the other hand, if the backup is not valid (S74: No), the process proceeds to S75 and the initialization process is executed.

  In the initialization process from the process of S75, first, a normal stack pointer is set, the contents of the stack are arranged (S75), RAM clearing and initialization process are executed (S76), and the RAM 33 and I / O Initialize each value such as. Thereafter, interrupts are permitted (S77), and the above-described command reception process of FIG. 6 can be executed. After permitting the interrupt, the process loops until either the initialization flag 33b or the prize ball payout permission flag 33c is turned on in order to wait for the prize ball payout permission from the main control board C (S78: No). , S79: No). If either the initialization flag 33b or the prize ball payout permission flag 33c is turned on (S78: Yes or S79: Yes), it means that the main control board C has given out the prize ball payout permission. Therefore, in such a case, in preparation for the next power-off, both the initialization flag 33b and the prize ball payout permission flag 33c are turned off (S80), and then the process proceeds to S88.

  In the return processing from S82, first, data of each register and I / O saved in the backup area 33e is read from the backup area 33e, and these data are written to the original register and I / O (S82). . Further, the value of the stack pointer is read from the backup area 33e and written to the stack pointer to return to the state before the power is turned off (before the power failure) (S83). Thereafter, the interrupt is permitted (S84), and the command reception process of FIG. 6 can be executed. After permitting the interruption, the process loops until either the initialization flag 33b or the prize ball payout permission flag 33c is turned on in order to wait for the prize ball payout permission from the main control board C (S85: No). , S86: No).

  If the winning ball payout permission flag 33c is turned on (S85: Yes), it means that the payout of the winning ball has been issued from the main control board C. Therefore, in such a case, in preparation for the next power-off, the prize ball payout permission flag 33c is turned off (S80), and then the process proceeds to S88. By each process (S89) executed after the process of S88, the control interrupted by the power-off is continued from the state before the power-off. As a result, the award ball can be paid out.

  On the other hand, if the initialization flag 33b is turned on (S85: No, S86: Yes), it means that the initialization command is transmitted from the main control board C. Therefore, in such a case, the RAM clearing and initialization process is executed (S87), the payout control board H is initialized, and then the process proceeds to S88. The prize ball payout process of FIG. 8 is executed in each process (S89) after the process of S88, so that the payout of the prize ball by the payout control board H waits until the initialization flag 33b is turned on. Will be.

  As described with reference to FIG. 4, the main control board C executes the wait process (S13) after transmitting the initialization command, and waits for the execution of the subsequent process for a predetermined time. A new command is not transmitted from the main control board C during the execution of the conversion process (S87). Therefore, the payout control board H can normally perform the payout control of the game even in such a case.

  In the process of S88, it is confirmed whether or not the power failure flag 33d is turned on (S88). If it is not turned on (S88: No), a power failure has not yet occurred. Each process is executed (S89), and payout control of prize balls or rental balls is performed. Each control of the payout control board H, including a prize ball payout process in FIG. 8 described later, is executed in each process (S89) except for the interrupt process.

  In the process of S88, if the power failure flag 33d is turned on (S88: Yes), this means that the power has already been cut off due to the occurrence of a power failure or the like. Therefore, in such a case, interrupts are first prohibited (S90), and the progress of each interrupt process is stopped. By prohibiting this interrupt, new execution of the command reception process of FIG. 6 is also prohibited. Next, the power failure flag 33d is turned off (S91), and the value of the stack pointer is written to the backup area 33e (S92) in preparation for the recovery processing (S82, S83) after the power failure is eliminated. Are written in the backup area 33e (S93), and the state when the power is cut off due to the occurrence of a power failure or the like is stored. Furthermore, another power failure process is executed (S94), and thereafter, the process is looped until the drive voltage of the control system decreases and the process cannot be executed.

  In this way, when the power is cut off due to the occurrence of a power failure, it is immediately recognized by the non-maskable interrupt (Fig. 3) that cannot be set to prohibit the interruption, and the occurrence of the power failure can be reported by the non-maskable interrupt. Only the power failure flag 33d is turned on. The power failure process (S90 to S94) is configured to be executed in the main process (FIG. 7) when the power failure flag 33d is turned on. Therefore, the power outage process is not executed during the execution of each process (S89) for performing the payout control of the winning ball or the rental ball. That is, the power failure process can be executed at a suitable timing that does not interfere with other controls, so that the control program can be simplified and the capacity can be reduced.

  FIG. 8 is a flowchart of the winning ball payout process executed in each process (S89) of the payout control board H. With the prize ball payout process, the prize balls are paid out and the prize balls that have been paid out are detected. In the prize ball payout process, first, the value of the remaining prize ball number counter 33a is checked (S101). If the value is not "0" (S101: No), an unpaid prize ball remains, so a prize ball is paid out. The motor 21 is driven to pay out one prize ball (S102). On the other hand, if the value of the remaining prize ball counter 33a is “0” (S101: Yes), there is no unpaid prize ball remaining, so the prize ball payout process in S102 is skipped.

  If the prize ball count switch 22 detects ON in the process of S103 (S103: Yes), it means that the prize ball has been paid out. Therefore, in such a case, the value of the remaining prize ball counter 33a is confirmed (S104), and if the value is not “0” (S104: No), the remaining prize ball corresponding to the paid-out prize ball. The value of the number counter 33a is decremented by “1” (S105), and this prize ball payout process is terminated. On the other hand, if the prize ball count switch 22 is not turned on (S103: No) or the prize ball count switch 22 is turned on (S103: Yes), the value of the remaining prize ball counter 33a is “0”. If so (S104: Yes), the process of S105 is skipped and this prize ball payout process is terminated.

  As described above, according to the pachinko machine P of the present embodiment, when the power is cut off due to the occurrence of a power failure or the like, the non-maskable interrupt (FIG. 3) in which the power cut cannot be prohibited is set immediately. Recognizing and only turning on the power failure flags 13d and 33d for reporting the occurrence of a power failure by the non-maskable interrupt. The power failure process (S20 to S24 in FIG. 4 and S90 to S94 in FIG. 7) is configured to be executed in the main process (FIGS. 4 and 7) when the power failure flags 13d and 33d are turned on. doing. Therefore, such a power failure process is not executed during the execution of each process (S19, S89). That is, the power failure process can be executed at a suitable timing that does not interfere with other controls, so that the control program can be simplified and the capacity can be reduced.

  Note that the power failure process (S20 to S24, S90 to S94) in FIGS. 4 and 7 may be executed in each process (S19, S89) at an appropriate timing.

  Next, a second embodiment will be described with reference to FIGS. In the first embodiment described above, the power failure signal 51 output from the power failure monitoring circuit 50 is input to the NMI interrupt terminals of the MPUs 11 and 31, respectively, and the power failure flags 13d and 33d are obtained by NMI interrupt processing (FIG. 3). When the power failure flag 13d, 33d is turned on, the power failure processing (S20 to S24, S90 to S94), which is a data saving process at the time of a power failure, is executed at a suitable timing of the main processing. I was trying to do it.

  On the other hand, in the second embodiment, the power failure signal 51 output from the power failure monitoring circuit 50 is input to the external interrupt terminals (INT interrupt terminals) of the MPUs 11 and 31 without using the NMI interrupt. The power interruption process (S201 to S204), which is a data saving process in the event of a power failure, is executed by an INT interrupt process (FIG. 9) that can be set to prohibit the interruption. Unlike NMI interrupts, INT interrupts can be set to prohibit interrupts, so if they are inappropriate for the execution of power failure processing, the interrupts are prohibited and the execution of the power failure processing is restricted. be able to. Therefore, since the power failure process can be executed at a suitable timing that does not interfere with other controls, the control program can be simplified and the capacity can be reduced.

  Note that if the power failure signal 51 output from the power failure monitoring circuit 50 is repeatedly turned on and off, in the case of an NMI interrupt, the prohibition of the interrupt cannot be set. Control may be hindered, such as over. However, in the case of an INT interrupt, since it is possible to prohibit the interruption, the occurrence of multiple interrupts can be prevented. Therefore, in the case of INT interrupt, a countermeasure program for multiple interrupts is not required, and the control program can be simplified and the capacity can be reduced accordingly.

  In the description of the second embodiment, the same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof is omitted.

  FIG. 9 is a flowchart of an INT interrupt process executed separately on the main control board C and the payout control board H when the power of the pachinko machine P is cut off due to the occurrence of a power failure or the like. By this INT interrupt processing, the states of the main control board C and the payout control board H when the power is cut off due to the occurrence of a power failure or the like are stored in the respective backup areas 13e and 33e. Note that the INT interrupt process is a process that is separately mounted on the ROM 12 of the main control board C and the ROM 32 of the payout control board H, but can be represented in the same way in the notation of the flowchart. Are summarized in the figure.

  When the power of the pachinko machine P is cut off due to the occurrence of a power failure or the like, a power failure signal 51 is output from the power failure monitoring circuit 50 to the INT interrupt terminals of the MPUs 11 and 31 of the main control board C and the payout control board H, respectively. When the power failure signal 51 is input to the INT interrupt terminal, each of the MPUs 11 and 31 immediately executes control when the interrupt is permitted and at a timing when the interrupt is prohibited. Is interrupted and the INT interrupt processing is started. Power is supplied from a power supply circuit (not shown) so that the main control board C and the payout control board H can be processed for a predetermined time after the power failure signal 51 is output, and the INT interrupt processing is performed within the predetermined time. Is executed.

  In the INT interrupt processing, first, interrupts are prohibited to prevent the occurrence of multiple interrupts (S201), and then the values of the stack pointers are written to the backup areas 13e and 33e (S202). And values such as I / O are written in the backup areas 13e and 33e (S203), and the state at the time of power failure due to the occurrence of a power failure or the like is stored. Thereafter, another power failure process that differs depending on the main control board C and the payout control board H is executed (S204), and thereafter, the process is looped until the power supply is completely cut off and the process cannot be executed. If an MPU whose interrupt is automatically prohibited by the occurrence of an INT interrupt is used, the interrupt prohibiting process in S201 is omitted.

  FIG. 10 is a flowchart of the start-up process of the second embodiment executed by the main control board C when the pachinko machine P is turned on. FIG. 11 shows the payout control board H when the pachinko machine P is turned on. It is a flowchart of the starting process of 2nd Example performed. In these processes, if the backup is valid, each data stored in the backup areas 13e and 33e is returned to the original state, and the control is continued from the state before the power is turned off. On the other hand, if the backup is not valid, or if the clear switch 23 is pressed when the power is turned on even if the backup is valid, an initialization process is executed. The details of the control are the same as those in the first embodiment described above, and a description thereof will be omitted. In the process of the main control board C in FIG. 10, each process (S19) which is the main process of the main control board C is executed after the processes of S13 and S17 are completed. In the process of the payout control board H in FIG. After the processes of S80 and S87, each process (S89) which is the main process of the payout control board H is executed.

  FIG. 12 is a flowchart of each process (S19, S89) executed separately in the main process of the main control board C and the payout control board H. Each process (S19, S89) is mounted separately on the ROM 12 of the main control board C and the ROM 32 of the payout control board H. However, as in the case of FIG. Since they can be expressed similarly, they are collectively shown in FIG.

  In each process (S19, S89), first, interrupts are prohibited (S211), and a process that cannot be executed during a power failure in S201 to S204 is executed (S212). After that, the interruption is permitted (S213), and a process capable of executing the power failure process in the middle of the process is executed (S214). Further, interrupts are prohibited (S215), and processing that cannot be executed during power failure is executed (S216). ... Then, interrupt is permitted (S217), and a process that can execute the process at the time of a power failure in the middle of the process is executed (S218).

  As described above, in each process (S19, S89), when executing a process that cannot be executed in the middle of the process in S201 to S204, interrupting is prohibited in advance, and on the other hand, the process during a power failure is processed. When executing a process that can be executed during the process, interrupts are permitted in advance. As a result, the process at the time of power failure is executed only at a timing suitable for the process at the time of power failure. Therefore, the control program can be a simplified small-capacity program.

In the above embodiment, the main startup processing of claim 1 corresponds to the processing from S5 to S11 and the processing from S14 to S16 in FIGS. 4 and 10, and the command transmission processing is illustrated in FIGS. 10 corresponds to the process of S12 and S17, and the main normal process corresponds to the process repeatedly performed in S18 and S19 of FIG. 4 or the process of S19 in FIG. The processing from S71 to S77 in FIG. 11 and the processing from S82 to S84 are applicable, and as the standby processing, the processing when S78 and S79 in FIG. 7 and FIG. 11 are No, and S85 and S86 are No. The sub-normal process corresponds to the process repeatedly performed in S88 and S89 in FIG. 7 or the process in S89 in FIG.

  The present invention has been described based on the embodiments. However, the present invention is not limited to the above-described embodiments, and various improvements and modifications can be easily made without departing from the spirit of the present invention. It can be guessed.

  For example, in each of the above-described embodiments, the RAMs 13 and 33 are each composed of a static RAM that is a non-volatile memory. When the power is turned off, the RAMs 13 and 33 are backed up by backup batteries 13x and 33x. And the contents of the RAMs 13 and 33 are held (backed up). However, instead of this, the RAMs 13 and 33 may be configured by a memory such as an EEPROM or a flash memory that can hold the contents without applying a backup voltage, and the rechargeable batteries 13x and 33x for backup may be omitted. Further, the NMI interrupt process of the first embodiment may be executed by another interrupt process (for example, INT interrupt process) that can be set to prohibit the interrupt.

  You may implement this invention in the pachinko machine etc. of a different type from the said Example. For example, once a big hit, a pachinko machine that raises the expected value of the big hit until a big hit state occurs (for example, two times or three times) including that (for example, a two-time right item, a three-time right item) May also be implemented. Moreover, after the jackpot symbol is displayed, it may be implemented as a pachinko machine that enters a special game state under the condition that a ball is awarded in a predetermined area. Further, in addition to the pachinko machine, the game machine may be implemented as various game machines such as an alepatchi, a sparrow ball, a slot machine, a game machine in which a so-called pachinko machine and a slot machine are integrated.

  In the slot machine, for example, a symbol is changed by operating a control lever in a state where a symbol effective line is determined by inserting coins, and a symbol is stopped and confirmed by operating a stop button. Is. Therefore, the basic concept of the slot machine is that it is provided with variable display means for confirming and displaying the identification information after variably displaying the identification information string composed of a plurality of identification information, and resulting from the operation of the starting operation means (for example, the operation lever) Then, the change of the identification information is started, and the change of the identification information is stopped due to the operation of the operation means for stop (for example, the stop button) or after the lapse of a predetermined time, and the fixed identification information at the time of the stop Is a slot machine provided with special game state generating means for generating a special game state advantageous to the player on the condition that the specific identification information is a necessary condition. In this case, coins, medals, etc. are representative examples of game media As mentioned.

  In addition, as a specific example of a gaming machine in which a pachinko machine and a slot machine are integrated, a variable display means for displaying a fixed symbol after displaying a variable symbol sequence consisting of a plurality of symbols is provided, and a handle for launching a ball is provided. What is not provided. In this case, after insertion of a predetermined amount of spheres based on a predetermined operation (button operation), for example, the variation of the symbol is started due to the operation of the operation lever, for example, due to the operation of the stop button, or With the passage of time, the fluctuation of the symbol is stopped, and a jackpot state advantageous to the player is generated on the condition that the confirmed symbol at the time of stoppage is a so-called jackpot symbol. A lot of balls are paid out.

  The modification of this invention is shown below. 2. The gaming machine according to claim 1, wherein the execution timing regulation unit is an interrupt that occurs when a power failure signal is output from the power failure monitoring unit, and a non-maskable interrupt that cannot be prohibited from being interrupted. And a power failure occurrence instructing means for instructing the occurrence of a power failure by executing the non-maskable interrupt, and when the occurrence of a power failure is instructed by the power failure occurrence instructing means, by other processing other than the non-maskable interrupt A gaming machine (1) characterized in that the power saving means is executed during a power failure. When a power failure occurs, only the occurrence of a power failure is memorized by a non-maskable interrupt that cannot be set to prohibit interruption, and when the occurrence of the power failure is memorized, a process other than the non-maskable interrupt causes a power failure. The evacuation means is executed. Therefore, the occurrence of a power failure can be immediately recognized by a non-maskable interrupt, and the save process at the time of the power failure can be executed at a convenient timing in terms of control. The power failure occurrence instruction means is exemplified by a power failure flag that is turned on during the non-maskable interrupt processing.

  In the gaming machine 1, when the occurrence of a power outage is instructed by the power outage generation instructing means, after the power outage saving means is at least executable (including during or after execution of the power outage saving means) A power failure instruction canceling means for canceling a power failure occurrence instruction of the power failure occurrence instructing means, and an instruction for the occurrence of a power failure by the power failure occurrence instructing means when the non-maskable interrupt is executed after the power failure instruction releasing means is executed. A gaming machine 2 comprising a power failure instruction prohibiting means for prohibiting the power failure. Since the power failure recovery means at the time of power failure cancellation can be executed in a state in which the power failure occurrence instruction by the power failure occurrence instruction means is cancelled, processing after recovery can be executed normally.

  In the gaming machine 1 or 2, the other process for executing the power saving means is a main process or an interrupt process that can be set to prohibit the interruption. Therefore, since the execution can be prohibited at a timing that is not convenient for executing the power saving means during a power failure (because it can be put on standby), a simplified small-capacity program can be obtained.

  2. The gaming machine according to claim 1, wherein the power failure saving means is an interrupt that occurs when a power failure signal is output from the power failure monitoring means, and is executed by an interrupt that can be set to prohibit the interruption. The execution timing regulation means prohibits the interrupt at a timing inappropriate for execution of the power failure save means, while the execution timing restriction means disables the interrupt at a timing suitable for execution of the power failure save means. A gaming machine 4 that is permitted. Therefore, the saving process at the time of a power failure can be executed at a timing convenient for control.

  The gaming machine according to claim 1, or the gaming machine according to any one of claims 1 to 4, wherein execution of said power saving means during power failure is most delayed by said execution timing regulating means from output of a power failure signal by said power failure monitoring means. The game machine 5 further comprises power supply means for maintaining the drive voltage of the control system in an effective state for a time sufficient for execution of the power saving means in case of power failure. Even when the execution of the saving means at the time of power failure is most delayed, the power supply means maintains the drive voltage of the control system in an effective state for a time sufficient for the execution of the saving means at the time of power failure. Therefore, the saving process at the time of a power failure can be executed after the arrival of a convenient timing for control.

  6. The gaming machine according to claim 1, or the gaming machine according to any one of claims 1 to 5, wherein the power saving means saves a stack pointer, a register or an I / O value to the backup storage means. A gaming machine 6 characterized by being.

  7. A gaming machine according to claim 1, or a gaming machine according to claim 1, wherein a main control board that controls the game and a payout of a valuable object based on a control command transmitted from the main control board. A payout control board for performing control, and the backup storage means, the power outage saving means, the power outage recovery means, and the execution timing regulating means are respectively provided in the main control board and the payout control board. A gaming machine 7 characterized by being provided. Since the game state of the main control board and the payout control board can be backed up when a power failure occurs and this can be restored after the power failure has been resolved, even if the power is cut off due to the occurrence of a power failure etc. Can be paid out reliably.

  In the gaming machine 7, the transmission and reception between the main control board and the payout control board is performed in one direction from the main control board to the payout control board.

  The gaming machine 9 according to claim 1, wherein the gaming machine is a pachinko machine. Above all, the basic configuration of a pachinko machine is equipped with an operation handle, and in response to the operation of the operation handle, a ball is launched into a predetermined game area, and the ball is awarded to an operating port arranged at a predetermined position in the game area. As a necessary condition (or passing through the working port), the identification information variably displayed on the display device is confirmed and stopped after a predetermined time. In addition, when a special gaming state occurs, a variable winning device (specific winning opening) disposed at a predetermined position in the gaming area is opened in a predetermined manner so that a ball can be won, and a value corresponding to the number of winnings is obtained. Examples include those to which values (including data written on magnetic cards as well as premium balls) are given.

  The gaming machine 10 according to claim 1, wherein the gaming machine is a slot machine. Above all, the basic configuration of the slot machine is “variable display means for confirming and displaying the identification information after variably displaying the identification information string composed of a plurality of identification information, and resulting from the operation of the starting operation means (for example, the operation lever). Alternatively, when a predetermined time elapses, the variation of the identification information is stopped, and a special gaming state advantageous to the player is generated on the condition that the fixed identification information at the time of the stop is the specific identification information. A gaming machine provided with a special gaming state generating means. In this case, examples of the game media include coins and medals.

  The gaming machine according to claim 1 or any one of the gaming machines 1 to 8, wherein the gaming machine is a fusion of a pachinko machine and a slot machine. Among them, the basic configuration of the fused gaming machine includes “a variable display means for confirming and displaying identification information after variably displaying an identification information string composed of a plurality of identification information, and a starting operation means (for example, an operation lever). The fluctuation of the identification information is started due to the operation, and the fluctuation of the identification information is stopped due to the operation of the operation means for stop (for example, the stop button) or after a predetermined time elapses. Special game state generating means for generating a special game state advantageous to the player on the condition that the confirmed identification information is the specific identification information, and using a ball as a game medium and starting to change the identification information In this case, the game machine is configured to require a predetermined number of balls and to be paid out when a special gaming state occurs.

It is a front view of the game board of the pachinko machine which is one Example of this invention. It is the block diagram which showed the electrical structure of the pachinko machine. (A) is a main control board, (b) is a payout control board, and is a flowchart of the NMI interruption process performed separately, respectively. It is a flowchart of the starting process performed with a main control board. It is a flowchart of prize ball processing performed with a main control board. It is a flowchart of the command reception process performed by the reception interruption process of a payout control board. It is a flowchart of the starting process performed with a payout control board. It is a flowchart of a prize ball payout process executed by a payout control board. It is a flowchart of the INT interruption process performed separately by the main control board and the payout control board of 2nd Example, respectively. It is a flowchart of the starting process performed with the main control board of 2nd Example. It is a flowchart of the starting process performed with the payout control board of 2nd Example. It is a flowchart of each process performed separately in the main process of the main control board and the payout control board of the second embodiment.

Explanation of symbols

11 MPU of main control board (part of main control means)
13 Main control board RAM
13d Power failure flag 13e Backup area 13x Rechargeable battery 31 for backup of main control board MPU of discharge control board (part of sub-control means)
33 RAM of payout control board
33d Power outage flag 33e Backup area 33x Charge control board backup battery 50 Power outage monitoring circuit 51 Power outage signal C Main control board H Delivery control board P Pachinko machine (game machine)

Claims (3)

In a gaming machine comprising main control means for controlling a game and sub-control means for controlling an electric device connected based on a command output from the main control means,
The main control means includes
Main startup process that is executed when the power is turned on,
Command transmission processing for outputting a predetermined control command to the sub-control means;
A main normal process that repeatedly executes multiple processes,
The sub-control means is
Sub-startup processing that is executed when the power is turned on,
A standby process for waiting for a transition to a predetermined process until the predetermined control command is input from the main control unit;
A sub-normal process that repeatedly executes a plurality of processes,
The main control means executes the main startup process when the power is turned on, and executes the command transmission process after the execution of the main startup process to shift to the main normal process,
The sub-control means executes the sub-startup process when the power is turned on, executes the standby process after execution of the sub-startup process, and performs the main control during execution of the standby process. When the predetermined control command is input from the means, the standby process is terminated and the game machine moves to the sub normal process . The sub-control means is a payout control means,
The electrical device connected to the payout control means is at least a payout motor for a game ball;
The gaming machine according to claim 1, wherein the payout control means controls the payout motor in the sub-normal process . The gaming machine according to claim 1 or 2, wherein the gaming machine is a pachinko gaming machine.