JP2005079352A - Organic switching device, its manufacturing method, and switching device array for display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching device and a switching device array using it, the device being excellent in switching characteristics and employs an organic semiconductor manufacturable at a low temperature as an active layer. <P>SOLUTION: The switching device comprises a pair of electrodes of a source electrode 3 and a drain electrode 2, and a gate electrode 4 not in contact with the pair of electrodes and located between the source electrode 3 and the drain electrode 2. One surface of the gate electrode 4 faces the source electrode 3, while the other surface of the same faces the drain electrode 2. The gate electrode 4 has a plurality of through holes having an opening formed on the surface thereof on the side of the source electrode 3 and an opening formed on the other surface of the same on the side of the drain electrode 2. The drain electrode 2 has a hole having an opening formed at least on the side of the gate electrode 4 substantially at the same position as that of the through hole formed in the gate electrode 4. An electron transport or hole transport organic charge transport material 5, 5' is filled at least partially in the through hole in the gate electrode 4, the hole in the drain electrode 2, and a gap between the pair of electrodes. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a switching element and a switching element array used for driving a flat panel display.

  Display devices such as liquid crystal displays and EL displays have switching elements arranged in a matrix on a substrate such as a glass substrate, and selectively drive thin film transistors (TFT) and pixel electrodes as switching elements on the screen. A display pattern is formed. For example, in an active matrix type liquid crystal display device, an array substrate on which TFTs, pixel electrodes, and wirings for supplying signals to these are formed is arranged opposite to a counter substrate having a counter electrode, and liquid crystal is enclosed between these substrates. Has a structured.

  Conventionally, TFTs using silicon as an active layer have been used as switching elements for such display devices. However, a CVD process is required to form a silicon thin film, which is a major factor that hinders manufacturing cost reduction. Moreover, although a glass substrate is usually used as the substrate, the glass substrate is generally weak against impact and easily broken. Accordingly, it has been proposed to use a polymer film as the substrate in order to cope with the cracking of the substrate and the weight reduction and flexibility of the display device.

  However, polymer films are far less heat resistant than glass substrates, making it difficult to fabricate silicon TFTs that require relatively high temperature processes. Accordingly, studies are being made on switching elements using an organic semiconductor that can be formed by a low-temperature and inexpensive process as an active layer. However, since the mobility of carriers in the organic semiconductor is equal to or less than that of amorphous silicon, a sufficient ON current value cannot be obtained. In particular, it is not sufficient for driving a current-driven display device such as an EL display.

  There is a static induction transistor (SIT) as a switching element that can obtain a relatively good ON current value even with low mobility. The SIT is a vertical transistor in which a current flows in the sheet direction of the active layer, whereas a normal TFT is a vertical transistor in which a current flows in the film thickness direction. FIG. 23 is a schematic cross-sectional view showing the structure of the SIT. SIT is generally similar to a triode in which a sheet-like gate electrode 4 in which a number of through holes or slits (hereinafter referred to as “gate holes”) are formed between a pair of parallel plate electrodes consisting of a source electrode 3 and a drain electrode 2 is inserted. It has the following structure. Semiconductor layers 5 and 5 'are filled between the parallel plate electrodes and the gate holes. When a voltage is applied to the gate electrode 4, a depletion layer is formed in the semiconductor layers 5 and 5 'penetrating the gate hole, and the current can be controlled.

  In SIT using an organic semiconductor as the active layer, it is necessary to control the current efficiently even in a thin depletion layer in order to sufficiently reduce the low drive voltage and the OFF current value. is there. That is, since the organic semiconductor generally has insufficient carrier mobility as compared with the inorganic semiconductor, it is necessary to increase the dopant concentration in order to obtain a sufficient ON current value. When the dopant concentration is high, the depletion length of the depletion layer formed at the same voltage is small. Therefore, although depending on the dopant concentration, in the case of SIT using an organic semiconductor for the active layer, the hole diameter of the gate hole needs to be 10 μm or less.

  However, the diameter of a gate hole that can be produced by a relatively low-cost and low-resolution lithographic process that is usually used when producing a flat panel display such as a liquid crystal display is about several μm or more. For this reason, if an attempt is made to accurately form a gate hole of 10 μm or less by a lithographic process, the cost becomes high. Further, when a lithography process using a conventional resist polymer is used on an already formed organic semiconductor layer, there is a problem that the organic semiconductor layer is deteriorated by a peeling process of a resist, a metal film, or the like.

  In SIT using an organic semiconductor as an active layer, it has been attempted to use a thinly deposited aluminum discontinuous film as a gate electrode (Kudo et al., “Synthetic Metals”, 1999, Vol. 102, p.900-903 (Non-Patent Document 1)). However, since the size of the porous structure to be formed is not uniform, it is difficult to obtain good switching characteristics, and the porous structure of the gate electrode changes greatly depending on the deposition conditions, so that it can be collectively applied on a large-area substrate. In the case of a switching element array for a display that needs to be formed, it is difficult to keep the characteristics of each element constant.

  In order to solve this problem, a method using a polymer film having a microphase separation structure as an etching mask for manufacturing a gate electrode has been proposed (Japanese Patent Laid-Open No. 2001-189466 (Patent Document 1)). However, in this method, it is difficult to prepare a polymer membrane having a microphase separation structure suitable for the process, and it is difficult to say that it is an inexpensive process with many steps.

  Furthermore, a device in which fine holes are formed by using fine particles as a shadow mask during vapor deposition has been disclosed (Muraishi et al., “Science Technical Report”, 2002, Vol. 15, p. 13-17 (non- Patent Document 2)). However, it is difficult to obtain a sufficient ON current value with the element structure disclosed here.

Japanese Patent Laid-Open No. 2001-189466 Kudo et al., “Synthetic Metals”, 1999, 102, p.900-903 Muraishi et al., "Science Technical Bulletin", 2002, Vol. 15, p. 13-17

  As described above, in the SIT using an organic semiconductor that can be manufactured at a low temperature for the active layer, when forming a hole of a size necessary for reducing the drive voltage and the OFF current value in the gate electrode, the lithographic process uses the organic semiconductor layer. It was difficult to avoid the deterioration of the film and to form it inexpensively. Further, in the formation of the discontinuous film by the vapor deposition method, it has been difficult to form the gate hole of the gate electrode uniformly and to produce a gate electrode having uniform switching characteristics and excellent durability.

  Accordingly, an object of the present invention is to provide a SIT type switching element using an organic semiconductor that can be manufactured at a low temperature, which has excellent durability of a gate electrode and good switching characteristics, and a switching element array using the same. It is.

  Another object of the present invention is to provide an electrostatic induction transistor having a gate electrode having excellent durability, uniform and sufficiently small gate holes, low driving voltage and OFF current value, and good switching characteristics ( It is to provide a method for manufacturing a switching device of SIT type.

  A further object of the present invention is to provide a field effect transistor (FET) type switching element using an organic semiconductor that has good switching characteristics and can be manufactured at a low temperature as an active layer, and a method for manufacturing the same.

The above problems have been solved by the following (1) to (15).
(1) A switching element comprising an electrode pair consisting of a source electrode and a drain electrode, and a gate electrode that is not in contact with the electrode pair between the source electrode and the drain electrode, wherein one surface of the gate electrode Is opposite to the source electrode, the other surface is opposite to the drain electrode, and the gate electrode has a plurality of through-holes with one opening formed on each of the source electrode side and the drain electrode side. The drain electrode has a hole having an opening formed at least on the gate electrode side at substantially the same position as the through hole formed in the gate electrode, and the through hole of the gate electrode The hole of the drain electrode and the gap between the electrode pair are at least partially filled with an electron transporting or hole transporting organic charge transporting substance. Switching element.
(2) The switching element according to (1), wherein a diameter of the through hole formed in the gate electrode and / or the hole formed in the drain electrode is 1 nm to 10 μm.
(3) The gate electrode is covered with an electron transporting organic charge transporting material layer, and between the electron transporting organic charge transporting material layer and the drain electrode, and the electron transporting organic charge transporting material. The switching element according to (1) or (2), further comprising a hole transporting organic charge transporting material layer between the layer and the source electrode.
(4) A field effect switching device comprising an electrode pair consisting of a gate electrode and a source electrode, and a gate insulating layer, a drain electrode and an insulator layer between the gate electrode and the source electrode, One surface is in contact with the gate insulating layer, the other surface is in contact with the insulator layer, and the drain electrode has a plurality of through holes each having one opening on the gate electrode side and the insulator layer side. And a hole between the drain electrode and the gap between the gate insulating layer and the source electrode is at least partially filled with an electron transporting or hole transporting organic charge transporting substance. Switching element.
(5) The switching element according to (4), wherein the insulator layer has a through hole at a position substantially the same as a position of the through hole formed in the drain electrode.
(6) The switching element according to (4) or (5), wherein a diameter of the through hole formed in the drain electrode and / or the insulator layer is 1 nm to 10 μm.
(7) A method for manufacturing a switching element, comprising: an electrode pair including a source electrode and a drain electrode; and a gate electrode that is not in contact with the electrode pair between the source electrode and the drain electrode. Forming a plurality of through holes each having an opening on each of the source electrode side and the drain electrode side; and at least an electron transporting or hole transporting organic charge transporting substance in the through holes of the gate electrode A method for manufacturing a switching element, comprising: a step of partially filling, and a step of at least partially filling an electron-transporting or hole-transporting organic charge transporting substance into a gap between the electrode pair.
(8) forming a hole having an opening at least on the gate electrode side at a position substantially the same as a position of the through hole formed in the gate electrode of the drain electrode; and the hole of the drain electrode (7) The method for producing a switching element according to (7), further comprising a step of at least partially filling an organic charge transporting substance having electron transporting property or hole transporting property.
(9) The gate electrode is covered with an electron transporting organic charge transporting material layer, and between the electron transporting organic charge transporting material layer and the drain electrode, and the electron transporting organic charge transporting material. A method for producing a switching element according to (7) or (8), wherein a hole transporting organic charge transporting material layer is provided between the layer and the source electrode.
(10) The method according to any one of (7) to (9), wherein the through hole of the gate electrode and the hole of the drain electrode are formed by a mechanical selective peeling method of a thin film by ultrasonic treatment in liquid. Manufacturing method of the switching element.
(11) The method for manufacturing a switching element according to (10), wherein an ultrasonic sensitive layer is provided on the uppermost layer of the thin film laminated structure to which the mechanical selective peeling method is applied.
(12) The method for manufacturing a switching element according to (11), wherein the ultrasonic sensitive layer is made of a metal.
(13) The method for manufacturing a switching element according to any one of (7) to (12), wherein the through hole is formed by a thin film forming method in which fine particles are shadow masked.
(14) The method for producing a switching element according to (13), wherein the fine particles are made of an organic / inorganic composite.
(15) The switching element according to any one of (1) to (6) or the switching element manufactured by the manufacturing method according to any one of (7) to (14) Switching element array for display device.

  When the switching element of the present invention is a SIT type switching element using an organic semiconductor as an active layer, the distance between the gate electrode / source electrode and the distance between the gate electrode / drain electrode compared to the conventional SIT type switching element having the same effective channel length Therefore, the parasitic capacitance between the gate electrode / source electrode and between the gate electrode / drain electrode can be reduced, and the operation speed is improved. Furthermore, according to the above manufacturing method, a part of the source electrode for injecting carriers is formed in a protruding shape toward the gate electrode at the position of the through hole of the gate electrode, so that the carrier injection efficiency is improved by electric field concentration. To do. The above effect becomes remarkable when the through hole is equal to or less than the thickness of the organic semiconductor layer. The hole of the drain electrode of the switching element does not need to penetrate, but preferably penetrates.

  When the SIT type switching element using an organic semiconductor as the active layer is a SIT type switching element whose gate electrode is covered with an electron transporting organic charge transporting material layer, it operates as a normally-off type, and the device characteristics are widely tuned. can do.

  When the switching element of the present invention is an FET type switching element using an organic semiconductor as an active layer, a plurality of extremely small through holes are formed in the drain electrode, and a part of the source electrode for injecting carriers is penetrated. A protrusion is formed toward the drain electrode at the position of the hole. For this reason, an insulated gate FET type switching element characterized by a high input resistance has a much shorter channel length than the conventional thin film FET type switching element and operates at high speed. Furthermore, since the carrier injection efficiency from the protruding source electrode can be modulated by the gate voltage in addition to the carrier amount of the channel portion, the mutual conductance is improved.

  In addition, the method for manufacturing a switching element according to the present invention using an organic semiconductor as an active layer forms a structure in which each functional layer is laminated and shares a through hole. It is preferable to use it. That is, each functional layer is laminated on a thin film having a pattern of micropores formed on the substrate, and the lowermost functional layer is formed by the difference in adhesion between the lowermost functional layer and the substrate and the patterned thin film. Only the region in contact with the substrate is selectively peeled off by ultrasonic irradiation in the liquid. According to this method, it is possible to simultaneously form through holes of the same size at the same position of a plurality of electrodes. Furthermore, peeling selectivity can be improved by providing an ultrasonic sensitive layer made of metal or the like in the uppermost layer of the thin film laminated structure.

  Furthermore, the above pattern formation can be performed by a thin film formation method using fine particles as a shadow mask. That is, a thin film having a large number of through holes can be obtained by attaching fine particles on a substrate, forming a thin film by vapor deposition using this as a shadow mask, and then removing the fine particles. In addition, the size and distribution of the through holes can be freely controlled by controlling the particle size and particle size distribution of the fine particles. Further, the adhesion of the fine particles to the substrate can be controlled by organic / inorganic composite of the fine particles and the surface modification, and a pattern can be selectively formed only in a desired region.

  Needless to say, if the above manufacturing method is used, a conventionally proposed SIT type switching element having no through hole in the drain electrode can be easily and efficiently manufactured. According to said manufacturing method, the switching element which uses the organic semiconductor which has a favorable switching characteristic and can be manufactured at low temperature for an active layer can be obtained. A switching element array to which such a switching element is applied is expected to be widely applied to various flat panel displays and the like, and its industrial value is remarkably great.

  The organic switching element of the present invention uses a gate electrode that is excellent in durability and has a uniform and sufficiently small gate hole in the case of an SIT type switching element that uses an organic semiconductor that can be manufactured at a low temperature as an active layer. Good switching characteristics at low cost.

  Further, by applying the organic switching element of the present invention to a switching element array, it can be widely applied to various flat panel displays and the like, and its industrial value is remarkably great.

[1] Organic Switching Element The organic switching element of the present invention relates to a static induction transistor (SIT) and a field effect transistor (FET). The following will be described in order.

[A] Static induction transistor (SIT)
(1) SIT (1)
FIG. 1 shows a typical element structure of SIT (1) which is an example of the organic switching element of the present invention. SIT (1) includes an electrode pair composed of a source electrode 3 and a drain electrode 2, and a porous sheet-like gate electrode 4 is formed between the electrodes without contacting the electrode pair. The drain electrode 2 and the gate electrode 4 have through holes at substantially the same positions on the electrode surfaces, and these through holes form a common through hole. Substantially the same position means a position where the through-holes or the holes appear to overlap on the same axis when the switching element is viewed vertically from the source electrode side or the substrate side. The source electrode 3 has a protruding structure protruding toward the gate electrode 4 at the position of the through hole. Organic charge transporting material layers 5 and 5 ′ are filled between the electrodes and through holes provided in the gate electrode 4 and the drain electrode 2. The gate electrode 4 is in Schottky junction with the organic charge transporting material layers 5 and 5 ′.

(a) Organic charge transporting material layer The organic charge transporting material layer 5, 5 ′ is composed of an organic hole transporting material or an electron transporting material, specifically, an organic semiconductor doped p-type or n-type. Etc. Low molecular weight compounds and high molecular weight compounds can be used as organic semiconductors, and low molecular weight compounds include phthalocyanine derivatives, naphthalocyanine derivatives, azo compound derivatives, perylene derivatives, indigo derivatives, quinacridone derivatives, anthraquinones. Such as polycyclic quinone derivatives, cyanine derivatives, fullerene derivatives, indole, carbazole, oxazole, inoxazole, thiazole, imidazole, pyrazole, oxaadiazole, pyrazoline, thiathiazole, triazole, etc. Hydrazine derivatives, triphenylamine derivatives, triphenylmethane derivatives, stilbenes, quinone compound derivatives such as anthraquinone diphenoquinone, anthracene, bentacene, pyrene, phenanthrene, colo Can be used polycyclic aromatic compound derivative such as emissions or the like.

  As a high molecular compound, the above low molecular compound is bonded to the main chain of a normal electrically inactive high molecular chain such as polyethylene chain, polysiloxane chain, polyether chain, polyester chain, polyamide chain, polyimide chain, etc. Or those bonded in pendant form as side chains can be used.

  It is also preferable to use a conjugated polymer compound as the polymer compound. Preferred examples of the conjugated polymer compound include aromatic conjugated polymer compounds such as polyparaphenylene, aliphatic conjugated polymer compounds such as polyacetylene, and heterocyclic conjugated polymers such as polypyrrole and polythiophene. Constituent units of the above-mentioned conjugated polymer compounds such as compounds, polyanilines, heteroatom conjugated polymer compounds such as polyphenylene sulfide, poly (phenylene vinylene), poly (arylene vinylene), poly (thienylene vinylene) And carbon-based conjugated polymer compounds such as a composite conjugated polymer compound having a structure bonded to the. In addition, oligosilanes such as polysilanes, disilanylene allylene polymers, (disilanylene) ethenylene polymers, (disilanylene) ethynylene polymers, etc., and other oligosilanes and carbon-based conjugated structures are alternated. It is also preferable to use a polymer compound or the like chained to each other.

  As the polymer compound, in addition to the above compounds, a polymer compound composed of an inorganic element such as phosphorus or nitrogen, or a polymer in which an aromatic ligand is coordinated to a polymer chain such as phthalocyanate polysiloxane Compounds, ladder-like polymer compounds obtained by heat-treating perylenes such as perylenetetracarboxylic acid, and ladder-type polymer compounds obtained by heat-treating polyethylene derivatives having a cyano group such as polyacrylonitrile, and perovskites A composite material in which an organic compound is intercalated can be used. The materials constituting the organic charge transporting substance layers 5 and 5 'may be the same or different.

(b) Substrate The material of the substrate 1 is not particularly limited as long as the surface is smooth, and an inorganic material such as glass or silicon, an organic material such as a polymer film, or the like can be used. When an organic material is used as the substrate, a metal oxide thin film or the like may be coated on the surface in order to impart characteristics such as smoothness, moisture resistance, and oxygen resistance.

(c) Electrode The source electrode 3 and the drain electrode 2 are not particularly limited as long as they have sufficient conductivity. Metals such as gold, silver, copper, platinum, nickel, tungsten, aluminum, and alloys thereof, ITO , Fluorine-doped stannic oxide, metal oxides such as vanadium oxide, graphite, diamond doped with n-type or p-type, silicon and compound semiconductors, polyanilines, polythiophenes, polypyrroles, etc. An organic conductive material containing a high molecular compound can be used.

  The thicknesses of the source electrode 3 and the drain electrode 2 are not particularly limited. Usually, it is 5-2000 nm, Preferably it is 10-500 nm, More preferably, it is 20-200 nm. In order to increase the amount of current flowing between the source and drain, it is usually preferable that the source electrode 3 and the drain electrode 2 are in ohmic contact with the organic charge transporting material layers 5 and 5 '. The gate electrode 4 and the drain electrode 2 may be formed in a sheet shape, and the shape may be planar, curved, or cylindrical.

  The thickness of the gate electrode 4 is not particularly limited. Usually, it is 5-500 nm, Preferably it is 10-100 nm, More preferably, it is 20-50 nm. If it is too thick, the distance between the source electrode 3 and the drain electrode 2 is increased, and the internal resistance of the element is increased. If it is too thin, it becomes difficult to form a uniform continuous film, and the sheet resistance of the gate electrode 4 increases, resulting in deterioration of the voltage-current characteristics of the device. Also, the OFF current value increases.

  One surface of the gate electrode 4 faces the source electrode 3, and the other surface faces the drain electrode 2, and a plurality of through holes having one opening on each surface are formed. One surface of the drain electrode 2 faces the gate electrode 4, and the other surface faces the substrate 1, and a plurality of through holes having one opening on each surface are formed. The through hole of the drain electrode 2 exists at substantially the same position as the through hole of the gate electrode 4.

  The average radius of the openings of the drain electrode 2 and the gate electrode 4 is preferably the same as the sum of the thicknesses of the two semiconductor layers 5, 5 '. The pore diameter of each opening is preferably 1 nm to 10 μm, more preferably 10 nm to 500 nm, and even more preferably 20 nm to 400 nm. If the opening is too large, the OFF current value increases and the drive voltage rises. Conversely, if it is too small, the device will not turn on. Further, the opening ratio of the opening (total area of the opening × 100 / total area of the region where the through hole is formed) is preferably 10 to 90%, and more preferably 20 to 80%. If the aperture ratio is too small, the internal resistance of the element increases. Conversely, if the aperture ratio is too large, the sheet resistance of the gate electrode increases.

  FIG. 2 is a partial plan view showing a gate electrode used in the organic switching element of the present invention. The gate electrode 4 has an opening 10 formed by a plurality of through holes. The drain electrode 3 has the same shape as the gate electrode 4 shown in FIG.

  In general, in SIT, when the openings are arranged uniformly over the entire gate electrode, the potential distribution in the surface of the gate electrode is likely to be uniform, and element breakdown due to electric field concentration or the like is less likely to occur. Further, the value of the current flowing between the source and the drain can be abruptly changed according to the change in the gate voltage. However, when the switching elements are arrayed and used as a switching element array for a display, such a uniform arrangement of openings is not appropriate. In general, when switching elements are arrayed, variations in characteristics tend to occur between the switching elements. Therefore, if the current value between the source and drain changes so steeply at a specific gate voltage, even if the same voltage is applied, the current value flowing between the source and drain of each element will be greatly different, and the uniformity of the display screen will be reduced. It becomes difficult to keep.

  In order to prevent this, it is preferable to reduce the responsiveness of the source-drain current to the gate voltage to some extent. If distribution is given to the hole diameters of the openings, the method of applying a voltage in the gate electrode surface becomes non-uniform, and the responsiveness decreases. However, if it is too irregular, the responsiveness will be unnecessarily lowered, and device breakdown due to electric field concentration is likely to occur. The distribution of the hole diameters of the openings is preferably in the range of 0.1% to 20% in terms of CV value.

  When the radius of the opening is about 0.5 to 1 μm, interference with visible light or the like tends to occur if the opening has a uniform pattern over the entire surface of the gate electrode. When an array of switching elements having such an opening is used for a display, when the gate electrode can be seen through the display surface, interference fringes, moire patterns, etc. are likely to occur on the display surface, and image quality is likely to deteriorate. The switching element of the present invention can suppress the occurrence of such interference fringes and moire patterns because the arrangement of the openings of the gate electrode has an appropriate irregularity.

  In the SIT (1), the gate electrode 4 is Schottky joined with the organic charge transporting material layers 5 and 5 '. In the case where the organic charge transporting material layers 5 and 5 'are p-type semiconductors, the material of the gate electrode 4 is preferably a material having a small work function, and preferable examples include aluminum and aluminum alloys. When the organic charge transporting material layers 5 and 5 'are n-type semiconductors, the material of the gate electrode 4 is preferably a material having a high work function. Preferred examples include gold, platinum, ITO, fluorine-doped tin oxide, and the like. Can be mentioned.

(2) SIT (2)
FIG. 3 shows a typical element structure of SIT (2) which is another example of the organic switching element of the present invention. SIT (2) includes an electrode pair composed of a source electrode 3 and a drain electrode 2, and a porous sheet-like gate electrode 4 is formed between the electrodes without contacting the electrode pair. Between the drain electrode 2 and the gate electrode 4, a hole transporting organic charge transporting material layer (p-type semiconductor layer) 6 and an electron transporting organic charge transporting material layer (n-type semiconductor layer) 7 from the drain electrode 2 side. Are sequentially filled and stacked, and between the drain electrode 2, the p-type semiconductor layer 6, the n-type semiconductor layer 7 and the gate electrode 4, and the source electrode 3, an electron transporting organic charge transporting material is formed from the gate electrode side. A layer (n-type semiconductor layer) 7 ′ and a hole transporting organic charge transporting material layer (p-type semiconductor layer) 6 ′ are sequentially filled and laminated. Further, the drain electrode 2, the p-type semiconductor layer 6, the n-type semiconductor layer 7 and the gate electrode 4 are covered with the n-type semiconductor layer 7 ′ and are not in direct contact with the p-type semiconductor layer 6 ′. Furthermore, the drain electrode 2, the p-type semiconductor layer 6, the n-type semiconductor layer 7 and the gate electrode 4 have through holes at substantially the same position, and these through holes form a common through hole. The p-type semiconductor layer 6 ′ and the source electrode 3 have a protruding structure protruding toward the drain electrode 2 at the position of the through hole.

  As the hole transporting organic charge transporting material layers 6 and 6 ′ and the electron transporting organic charge transporting material layers 7 and 7 ′, the same materials as those of the organic charge transporting material layers 5 and 5 ′ of SIT (1) are used. Can be used. The constituent materials of the hole transporting organic charge transporting material layers 6 and 6 'and the electron transporting organic charge transporting material layers 7 and 7' may be the same or different. The material, shape and thickness of the source electrode 3 and the drain electrode 2 may be the same as those of the SIT (1). The shape and thickness of the gate electrode 4 and the structure of the through hole formed from the gate electrode to the drain electrode and the opening thereof may be the same as in SIT (1).

(3) SIT (1) 'and SIT (2)'
FIG. 5 shows a typical element structure of SIT (1) ′ having no through hole in the drain electrode, which is an example of the switching element manufactured by the method for manufacturing a switching element of the present invention. By using the manufacturing method described later, it is possible to easily and efficiently manufacture a conventionally proposed SIT type switching element having no through hole in the drain electrode. That is, the through-hole of the gate electrode of SIT (1) ′ is formed using a mechanical selective peeling method of a thin film by submerged ultrasonic treatment described later. SIT (1) ′ has the same structure as SIT (1) except that the drain electrode 2 has no through-hole, and the material used to form the element is the same as SIT (1).

  FIG. 6 shows a typical element structure of SIT (2) ′ having no through hole in the drain electrode, which is another example of the switching element manufactured by the method for manufacturing a switching element of the present invention. The through hole of the gate electrode of SIT (2) ′ is formed by using a mechanical selective peeling method of a thin film by submerged ultrasonic treatment, which will be described later, as in SIT (1) ′. SIT (2) ′ has the same structure as SIT (2) except that the drain electrode 2 and the hole transporting organic charge transporting material layer 6 do not have through-holes. Same as SIT (2).

  SIT (1) and SIT (2) organic switching elements have a better ON / OFF ratio than the SIT (1) 'and SIT (2)' organic switching elements because the carrier flow is concentrated on the gate electrode. It is.

[B] Field Effect Transistor (FET)
FIG. 4 shows a typical element structure of an FET which is still another example of the organic switching element of the present invention. The FET includes an electrode pair composed of a source electrode 3 and a gate electrode 4, and a porous sheet-shaped drain electrode 2 is inserted between the electrodes without contacting the electrode pair. One surface of the drain electrode 2 is in contact with the gate insulating layer 8 provided on the gate electrode, and the other surface is in contact with the insulator layer 9. The insulator layer 9 has through holes at substantially the same positions as the through holes formed in the drain electrode 2, and these through holes form a common through hole. A through hole provided between the source electrode 3 and the gate insulating layer 8 and in the insulator layer 9 and the drain electrode 2 is filled with the organic charge transporting material layer 5. The source electrode 3 has a protruding structure protruding toward the gate electrode 4 at the position of the through hole.

  As the organic charge transporting material layer 5, the same material as SIT (1) can be used. The material of the source electrode 3, the drain electrode 2 and the gate electrode 4 is not particularly limited as long as it has sufficient conductivity, and is a metal such as gold, silver, steel, platinum, nickel, tungsten, aluminum, and alloys thereof. Metal oxides such as ITO, fluorine-doped tin oxide, vanadium oxide, graphite, diamond doped with n-type or p-type, silicon and compound semiconductors, polyanilines, polythiophenes, polypyrroles, etc. An organic conductive material containing a conductive polymer compound can be used.

  The shape and thickness of the source electrode 3 and the drain electrode 2, the size and arrangement of the through holes, and the like may be the same as in SIT (1). The shape of the gate electrode 4 is not particularly limited, and may be a sheet shape, a mesh shape, a porous shape, a linear shape, a dot shape, a comb shape, or the like, but is a sheet-like flat plate electrode as shown in FIG. Is preferred.

  The gate insulating layer 8 is provided to insulate the gate electrode 4 from the drain electrode 2 and the organic charge transporting material layer 5. The material is not particularly limited as long as it is insulative, and organic polymer films such as polyimides, metal oxides such as silicon oxide, alumina, and tantalum oxide are preferable. When the gate insulating layer 8 is a metal oxide film, an oxide film may be newly formed on the porous gate electrode surface, or the gate electrode may be formed of aluminum, tantalum, etc., and the gate electrode surface may be oxidized. A surface oxide layer may be formed. The gate insulating layer 8 preferably has a higher dielectric constant in order to reduce the driving voltage.

  The film thickness of the gate insulating layer 8 is not particularly limited, but is preferably 10 to 100 nm, and more preferably 20 to 50 nm. If it is too thin, it is difficult to provide a sufficient insulation function, and if it is too thick, problems such as an increase in driving voltage occur.

The insulator layer 9 is preferably made of an insulating material having a low dielectric constant in order to reduce the parasitic capacitance of the switching element. Examples of the insulating substance include polymer materials such as polyimides and inorganic materials such as SiO ₂ . Of these, polyimides, polyimide having pores on the order of nanometers, porous films such as SiO ₂ are preferable.

[2] Manufacturing method of organic switching element The manufacturing method of the organic switching element of the present invention includes a drain electrode, a gate electrode, and a common thin film having functional thin films such as an insulator layer and a semiconductor layer provided above and below these electrodes. It has a feature in a method for forming a through hole.

  The through hole forming method of the organic switching element mainly includes two steps. The first step is a step of forming a thin film patterned with a plurality of through holes on a substrate. For example, using a fine particle adhered on a substrate as a shadow mask, a thin film is formed on the fine particle by means such as vapor deposition, and then the fine film is removed to form a patterned thin film. The second step is a step of laminating a plurality of functional layers having through holes common to the pattern forming thin film formed in the first step. For example, by laminating a plurality of functional layers on a patterned thin film by means such as vapor deposition, and performing ultrasonic treatment in liquid, the through-hole region of the patterned thin film is selectively peeled off and removed to have a common through-hole. A laminated thin film structure is formed. Hereinafter, it demonstrates in detail for every process.

(1) First Step The first step is a step of forming a patterned thin film having a plurality of through holes on a substrate. For this step, for example, a thin film patterning method such as a sputtering method, a vapor deposition method, a plating method, or a coating method can be used, and these methods can be appropriately selected depending on the properties of the material for forming the thin film.

  A particularly preferable pattern forming method is a method in which fine particles are used as a shadow mask during vapor deposition. In the conventional method of forming a gate electrode gap that becomes a carrier channel by utilizing “bleeding” or the like from a slit-shaped deposition mask at the time of gate electrode deposition, the gate electrode structure that can be fabricated by controlling in the lateral direction is on the order of 10 μm. Become. As a result, the ratio of the area shielded by the gate electrode in the element area increases, the effective area of the element is not sufficient, the gap width increases, and a region where the conductance at the center of the gap is not modulated by the gate voltage is generated. Problems such as a low on / off ratio are likely to occur. Therefore, a thin film having a large number of fine holes is formed by dispersing and adhering fine particles to a substrate to form a vapor deposition mask, and a large number of nanoscale SITs are produced in parallel. Specifically, as shown in FIG. 7, a fine particle dispersion solution is applied onto a substrate 1 to deposit fine particles 11, and after a thin film 12 is vacuum-deposited thereon, the fine particles 11 are ultrasonicated in a suitable solvent. To remove.

  The fine particles used here may be either polymer fine particles such as polystyrene or inorganic fine particles such as silica, or may be organic / inorganic composite fine particles whose surfaces are coated with a polymer. Adhesion strength varies depending on the shape of the fine particles and the surface treatment method. Therefore, it has a suitable shape to obtain dispersion strength that can be dispersed and adhered with good controllability and can be completely removed by ultrasonic treatment in liquid. Fine particles that have been treated are used. The shape of the fine particles is preferably spherical, elliptical, or polyhedral, and more preferably spherical. Further, since the size of the micropores formed in the thin film is determined by the size of the fine particles, monodisperse particles having a size suitable for device design or particles having a desired size distribution are selected.

  The method for attaching the fine particles to the substrate is not particularly limited as long as the fine particle dispersion can be uniformly applied to the substrate surface, and a bar coating method, a squeegee coating method, a spin coating method, an ink jet method, a spray method, or the like is used. be able to. Among them, the spin coating method is preferable if the treatment is performed uniformly over a relatively small area, and the spray method is preferable if the treatment is performed uniformly over a large area.

  The dispersion is adjusted to an appropriate concentration according to the coating method using a solvent that can stably disperse the fine particles during the treatment process. For example, when applying by spin coating, the fine particle concentration of the dispersion is adjusted in the range of 0.001 to 30% by mass, preferably 0.01 to 10% by mass. The density of the adhering particles is controlled by the concentration of the dispersion and the coating amount, and as a result, the aperture ratio and aperture distribution of the micropores formed in the thin film are controlled. An appropriate surfactant may be added to improve the dispersibility of the fine particles.

  The hydrophilicity / hydrophobicity, charge, unevenness, etc. on the substrate surface have a great influence on the adhesion force of the fine particles, and it is necessary to control them. However, when attaching fine particles on the organic film, the adhesion force is controlled by surface treatment of the particles such as core-shell formation, chemical modification, plasma treatment, and addition of a surfactant so as not to impair the function of the organic film. Is preferred.

(2) Second Step The second step is a step of laminating a plurality of functional layers having through holes common to the pattern forming thin film formed in the first step. Specifically, as shown in FIG. 8, a plurality of functional films 14 and 15 are laminated on the patterned thin film 13 by thin film forming means such as vapor deposition, and through-hole regions of the patterned thin film are formed by ultrasonic treatment in liquid. Strip and remove selectively. As the thin film formation method, various methods such as a vacuum deposition method, a sputtering method, and a spray method can be applied, and these methods can be appropriately selected depending on the material to be used.

  The thickness of the laminated film is selected for each material according to the design viewpoint for device operation and the sensitivity and selectivity for mechanical selective peeling. In the case of peeling the organic film, it is preferable to form a metal film or a metal oxide film as an ultrasonic sensitive layer on the organic film in order to improve the peeling ability. These ultrasonic sensitive layers can also serve as gate electrodes.

  As the solvent used for the ultrasonic treatment in the liquid, a solvent that can disperse the fine particles and does not impair the function of the organic film or metal film formed on the element is selected. For example, if the film to be formed is a material that is difficult to dissolve in an organic solvent and the fine particles are hydrophilic, a hydrophilic organic solvent is used. In order to enhance the peelability and selectivity, the temperature of the cleaning liquid and the intensity and frequency of the ultrasonic wave are selected as necessary. The frequency of the ultrasonic wave is preferably 100 Hz to 100 MHz, and more preferably 1 kHz to 10 MHz. It is also effective to irradiate ultrasonic waves of a plurality of frequencies over a wide range at the same time, or to switch the frequencies sequentially and irradiate.

  By the first and second steps described above, a thin film laminated structure having a large number of minute through holes can be formed. Furthermore, the manufacturing method of the switching element using the said peeling method is demonstrated. In the steps shown below, the substrate side is used as the drain electrode. However, the substrate side may be used as the source electrode.

[A] SIT (1) Manufacturing Method Step (1) Formation of Drain Electrode FIG. 9 shows an outline of the manufacturing method of SIT (1). A drain electrode 2 is formed on the substrate 1 by the following method, and a wiring pattern is patterned on the drain electrode 2 as necessary. First, fine particles are deposited on the substrate 1 by a spin coating method, a dipping method, a coating method using an ink jet or the like. If necessary, heat treatment or the like is performed to fix the fine particles on the substrate 1. Using this fine particle as a shadow mask, the drain electrode 2 is vapor-deposited, and the fine particle is removed to form a through hole. This step of forming the drain electrode 2 corresponds to the first step described above. For the drain electrode 2, for example, an ITO film or the like is formed by a sputtering method, or a metal film such as Pt, Au, Pd, Ag, Cu, Ni, Co, In, or W is formed by an evaporation method, a sputtering method, plating, or the like. . Alternatively, a conductive polymer film such as polyaniline, polypyrrole, or polythiophene may be formed by coating, electric field polymerization, or the like.

Step (2) Formation of Gate Electrode An organic charge transporting material layer 5 is formed on the drain electrode 2 by CVD, vapor deposition, coating, plating, LPD method or the like. At this time, the organic charge transporting material layer 5 is also filled in the through hole of the drain electrode 2. Next, the gate electrode 4 is formed on the organic charge transporting material layer 5. When a p-type organic conjugated polymer material or the like is used as the organic charge transporting substance, it is preferable to form a metal film having a small work function such as aluminum as the gate electrode 4 by vapor deposition or the like. At the same time, the gate electrode 4 is patterned into a desired wiring pattern as necessary. After patterning, the through-hole part of the drain electrode 2 is removed by ultrasonic treatment in liquid, and a through-hole is formed in the organic charge transporting material layer 5 and the gate electrode 4. This step corresponds to the second step described above.

Process (3) Formation of organic charge transport material layer
The organic charge transporting material layer 5 ′ is formed by CVD, vapor deposition, coating, plating, LPD method or the like. At this time, the organic charge transporting material layer 5 ′ is also filled in the through hole.

Step (4) Formation of source electrode Sputtering method, vapor deposition method, plating, LPD method, etc. on the organic charge transporting material layer 5 ′, preferably by a vapor deposition method with little damage to the organic charge transporting material layer 5 ′. A source electrode 3 is formed. At the same time, the source electrode 3 is patterned into a desired wiring pattern as necessary to complete the switching element.

[B] Manufacturing Method of SIT (2) FIG. 10 shows an outline of a manufacturing method of SIT (2). Step (1) of SIT (2) is the same as step (1) of SIT (1).

Step (2) Formation of Gate Electrode A p-type organic charge transporting material layer 6 is formed on the drain electrode 2 by CVD, vapor deposition, coating, plating, LPD method or the like. At this time, the p-type organic charge transporting material layer 6 is also filled in the through hole of the drain electrode 2. Next, an n-type organic charge transporting material is formed on the p-type organic charge transporting material layer 6 by CVD, vapor deposition, coating, plating, LPD method, etc., preferably by a vapor deposition method with little damage to the organic charge transporting material layer. Layer 7 is formed. Further, the gate electrode 4 is formed on the n-type organic charge transporting material layer 7. In this case, a thin film made of a material having a large work function such as gold, platinum, ITO, or fluorine-doped tin oxide is formed by vapor deposition or the like. At the same time, the gate electrode 4 is patterned into a desired wiring pattern as necessary. After patterning, the through-hole portion of the drain electrode 2 is removed by ultrasonic treatment in the liquid, and through-holes are formed in the organic charge transporting material layers 6 and 7 and the gate electrode 4. This step corresponds to the second step described above.

Step (3) Formation of n-type organic charge transport material layer
The n-type organic charge transporting material layer 7 ′ is formed by CVD, vapor deposition, coating, plating, LPD method or the like. At this time, the n-type organic charge transporting material layer 7 ′ is also filled in the through hole.

Process (4) Formation of p-type organic charge transport material layer
A p-type organic charge transporting material layer 6 ′ is formed on the n-type organic charge transporting material layer 7 ′ by CVD, vapor deposition, coating, plating, LPD method or the like.

Process (5) Source electrode formation
The source electrode 3 is formed on the p-type organic charge transporting material layer 6 ′ by sputtering, vapor deposition, plating, LPD, or the like, preferably by vapor deposition that causes little damage to the organic charge transporting material layer. At the same time, the source electrode 3 is patterned into a desired wiring pattern as necessary to complete the switching element.

[C] FET Manufacturing Method Step (1) Formation of Gate Electrode FIG. 11 shows an outline of the FET manufacturing method. A gate electrode 4 is formed on the substrate 1, and a wiring pattern is patterned on the gate electrode 4 as necessary. For the gate electrode 4, for example, an ITO film or the like is formed by a sputtering method, or a metal film such as Pt, Au, Pd, Ag, Cu, Ni, Co, In, or W is formed by an evaporation method, a sputtering method, plating, or the like. . Alternatively, a conductive polymer film such as polyaniline, polypyrrole, or polythiophene may be formed by coating, electric field polymerization, or the like.

Step (2) Formation of Gate Insulating Layer A gate insulating layer 8 is formed on the gate electrode 4. For example, a SiO ₂ film or the like is formed by a sputtering method, a CVD method, an LPD method, or the like, or a polyimide film is formed by a coating method, a vapor deposition method, an electrodeposition method, or the like. Alternatively, a surface oxide layer may be formed on the gate electrode surface simply by heat treatment or the like to form the gate insulating layer 8.

Step (3) Formation of Drain Electrode The drain electrode 2 is formed on the gate insulating layer 8 by the same method as in the step (1) of the manufacturing method of the SIT (1).

Step (4) Formation of Insulator Layer An insulator thin film 9 is formed on the drain electrode 2 in the same manner as in step (2) of the FET manufacturing method. A method of providing a through hole in the insulator thin film 9 is the same as the step (2) of the manufacturing method of the SIT (1). Steps (5) to (6) are the same as steps (3) to (4) of the method for producing SIT (1).

[D] Manufacturing Method Step of SIT (1) ′ (1) Formation of Drain Electrode FIG. 12 shows an outline of a manufacturing method of SIT (1) ′. A drain electrode 2 is formed on the substrate 1, and a wiring pattern is patterned on the drain electrode 2 as necessary in the same manner as in the step (1) of the manufacturing method of the SIT (1).

Step (2) Formation of Gate Electrode A release agent is attached on the drain electrode 2 by a coating method (spray method or the like). The mold release agent is used to develop the selectivity of the peeling site when performing thin film peeling by ultrasonic treatment in liquid. Therefore, it is preferable to reduce the adhesion area of the release agent and make it adhere uniformly. The release agent is not particularly limited as long as it can reduce the adhesion between the drain electrode 2 and the organic charge transporting material layer 5, and oil, silicone, fluorine-based surfactant, and the like can be used. An organic charge transporting material layer 5 is formed on the drain electrode to which the release agent is attached by CVD, vapor deposition, coating, plating, LPD method or the like. Next, the gate electrode 4 is formed on the organic charge transporting material layer 5. When a p-type organic conjugated polymer material or the like is used as the organic charge transporting material layer 5, a metal film having a small work function such as aluminum is formed as the gate electrode 4 by vapor deposition or the like. At the same time, the gate electrode 4 is patterned into a desired wiring pattern as necessary. After patterning, the release agent adhering portion is removed by ultrasonic treatment in the liquid, and through holes are formed in the organic charge transporting material layer 5 and the gate electrode 4. This step corresponds to the second step described above. Steps (3) to (4) are the same as steps (3) to (4) of the manufacturing method of SIT (1).

[E] Manufacturing Method Step (1) of SIT (2) ′ Formation of Drain Electrode FIG. 13 shows an outline of the manufacturing method of SIT (2) ′. Step (1) is the same as step (1) of the production method of SIT (1) ′.

Step (2) Formation of Gate Electrode A p-type organic charge transporting material layer 6 is formed on the drain electrode 2 by CVD, vapor deposition, coating, plating, LPD method or the like. Next, a release agent is deposited on the p-type organic charge transporting material layer 6. The attachment method, release agent material, and the like are the same as in step (2) of the manufacturing method of SIT (1) ′. On the p-type organic charge transporting material layer 6 to which the release agent is attached, the n-type organic charge is preferably deposited by CVD, vapor deposition, coating, plating, LPD method, etc., preferably by the vapor deposition method with little damage to the charge transporting material layer. A transportable material layer 7 is formed. Further, the gate electrode 4 is formed on the n-type organic charge transporting material layer 7. In this case, a thin film of a substance having a high work function such as gold, platinum, ITO, or fluorine-doped tin oxide is formed by a vapor deposition method or the like. At the same time, the gate electrode 4 is patterned into a desired wiring pattern as necessary. After patterning, the part to which the release agent is attached is removed by ultrasonic treatment in the liquid, and through holes are formed in the n-type organic charge transporting material layer 7 and the gate electrode 4. This step corresponds to the second step described above. Steps (3) to (5) are the same as steps (3) to (5) of the method for producing SIT (2).

[3] Switching element array The above-described switching elements can be arranged in a matrix to form a switching element array for driving a display device such as a liquid crystal display, an electrophoretic display, an electrochromic (EC) display, and an EL display. The arrangement of the switching elements, the wiring used, etc. may be known. FIG. 14 is a wiring diagram showing an example of a switching element array for driving an EC display, and FIG. 15 shows its element arrangement.

  In FIG. 14, scanning lines 18 and signal lines 19 are wired in a lattice pattern, and a switching element 16 is connected to each of them. Further, an EC element 17 is connected to each switching element. In FIG. 15, scanning lines 18 and signal lines 19 are wired in a grid pattern, a switching element 16 is disposed on the scanning line 18, and an EC element 17 is disposed above the switching element 16.

  In the case of such a switching element array that drives a current-driven display element such as an EC display, an arrangement in which the switching element is stacked behind the display element is preferable, unlike the arrangement diagram of FIG. Such a switching element array can be manufactured by appropriately combining a normal photolithography process and the above-described through-hole forming process.

  The switching element according to the present invention is useful as a switching element for driving a display element of a display. Examples of the display using the switching element of the present invention include a liquid crystal display, an EL display, a PDLC display, and an electrophoretic display. The switching element of the present invention can be used for various electronic devices such as an IC tag, an RF tag, an IC card, a memory, and various sensors (gas sensor, pH sensor, etc.).

  The present invention will be described in more detail with reference to the following examples, but the present invention is not limited thereto.

Example 1
(1) Manufacture of SIT (1) type switching element A SIT (1) type switching element was manufactured according to the process shown in FIG. First, a polystyrene latex dispersion with a particle size of 130 nm was applied by spin coating on a substrate with an undercoat film made of silicon oxide on the glass surface. After drying, gold was vapor-deposited as a drain electrode and chromium as an undercoat layer. A total film thickness of 40 nm was formed by this method. At that time, a drain electrode pattern was formed by a mask vapor deposition method using a vapor deposition mask in which a desired pattern was previously formed. Thereafter, the polystyrene latex was removed by ultrasonic irradiation in methanol to prepare a porous drain electrode (gold thin film) 2 on the substrate 1 (step (1)). When the obtained porous film was observed with an atomic force microscope (AFM), it was confirmed that many voids having a pore diameter of about 130 nm were formed.

  Next, copper phthalocyanine was formed into a film thickness of 80 nm on the transistor portion on the drain electrode 2 by using a mask vapor deposition method to form an organic charge transporting material layer 5. Further, an aluminum film having a film thickness of 25 nm was formed on the organic charge transporting layer by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as that of the drain electrode 2 to obtain a gate electrode precursor film. This is irradiated with ultrasonic waves in methanol to selectively remove the portion where the organic charge transporting material layer 5 is in direct contact with the substrate 1, that is, the copper phthalocyanine film and the aluminum film in the through hole portion of the drain electrode, and the gate electrode. A porous laminated film containing 4 was formed (step (2)).

  Using a vapor deposition mask having the same pattern as the above pattern on the gate electrode 4, copper phthalocyanine was formed to a thickness of 160 nm by a mask vapor deposition method to form an organic charge transporting material layer 5 '(step 3). Using a vapor deposition mask in which a desired pattern was formed on the organic charge transporting material layer 5 ', gold was deposited to a film thickness of 30 nm by the mask vapor deposition method to form the source electrode 3 (step (4)). Furthermore, a PMMA solution was applied to the entire device as a protective film using a bar coater to produce a SIT (1) type switching device.

When the characteristics of the obtained switching element were investigated, the current density when 2 V was applied between the source electrode and the drain electrode was 0.1 A / cm ² , and the ON / 0FF ratio of the current between the source electrode and the drain electrode (I _ON / I _0FF ) was 10 ⁴ or more, and good characteristics were obtained for driving EC elements and the like.

Example 2
Manufacturing Method of SIT (2) Type Switching Element A SIT (2) type switching element was produced according to the process shown in FIG. First, a polystyrene latex dispersion liquid having a particle size of 150 nm is applied by spin coating on a substrate 1 having an undercoat film made of silicon oxide on the surface of glass. After drying, gold is used as a drain electrode and chromium is used as an undercoat layer. Each was formed into a film with a total thickness of 40 nm by a vacuum deposition method. In that case, the pattern of the drain electrode 2 was formed by the mask vapor deposition method using the vapor deposition mask which formed the desired pattern previously. Thereafter, the polystyrene latex was removed by ultrasonic irradiation in methanol to prepare a porous drain electrode (gold thin film) 2 on the substrate 1 (step (1)). When the porous film was observed with an atomic force microscope (AFM), it was confirmed that many voids having a pore diameter of about 150 nm were formed.

  Next, a p-type organic charge transporting material layer 6 was formed by depositing copper phthalocyanine with a film thickness of 80 nm by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as the drain electrode 2 on the transistor portion on the drain electrode 2. . Furthermore, N, N'-bis (perfluoropropylmethyl) -naphthalenetetracarboxyldiimide (NTCDI) was deposited at a film thickness of 20 nm by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as above, and n Type organic charge transporting material layer 7 was formed.

  Furthermore, an aluminum film having a film thickness of 25 nm was formed on the n-type organic charge transporting material layer 7 by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as the above pattern, to obtain a gate electrode precursor film. This is irradiated with ultrasonic waves in methanol to selectively remove the portion where the p-type organic charge transporting material layer 6 is in direct contact with the substrate, that is, the copper phthalocyanine film, the NTCDI film and the aluminum film in the through hole portion of the drain electrode. Then, a porous laminated film including the gate electrode 4 was formed (step (2)).

  Using an evaporation mask having the same pattern as the above pattern on the gate electrode, NTCDI was deposited to a thickness of 20 nm by a mask evaporation method to form an n-type organic charge transporting material layer 7 '(step 3). Further, using a vapor deposition mask having almost the same pattern as the above pattern, copper phthalocyanine was formed with a film thickness of 140 nm by a mask vapor deposition method to form a p-type organic charge transporting material layer 6 ′ (step (4)). .

  Using a vapor deposition mask in which a desired pattern was formed on the p-type organic charge transporting material layer 6 ′, gold was deposited to a thickness of 30 nm by mask vapor deposition to form the source electrode 3 (step (5 )). Further, a PMMA solution was applied to the entire device as a protective film using a bar coater to produce a SIT (2) type switching device.

When the characteristics of the obtained switching element were examined, the current density when 5 V was applied between the source electrode and the drain electrode was 0.1 A / cm ² , and the ON / 0FF ratio of the current between the source electrode and the drain electrode (I _ON / I _0FF ) was 10 ⁵ or more, and good characteristics were obtained for driving EC elements and the like.

Example 3
Production of FET-type switching element An FET-type switching element was produced according to the process shown in FIG. First, aluminum was formed to a thickness of 100 nm by sputtering on a substrate 1 having a glass surface provided with an undercoat film made of silicon oxide. Subsequently, the gate electrode 4 was formed by patterning into a desired shape by a photolithography process and a wet etching process (process (1)). Next, silicon oxide was formed to a thickness of 50 nm by sputtering to form the gate insulating layer 8 (step (2)).

  A polystyrene latex dispersion with a particle size of 200 nm is applied onto the gate insulating layer 8 by spin coating, and after drying, gold is formed as a drain electrode and chromium is formed as an undercoat layer to a total thickness of 40 nm by vacuum deposition. did. Thereafter, the latex latex was removed by ultrasonic irradiation in methanol to obtain a porous drain electrode (gold thin film) 2. When the obtained porous film was observed with an atomic force microscope (AFM), it was confirmed that many voids having a pore diameter of about 200 nm were formed. Next, the drain electrode 2 was formed by patterning into a desired shape by a photolithographic process and a wet etching process (process (3)).

  Next, arachidic acid was formed in a film thickness of 40 nm on the transistor portion on the drain electrode 2 by mask vapor deposition to form an insulator layer 9. This is irradiated with ultrasonic waves in methanol, and the portion of the insulator layer 9 in direct contact with the gate insulating layer 8, that is, the arachidic acid film in the through hole portion of the drain electrode 2 is selectively removed, and the drain electrode 2 is removed. A porous laminated film including the same was formed (step (4)).

  Pentacene purified by sublimation by mask vapor deposition was formed on the transistor portion on the insulator layer 9 with a film thickness of 40 nm to form the organic charge transporting material layer 5 (step (5)). Using a vapor deposition mask in which a desired pattern was formed on the organic charge transporting material layer 5, gold was deposited to a film thickness of 50 nm by a mask vapor deposition method to form the source electrode 3 (step (6)). Furthermore, a PMMA solution was applied to the entire device as a protective film using a bar coater to produce an FET type switching device.

When the characteristics of the obtained switching element were examined, the current density when applying 10 V between the source electrode and the drain electrode was 0.8 A / cm ² , and the ON / 0FF ratio of the current between the source electrode and the drain electrode (I _ON / I _0FF ) was 10 ⁶ or more, and good characteristics were obtained for driving EC elements and the like.

Example 4
Manufacture of SIT (1) '-type switching element A SIT (1)'-type switching element was produced according to the process shown in FIG. First, gold was formed as a drain electrode and chromium was formed as an undercoat layer with a film thickness of 40 nm in total by a vacuum deposition method on a substrate 1 provided with an undercoat film made of silicon oxide on a glass surface. At that time, a pattern of the drain electrode 2 was formed by a mask vapor deposition method using a vapor deposition mask in which a desired pattern was formed in advance (step (1)).

  After silicon oil is deposited on the drain electrode 2 by spraying, copper phthalocyanine is deposited to a thickness of 80 nm on the transistor portion on the drain electrode by using a mask vapor deposition method, and the organic charge transporting material layer 5 is formed. Formed.

  Further, an aluminum film having a film thickness of 25 nm was formed on the organic charge transporting material layer 5 by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as the above pattern, to obtain a gate electrode precursor film. This is irradiated with ultrasonic waves in methanol to selectively remove the copper phthalocyanine film and the aluminum film where the organic charge transporting material layer 5 is in direct contact with the silicon oil adhering to the drain electrode 2 to obtain a gate electrode. A porous laminated film containing 4 was formed (step (2)).

  On the gate electrode 4, an upper layer copper phthalocyanine having a film thickness of 160 nm was formed by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as the above pattern to form an organic charge transporting material layer 5 ′ (step (3 )). Using a vapor deposition mask having a desired pattern formed on the organic charge transporting material layer 5 ', gold was deposited to a thickness of 30 nm by mask vapor deposition to form the source electrode 3 (step (4)). Further, a PMMA solution was applied to the entire device as a protective film using a bar coater to produce a SIT (1) 'type switching device.

The characteristics of the obtained switching element are that the current density when applying 2 V between the source electrode and the drain electrode is 0.1 A / cm ² , and the ON / 0FF ratio (I _ON / I _0FF ) of the current between the source electrode and the drain electrode is 10 ³ was.

Example 5
Manufacturing Method of SIT (2) ′-Type Switching Element A SIT (2) ′-type switching element was fabricated according to the process shown in FIG. First, gold was formed as a drain electrode and chromium was formed as an undercoat layer with a film thickness of 40 nm in total by a vacuum deposition method on a substrate 1 provided with an undercoat film made of silicon oxide on a glass surface. At that time, a pattern of the drain electrode 2 was formed by a mask vapor deposition method using a vapor deposition mask in which a desired pattern was formed in advance (step (1)).

Next, copper phthalocyanine was formed to a thickness of 80 nm on the transistor portion on the drain electrode 2 by using a mask vapor deposition method to form the p-type organic charge transporting material layer 6. Next, silicon oil was deposited on the p-type organic charge transporting material layer 6 by a spray method. Further, N, N'-bis (perfluoropropylmethyl) -naphthalenetetracarboxyldiimide (NTCDI) was deposited to a thickness of 20 nm by a mask vapor deposition method using a vapor deposition mask having almost the same pattern as above. Type organic charge transporting material layer 7 was formed.

  Furthermore, an aluminum film having a film thickness of 25 nm was formed on the n-type organic charge transporting material layer 7 by using a vapor deposition mask having substantially the same pattern as the above pattern, thereby forming a gate electrode precursor film. This is irradiated with ultrasonic waves in methanol, and the n-type organic charge transporting material layer 7 selectively contacts the NTCDI film and the aluminum film in direct contact with the silicon oil deposited on the p-type organic charge transporting material layer. By removing, a porous laminated film including the gate electrode 4 was formed (step (2)).

  An n-type organic charge transporting material layer 7 ′ was formed on the gate electrode 4 by depositing NTCDI with a film thickness of 20 nm by a mask vapor deposition method using a vapor deposition mask having the same pattern as the above pattern (process (3 )). Furthermore, copper phthalocyanine was formed to a film thickness of 140 nm using a mask vapor deposition method to form a p-type organic charge transporting material layer 6 '(step (4)).

  Using a vapor deposition mask having a desired pattern formed on the p-type organic charge transporting material layer 6 ′, gold was deposited to a thickness of 30 nm by mask vapor deposition to form the source electrode 3 (step (5)). . Further, a PMMA solution was applied to the entire device as a protective film using a bar coater to produce a SIT (2) 'type switching device.

The characteristics of the obtained switching element are: current density when 5 V is applied between the source electrode and the drain electrode = 0.1 A / cm ² , ON / 0FF ratio of the current between the source electrode and the drain electrode (I _ON / I _0FF ) = 10 was ⁴ .

Example 6
Manufacturing Method of Switching Element Array The switching element array shown in FIGS. 14 and 15 was manufactured by the following method. The manufacturing process of the switching element array of the present embodiment is shown in FIGS.

  Gold was vapor-deposited on the entire surface of a glass substrate provided with an undercoat film 20 made of silicon oxide, and then patterned by a photolithography process to form a scanning line wiring pattern 21 (FIG. 16).

  After applying the photosensitive polyimide 22, an opening 23 offset on the scanning line was formed (FIG. 17). Next, a polystyrene latex dispersion liquid having a particle size of 80 nm was applied by spin coating and dried, and further, chromium was formed as a gold and undercoat layer on the opening 23 with a film thickness of 40 nm by a mask vapor deposition method. Thereafter, the latex latex was removed by ultrasonic irradiation in methanol to form a drain electrode composed of a porous gold thin film. Next, copper phthalocyanine was deposited on the entire surface with a film thickness of 80 nm by vapor deposition.

  Subsequently, aluminum was deposited on the entire surface to form a gate electrode precursor film 24. This is ultrasonically irradiated in methanol to selectively remove the portion where the organic charge transporting material layer is not in direct contact with gold, that is, the through-hole portion of the drain electrode and the copper phthalocyanine film and the aluminum film on the polyimide. A porous laminated film including the electrode 25 was formed (FIG. 18). Next, the signal line 26 was formed by mask vapor deposition (FIG. 19).

  Subsequently, copper phthalocyanine was formed into a film having a thickness of 160 nm by a mask vapor deposition method to form an organic charge transporting material layer 27 of the switching element 16 (FIG. 20). Next, the source electrode and the display pixel electrode 28 were formed by mask vapor deposition of gold (FIG. 21). Further, after the photosensitive polyimide 29 was applied over the entire surface, the opening 30 of the display pixel electrode was formed (FIG. 22).

  The obtained switching element array exhibited sufficient switching characteristics to drive current type display devices such as EC and EL.

  Patent application related to the results of commissioned research by the government, etc. (FY2003 New Energy and Industrial Technology Development Organization (Nanotechnology Program “Full Color Rewritable Paper Project Utilizing Functional Capsule”) Subject to the application of the Article)

1 is a schematic partial cross-sectional view showing an element structure of SIT (1) which is an example of a switching element of the present invention. It is a fragmentary top view which shows an example of the gate electrode used for the switching element of this invention. FIG. 10 is a schematic partial cross-sectional view showing an element structure of SIT (2) which is another example of the switching element of the present invention. It is a general | schematic fragmentary sectional view which shows the element structure of FET which is another example of the switching element of this invention. 1 is a schematic partial cross-sectional view showing an element structure of SIT (1) ′ which is an example of a switching element manufactured by a method for manufacturing a switching element of the present invention. FIG. 10 is a schematic partial cross-sectional view showing an element structure of SIT (2) ′ which is another example of the switching element manufactured by the method for manufacturing a switching element of the present invention. It is a schematic fragmentary sectional view which shows the method of forming the thin film which has a micropore as a shadow mask at the time of vapor deposition of microparticles | fine-particles. It is a schematic fragmentary sectional view which shows the mechanical selective peeling method by the ultrasonic treatment in a liquid. FIG. 5 is a schematic partial cross-sectional view showing a method for manufacturing SIT (1), which is an example of a method for manufacturing a switching element of the present invention. FIG. 10 is a schematic partial cross-sectional view showing a method for manufacturing SIT (2), which is another example of a method for manufacturing a switching element of the present invention. It is a general | schematic fragmentary sectional view which shows the manufacturing method of FET which is another example of the manufacturing method of the switching element of this invention. FIG. 10 is a schematic partial cross-sectional view showing a method for manufacturing SIT (1) ′, which is still another example of the method for manufacturing a switching element of the present invention. It is a general | schematic fragmentary sectional view which shows the manufacturing method of SIT (2) 'which is another example of the manufacturing method of the switching element of this invention. It is a wiring diagram which shows an example of the switching element array of this invention for driving an EC display. It is an element arrangement | positioning figure which shows an example of the switching element array of this invention for driving an EC display. It is the schematic which shows the manufacturing process (photolithography process) of the switching element array of Example 6. It is the schematic which shows the manufacturing process (formation process of the opening part 23) of the switching element array of Example 6. FIG. It is the schematic which shows the manufacturing process (selective peeling process of a thin film) of the switching element array of Example 6. FIG. 10 is a schematic diagram illustrating a manufacturing process of the switching element array of Example 6 (a process of forming a signal line 26). FIG. 10 is a schematic view showing a manufacturing process of the switching element array of Example 6 (formation process of the organic charge transporting material layer 27). It is the schematic which shows the manufacturing process (formation process of a source electrode and a display pixel electrode) of the switching element array of Example 6. It is the schematic which shows the manufacturing process (formation process of the opening part 30) of the switching element array of Example 6. FIG. It is a general | schematic fragmentary sectional view which shows the structure of the conventional SIT.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Drain electrode 3 ... Source electrode 4 ... Gate electrodes 5, 5 '... Organic charge transporting material layer (semiconductor layer)
6,6 '... p-type (or hole-transporting) organic charge transporting material layer (p-type semiconductor layer)
7,7 '... n-type (or electron transport) organic charge transport material layer (n-type semiconductor layer)
8 ... Gate insulating layer 9 ... Insulator layer
10 ... Opening of gate electrode
11 ... fine particles
12 ... deposition film
13 ... Patterned thin film
14 ・ ・ ・ Functional thin film (1)
15 ... functional thin film (2)
16 ... Switching element
17 ... EC element
18 ... Scanning line
19 ... Signal line
20 ... Undercoat film
21 ... Scanning line wiring pattern
22 ... Polyimide film
23 ・ ・ ・ Opening
24 ・ ・ ・ Gate electrode precursor film
25 ... Gate electrode
26 ... Signal line pattern
27 ... Charge transport material layer
28 ... Source electrode and display pixel electrode
29 ・ ・ ・ Polyimide film
30 ... Opening of display pixel electrode

Claims (15)

A switching element comprising an electrode pair comprising a source electrode and a drain electrode, and a gate electrode not in contact with the electrode pair between the source electrode and the drain electrode, wherein one surface of the gate electrode is the source The electrode has the other surface facing the drain electrode, and the gate electrode has a plurality of through holes each having an opening formed on each of the source electrode side and the drain electrode side, and the drain electrode The electrode has a hole having an opening formed at least on the gate electrode side at a position substantially the same as the position of the through hole formed in the gate electrode, and the through hole and the drain of the gate electrode A gap between the hole of the electrode and the gap between the electrode pair is at least partially filled with an electron transporting or hole transporting organic charge transporting substance. Switching element. 2. The switching element according to claim 1, wherein a diameter of the through hole formed in the gate electrode and / or the hole formed in the drain electrode is 1 nm to 10 [mu] m. 3. The switching element according to claim 1, wherein the gate electrode is covered with an electron transporting organic charge transporting material layer, between the electron transporting organic charge transporting material layer and the drain electrode, and A switching element comprising a hole transporting organic charge transporting material layer between an electron transporting organic charge transporting material layer and the source electrode. A field effect switching element comprising an electrode pair comprising a gate electrode and a source electrode, and a gate insulating layer, a drain electrode and an insulator layer between the gate electrode and the source electrode, wherein one surface of the drain electrode Is in contact with the gate insulating layer, the other surface is in contact with the insulator layer, and the drain electrode has a plurality of through holes each having one opening on each of the gate electrode side and the insulator layer side. The switching element is characterized in that the through hole of the drain electrode and the gap between the gate insulating layer and the source electrode are at least partially filled with an electron transporting or hole transporting organic charge transporting substance. 5. The switching element according to claim 4, wherein the insulator layer has a through hole at a position substantially the same as a position of the through hole formed in the drain electrode. 6. The switching element according to claim 4, wherein a diameter of the through hole formed in the drain electrode and / or the insulator layer is 1 nm to 10 [mu] m. A method of manufacturing a switching element comprising an electrode pair comprising a source electrode and a drain electrode, and a gate electrode not in contact with the electrode pair between the source electrode and the drain electrode, the source electrode side of the gate electrode Forming a plurality of through holes each having one opening on each surface on the drain electrode side, and at least partially forming an electron transporting or hole transporting organic charge transporting material in the through holes of the gate electrode A method for manufacturing a switching element, comprising: a step of filling, and a step of at least partially filling an organic charge transporting substance having an electron transport property or a hole transport property into a gap between the electrode pair. 8. The method of manufacturing a switching element according to claim 7, wherein a hole having an opening at least on the gate electrode side is formed at substantially the same position as the through hole formed in the gate electrode of the drain electrode. And a step of at least partially filling the hole of the drain electrode with an electron transporting or hole transporting organic charge transporting substance. 9. The method of manufacturing a switching element according to claim 7, wherein the gate electrode is covered with an electron transporting organic charge transporting material layer, and the electron transporting organic charge transporting material layer and the drain electrode are interposed. And a method for producing a switching element, wherein a hole transporting organic charge transporting material layer is provided between the electron transporting organic charge transporting material layer and the source electrode. 10. The method of manufacturing a switching element according to claim 7, wherein the through hole of the gate electrode and the hole of the drain electrode are formed by a thin film mechanical selective peeling method by ultrasonic treatment in liquid. A method for manufacturing a switching element. 11. The method for manufacturing a switching element according to claim 10, wherein an ultrasonic sensitive layer is provided on an uppermost layer of the thin film laminated structure to which the mechanical selective peeling method is applied. 12. The method of manufacturing a switching element according to claim 11, wherein the ultrasonic sensitive layer is made of a metal. 13. The method of manufacturing a switching element according to claim 7, wherein the through hole is formed by a thin film forming method in which fine particles are shadow masked. 14. The method for manufacturing a switching element according to claim 13, wherein the fine particles are made of an organic / inorganic composite. A switching element array for a display device, comprising the switching element according to any one of claims 1 to 6 or the switching element produced by the production method according to any one of claims 7 to 14.

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