JP2005070723A - Substrate for electrooptical device, electrooptical device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for an electrooptical device capable of reducing mounting defects by preventing defects of electrical connection at a terminal part and to provide the electrooptical device and electronic equipment. <P>SOLUTION: In the substrate for the electrooptical device displaying an image at a display part corresponding to a signal inputted via the terminal part provided on the substrate, the terminal part is provided with a metal layer 301 electrically connected to the display part via a wiring and an insulating film 7 formed on the metal layer 301, an aperture part 303 is formed in the insulating film 7 so that the metal layer 301 is exposed and the area of at least the uppermost surface of the aperture part 303 is larger than the area of the metal layer 301. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a substrate for an electro-optical device, an electro-optical device, and an electronic apparatus.

Conventionally, as a display device such as a liquid crystal device or an electroluminescence (EL) device, a thin film transistor (TFT) which is a thin film semiconductor device is provided in each pixel in order to drive a large number of pixels arranged in a matrix for each pixel. An active matrix type display device is known.
For example, when an IC or TCP (Tape Carrier Package) for inputting / outputting signals to an active matrix liquid crystal display device is connected, a plurality of pads (terminal portions) arranged along the edge of the active matrix substrate of the liquid crystal display device. In other words, a method is used in which an IC or TCP is electrically connected using an anisotropic conductive film (ACF: Anisotropic Conductive Film).

As the pad structure, various types of multilayer structures in which metal films and insulating films are laminated have been proposed. As an example, there is a structure in which an insulating film and a metal wiring film are sequentially laminated on a metal wiring film, and a transparent electrode film is formed as the uppermost layer.
In addition, in order to prevent the insulation between the pads and the corrosion of the metal wiring due to the intrusion of moisture from the end face of the metal wiring film, the structure other than the connection part with the IC or TCP is covered with an insulating film Have also been proposed. (For example, see Patent Documents 1 to 3.)
JP 2001-195005 A (page 4, FIG. 3) Japanese Patent No. 2798052 (page 2-3, FIG. 1) JP 2002-196703 (Page 4-5, Fig. 2)

As described above, in a conventional substrate for an electro-optical device, an insulating film is formed over the terminal portion on the substrate, and an opening is provided in the insulating film to expose the terminal portion. In the case of this configuration, when the pitch of the terminal portion is reduced (narrow pitch), the ratio of the depth to the opening width of the opening portion is increased, so that it is difficult for IC, TCP, and the like to contact the terminal portion. For this reason, there is a problem that it becomes difficult to electrically connect the display device and the IC, TCP, etc., and mounting defects are likely to occur.
In particular, in the case where the surface of the insulating film is planarized by CMP (Chemical Mechanical Polishing), there is a problem that the insulating film remains thicker than a region having a step higher than the terminal portion, and mounting defects are more likely to occur. .

In Patent Document 1, the insulating film between the terminal portions provided in the display device is removed, and the surface of the insulating film is made lower than the terminal surface, thereby ensuring electrical connection and mounting with high reliability. Have gained. However, such a configuration is difficult to prevent a short circuit between the terminal portions and is not suitable for mounting at a narrow pitch.
In addition, since there is no means for accurately removing the insulating film, there is a problem in that if the insulating film is removed (etched) too much, a short circuit between the terminals may occur. .

  In Patent Document 2, the connection between the terminal portion of the display device and an external circuit is connected via an anisotropic conductive adhesive containing conductive fine particles. In this configuration, the connection is ensured by ensuring that the conductive fine particles do not easily reach the terminals by pressure bonding. However, with this configuration, if there is a difference in the height of the surface of each terminal portion, there is a problem in that there is a possibility that a terminal that does not perform sufficient electrical connection may occur due to a difference in the penetration of conductive fine particles. It was.

  In Patent Document 3, an opening smaller than the terminal portion is provided on the upper portion of the terminal portion of the display device, and a lead wire for inspection is drawn out from the opening portion. However, in Patent Document 3, the lead-out wiring is not actively used for mounting. In addition, even when used for mounting, in the above configuration, a step due to the lead wiring is formed on the outer periphery of the opening, so that there is a possibility that a terminal that is not sufficiently electrically connected may be generated.

  The present invention has been made in order to solve the above-described problem, and can provide a substrate for an electro-optical device, an electro-optical device, and an electro-optical device that can reduce mounting defects by preventing defects in electrical connection in a terminal portion. An object is to provide electronic equipment.

  In order to achieve the above object, a first electro-optical device substrate of the present invention is an electro-optical device that displays an image on a display unit corresponding to a signal input through a terminal unit provided on the substrate. A device substrate, wherein the terminal portion includes a metal layer electrically connected to the display portion via wiring and an insulating film formed on the metal layer, and the metal layer is exposed in the insulating film. The opening is formed as described above, and the area of at least the outermost surface of the opening is larger than the area of the metal layer.

  That is, since the first electro-optical device substrate of the present invention is formed such that at least the area of the outermost surface of the opening is larger than the area of the metal layer, the insulating film is larger than the conventional electro-optical device substrate. The ratio of the dimension of the opening area with respect to the thickness of is increased. Therefore, the member that transmits the signal can easily come into contact with the metal layer through the opening, and the signal can be easily input to the substrate for the electro-optical device. That is, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and mounting failures due to electrical contact failure can be reduced.

In order to realize the above configuration, more specifically, it is desirable that the shape of the opening is formed in a tapered shape in which the area of the opening increases in the direction away from the metal layer.
According to this configuration, since the area of the opening increases as the distance from the metal layer increases, the signal transmitting member can be easily inserted into the opening and can easily come into contact with the metal layer. Therefore, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and the mounting failure due to the electrical contact failure can be reduced.
In this configuration, for example, when an opening is formed and another layer such as an alignment film is laminated thereon by spin coating or the like, the area of the opening increases in the direction away from the metal layer. Because of its shape, the other layer is unlikely to have uneven thickness on the opening when stacked. Since the unevenness of the film thickness is small, the other layer on the opening can be surely removed and the metal layer can be easily exposed, so that it is easy to prevent the occurrence of electrical contact failure in the terminal portion due to the film residue. As a result, it is possible to reduce mounting defects due to poor electrical contact.

In order to realize the above configuration, more specifically, the area of the opening on the metal layer side may be equal to or larger than the area of the metal layer.
According to this configuration, since the area of the end portion on the metal layer side in the opening is equal to or larger than the area of the metal layer, the metal layer is completely exposed. Therefore, it becomes easy to prevent the occurrence of poor electrical contact in the terminal portion. As a result, it is possible to reduce mounting defects due to poor electrical contact.

In order to realize the above configuration, more specifically, a stopper layer for defining the hole depth of the opening may be disposed under the insulating film.
According to this configuration, since the stopper layer that defines the hole depth of the opening is provided under the insulating film, it is only necessary to form the hole of the opening until the stopper layer is reached. It becomes easier to adjust the depth.

  A second electro-optical device substrate according to the present invention is an electro-optical device substrate that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate. The portion includes a metal layer electrically connected to the display portion via wiring and an insulating film formed on the metal layer, and the insulating film near the terminal portion on the substrate is removed, and the upper surface of the metal layer Is exposed.

That is, in the second electro-optical device substrate of the present invention, since the insulating film in the vicinity of the terminal portion is removed and the upper surface of the metal layer is exposed, the signal transmitting member is likely to come into contact with the metal layer. This makes it easier to input the signal to the electro-optical device substrate. That is, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and mounting failures due to electrical contact failure can be reduced.
Further, since only the upper surface of the metal layer is exposed, the metal layers are not easily short-circuited, and mounting defects due to electrical contact defects can be reduced.

In order to realize the above configuration, more specifically, a stopper layer that defines the thickness of the insulating film to be removed is formed under the insulating film, and the upper surface of the stopper layer is flush with the upper surface of the metal layer. It may be arranged above.
According to this configuration, since the stopper layer that defines the thickness of the insulating film to be removed is provided under the insulating film, the insulating film only needs to be removed until it reaches the stopper layer. It will be easier to adjust the thickness.

  A third electro-optical device substrate according to the present invention is an electro-optical device substrate that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate. The portion includes a metal layer electrically connected to the display portion via wiring and an insulating film formed on the metal layer, and the insulating film has an opening so that the metal layer is exposed. In addition, the thickness of the insulating film in the vicinity of the terminal portion on the substrate is smaller than the thickness in other regions.

  That is, in the third electro-optical device substrate of the present invention, since the thickness of the insulating film in the vicinity of the terminal portion on the substrate is thinner than the thickness in other regions, the opening portion with respect to the thickness of the insulating film The proportion of area dimensions is increasing. Therefore, the member that transmits the signal can easily come into contact with the metal layer through the opening, and the signal can be easily input to the substrate for the electro-optical device. That is, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and mounting failures due to electrical contact failure can be reduced.

  A fourth electro-optical device substrate according to the present invention is an electro-optical device substrate that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate. The portion includes a metal layer electrically connected to the display portion via wiring and an insulating film formed on the metal layer, and the insulating film has an opening so that the metal layer is exposed. A dummy pattern is disposed under the metal layer so as to substantially overlap the metal layer, and the thickness of the insulating film on the metal layer is smaller than the thickness of the insulating film in other regions. To do.

That is, in the fourth electro-optical device substrate of the present invention, since the dummy pattern is arranged so as to substantially overlap the metal layer, the metal layer is formed at a position protruding to the insulating film side. Therefore, when flattening such as CMP, the thickness of the insulating film on the metal layer becomes thinner than the thickness of the insulating film in other regions, and the ratio of the size of the opening area to the thickness of the insulating film is large. Become. As a result, the member that transmits the signal can easily come into contact with the metal layer through the opening, and the signal can be easily input to the substrate for the electro-optical device. That is, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and mounting failures due to electrical contact failure can be reduced.
Further, the dummy pattern may or may not be electrically connected to the wiring provided in the display portion. When conducting, it can be used as redundant wiring.

In order to realize the above-described configuration, more specifically, it is desirable that the area of the dummy pattern is formed larger than the area of the metal layer.
According to this configuration, since the area of the dummy pattern is larger than the area of the metal layer, the entire metal layer is formed at a position protruding to the insulating film side. Therefore, the thickness of the insulating film on the metal film becomes uniform, and the member that transmits the signal is easily brought into contact with the metal layer on the surface. As a result, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and the mounting failure due to the electrical contact failure can be reduced.

In order to realize the above configuration, more specifically, one dummy pattern may be arranged for one metal layer.
According to this configuration, since one dummy pattern is arranged for one metal layer, for example, even when an electric signal is input to the metal layer and a potential is induced in the corresponding dummy pattern, The metal layer to which no signal is input is not affected.

In order to realize the above configuration, more specifically, one metal layer and one dummy pattern may be electrically connected.
According to this configuration, since one metal layer and one dummy pattern are electrically connected, the dummy pattern can be used as a part of the terminal portion. As a result, the dummy pattern can be extended and used as a wiring, and can serve as a redundant wiring. In addition, the time constant of signal transmission can be improved by using a low-resistance material as a material for forming the dummy pattern.

In order to realize the above configuration, more specifically, even if the one metal layer and the one dummy pattern are electrically connected by the conductive portion arranged in the periphery of the one metal layer. Good.
According to this structure, since the metal layer and the dummy pattern are electrically connected by the conductive portion arranged in the peripheral portion of the metal layer, a flat portion with less unevenness is formed in the substantially central portion of the metal layer. Has been. Therefore, when the member for inputting a signal to the terminal portion and the metal layer are in contact with each other at the flat surface portion, the member for inputting a signal to the terminal portion and the metal layer can be reliably brought into contact with each other and the signal can be input.

In order to realize the above configuration, more specifically, one dummy pattern may be arranged for a plurality of metal layers.
According to this configuration, for example, when the distance between the terminal portions is narrowed, if one dummy pattern is arranged for one metal film, the gap between the dummy patterns becomes narrow, and the inter-layer insulating film or the like wraps around. Becomes worse. However, if a single dummy pattern is arranged for a plurality of metal layers, there is no problem of throwing in an interlayer insulating film or the like even if the interval between the terminal portions is narrowed. Therefore, it is suitable for narrowing the interval between the terminal portions.

In order to realize the above configuration, more specifically, one dummy pattern may be fixed at a predetermined potential.
According to this configuration, since the dummy pattern is fixed at a predetermined potential, the potential of the dummy pattern does not fluctuate due to the signal input to the terminal portion, and the metal layer to which no signal is input accordingly. No potential is induced.

  A fifth electro-optical device substrate according to the present invention is an electro-optical device substrate that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate. The portion includes a metal layer electrically connected to the display portion via wiring and an insulating film formed on the metal layer, and the insulating film has an opening so that the metal layer is exposed. In the opening, an embedded member made of a conductive member is disposed.

  That is, in the fifth electro-optical device substrate of the present invention, the opening is formed so that the metal layer is exposed to the insulating film, and the embedded member is electrically connected to the metal layer in the opening. Are arranged. Therefore, the member that transmits the signal is easily brought into contact with the metal layer, and the signal is easily input to the substrate for the electro-optical device. That is, it becomes easy to prevent the occurrence of poor electrical contact in the terminal portion, and it is possible to reduce mounting failures due to poor electrical contact.

In order to realize the above configuration, more specifically, the shape of the embedded member may be a shape that matches the shape of the opening.
According to this configuration, since the shape of the embedded member matches the shape of the opening, the embedded member does not protrude from the insulating film. Therefore, it is difficult for the metal layers to be short-circuited, and mounting defects due to electrical contact defects can be reduced.

In order to realize the above configuration, more specifically, the terminal portion may be composed of a plurality of conductive layers, and at least one of the conductive layers may be drawn out from the opening onto the insulating film.
According to this configuration, the terminal portion is composed of a plurality of conductive layers, and at least one of the conductive layers is drawn out from the opening onto the insulating film. Therefore, the member that transmits the signal is easily brought into contact with the conductive layer, and the signal is easily input to the substrate for the electro-optical device. That is, it becomes easy to prevent the occurrence of electrical contact failure in the terminal portion, and mounting failures due to electrical contact failure can be reduced.

An electro-optical device according to the present invention includes the substrate for an electro-optical device according to the present invention.
That is, since the electro-optical device according to the present invention includes the electro-optical device substrate according to the present invention, there is no possibility that problems such as poor connection at the terminal portion occur. Therefore, the stability and reliability of the electrical connection can be improved, and as a result, the stability and reliability of the operation and connection of the electro-optical device can be improved.

An electronic apparatus according to the present invention includes the electro-optical device according to the present invention.
That is, since the electronic apparatus of the present invention includes the electro-optical device of the present invention, the stability and reliability of electrical connection can be improved, and as a result, the operation and connection stability of the electronic apparatus can be improved. And reliability can be improved.

[First Embodiment]
[Electro-optical device]
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
In this embodiment, an active matrix liquid crystal display device using liquid crystal as an electro-optical material will be described as an example.
FIG. 1 is a plan view showing the configuration of the liquid crystal display device according to the present embodiment, and FIG. 2 is a cross-sectional view taken along line HH ′ of FIG. FIG. 3 is an equivalent circuit diagram of various elements and wirings in a plurality of pixels formed in a matrix in the image display region of the liquid crystal display device. In each drawing used in the following description, the scale is different for each layer and each member so that each layer and each member can be recognized on the drawing.

  As shown in FIGS. 1 and 2, in the liquid crystal display device (electro-optical device) 100 according to the present embodiment, a TFT array substrate (substrate) 10 and a counter substrate 20 are bonded together by a sealing material 52. The liquid crystal 50 is sealed and held in the partitioned area. A peripheral parting 53 made of a light shielding material is formed in a region inside the region where the sealing material 52 is formed. A data line driving circuit 201 and a pad (terminal portion) 202 are formed along one side of the TFT array substrate 10 in a region outside the sealing material 52, and scanning line driving is performed along two sides adjacent to the one side. A circuit 204 is formed. On the remaining side of the TFT array substrate 10, a plurality of wirings 205 are provided for connecting between the scanning line driving circuits 204 provided on both sides of the image display area. Further, at least one corner of the counter substrate 20 is provided with an inter-substrate conductive material 206 for establishing electrical continuity between the TFT array substrate 10 and the counter substrate 20.

  In the image display area of the liquid crystal display device 100, as shown in FIG. 3, a plurality of pixels 100a are configured in a matrix, and a pixel switching TFT 30 is formed in each pixel 100a. A data line 6 a that supplies pixel signals S 1, S 2,..., Sn is electrically connected to the source of the TFT 30. Here, the pixel signals S1, S2,..., Sn to be written to the data line 6a may be supplied simultaneously, or may be provided in a time division manner by providing a demultiplexer, or a plurality of adjacent data lines 6a. You may make it supply for every group with respect to each other.

Further, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 3a in a pulse-sequential manner in this order at a predetermined timing. It is configured. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the pixel signal S1, S2,... Supplied from the data line 6a is turned on by turning on the TFT 30 as a switching element for a certain period. Sn is written to each pixel at a predetermined timing.
In this way, the pixel signals S1, S2,..., Sn at a predetermined level written in the liquid crystal via the pixel electrode 9a are held for a certain period with the counter electrode 21 of the counter substrate 20. Yes.

  As shown in FIG. 4, the TFT array substrate 10 is formed on a glass substrate 10A made of a light-transmitting insulating substrate such as quartz and the liquid crystal layer 50 side surface, and an ITO (Indium Tin Oxide) film or the like. A pixel electrode 9a made of a transparent conductive film, a pixel switching TFT (switching element) 30 provided in the display area, and a drive circuit TFT (switching element) (not shown) provided in the non-display area, It is composed mainly of an alignment film 16 formed of an organic film such as a polyimide film and subjected to a predetermined alignment process such as a rubbing process.

On the other hand, the counter substrate 20 is made of a substrate body 20A made of a transparent substrate such as transparent glass or quartz, a counter electrode 21 formed on the surface of the liquid crystal layer 50, an alignment film 22, and metal. The light shielding film 23 provided in a region other than the opening region of each pixel portion and the light shielding film 53 as a frame made of the same or different material as the light shielding film 23 are mainly configured.
A liquid crystal layer 50 is formed between the TFT array substrate 10 and the counter substrate 20 that are configured as described above and are arranged so that the pixel electrode 9a and the counter electrode 21 face each other.

  As shown in FIG. 4, a light shielding layer 11 a is provided on the surface of the substrate body 10 </ b> A of the TFT array substrate 10 on the liquid crystal layer 50 side surface at a position corresponding to each pixel switching TFT 30. A first interlayer insulating film 12 is provided between the light shielding layer 11 a and the pixel switching TFT 30. The first interlayer insulating film 12 is provided to electrically insulate the semiconductor layer 1a constituting the pixel switching TFT 30 from the light shielding layer 11a.

  As shown in FIG. 4, the pixel switching TFT 30 has an LDD (Lightly Doped Drain) structure, and the channel region 1a ′ of the semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a, the scanning line 3a. Gate insulating film 2 that insulates semiconductor layer 1a, data line 6a, low concentration source region 1b and low concentration drain region 1c of semiconductor layer 1a, high concentration source region (source region) 1d of semiconductor layer 1a, and high concentration drain A region 1e (drain region) is provided.

  Here, the gate insulating film 2 preferably has a thickness of, for example, about 60 to 80 nm. This is because the thickness of the above range is necessary for securing the withstand voltage especially when the driving voltage of the pixel switching TFT 30 and the driving circuit TFT (not shown) is set to about 10 to 15V. is there.

  In this liquid crystal panel, the gate insulating film 2 is extended from a position facing the scanning line 3a as a dielectric film, the semiconductor film 1a is extended to form the first storage capacitor electrode 1f, The storage capacitor 70 is configured by using a part of the opposing capacitor line 3b as a second storage capacitor electrode. The capacitor line 3b and the scanning line 3a are made of the same polysilicon film or a polysilicon film and a laminated structure of a single metal, an alloy, a metal silicide, etc., and the dielectric film of the storage capacitor 70, the pixel switching TFT 30 and the drive The gate insulating film 2 of the circuit TFT (not shown) has a two-layer structure of the same thermal oxide film and high temperature oxide film. The channel region 1a ′, the source region 1d, and the drain region 1e of the pixel switching TFT 30, the channel region, the source region, and the drain region of the driving circuit TFT (not shown), and the first storage capacitor electrode are the same. The semiconductor layer 1a.

  Further, as shown in FIG. 4, a second interlayer insulating film 4 is formed on the scanning line 3a, the gate insulating film 2 and the first interlayer insulating film 12, and the second interlayer insulating film 4 includes A contact hole 5 leading to the high concentration source region 1d of the pixel switching TFT 30 and a contact hole 8 leading to the high concentration drain region 1e of the pixel switching TFT 30 are formed. Further, a third interlayer insulating film (insulating film) 7 is formed on the data line 6 a and the second interlayer insulating film 4. The third interlayer insulating film 7 has a high concentration drain region of the pixel switching TFT 30. A contact hole 8 to 1e is formed. The pixel electrode 9a is provided on the upper surface of the third interlayer insulating film 7 thus configured.

FIG. 5 is a plan view of the pad in the present embodiment, and FIG. 6 is a cross-sectional view taken along line JJ ′ in FIG.
On the other hand, as shown in FIGS. 5 and 6, the pad (terminal portion) 202 is an end of the pad forming region on the glass substrate 10A for the transparent TFT array substrate as the base of the TFT array substrate 10 on the display portion side. It is formed at a pitch interval of about 50 μm in the region excluding the region including the portion.
The pad 202 includes a metal layer 301 formed on the second interlayer insulating film 4 and an opening 303 formed in the third interlayer insulating film 7 on the metal layer 301. Further, a stopper layer 302 is formed on the second interlayer insulating layer 4 in addition to the metal layer 301.

The opening 303 is formed so that its area increases in a direction away from the metal layer 301, and is formed so that the third interlayer insulating film 7 does not cover the metal layer 301.
That is, when the dimension of the upper end of the third interlayer insulating film 7 in the opening 303 is a, the dimension of the lower end is b, the distance from the metal layer 301 to the wall surface of the lower end of the opening 303 is c, and the dimension of the metal layer 301 is d. The shape of the opening 303 is such that the dimension of the upper end is larger than the dimension of the metal layer 301 (a> d) and expands in a tapered shape in the direction away from the metal layer 301 (a> b). Preferably, the third interlayer insulating film 7 is not formed on the metal layer 301 (c ≧ 0).
Note that the shape of the opening 303 only needs to be larger than the area of the metal layer 301. As described above, in addition to the shape spreading in a tapered shape in the direction away from the metal film 301, the size of the upper end thereof. And the shape where the dimension of a lower end becomes the same dimension may be sufficient.

  Further, since the stopper layer 302 is a stopper that prevents the region other than the metal layer 301 from being etched up to the second interlayer insulating layer 4 when the opening 303 is formed by etching, as shown in FIG. The stopper layer 302 may be formed on the second interlayer insulating film 4 and the metal layer 301 may be formed thereon. Furthermore, as a material for forming the stopper layer 302, it is only necessary to serve as a stopper in etching when the opening 303 is formed, and examples thereof include SiN and SiON.

The metal layer 301 is electrically connected to the data line 6a, that is, the source wiring of the TFT 30, and may be any metal having good conductivity. Although it does not specifically limit as a material, For example, Cr, Al, Ta, Mo, Cu, these alloys, etc. are suitable.
As a material of the first interlayer insulating film 12, high insulating glass such as silicon oxide, NSG (non-doped silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), etc. Etc. can be illustrated.
Examples of the material of the second interlayer insulating film 4 and the third interlayer insulating film 7 include silicate glass films such as NSG, PSG, BSG, and BPSG, silicon nitride films, and silicon oxide films.

Next, connection of pads in the liquid crystal display device having the above configuration will be described.
FIG. 7 is a diagram showing pad connection in the present embodiment.
As shown in FIG. 7, a flexible printed circuit (hereinafter abbreviated as FPC) 350 is connected to the pad 202 of the liquid crystal display device, and a signal from an external device is input. Bumps 351 having conductivity are formed on the FPC 350, and the bumps 351 are inserted into the openings 303, and the metal layer 301 is interposed through an anisotropic conductive film (hereinafter abbreviated as ACF) 352. In electrical contact.
The ACF 352 is composed of conductive fine particles 353 and an adhesive 354. The conductive fine particles 353 are dispersed in an insulating adhesive 354 and have conductivity in the thickness direction (connection direction), and the surface direction (lateral direction). It has an insulating property. When connecting via the ACF 352, it is basically thermocompression bonded. First, an ACF 352 is attached so as to cover the pad 202, and an FPC 350 is attached and thermocompression bonded. By performing the pressure bonding, the bump 351 and the metal layer 301 are electrically connected through the conductive fine particles 353 of the ACF 352.

  According to the above configuration, since the area of the opening 303 is formed larger than the area of the metal layer 301, the opening with respect to the thickness of the third interlayer insulating film 7 as compared with the conventional electro-optical device substrate. The ratio of the dimension of 303 area is large. Therefore, the bump 351 can easily come into contact with the metal layer 301 through the opening 303, and a signal can be easily input from an external device to the liquid crystal display device via the FPC 350. That is, it becomes easy to prevent the occurrence of electrical contact failure in the pad 202, and mounting failures due to electrical contact failure can be reduced.

  Since the area of the opening 303 increases as the distance from the metal layer 301 increases, the bump 351 can be easily inserted into the opening 303 and the bump 351 can easily come into contact with the metal layer 301. Therefore, it is easy to prevent the occurrence of electrical contact failure in the pad 202, and the mounting failure due to the electrical contact failure can be reduced.

Since the area of the end portion on the metal layer 301 side in the opening 303 is equal to or larger than the area of the metal layer 301, the metal layer 301 is completely exposed without being covered with the third interlayer insulating film 7. Therefore, it becomes easy to prevent the occurrence of poor electrical contact in the terminal portion 202. As a result, it is possible to reduce mounting defects due to poor electrical contact.
Since the stopper layer 302 that defines the hole depth of the opening 303 is provided under the third interlayer insulating film 7, the hole of the opening 303 may be formed until the stopper layer 302 is reached. It becomes easy to adjust the hole depth of 303.

  In addition, since the shape of the opening 303 increases in the direction away from the metal layer 301, the alignment film 16 is unevenly formed on the opening 303 when the alignment film 16 is stacked on the opening 303. Hard to become. Since the alignment film 16 is less uneven, the alignment film 16 on the opening 303 is easily removed, and the metal layer 301 is easily exposed. Therefore, it is easy to prevent an electrical contact failure in the pad 202. As a result, it is possible to reduce mounting defects due to poor electrical contact.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to FIGS.
The basic configuration of the liquid crystal display device in the present embodiment is the same as that of the first embodiment, but the configuration around the pad is different from that of the first embodiment. Therefore, in this embodiment, only the periphery of the pad will be described with reference to FIGS. 8 and 9, and the description of the TFT array substrate and the like will be omitted.
FIG. 8 is a plan view showing the configuration of the liquid crystal display device in the present embodiment, FIG. 9A is a cross-sectional view taken along the line KK ′ in FIG. 8, and FIG. It is a perspective view of a pad part.
As shown in FIGS. 9A and 9B, the pad (terminal portion) 400 includes a metal layer 401 formed on the second interlayer insulating film 4 and penetrating the third interlayer insulating film 7. And a step portion 404 formed so as to expose the metal layer 401 by removing the fourth interlayer insulating layer 7a. A stopper layer 402 is formed on the third interlayer insulating film 7 so as to be flush with the upper surface 401 a of the metal layer 401.

As shown in FIGS. 8 and 9A and 9B, the stepped portion 404 is a fourth above the stopper layer 402 over the entire mounting region (near the terminal portion) 405 in the vicinity where the pad 400 is disposed. The interlayer insulating layer 7a is formed so as to be removed. Since the metal layer 401 is disposed so that the upper surface 401a and the stopper layer 402 are flush with each other, only the upper surface 401a is exposed at the stepped portion 404 where the stopper layer 402 is exposed.
In addition, as a material for forming the stopper layer 402, it is only necessary to serve as a stopper in etching when the stepped portion 404 is formed, and examples thereof include SiN and SiON. In addition to controlling the removed film thickness of the third interlayer insulating layer 7 using the stopper layer 402, the removed film thickness of the third interlayer insulating layer 7 may be controlled by the etching time without using the stopper layer 402. Good.
The metal layer 401 is electrically connected to the data line 6a, that is, the source wiring of the TFT 30, and may be any metal having good conductivity. Although it does not specifically limit as a material, For example, Cr, Al, Ta, Mo, Cu, these alloys, etc. are suitable.

Next, connection of pads in the liquid crystal display device having the above configuration will be described.
FIG. 10 is a diagram showing pad connection in the present embodiment.
As shown in FIG. 10, the FPC 350 is electrically connected to the metal layer 401 via the ACF 532 and a signal from an external device is input to the pad 400 of the liquid crystal display device.
In order to connect the pad 400 and the FPC 350, first, an ACF 352 is attached so as to cover the pad 400, and the FPC 350 is attached and thermocompression bonded. By pressure bonding, the FPC 350 and the metal layer 401 are electrically connected through the conductive fine particles 353 of the ACF 352.

According to the above configuration, since the fourth interlayer insulating film 7a in the mounting region 405 is removed and the upper surface 401a of the metal layer 401 is exposed, the FPC 350 can easily come into contact with the metal layer 401 via the ACF 352, and the external It becomes easy to input a signal from the device to the liquid crystal display device via the FPC 350. That is, it becomes easy to prevent the occurrence of an electrical contact failure in the pad 400, and the mounting failure due to the electrical contact failure can be reduced.
Further, since only the upper surface 401a of the metal layer 401 is exposed, the metal layers 401 are not easily short-circuited, and mounting defects due to electrical contact defects can be reduced.
Since the stopper layer 402 that defines the thickness of the fourth interlayer insulating film 7 a to be removed is provided on the third interlayer insulating film 7, the fourth interlayer insulating film 7 a is removed until the stopper layer 402 is reached. Therefore, the thickness for removing the fourth interlayer insulating film 7a can be easily adjusted.

[Third Embodiment]
Next, a third embodiment of the present invention will be described with reference to FIG.
The basic configuration of the liquid crystal display device in the present embodiment is the same as that of the second embodiment, but the configuration around the pad is different from that of the second embodiment. Therefore, in this embodiment, only the periphery of the pad will be described with reference to FIG. 11, and the description of the TFT array substrate and the like will be omitted.
FIG. 11A is a cross-sectional view of the pad in the present embodiment, and FIG. 11B is a perspective view of the pad in the present embodiment.
As shown in FIGS. 11A and 11B, the pad (terminal portion) 450 penetrates the metal layer 451 formed on the second interlayer insulating film 4 and the third interlayer insulating film 7 to form a metal layer. And an opening 453 formed so as to reach 451. Further, a stepped portion 454 is formed in the third interlayer insulating film 7 so as to reduce the thickness of the third interlayer insulating film 7 in the mounting region 405.

The step portion 454 is formed by removing the third interlayer insulating film 7 in the mounting region 405 by etching, and the thickness of the third interlayer insulating film 7 remaining in the mounting region 405 is controlled by the etching time. The opening 453 is formed using the metal layer 451 as an etching stop layer and exposing the metal layer 451.
Note that the stepped portion 454 and the opening 453 may be formed after the stepped portion 454 is formed, or the stepped portion 454 may be formed after the opening 453 is formed. Further, the opening 453 may be formed partway so as to leave a film thickness thinner than the removed film thickness of the stepped portion 454, and the stepped portion 454 may be formed and the remaining portion of the opening 453 may be removed simultaneously. Further, for example, it may be performed simultaneously with the formation of a contact hole for connecting the pixel electrode and the TFT.
Note that the pad connection in the liquid crystal display device having the above-described configuration is the same as that in the first embodiment, and a description thereof will be omitted.

  According to the above configuration, since the thickness of the third interlayer insulating film 7 in the mounting region 405 is thinner than the thickness in other regions, the size of the area of the opening 453 with respect to the thickness of the third interlayer insulating film 7. The proportion of is increasing. Therefore, the bumps 351 can easily come into contact with the metal layer 451 through the openings 453, and the signal can be easily input to the electro-optical device substrate. That is, it becomes easy to prevent the occurrence of electrical contact failure in the pad 450, and the mounting failure caused by the electrical contact failure can be reduced.

[Fourth Embodiment]
[First embodiment]
Next, a first example according to the fourth embodiment of the present invention will be described with reference to FIG.
The basic configuration of the liquid crystal display device in the first example according to the present embodiment is the same as that of the first embodiment, but the configuration around the pad is different from that of the first embodiment. Therefore, in the first example according to the present embodiment, only the periphery of the pad will be described with reference to FIG. 12, and the description of the TFT array substrate and the like will be omitted.
FIG. 12A is a cross-sectional view of the pad in the present embodiment, and FIG. 12B is a perspective view of the pad in the present embodiment.
The pad (terminal portion) 500 is formed on the first dummy pattern (dummy pattern) 505 formed on the glass substrate 10A and the first interlayer insulating film 12, as shown in FIGS. The second dummy pattern (dummy pattern) 506 formed, the metal layer 501 formed on the second interlayer insulating film 4, and the third interlayer insulating film 7 are formed so as to reach the metal layer 501. And an opening 503.

The first dummy pattern 505 is formed in substantially the same region as the region where the metal layer 501 is formed, and the first interlayer insulating film 12 is laminated thereon. In the first interlayer insulating film 12 on the first dummy pattern 505, a first raised portion 12a having a height substantially the same as the film thickness of the first dummy pattern 505 is formed. The second dummy pattern 506 is formed on the first raised portion 12a, and the second interlayer insulating film 4 is laminated thereon. In the second interlayer insulating film 4, a second raised portion 4 a having a height obtained by combining the film thicknesses of the first dummy pattern 505 and the second dummy pattern 506 is formed. The metal layer 501 is formed on the second raised portion 4a where the second interlayer insulating layer 4 is formed.
The first dummy pattern 505 is formed to have at least the same size and area as the metal layer 501, and is formed to have substantially the same thickness as the light shielding layer 11a. The second dummy pattern 506 is formed to have at least the same size and area as the metal layer 501, and has substantially the same thickness as the gate electrode of the pixel switching TFT 30.
Note that the pad connection in the liquid crystal display device having the above-described configuration is the same as that in the first embodiment, and a description thereof will be omitted.

  According to the above configuration, since the first dummy pattern 505 and the second dummy pattern 506 are stacked below the metal layer 501, the metal layer 501 is formed at a position protruding toward the third interlayer insulating film 7 side. The Therefore, when planarization such as CMP is performed, the thickness of the third interlayer insulating film 7 on the metal layer 501 becomes thinner than the thickness of the third interlayer insulating film 7 in other regions, and the third interlayer insulating film 7 The ratio of the dimension of the opening 503 area to the thickness is increased. As a result, the bump 351 can easily come into contact with the metal layer 501 through the opening 503. That is, it becomes easy to prevent the occurrence of electrical contact failure in the pad 500, and the mounting failure due to the electrical contact failure can be reduced.

  Since the areas of the first dummy pattern 505 and the second dummy pattern 506 are larger than the area of the metal layer 501, the entire metal layer 501 is formed at a position protruding to the insulating film side. Therefore, the thickness of the insulating film on the metal layer 501 becomes uniform, and the bumps 351 are easily brought into contact with the metal layer 501 on the surface. As a result, it becomes easy to prevent the occurrence of electrical contact failure in the pad 500, and the mounting failure due to the electrical contact failure can be reduced.

  In addition, since one first dummy pattern 505 and one second dummy pattern 506 are arranged for one metal layer 501, for example, an electrical signal is input to a predetermined metal layer 501, and 1 corresponding thereto Even when a potential is induced in the dummy pattern 505 and the second dummy pattern 506, the metal layer 501 to which no electric signal is input is not affected.

FIG. 13A is a cross-sectional view of a pad in another example according to the present embodiment, and FIG. 13B is a partial plan view of the pad in the example according to the present embodiment.
The metal layer 501 and the second dummy pattern 506 may be connected by a conductive member (conductive portion) 510, as shown in FIGS. 13 (a) and 13 (b). The conductive member 510 is disposed in the periphery of the metal layer 501, and various materials such as Cu and Al can be used as long as the material has conductivity.
According to this configuration, the second dummy pattern 506 can be used as a part of the pad 500. As a result, the second dummy pattern 506 can be extended and used as a wiring, and can serve as a redundant wiring. Further, by using a low-resistance material as a material for forming the second dummy pattern 506, the signal transmission time constant can be improved.
In addition, the conductive member 510 is disposed in the peripheral portion of the metal layer 501, and a flat portion with less unevenness is formed in a substantially central portion of the metal layer 501. Therefore, when the bump 351 for inputting a signal to the pad 500 and the metal layer 501 come into contact with each other in the plane portion, the bump 351 and the metal layer 501 can be reliably brought into contact with each other to input a signal.

[Second Embodiment]
Next, a second example according to the fourth embodiment of the present invention will be described with reference to FIGS.
The basic configuration of the liquid crystal display device in the second example according to the present embodiment is the same as that of the first embodiment, but the configuration around the pad is different from that of the first embodiment. Therefore, in the second example according to the present embodiment, only the periphery of the pad will be described with reference to FIGS. 14 and 15, and the description of the TFT array substrate and the like will be omitted.
FIG. 14 is a cross-sectional view of the pad in the second example according to the present embodiment.
As shown in FIG. 14, the pad (terminal portion) 520 includes a first dummy pattern (dummy pattern) 525 formed on the glass substrate 10A and a second dummy pattern (on the first interlayer insulating film 12). A dummy pattern) 526, a metal layer 501 formed on the second interlayer insulating film 4, and an opening 503 formed so as to penetrate the third interlayer insulating film 7 and reach the metal layer 501. ing.

FIG. 15 is a partial plan view of a pad in the second example according to the present embodiment.
As shown in FIG. 15, the first dummy pattern 525 is formed across the region where the plurality of metal layers 501 are formed, and the first interlayer insulating film 12 is laminated thereon. In the first interlayer insulating film 12 on the first dummy pattern 525, as shown in FIG. 14, a first raised portion 12a having a height substantially equal to the film thickness of the first dummy pattern 525 is formed. The second dummy pattern 526 is formed in substantially the same region as the first dummy pattern on the first raised portion 12a, and the second interlayer insulating film 4 is laminated thereon. In the second interlayer insulating film 4, a second raised portion 4 a having a height obtained by combining the film thicknesses of the first dummy pattern 525 and the second dummy pattern 526 is formed. The metal layer 501 is formed on the second raised portion 4a where the second interlayer insulating layer 4 is formed.
The first dummy pattern 525 is formed with substantially the same thickness as the light shielding layer 11a, and the second dummy pattern 526 is formed with substantially the same thickness as the gate electrode of the pixel switching TFT 30. Further, the first dummy pattern 525 and the second dummy pattern 526 are grounded.
Note that the pad connection in the liquid crystal display device having the above-described configuration is the same as that in the first embodiment, and a description thereof will be omitted.

According to the above configuration, even if the interval between the pads 520 is reduced and the interval between the metal layers 501 is reduced, only one first dummy pattern 525 and one second dummy pattern 526 are arranged for the plurality of metal layers 501. Since this is not done, there is no place where the interval between the first dummy pattern 525 and the second dummy pattern 526 is narrow, and there is no problem of contact between the first interlayer insulating film 12 and the second interlayer insulating film 4. Therefore, it is suitable for narrowing the interval between the pads 520, and particularly suitable for use in a manufacturing method in which the portion having a large aspect ratio such as sputtering or PECVD is poor.
In addition, since the first dummy pattern 525 and the second dummy pattern 526 are fixed to a predetermined potential by being grounded, a signal input to the metal layer 501 of the pad 520 causes the first dummy pattern 525 and the second dummy pattern 526 to be fixed. The potential of the dummy pattern 526 does not fluctuate, and accordingly, no potential is induced in the metal layer 501 to which no signal is input.

When the same electric signal is input to a plurality of metal layers 501 corresponding to one first dummy pattern 525 and second dummy pattern 526, the plurality of metal layers 501 and the second dummy pattern 526 are electrically connected. May be connected. At this time, the grounding of at least the second dummy pattern 526 is released.
According to this configuration, the second dummy pattern 526 can be used as a part of the pad 520. As a result, the second dummy pattern 526 can be extended and used as a wiring, and can serve as a redundant wiring. In addition, by using a low-resistance material as a material for forming the second dummy pattern 526, the time constant of signal transmission can be improved.

[Fifth Embodiment]
Next, a fifth embodiment of the present invention will be described with reference to FIG.
The basic configuration of the liquid crystal display device in the present embodiment is the same as that of the second embodiment, but the configuration around the pad is different from that of the second embodiment. Therefore, in this embodiment, only the periphery of the pad will be described with reference to FIG. 16, and the description of the TFT array substrate and the like will be omitted.
FIG. 16 is a cross-sectional view of the pad in the present embodiment.
As shown in FIG. 16, the pad (terminal portion) 550 is formed so as to reach the metal layer 551 through the metal layer 551 formed on the second interlayer insulating film 4 and the third interlayer insulating film 7. And an embedded portion (embedding member) 554 disposed in the opening 553.
The embedded portion 554 is formed by inlaying a conductive material in the opening 553, and the upper surface thereof is formed to be flush with the upper surface of the third interlayer insulating film 7.
Note that the pad connection in the liquid crystal display device having the above-described configuration is the same as that in the second embodiment, and a description thereof will be omitted.

  According to the above configuration, the opening 553 is formed so as to reach the metal layer 551 through the third interlayer insulating film 7, and the embedded portion 554 is electrically connected to the metal layer 551 in the opening 553. Are arranged to be. Therefore, the FPC 350 can easily come into contact with the metal layer 551. That is, it is easy to prevent the occurrence of electrical contact failure in the pad 550, and the mounting failure due to the electrical contact failure can be reduced.

  Since the embedded portion 554 is formed by inlaying, the shape of the embedded portion 554 matches the shape of the opening 553, and the embedded portion 554 does not protrude from the third interlayer insulating film 7. Therefore, adjacent metal layers 551 are not easily short-circuited, and mounting defects due to electrical contact defects can be reduced.

[Sixth Embodiment]
Next, a sixth embodiment of the present invention will be described with reference to FIG.
The basic configuration of the liquid crystal display device in the present embodiment is the same as that of the second embodiment, but the configuration around the pad is different from that of the second embodiment. Therefore, in this embodiment, only the periphery of the pad will be described with reference to FIG. 17, and the description of the TFT array substrate and the like will be omitted.
FIG. 17 is a cross-sectional view of the pad in the present embodiment.
As shown in FIG. 17, the pad (terminal part) 600 is formed so as to reach the metal layer 601 through the metal layer 601 formed on the second interlayer insulating film 4 and the third interlayer insulating film 7. And an extraction metal layer (conductive layer) 605 formed from the opening 603 to the mounting region 405. On the metal layer 601, a fourth interlayer insulating film 7a is formed. A stepped portion 604 is formed in the mounting region 405 so that the lead metal layer 605 and the third interlayer insulating film 7 are exposed.

The step portion 604 is formed according to the following procedure. First, an opening 603 is formed so that the metal layer 601 is exposed in the third interlayer insulating film 7 in the region of the metal layer 601. Next, a lead metal layer 605 is formed, and a fourth interlayer insulating film 7 a is laminated so as to cover the region of the metal part 601.
By forming in this way, only the lead metal layer 605 is exposed in the mounting region 405, and the metal layer 601 is disposed between the second interlayer insulating film 4 and the fourth interlayer insulating film 7a.
The material of the lead metal layer 605 is not particularly limited as long as it is a metal having good conductivity. Examples thereof include conductive metals such as Al that are also used in other wiring portions.
Note that the pad connection in the liquid crystal display device having the above-described configuration is the same as that in the second embodiment, and a description thereof will be omitted.

  According to the above configuration, the opening 603 is formed in the third interlayer insulating film 7 so that the metal layer 601 is exposed, and the lead metal layer 605 is electrically connected to the metal layer 601 in the opening 603. It is arranged so that. Therefore, the FPC 350 can easily come into contact with the metal layer 601 and the signal can be easily input to the electro-optical device substrate. That is, it becomes easy to prevent the occurrence of electrical contact failure in the pad 600, and the mounting failure due to the electrical contact failure can be reduced.

  Note that although this embodiment is described adaptively when the wiring of Al or the like is a multilayer, it is not particularly limited to the case where the wiring of Al or the like is a multilayer.

[Electronics]
Examples of electronic devices including the active matrix liquid crystal display device of the above embodiment will be described.
FIG. 18 is a perspective view showing an example of a mobile phone. In FIG. 18, reference numeral 1000 denotes a mobile phone body, and reference numeral 1001 denotes a liquid crystal display unit using the liquid crystal display device according to any one of the first to sixth embodiments.

  Since the electronic apparatus shown in FIG. 18 includes the liquid crystal display device according to any one of the first to sixth embodiments, there is no possibility of problems such as poor connection in the pads. In addition, since the insulating property of the pad is satisfactorily maintained, the reliability of the metal wiring can be improved. Therefore, the stability and reliability of the electrical connection can be improved, and as a result, the operation and connection stability and reliability of the liquid crystal display unit can be improved. As another example of the electronic apparatus, a projection color display device using the liquid crystal display device of the above embodiment as a light valve is highly reliable and suitable.

The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.
For example, in the above-described embodiment, the first to sixth embodiments have been described separately adapted, but the first embodiment and the second embodiment are not limited to those adapted separately. It is possible to apply various combinations of other embodiments, such as a combination of the above embodiments.
In the above embodiment, an example in which the present invention is applied to an active matrix liquid crystal display device using TFTs as switching elements has been described. However, an active matrix liquid crystal display device using TFDs as switching elements, or The present invention can be applied to a passive matrix liquid crystal display device provided with a scan electrode and a data electrode on each of a pair of substrates. Furthermore, the present invention can be applied not only to a liquid crystal display device but also to other electro-optical devices such as an organic EL device.
Further, in the above-described embodiment, the description has been made by adapting to COF (Chip on Film) implementation. However, the present invention is not limited to this COF implementation, and COG (Chip on Glass) implementation or TCP (Tape on Package) implementation. It can be explained by adapting to various mounting methods.

It is a top view which shows the structure of the liquid crystal display device of the 1st Embodiment of this invention. It is sectional drawing which follows the H-H 'line | wire of FIG. 3 is an equivalent circuit diagram of an image display area of the liquid crystal display device. FIG. It is an expanded sectional view which shows the structure of the pixel of the image display area | region of the liquid crystal display device. It is a top view which shows the pad of the liquid crystal display device. It is sectional drawing which follows the JJ 'line | wire of FIG. It is sectional drawing which shows the connection of the pad of the liquid crystal display device. It is a top view which shows the structure of the liquid crystal display device of the 2nd Embodiment of this invention. It is sectional drawing which follows the KK 'line of FIG. It is sectional drawing which shows the connection of the pad of the liquid crystal display device. It is sectional drawing which shows the structure of the pad of the 3rd Embodiment of this invention. It is a figure which shows the structure of the pad of the 1st Example which concerns on the 4th Embodiment of this invention. It is a figure which shows the structure of the pad of the modification in 1st Example similarly. It is sectional drawing which shows the structure of the pad of 2nd Example based on the 4th Embodiment of this invention. It is a partial top view which shows the structure of the pad of 2nd Example similarly. It is sectional drawing which shows the structure of the pad of the 5th Embodiment of this invention. It is sectional drawing which shows the structure of the pad of the 6th Embodiment of this invention. It is a perspective view which shows an example of the electronic device using the liquid crystal display device of any one of the 1st to 6th embodiment of this invention.

Explanation of symbols

7 ... Third interlayer insulating film (insulating film), 10 ... TFT array substrate (substrate), 100 ... Liquid crystal display device (electro-optical device), 202, 400, 450, 500, 520, 550, 600 ... Pad (terminal part), 301, 401, 451, 501, 551, 601 ... Metal layer, 302, 402 ... Stopper layer, 303, 403, 453, 503, 553, 603 ... 405... Mounting region (near end) 505 525... First dummy pattern (dummy pattern) 506 526... Second dummy pattern (dummy pattern) 510. Member (conductive portion), 554... Embedded portion (embedded member), 605 .. extraction metal layer (conductive layer)

Claims (19)

A substrate for an electro-optical device that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate,
The terminal portion includes a metal layer electrically connected to the display portion via a wiring, and an insulating film formed on the metal layer,
The electro-optical device substrate, wherein an opening is formed in the insulating film so that the metal layer is exposed, and an area of at least an outermost surface of the opening is larger than an area of the metal layer.   2. The electro-optical device substrate according to claim 1, wherein the shape of the opening is formed in a tapered shape in which the area of the opening increases in a direction away from the metal layer.   3. The electro-optical device substrate according to claim 1, wherein an area of the end portion on the metal layer side in the opening is equal to or larger than an area of the metal layer.   4. The electro-optical device substrate according to claim 1, wherein a stopper layer that defines a hole depth of the opening is disposed under the insulating film. 5. A substrate for an electro-optical device that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate,
The terminal portion includes a metal layer electrically connected to the display portion via a wiring, and an insulating film formed on the metal layer,
A substrate for an electro-optical device, wherein the insulating film in the vicinity of a terminal portion on the substrate is removed, and an upper surface of the metal layer is exposed. Under the insulating film, a stopper layer that defines the thickness of the insulating film to be removed is formed,
6. The electro-optical device substrate according to claim 5, wherein the upper surface of the stopper layer is disposed on the same surface as the upper surface of the metal layer. A substrate for an electro-optical device that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate,
The terminal portion includes a metal layer electrically connected to the display portion via a wiring, and an insulating film formed on the metal layer,
An opening is formed in the insulating film so that the metal layer is exposed,
The substrate for an electro-optical device, wherein the thickness of the insulating film in the vicinity of the terminal portion on the substrate is smaller than the thickness in other regions. A substrate for an electro-optical device that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate,
The terminal portion includes a metal layer electrically connected to the display portion via a wiring, and an insulating film formed on the metal layer,
An opening is formed in the insulating film so that the metal layer is exposed,
A dummy pattern is disposed under the metal layer so as to substantially overlap the metal layer,
A substrate for an electro-optical device, wherein the thickness of the insulating film on the metal layer is thinner than the thickness of the insulating film in other regions.   9. The electro-optical device substrate according to claim 8, wherein an area of the dummy pattern is larger than an area of the metal layer.   10. The electro-optical device substrate according to claim 8, wherein one dummy pattern is arranged for one metal layer.   The electro-optical device substrate according to claim 10, wherein the one metal layer and the one dummy pattern are electrically connected.   12. The electro-optical device according to claim 11, wherein the one metal layer and the one dummy pattern are electrically connected to each other by a conductive portion disposed in a peripheral portion of the one metal layer. Substrate.   10. The electro-optical device substrate according to claim 8, wherein one dummy pattern is arranged for the plurality of metal layers.   14. The electro-optical device substrate according to claim 13, wherein the one dummy pattern is fixed at a predetermined potential. A substrate for an electro-optical device that displays an image on a display unit in response to a signal input via a terminal unit provided on the substrate,
The terminal portion includes a metal layer electrically connected to the display portion via a wiring, and an insulating film formed on the metal layer,
An opening is formed in the insulating film so that the metal layer is exposed,
A substrate for an electro-optical device, wherein an embedded member made of a conductive member is disposed in the opening.   16. The electro-optical device substrate according to claim 15, wherein the shape of the embedding member is a shape that matches the shape of the opening. The terminal portion is composed of a plurality of conductive layers,
17. The electro-optical device substrate according to claim 1, wherein at least one of the conductive layers is drawn on the insulating film from the opening.   An electro-optical device comprising the electro-optical device substrate according to claim 1.   An electronic apparatus comprising the electro-optical device according to claim 18.

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