JP2005032742A - Electronic component packaging structure and method for packaging electronic component - Google Patents

Electronic component packaging structure and method for packaging electronic component Download PDF

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Publication number
JP2005032742A
JP2005032742A JP2003192679A JP2003192679A JP2005032742A JP 2005032742 A JP2005032742 A JP 2005032742A JP 2003192679 A JP2003192679 A JP 2003192679A JP 2003192679 A JP2003192679 A JP 2003192679A JP 2005032742 A JP2005032742 A JP 2005032742A
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Prior art keywords
electronic component
electrode
mounting
resin
substrate
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JP2003192679A
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Yoshiyuki Wada
義之 和田
Tadahiko Sakai
忠彦 境
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2003192679A priority Critical patent/JP2005032742A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06558—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component packaging structure having excellent reliability after packaging and to provide a method for packaging the electronic component. <P>SOLUTION: The electronic component packaging structure of a laminated structure includes a first electronic component 4 having a plurality of first electrodes 4a and mounted on a substrate 2 having a plurality of first connecting electrodes 2a and a plurality of second connecting electrodes 2b, and a second electrode part 6 superposed on and further mounted above the first electronic component 4. The electronic component packaging structure further includes a resin reinforced part 3 formed by curing a thermosetting resin at a center of a gap between the electrode forming surface of the first electronic component 4 and the electrode forming surface of the substrate 2. Thus, a thermal stress generated at a connecting part of the first electronic component 4 is alleviated by a heat cycle after the packaging, and a pressing load when the second electronic component 6 is carried on the first electronic component 4, is supported by the resin reinforced part 3, and hence a damage of the first electronic component 4 can be prevented. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、基板に実装された電子部品の上方に更に電子部品を重ねて実装して成る電子部品実装構造および電子部品実装方法に関するものである。
【０００２】
【従来の技術】
近年電子機器の小型化・高機能化の進展に伴い、電子機器に組み込まれる実装基板の実装密度を更に高密度化することが求められている。このような高密度実装に対応するための実装形態として、複数の電子部品を重ね合わせた積層構造が採用されるようになっている（例えば特許文献１参照）。この文献例では、表面に回路パターンが形成された２つの電子部品を回路パターンの裏側同士を張り合わせて一体化することにより積層構造が実現されており、これにより、基板サイズを増大することなく高機能の実装基板を製造することが可能となる。
【０００３】
【特許文献１】
特開平６−１７７３２２号公報
【０００４】
【発明が解決しようとする課題】
ところで基板に実装される電子部品には、実装過程や基板に実装された後の使用状態において様々な力が作用する。例えば実装後の使用状態においては、環境温度が変動する際の熱サイクルによって電子部品と基板との間には熱応力が作用する。また上述のような積層構造を形成する実装過程において、第１段の電子部品上に第２段の電子部品を搭載する際には、第１段の電子部品には上側からの押圧荷重が作用する。
【０００５】
ところが、上述の従来技術による積層構造においては、１段目の電子部品は基板と接合用電極を介して接続されているのみで何ら補強が為されておらず、実装後の接合信頼性が確保され難いとともに、第１段の電子部品に上側から押圧荷重が作用することによる破損が生じやすいという問題点があった。そしてこのような課題は、積層構造を構成する電子部品が薄型化するに伴い特に顕著となっており、実装後の信頼性を損なう結果となっていた。
【０００６】
そこで本発明は、実装後の信頼性に優れた電子部品実装構造および電子部品実装方法を提供することを目的とする。
【０００７】
【課題を解決するための手段】
請求項１記載の電子部品実装構造は、接続用電極が複数形成された基板に第１の電極が複数形成された第１段の電子部品を実装して前記第１の電極を前記接続用電極に電気的に接続し、前記第１段の電子部品の上方に少なくとも第２段の電子部品を含む上段の電子部品を重ねて実装して成る積層構造の電子部品実装構造であって、第１段の電子部品の電極形成面と基板の電極形成面との間に該第１段の電子部品を補強する補強部が形成されている。
【０００８】
請求項２記載の電子部品実装構造は、請求項１記載の電子部品実装構造であって、前記接続用電極または前記第１の電極が導電性金属より成る突出電極である。
【０００９】
請求項３記載の電子部品実装方法は、接続用電極が複数形成された基板に第１の電極が複数形成された第１段の電子部品を実装して前記第１の電極を前記接続用電極に電気的に接続し、前記第１段の電子部品の上方に少なくとも第２段の電子部品を含む上段の電子部品を重ねて積層構造を形成する電子部品実装方法であって、前記基板上の電子部品実装位置に樹脂を供給する樹脂供給工程と、前記第１段の電子部品を前記基板に搭載する第１段搭載工程と、前記樹脂を硬化させる樹脂硬化工程と、前記第１段の電子部品の上方に前記上段の電子部品を搭載して前記積層構造を形成する積層工程とを含み、前記第１段搭載工程に先立って前記樹脂供給工程を実行し、前記積層工程に先立って前記樹脂硬化工程を実行して第１段の電子部品の電極形成面と基板の電極形成面との間に前記樹脂が硬化した補強部を形成する。
【００１０】
請求項４記載の電子部品実装方法は、請求項３記載の電子部品実装方法であって、前記接続用電極または前記第１の電極が導電性金属より成る突出電極である。
【００１１】
本発明によれば、電子部品の上方に更に電子部品を重ねて実装して成る電子部品実装構造において、第１段の電子部品の電極形成面と基板の電極形成面との間に該第１段の電子部品を補強する補強部を形成することにより、第１段の電子部品を補強して実装後の信頼性に優れた電子部品実装構造を実現することができる。
【００１２】
【発明の実施の形態】
（実施の形態１）
図１は本発明の実施の形態１の電子部品実装構造の断面図、図２、図３は本発明の一実施の形態１の電子部品実装方法の工程説明図である。まず図１を参照して電子部品実装構造１について説明する。電子部品実装構造１は、基板２上に第１の電子部品４を実装し、更に第１の電子部品４上に第２の電子部品６を重ねて実装した積層構造の電子部品実装構造である。第１の電子部品４，第２の電子部品６はいずれも薄型部品であり、厚みｔ１，ｔ２は１００μｍ以下となっている。
【００１３】
図１において、基板２の上面には第１の接続用電極２ａ、第２の接続用電極２ｂが複数形成されている。第１の電子部品４の下面には、導電性金属より成る突出電極である第１の電極４ａが形成されており、第１の接続用電極２ａには、第１の電極４ａが電気的に接続されている。第１の電子部品４は基板２の上面との間に、１５〜５０μｍの実装隙間ｄ１で実装されており、第１の電子部品４の電極形成面と基板２の電極形成面との隙間の中央部分には、熱硬化性樹脂が硬化した樹脂補強部３が、第１の接続用電極２ａと第１の電極４ａとの接合部に接触しない範囲で形成されている。樹脂補強部３は、第１の電子部品４を補強する補強部として機能する。
【００１４】
第１の電子部品４の上面には、第２の電子部品６が第２の電極６ａを上向きにしたフェイスアップ姿勢で接着材５を介して実装されている。第２の電子部品６と第１の電子部品４との間の実装隙間ｄ２は、１０μｍ程度に設定される。第２の電極６ａは、基板２の第２の接続用電極２ｂとボンディングワイヤ７を介して接続されている。
【００１５】
電子部品実装構造１において、樹脂補強部３は実装後の使用状態における熱サイクルによって発生する熱応力を緩和するとともに、実装過程において第１の電子部品４上に第２の電子部品６を搭載する際に、第１の電子部品４に負荷される上側からの押圧荷重に対して第１の電子部品４を補強する機能を有している。
【００１６】
次に図２、図３を参照して電子部品実装構造１を形成するための電子部品実装方法について説明する。まず図２（ａ）に示すように、基板２上面に設定された電子部品実装位置の第１の接続用電極２ａの間に、ディスペンサ８によって熱硬化性の樹脂３ａを供給する（樹脂供給工程）。このとき、樹脂３ａは電子部品実装位置の中央をねらって適正量が吐出される。この適正量は、第１の電子部品４を実装した状態において、押し広げられた樹脂３ａが第１の接続用電極２ａの外側まで拡がらないような樹脂量に設定される。
【００１７】
次いで図２（ｂ）に示すように、第１の電子部品４を搭載ツール９によって第１の電極４ａを下向きにしたフェイスダウン姿勢で保持し、基板２上の電子部品実装位置に搭載する（第１段搭載工程）。そして搭載ツール９によって第１の電子部品４を押圧することにより、第１の電極４ａと第１の接続用電極が接合され、図２（ｃ）に示すように、第１の電極４ａが第１の接続用電極２ａに電気的に接続される。なお、接合の際に第１の電子部品４に超音波振動を印加してもよい。
【００１８】
この後、図２（ｄ）に示すように、樹脂３ａを加熱して樹脂３ａを硬化させる（樹脂硬化工程）。これにより、基板２の電極形成面と第１の電子部品４の電極形成面との間に、樹脂３ａが熱硬化した樹脂補強部３が形成される。この樹脂硬化工程は、加熱手段を備えた搭載ツール９によって第１の電子部品４を介して樹脂３ａを加熱してもよく、または他の加熱手段で全体を加熱するようにしてもよい。
【００１９】
この後、第１の電子部品４の上方に更に上段の電子部品を重ねて搭載して積層構造を形成する（積層工程）。図３（ａ）に示すように、第１の電子部品４の上面（回路形成面の裏側）にディスペンサ１０によって接着材５を塗布し、次いで図３（ｂ）に示すように、第２の電子部品６を電極６ａを上向きにしたフェイスアップ姿勢で第１の電子部品４上に搭載し、第２の電子部品６を第１の電子部品４に接着材５によって接着する。
【００２０】
そしてこの後基板２はワイヤボンディング工程に送られ、電極６ａと第２の接続用電極２ｂとをボンディングワイヤ７によって接続する。これにより、図１に示す電子部品実装構造１が完成する。なお上述例では、上段の電子部品として第２の電子部品６のみを第２段の電子部品として積層する例を示したが、第２段の電子部品の上に更に電子部品を重ねて多層の積層構造としてもよい。
【００２１】
上述の電子部品実装方法においては、第１段搭載工程に先立って樹脂供給工程を実行するようにしている。これにより、第１の電子部品４と基板２との間に樹脂３ａを供給する際に、適正量の樹脂３ａを電子部品実装位置の中央に正確に供給することが可能となる。
【００２２】
このため、供給された樹脂３ａが第１の電子部品４の実装後に電子部品の外側にはみ出すことがなく、したがって薄型の第１の電子部品４を実装対象とする場合にあっても、外側にはみ出した樹脂が第１の電子部品４の側面を這い上って上面に付着することによる不具合、すなわち搭載ツール９に樹脂３ａが付着することによる汚損や、第１の電子部品４の上面で硬化した樹脂３ａが第２の電子部品６の搭載動作を妨げることなどの不具合を防止することができる。
【００２３】
また上述の電子部品実装方法においては、積層工程に先立って樹脂硬化工程を実行して、第１の電子部品４と基板２との間に樹脂３ａが硬化した樹脂補強部３を形成するようにしている。これにより、積層工程において第１の電子部品４の上面に、上段の電子部品を搭載する際の上方からの押圧荷重を樹脂補強部３によって支持することができ、薄型の第１の電子部品４を第１段の電子部品として用いて積層構造を形成する場合にあっても、第１段の電子部品の破損を有効に防止することができる。
【００２４】
（実施の形態２）
図４は本発明の実施の形態２の電子部品実装構造の断面図である。実施の形態２は、実施の形態１と同様の積層構造の電子部品実装構造において、第２段の電子部品として、フェイスダウン姿勢で実装されるフリップチップを用いたものである。本実施の形態２においても、第１の電子部品１４，第２の電子部品１６はいずれも薄型部品であり、厚みｔ３，ｔ４は１００μｍ以下となっている。
【００２５】
図４において、基板１２の上面には、第１の接続用電極１２ａが形成されている。第１の電子部品１４の下面には、導電性金属より成る突出電極である第１の電極１４ａが形成されており、第１の接続用電極１２ａには、第１の電極１４ａが電気的に接続されている。第１の電子部品１４は基板２の上面との間に、１５〜５０μｍの実装隙間ｄ３で実装されており、第１の電子部品１４の電極形成面と基板１２の電極形成面との間には、実施の形態１の樹脂補強部３と同様形状・同様機能の樹脂補強部１３が形成されている。第１の電子部品１４の下面側には機能回路１４ｂが形成されている。
【００２６】
第１の電子部品１４にはスルーホール１４ｄが設けられており、スルーホール１４ｄは第１の電子部品１４の下面および上面にそれぞれ形成された回路電極１４ｃ、１４ｅを電気的に連結している。第２の電子部品１６の下面には、導電性金属より成る突出電極である第２の電極１６ａが形成されている。第２の電子部品１６は第１の電子部品１４の上面との間に、１５〜５０μｍの実装隙間ｄ４で実装され、回路電極１４ｅには第２の電極１６ａが接続される。これにより第２の電子部品１６は、第１の電子部品１４のバンプ１４ａを介して基板１２に電気的に接続される。
【００２７】
この電子部品実装構造１１においても、樹脂補強部１３は実装後の熱サイクルによって発生する熱応力を緩和するとともに、実装過程において第１の電子部品１４上に第２の電子部品１６を搭載する際に、第１の電子部品１４に負荷される押圧荷重を樹脂補強部１３によって支持して、第１の電子部品１４の破損を防止することができる。
【００２８】
【発明の効果】
本発明によれば、第１段の電子部品の上方に電子部品を重ねて実装して成る電子部品実装構造において、第１段の電子部品の電極形成面と基板の電極形成面との間に該第１段の電子部品を補強する補強部を形成するようにしたので、第１段の電子部品を補強して、実装後の信頼性に優れた電子部品実装構造を実現することができる。
【図面の簡単な説明】
【図１】本発明の実施の形態１の電子部品実装構造の断面図
【図２】本発明の一実施の形態１の電子部品実装方法の工程説明図
【図３】本発明の一実施の形態１の電子部品実装方法の工程説明図
【図４】本発明の実施の形態２の電子部品実装構造の断面図
【符号の説明】
１，１１ 電子部品実装構造
２，１２ 基板
３，１３ 樹脂補強部
４，１４ 第１の電子部品
６，１６ 第２の電子部品[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electronic component mounting structure and an electronic component mounting method in which an electronic component is further stacked and mounted above an electronic component mounted on a substrate.
[0002]
[Prior art]
In recent years, with the progress of miniaturization and higher functionality of electronic devices, it is required to further increase the mounting density of a mounting board incorporated in the electronic device. As a mounting form to cope with such high-density mounting, a stacked structure in which a plurality of electronic components are stacked is adopted (for example, see Patent Document 1). In this example, a laminated structure is realized by integrating two electronic components having a circuit pattern formed on the surface by bonding the back sides of the circuit pattern together, thereby increasing the size without increasing the substrate size. It becomes possible to manufacture a functional mounting board.
[0003]
[Patent Document 1]
JP-A-6-177322 [0004]
[Problems to be solved by the invention]
By the way, various forces act on the electronic components mounted on the substrate in the mounting process and in the usage state after being mounted on the substrate. For example, in a use state after mounting, a thermal stress acts between the electronic component and the substrate due to a thermal cycle when the environmental temperature varies. In the mounting process for forming the laminated structure as described above, when the second-stage electronic component is mounted on the first-stage electronic component, a pressing load from above acts on the first-stage electronic component. To do.
[0005]
However, in the multilayer structure according to the above-described conventional technology, the first-stage electronic component is connected to the substrate via the bonding electrode and is not reinforced, and the bonding reliability after mounting is ensured. In addition to being difficult to do so, there is a problem that the first stage electronic component is easily damaged by a pressing load from above. And such a subject becomes remarkable especially as the electronic component which comprises laminated structure thins, and has resulted in impairing the reliability after mounting.
[0006]
Therefore, an object of the present invention is to provide an electronic component mounting structure and an electronic component mounting method that are excellent in reliability after mounting.
[0007]
[Means for Solving the Problems]
The electronic component mounting structure according to claim 1, wherein a first stage electronic component having a plurality of first electrodes formed thereon is mounted on a substrate on which a plurality of connection electrodes are formed, and the first electrode is connected to the connection electrode. And an electronic component mounting structure having a stacked structure in which an upper electronic component including at least a second electronic component is stacked and mounted above the first electronic component. A reinforcing portion for reinforcing the first-stage electronic component is formed between the electrode-forming surface of the stepped electronic component and the electrode-formed surface of the substrate.
[0008]
The electronic component mounting structure according to claim 2 is the electronic component mounting structure according to claim 1, wherein the connection electrode or the first electrode is a protruding electrode made of a conductive metal.
[0009]
4. The electronic component mounting method according to claim 3, wherein a first stage electronic component having a plurality of first electrodes formed thereon is mounted on a substrate on which a plurality of connection electrodes are formed, and the first electrode is connected to the connection electrode. An electronic component mounting method for forming a stacked structure by stacking an upper electronic component including at least a second electronic component above the first electronic component, and forming a laminated structure on the substrate A resin supplying step for supplying resin to the electronic component mounting position; a first stage mounting step for mounting the first stage electronic component on the substrate; a resin curing step for curing the resin; and the first stage electron. A stacking step of mounting the upper electronic component above the component to form the stacked structure, and executing the resin supply step prior to the first step mounting step, and prior to the stacking step, the resin Electrode of the first stage electronic component by executing the curing process The resin forms a reinforcing portion that is cured between the Narumen the electrode forming surface of the substrate.
[0010]
The electronic component mounting method according to a fourth aspect is the electronic component mounting method according to the third aspect, wherein the connection electrode or the first electrode is a protruding electrode made of a conductive metal.
[0011]
According to the present invention, in an electronic component mounting structure in which an electronic component is further stacked and mounted above the electronic component, the first electronic component is formed between the electrode forming surface of the first stage electronic component and the electrode forming surface of the substrate. By forming the reinforcing portion that reinforces the electronic component of the step, it is possible to reinforce the electronic component of the first step and realize an electronic component mounting structure having excellent reliability after mounting.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
FIG. 1 is a cross-sectional view of an electronic component mounting structure according to Embodiment 1 of the present invention, and FIGS. 2 and 3 are process explanatory views of the electronic component mounting method according to Embodiment 1 of the present invention. First, the electronic component mounting structure 1 will be described with reference to FIG. The electronic component mounting structure 1 is an electronic component mounting structure having a laminated structure in which a first electronic component 4 is mounted on a substrate 2 and a second electronic component 6 is further stacked on the first electronic component 4. . The first electronic component 4 and the second electronic component 6 are both thin components, and the thicknesses t1 and t2 are 100 μm or less.
[0013]
In FIG. 1, a plurality of first connection electrodes 2 a and second connection electrodes 2 b are formed on the upper surface of the substrate 2. A first electrode 4a, which is a protruding electrode made of a conductive metal, is formed on the lower surface of the first electronic component 4, and the first electrode 4a is electrically connected to the first connection electrode 2a. It is connected. The first electronic component 4 is mounted between the upper surface of the substrate 2 with a mounting gap d1 of 15 to 50 μm, and the gap between the electrode forming surface of the first electronic component 4 and the electrode forming surface of the substrate 2 is In the central portion, the resin reinforcing portion 3 in which the thermosetting resin is cured is formed in a range that does not come into contact with the joint portion between the first connection electrode 2a and the first electrode 4a. The resin reinforcing portion 3 functions as a reinforcing portion that reinforces the first electronic component 4.
[0014]
On the upper surface of the first electronic component 4, the second electronic component 6 is mounted via the adhesive 5 in a face-up posture with the second electrode 6a facing upward. The mounting gap d2 between the second electronic component 6 and the first electronic component 4 is set to about 10 μm. The second electrode 6 a is connected to the second connection electrode 2 b of the substrate 2 through the bonding wire 7.
[0015]
In the electronic component mounting structure 1, the resin reinforcing portion 3 relieves the thermal stress generated by the thermal cycle in the usage state after mounting, and mounts the second electronic component 6 on the first electronic component 4 in the mounting process. At this time, the first electronic component 4 has a function of reinforcing the first electronic component 4 against a pressing load from the upper side applied to the first electronic component 4.
[0016]
Next, an electronic component mounting method for forming the electronic component mounting structure 1 will be described with reference to FIGS. First, as shown in FIG. 2A, a thermosetting resin 3a is supplied by the dispenser 8 between the first connection electrodes 2a at the electronic component mounting position set on the upper surface of the substrate 2 (resin supplying step). ). At this time, an appropriate amount of the resin 3a is discharged aiming at the center of the electronic component mounting position. This appropriate amount is set such that the resin 3a that is spread out does not spread to the outside of the first connection electrode 2a in the state where the first electronic component 4 is mounted.
[0017]
Next, as shown in FIG. 2B, the first electronic component 4 is held by the mounting tool 9 in a face-down posture with the first electrode 4a facing downward, and mounted on the electronic component mounting position on the substrate 2 (see FIG. 2B). First stage mounting process). Then, by pressing the first electronic component 4 with the mounting tool 9, the first electrode 4a and the first connection electrode are joined, and as shown in FIG. 1 connection electrode 2a. In addition, you may apply an ultrasonic vibration to the 1st electronic component 4 in the case of joining.
[0018]
Thereafter, as shown in FIG. 2D, the resin 3a is heated to cure the resin 3a (resin curing step). Thereby, the resin reinforcement part 3 which the resin 3a thermosetted between the electrode formation surface of the board | substrate 2 and the electrode formation surface of the 1st electronic component 4 is formed. In this resin curing step, the resin 3a may be heated via the first electronic component 4 by the mounting tool 9 provided with heating means, or the whole may be heated by other heating means.
[0019]
Thereafter, an upper electronic component is further stacked and mounted above the first electronic component 4 to form a laminated structure (lamination process). As shown in FIG. 3A, the adhesive 5 is applied to the upper surface of the first electronic component 4 (the back side of the circuit forming surface) by the dispenser 10, and then the second electronic component 4 is applied as shown in FIG. The electronic component 6 is mounted on the first electronic component 4 in a face-up posture with the electrode 6 a facing upward, and the second electronic component 6 is bonded to the first electronic component 4 with the adhesive 5.
[0020]
Thereafter, the substrate 2 is sent to the wire bonding process, and the electrode 6 a and the second connection electrode 2 b are connected by the bonding wire 7. Thereby, the electronic component mounting structure 1 shown in FIG. 1 is completed. In the above-described example, an example in which only the second electronic component 6 is stacked as the second-stage electronic component as the upper-stage electronic component has been shown. A laminated structure may be used.
[0021]
In the electronic component mounting method described above, the resin supply process is executed prior to the first stage mounting process. Accordingly, when the resin 3a is supplied between the first electronic component 4 and the substrate 2, an appropriate amount of the resin 3a can be accurately supplied to the center of the electronic component mounting position.
[0022]
Therefore, the supplied resin 3a does not protrude to the outside of the electronic component after the first electronic component 4 is mounted. Therefore, even when the thin first electronic component 4 is to be mounted, the resin 3a is exposed to the outside. Problems caused by the protruding resin scooping up the side surface of the first electronic component 4 and adhering to the upper surface, that is, fouling due to the resin 3a adhering to the mounting tool 9, and curing on the upper surface of the first electronic component 4 It is possible to prevent problems such as the resin 3a having hindered the mounting operation of the second electronic component 6.
[0023]
In the electronic component mounting method described above, a resin curing step is performed prior to the laminating step to form the resin reinforcing portion 3 in which the resin 3a is cured between the first electronic component 4 and the substrate 2. ing. As a result, the pressing load from above when the upper electronic component is mounted on the upper surface of the first electronic component 4 in the stacking process can be supported by the resin reinforcing portion 3, and the thin first electronic component 4 is supported. Even when the laminated structure is formed by using as the first stage electronic component, it is possible to effectively prevent the first stage electronic component from being damaged.
[0024]
(Embodiment 2)
FIG. 4 is a sectional view of the electronic component mounting structure according to the second embodiment of the present invention. The second embodiment uses a flip chip mounted in a face-down posture as the second-stage electronic component in the electronic component mounting structure having the same laminated structure as that of the first embodiment. Also in the second embodiment, the first electronic component 14 and the second electronic component 16 are both thin components, and the thicknesses t3 and t4 are 100 μm or less.
[0025]
In FIG. 4, a first connection electrode 12 a is formed on the upper surface of the substrate 12. A first electrode 14a which is a protruding electrode made of a conductive metal is formed on the lower surface of the first electronic component 14, and the first electrode 14a is electrically connected to the first connection electrode 12a. It is connected. The first electronic component 14 is mounted with a mounting gap d3 of 15 to 50 μm between the upper surface of the substrate 2 and between the electrode forming surface of the first electronic component 14 and the electrode forming surface of the substrate 12. Is formed with a resin reinforcing portion 13 having the same shape and function as the resin reinforcing portion 3 of the first embodiment. A functional circuit 14 b is formed on the lower surface side of the first electronic component 14.
[0026]
The first electronic component 14 is provided with a through hole 14d, and the through hole 14d electrically connects circuit electrodes 14c and 14e formed on the lower surface and the upper surface of the first electronic component 14, respectively. On the lower surface of the second electronic component 16, a second electrode 16a which is a protruding electrode made of a conductive metal is formed. The second electronic component 16 is mounted between the upper surface of the first electronic component 14 with a mounting gap d4 of 15 to 50 μm, and the second electrode 16a is connected to the circuit electrode 14e. As a result, the second electronic component 16 is electrically connected to the substrate 12 via the bumps 14 a of the first electronic component 14.
[0027]
Also in this electronic component mounting structure 11, the resin reinforcing portion 13 relieves thermal stress generated by the thermal cycle after mounting and also mounts the second electronic component 16 on the first electronic component 14 in the mounting process. In addition, the pressing load applied to the first electronic component 14 can be supported by the resin reinforcing portion 13 to prevent the first electronic component 14 from being damaged.
[0028]
【The invention's effect】
According to the present invention, in an electronic component mounting structure in which an electronic component is stacked and mounted above the first-stage electronic component, between the electrode-forming surface of the first-stage electronic component and the electrode-forming surface of the substrate. Since the reinforcing portion for reinforcing the first-stage electronic component is formed, it is possible to reinforce the first-stage electronic component and realize an electronic component mounting structure having excellent reliability after mounting.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an electronic component mounting structure according to a first embodiment of the present invention. FIG. 2 is a process explanatory diagram of an electronic component mounting method according to the first embodiment of the present invention. Process explanatory drawing of the electronic component mounting method of Embodiment 1 [FIG. 4] Cross-sectional view of the electronic component mounting structure of Embodiment 2 of the present invention [Explanation of symbols]
DESCRIPTION OF SYMBOLS 1,11 Electronic component mounting structure 2,12 Board | substrate 3,13 Resin reinforcement part 4,14 1st electronic component 6,16 2nd electronic component

Claims (4)

接続用電極が複数形成された基板に第１の電極が複数形成された第１段の電子部品を実装して前記第１の電極を前記接続用電極に電気的に接続し、前記第１段の電子部品の上方に少なくとも第２段の電子部品を含む上段の電子部品を重ねて実装して成る積層構造の電子部品実装構造であって、第１段の電子部品の電極形成面と基板の電極形成面との間に該第１段の電子部品を補強する補強部が形成されていることを特徴とする電子部品実装構造。A first stage electronic component on which a plurality of first electrodes are formed is mounted on a substrate on which a plurality of connection electrodes are formed, and the first electrode is electrically connected to the connection electrodes. An electronic component mounting structure having a laminated structure in which an upper electronic component including at least a second-stage electronic component is stacked and mounted above the electronic component, wherein an electrode formation surface of the first-stage electronic component and the substrate An electronic component mounting structure, wherein a reinforcing portion for reinforcing the first-stage electronic component is formed between the electrode forming surface and the electrode forming surface. 前記接続用電極または前記第１の電極が導電性金属より成る突出電極であることを特徴とする請求項１記載の電子部品実装構造。2. The electronic component mounting structure according to claim 1, wherein the connection electrode or the first electrode is a protruding electrode made of a conductive metal. 接続用電極が複数形成された基板に第１の電極が複数形成された第１段の電子部品を実装して前記第１の電極を前記接続用電極に電気的に接続し、前記第１段の電子部品の上方に少なくとも第２段の電子部品を含む上段の電子部品を重ねて積層構造を形成する電子部品実装方法であって、前記基板上の電子部品実装位置に樹脂を供給する樹脂供給工程と、前記第１段の電子部品を前記基板に搭載する第１段搭載工程と、前記樹脂を硬化させる樹脂硬化工程と、前記第１段の電子部品の上方に前記上段の電子部品を搭載して前記積層構造を形成する積層工程とを含み、前記第１段搭載工程に先立って前記樹脂供給工程を実行し、前記積層工程に先立って前記樹脂硬化工程を実行して第１段の電子部品の電極形成面と基板の電極形成面との間に前記樹脂が硬化した補強部を形成することを特徴とする電子部品実装方法。A first stage electronic component on which a plurality of first electrodes are formed is mounted on a substrate on which a plurality of connection electrodes are formed, and the first electrode is electrically connected to the connection electrodes. An electronic component mounting method for forming a laminated structure by stacking an upper electronic component including at least a second electronic component above the electronic component, and supplying a resin to the electronic component mounting position on the substrate A first stage mounting step of mounting the first stage electronic component on the substrate, a resin curing step of curing the resin, and mounting the upper electronic component above the first stage electronic component. A stacking process for forming the stacked structure, and executing the resin supply process prior to the first stage mounting process and executing the resin curing process prior to the stacking process. Between the electrode forming surface of the component and the electrode forming surface of the board Electronic component mounting method characterized by forming the reinforcing portion the resin is cured. 前記接続用電極または前記第１の電極が導電性金属より成る突出電極であることを特徴とする請求項３記載の電子部品実装方法。4. The electronic component mounting method according to claim 3, wherein the connection electrode or the first electrode is a protruding electrode made of a conductive metal.
JP2003192679A 2003-07-07 2003-07-07 Electronic component packaging structure and method for packaging electronic component Pending JP2005032742A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014045152A (en) * 2012-08-28 2014-03-13 Panasonic Corp Component mounting board
WO2022195800A1 (en) * 2021-03-18 2022-09-22 株式会社Fuji Electronic part mounting method and electronic part mounting device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014045152A (en) * 2012-08-28 2014-03-13 Panasonic Corp Component mounting board
WO2022195800A1 (en) * 2021-03-18 2022-09-22 株式会社Fuji Electronic part mounting method and electronic part mounting device

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