JP2005026582A - Semiconductor device and method for manufacturing the semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for manufacturing the semiconductor device, in which a scribe region is not made greater than required and a wiring is formed easily with a high reliability. <P>SOLUTION: The scribe region containing a dicing region 11 is provided between neighboring semiconductor chips on a wafer 1. Element active regions 12 are formed on the respective semiconductor chips, and a plurality of signal wirings 13 are extended. An electrode pad 14 is provided at an end of the signal wiring 13 and a through electrode 15 is provided in the scribe region except the dicing region 11. A re-wiring 16 for electrically connecting the electrode pad 14 with the through electrode 15 is formed on a surface of the semiconductor chip. The other end of the re-wiring 16 is positioned short of the dicing region 11. When the wafer 1 on which a plurality of semiconductor chips are arrayed is cut off along a cutting line, a semiconductor device 3 is formed on a cut surface so as to prevent an exposure of the through electrode 15 in the wiring. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a semiconductor chip is mounted as a chip size package (also referred to as CSP) and a method for manufacturing the semiconductor device.
[0002]
[Prior art]
Conventionally, wire bonding, TAB, and flip chip are known as mounting forms of semiconductor devices. In recent years, a chip size package (hereinafter abbreviated as CSP) is a semiconductor device that has high electrical performance as compared with the above-described mounting form, and is small, light, and capable of high-density mounting. Has become mainstream.
For example, Japanese Patent Publication No. 9-511097 discloses a manufacturing method and a manufacturing apparatus for an integrated circuit element.
[0003]
[Patent Document 1] Japanese Patent Publication No. 9-511097 (Page 2 to Page 15, FIG. 1 to FIG. 10)
[0004]
[Problems to be solved by the invention]
However, the following problems occur in the method and apparatus for manufacturing an integrated circuit element disclosed in the above-mentioned Japanese National Publication No. 9-511097.
1) By providing the inclined end surface 14 as shown in FIG. 1 of the above publication, the scribe region becomes wider by the inclined end surface 14.
[0005]
2) The formation process for forming the metal contact portion 12 on the inclined end surface 14 as shown in FIG. 7 of the publication is complicated.
3) When the semiconductor device is formed by separating and cutting along the vertical line 58 which is the final cutting position shown in FIG. 8 of the above publication, a part of the metal contact portion 12 is exposed on the cut surface of each semiconductor device. For this reason, moisture or the like adheres to the exposed metal contact portion 12, or moisture or the like mixes into the semiconductor device from the metal contact portion, and corrosion or the like occurs from the metal portion or the inside of the semiconductor device, thereby impairing reliability. There is a fear.
[0006]
4) In the publication, it is described that a metal contact portion that is in electrical contact with the surface 51 of the pad portion 34 is formed on the die without first separating and cutting the die into a plurality of chips. ing. For this reason, electrical inspection of each semiconductor device is performed for each of the wafers after the wafer is separated and cut into semiconductor devices. For this reason, the inspection process becomes complicated.
[0007]
The present invention has been made in view of the above circumstances, and it is easy to form a wiring without making a scribe region larger than necessary, and can perform an electrical inspection before being separated and cut into a semiconductor device, and has high reliability. An object of the present invention is to provide a semiconductor device having a laminated structure and a method for manufacturing the semiconductor device.
[0008]
[Means for Solving the Problems]
A semiconductor device according to a first aspect of the present invention is a cutting line for electrically connecting one end side to a signal line extending from the surface of a semiconductor chip arranged on a wafer and for cutting and separating the semiconductor chip at the other end. A rewiring located in front of the dicing region, and a through electrode portion formed so as to penetrate the wafer and have one end electrically connected to the rewiring, and the other end reaching the back surface of the semiconductor chip. It has.
[0009]
According to this configuration, when the semiconductor device is formed by separating and cutting the wafer on which the semiconductor chips are arranged in the dicing region, the rewiring and the through electrode portion are prevented from being exposed on the cut surface of the cut-out semiconductor device. .
[0010]
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a rewiring is formed in which one end is electrically connected to a signal line provided on a surface of a semiconductor chip arranged on a wafer and the other end is positioned in front of a dicing region. A step of forming a through electrode portion extending from the back surface of the wafer to the rewiring, a step of forming a back surface wiring electrically connected to the through electrode portion on the back surface of the wafer, and the through electrode Forming a protruding electrode for electrical connection with an external terminal on a portion or the backside wiring, and forming a semiconductor device by cutting the wafer along a dicing region of the wafer At least.
[0011]
According to this method for manufacturing a semiconductor device, a wafer on which semiconductor chips are arranged is separated and cut along a dicing region, thereby forming a semiconductor device in which rewiring and through electrode portions are prevented from being exposed on the cut surface. Further, a protruding electrode for electrical connection with an external terminal can be easily provided at an arbitrary position on the back side of the wafer.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
(First embodiment)
1 to 6 relate to a first embodiment of the present invention. FIG. 1 is a view showing a wafer in which a plurality of semiconductor chips are arrayed and a semiconductor device cut out. FIG. 2 is a view for explaining adjacent semiconductor chips on the wafer. FIG. 3 is a diagram for explaining the vicinity of the cut surface of the separated semiconductor device, FIG. 4 is a diagram for explaining a protruding electrode provided on the back surface of the semiconductor device, and FIG. FIG. 6 is a diagram illustrating a semiconductor module configured by stacking semiconductor devices having different width dimensions.
[0013]
2A is a view of adjacent semiconductor chips as viewed from the surface side, FIG. 2B is a cross-sectional view taken along the line AA in FIG. 2A, and FIG. 4A is on the through electrode portion. FIG. 4B is a diagram for explaining a state in which the back surface wiring is provided on the back surface of the semiconductor device and the protrusion electrode is provided at an arbitrary position on the back surface wiring.
[0014]
As shown in FIG. 1, a plurality of semiconductor chips 10 are arranged at a predetermined pitch on a silicon wafer (hereinafter abbreviated as “wafer”) 1, and the wafer 1 is cut along a predetermined cutting line 2. As a result, a plurality of semiconductor devices 3 are formed separately.
[0015]
As shown in FIGS. 2A and 2B, a scribe region is provided between adjacent semiconductor chips 10 formed on the wafer 1. The scribe region includes a dicing region 11 that becomes a cutting line 2 having a predetermined width.
[0016]
Each semiconductor chip 10 is provided with an element active region 12 in which a circuit is formed by an IC chip (not shown) or the like. A plurality of signal wirings 13 extend from the surface side of the element active region 12, and for example, electrode pads 14 are provided at the ends of the signal wirings 13.
[0017]
A through electrode portion 15 corresponding to the electrode pad 14 is provided in the scribe region excluding the dicing region 11 of each semiconductor chip 10 of the present embodiment. The through electrode portion 15 is formed by injecting a conductive paste after forming an insulating film on the inner wall of the through hole 1a formed at the predetermined position of the wafer 1 from the back surface side. The center is located on the center line extension line of the corresponding signal wiring 13.
[0018]
Further, a strip-shaped rewiring 16 that electrically connects the electrode pad 14 and the through electrode portion 15 is formed on the surface of the semiconductor chip 10. One end of the rewiring 16 is electrically connected to the electrode pad 14, and the other end is defined to be positioned at a predetermined distance from the dicing region 11. This prevents the adjacent semiconductor chips 10 from being electrically connected via the rewiring 16.
[0019]
Therefore, before the wafer 1 is transferred to the dicing process, the semiconductor chips 10 regularly arranged on the wafer 1 can be electrically inspected by moving to the inspection process. .
[0020]
Reference numeral 17 denotes an insulating film that covers the surface of the wafer 1, and covers the signal wiring 13, the electrode pad 14, the rewiring 16, and the like. Reference numeral 18 denotes an I / O region in which an I / O circuit is formed by a protection diode or the like. Furthermore, when forming the through-hole 1a, the wafer may be formed in advance thinly by polishing or the like in consideration of the diameter of the through-hole.
[0021]
When the wafer 1 constituted by arranging a plurality of the semiconductor chips 10 configured as described above is cut along the cutting line 2, a semiconductor device 3 is formed. As shown in FIG. 3, in each semiconductor device 3 of the present embodiment, a semiconductor device 3 that reliably prevents the through electrode portion 15 that is a metal portion related to wiring from being exposed from an end surface that is a cut surface is configured.
[0022]
Specifically, in each semiconductor device 3 formed by cutting the wafer 1 along the cutting line 2, the signal wiring 13, the electrode pad 14, and the rewiring 16 that are metal parts related to the wiring are exposed. The through electrode portion 15, which is disposed in the insulating film 17 and is a metal portion related to the wiring, is positioned in the wafer 1.
[0023]
Then, as shown in FIG. 4A and FIG. 4B, the back electrode 21 or the desired back wiring 22 is formed on the back side of the through electrode portion 15, so that the through electrode portion on the back surface of the semiconductor device 3 is formed. A protruding electrode 23 serving as an electrical connection portion with an external terminal is provided at a desired position on the upper surface or the back surface.
Therefore, as shown in FIG. 5, for example, the projecting electrode 23 is provided at a predetermined position of each of the semiconductor devices 3a, 3b, and 3c having substantially the same width dimension, and the desired wiring portion 24 is formed on the insulating film 17. By doing so, it is possible to easily form a plurality of semiconductor devices 3a, 3b, and 3c in a laminated structure and configure a semiconductor module 20 such as an imaging module, for example. The semiconductor module 20 includes, for example, a semiconductor device 3a that is a solid-state imaging device, a semiconductor device 3b that is a driving and signal processing IC, a semiconductor device 3c that is a memory, and the like.
[0024]
Further, in the semiconductor module 20 shown in FIG. 5, a semiconductor module is shown by laminating a plurality of semiconductor devices 3 having substantially the same width dimension, but the configuration of the semiconductor module is not limited to this. Alternatively, as shown in FIG. 6, the semiconductor module 20A may be configured by stacking semiconductor devices 3d, 3e, 3f, and 3g having different width dimensions. When the semiconductor module 20A is an imaging module, for example, the semiconductor device 3d may be a solid-state imaging device, the semiconductor device 3e may be a driving IC, the semiconductor device 3f may be a signal processing IC, and the semiconductor device 3g may be a memory.
[0025]
When a plurality of semiconductor devices 3 are stacked to form a semiconductor module, the space between the semiconductor devices 3 is sealed with an insulating resin 25. Reference numeral 26 denotes a substrate, and the semiconductor modules 20 and 20A are formed on the substrate 26.
[0026]
In this way, a through electrode portion connecting the front surface side and the back surface side of the wafer is provided at a position corresponding to the signal wiring different from the dicing region in the scribe region of a plurality of adjacent semiconductor chips provided on the wafer. By providing a rewiring on the front surface side of the wafer with an end surface that electrically connects the through electrode portion and the electrode pad electrically connected to the signal wiring extending from the semiconductor chip positioned in front of the dicing region When a semiconductor device is cut out by dicing the wafer along the cutting line, the metal part for wiring is surely prevented from being exposed on the cut surface of each semiconductor device, thereby forming a highly reliable semiconductor device. can do.
This surely eliminates the problem that metal wiring is corroded due to moisture mixed into the semiconductor device.
[0027]
In addition, by providing the through electrode portion in the scribe region outside the element active region, it is possible to reduce damage to the semiconductor chip by providing the through electrode portion.
[0028]
Further, by providing a back electrode or a desired back surface wiring on the back surface of the wafer, a protruding electrode can be provided at a desired position on the back surface electrode or back surface wiring on the back surface of the semiconductor device. This facilitates the configuration of the semiconductor module in which the semiconductor device has a stacked structure.
[0029]
The position where the through electrode portion 15 is formed is not limited to the position shown in FIGS. 2A to 3, and the through electrode portion 15 is provided at the position shown in FIGS. By configuring the devices 3A and 3B, it is possible to configure a smaller semiconductor device than the semiconductor device 3.
[0030]
Specifically, in the semiconductor device 3A shown in the drawing for explaining another configuration of the semiconductor device in FIG. 7, the other end of the rewiring 16 is outside the dicing region 11 and in front of the scribe region by a predetermined interval. The through electrode portion 15 is provided in a region excluding the position where the electrode pad 14 is formed.
[0031]
On the other hand, in the semiconductor device 3B shown in FIG. 8 illustrating another configuration of the semiconductor device, the distance outside the element active region 12 and excluding the I / O region 18 and the like does not damage the I / O circuit. A through electrode portion 15 is provided at a position separated by a. As shown in the figure, instead of providing the electrode pad 14, the signal wiring 13 is extended from the dicing area 11 to a position that is closer to the front by a predetermined interval. That is, the signal wiring 13 is configured to also serve as the rewiring 16.
[0032]
Thus, by providing the through electrode portion outside the element active region, in addition to the effects described above, it is possible to reduce the damage applied to the semiconductor chip and to configure a small semiconductor device.
In particular, according to the semiconductor device shown in FIG. 8, the electrode pad is not necessary and the scribe region can be narrowed, so that further miniaturization can be expected.
[0033]
Here, a process of manufacturing the semiconductor device 3 will be briefly described.
First, a strip-shaped rewiring 16 is formed, one end of which is electrically connected to the electrode pad 14 provided on the surface of the semiconductor chip 10 arranged on the wafer 1 and the other end is located in front of the dicing region 11.
[0034]
Next, a through hole 1a extending from the back side of the wafer 1 to the rewiring 16 is formed, and after forming an organic insulating film such as a plasma oxide film or polyimide on the inner wall of the through hole 1a, a conductive paste is applied. The through electrode portion 15 is formed by implantation.
[0035]
Next, a back electrode 21 or a back wiring 22 electrically connected to the through electrode portion is formed on the back surface of the wafer 1 as necessary, and the back electrode 21 or the back surface on the through electrode portion 15 is formed. A protruding electrode 23 is formed on the wiring 22 as an electrical connection with an external terminal (not shown).
[0036]
Finally, dicing is performed along the dicing region 11 of the wafer 1 to form the semiconductor device 3.
[0037]
In this way, after forming the rewiring, dicing is performed to form a semiconductor device. Therefore, the rewiring, the through electrode portion, and the protruding electrode are additionally processed on the general-purpose wafer on which the IC or the like is formed, and the CSP is formed. Can be realized.
[0038]
Also, by providing a protruding electrode at an arbitrary position on the back surface of the semiconductor device, a semiconductor module can be configured by stacking a plurality of semiconductor devices, and an inspection probe is brought into contact with the protruding electrode on the back surface of the semiconductor device. Wafer inspection can be performed quickly. This can greatly reduce the inspection man-hours.
[0039]
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the invention.
[0040]
[Appendix]
According to the embodiment of the present invention as described above in detail, the following configuration can be obtained.
[0041]
(1) One end side is electrically connected to a signal line extending from the surface of the semiconductor chip arranged on the wafer, and the other end is positioned in front of the dicing region which is a cutting line for cutting and separating the semiconductor chip. Rewiring to
A semiconductor device comprising: a through-electrode portion penetrating the wafer and having one end side electrically connected to the rewiring and the other end reaching the back surface of the semiconductor chip.
[0042]
(2) The semiconductor device according to appendix 1, wherein a back surface wiring is formed that is electrically connected to the through electrode portion that has reached the back surface of the semiconductor chip.
[0043]
(3) The semiconductor device according to appendix 2, wherein a protruding electrode is provided on the through electrode portion or the backside wiring.
[0044]
(4) The semiconductor device according to any one of appendix 1 to appendix 3, wherein the semiconductor module is configured by electrically connecting a plurality of semiconductor devices in a stacked structure.
[0045]
(5) forming a rewiring having one end electrically connected to a signal line provided on the surface of the semiconductor chip arranged on the wafer and the other end positioned in front of the dicing area;
Forming a through electrode portion extending from the back surface of the wafer to the rewiring;
Forming a backside wiring electrically connected to the through electrode portion on the backside of the wafer;
Forming a protruding electrode for electrical connection with an external terminal on the through electrode portion or the backside wiring; and
And a step of cutting the wafer along the dicing region of the wafer to form a semiconductor device.
[0046]
【The invention's effect】
As described above, according to the present invention, it is easy to form a wiring without making a scribe region larger than necessary, and an electrical inspection can be performed before separating and cutting into a semiconductor device. It is possible to provide a semiconductor device that is easy to manufacture and a method for manufacturing the semiconductor device.
[Brief description of the drawings]
FIG. 1 to FIG. 6 relate to a first embodiment of the present invention, and FIG. 1 is a view showing a wafer in which a plurality of semiconductor chips are arranged and a semiconductor device cut out. FIG. 2 shows adjacent semiconductor chips on the wafer. FIG. 3 is a diagram illustrating the vicinity of a cut surface of a semiconductor device that has been separated and cut. FIG. 4 is a diagram illustrating a protruding electrode provided on the back surface of the semiconductor device. FIG. FIG. 6 is a diagram illustrating a semiconductor module configured by stacking. FIG. 6 is a diagram illustrating a semiconductor module configured by stacking semiconductor devices having different width dimensions. FIG. 7 is a diagram illustrating another configuration of the semiconductor device. Diagram explaining another configuration of the device [Explanation of symbols]
DESCRIPTION OF SYMBOLS 3 ... Semiconductor device 11 ... Dicing area | region 12 ... Element active area 13 ... Signal wiring 14 ... Electrode pad 15 ... Through-electrode part 16 ... Rewiring 17 ... Insulating film

Claims (2)

Rewiring is arranged such that one end side is electrically connected to the signal line extending from the surface of the semiconductor chip arranged on the wafer, and the other end is located in front of the dicing area which is a cutting line for cutting and separating the semiconductor chip. When,
A semiconductor device comprising: a through-electrode portion penetrating the wafer and having one end side electrically connected to the rewiring and the other end reaching the back surface of the semiconductor chip. Forming a rewiring having one end electrically connected to a signal line provided on the surface of the semiconductor chip arranged on the wafer and the other end positioned in front of the dicing area;
Forming a through electrode portion extending from the back surface of the wafer to the rewiring;
Forming a backside wiring electrically connected to the through electrode portion on the backside of the wafer;
Forming a protruding electrode for electrical connection with an external terminal on the through electrode portion or the backside wiring; and
And a step of forming the semiconductor device by cutting the wafer along a dicing region of the wafer.

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