JP2005020023A - Process for fabricating insulated gate field effect transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process for fabricating a semiconductor device utilizing a semiconductor film thermally crystallizable at a lower temperature more effectively. <P>SOLUTION: An insulated gate field effect transistor is fabricated by forming an underlying silicide film or a gate insulation film on a substrate, forming an amorphous silicon film in contact therewith without exposing the film to the atmosphere, heat treating the amorphous silicon film to form a crystalline silicon film, and patterning the crystalline silicon film to form a semiconductor layer for forming a channel forming region. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

The present invention relates to a method for manufacturing a semiconductor device using a semiconductor layer manufactured by a manufacturing method with high mass productivity.

  Conventionally, a polycrystalline semiconductor device has been manufactured using a polycrystalline semiconductor film obtained by forming it in a temperature range of 550 ° C. to 900 ° C. by low pressure CVD.

  Recently, large-area liquid crystal displays and the like have been developed, and it has become necessary to form a polycrystalline semiconductor device on a large-area substrate.

  Forming a polycrystalline semiconductor layer directly on a large-area substrate by a low pressure CVD method has many difficulties from the problem of reaction temperature, and usually a crystallization treatment is performed after forming a non-single crystal semiconductor film, A polycrystalline semiconductor layer was formed on a large-area substrate.

  When a non-single-crystal semiconductor film is obtained by a low pressure CVD method, there is a problem that it is difficult to form a uniform film over a large-area substrate.

  Further, when a non-single crystal semiconductor film is obtained by the plasma CVD method, the film forming process takes time, and there is a problem that it is difficult to obtain a uniform film thickness on a large area substrate.

As a means for solving such a problem, there is a method using a sputtering method.
In particular, the magnetron sputtering method
B) Electrons are confined in the vicinity of the target by a magnetic field, and damage to the substrate surface by high-energy electrons is suppressed.
B) High-speed film formation over a large area at a low temperature.
C) Since dangerous gas is not used, it is highly safe and industrial.
There are advantages such as.

However, it is known that the semiconductor film obtained by the sputtering method has a microstructure, that is, the presence of silicon atoms, and thermal crystallization treatment is difficult.

The present invention solves such problems and provides a method for more effectively manufacturing a semiconductor device using a semiconductor film that can be thermally crystallized at a lower temperature.

  The present invention contains oxygen or oxygen before or after forming a semiconductor film by sputtering on a substrate in an inert gas atmosphere containing hydrogen or hydrogen and forming the semiconductor film obtained by the sputtering. A silicon oxide film is formed by a sputtering method in an inert gas atmosphere, and each film is formed in a dedicated reaction chamber, and it is arbitrarily arranged in the same apparatus without specifying the order of forming these films. It can be formed continuously at

By forming each of these films in a dedicated reaction chamber, the amount of oxygen in the semiconductor film is 7 × 10 ¹⁹ cm ⁻³ or less, most preferably 1 × 10 ¹⁹ cm ⁻³ or less. It is.

  Further, as an example of a method for forming a part of the semiconductor film as a channel formation region, amorphous (amorphous or extremely close to the state) semiconductor obtained by sputtering in an inert gas atmosphere containing hydrogen or hydrogen An active layer for an insulated gate semiconductor device of the present invention is obtained by crystallizing at least a channel formation region by applying a film (hereinafter referred to as Si film) to a semiconductor film at a temperature of 450 ° C. to 700 ° C., typically 600 ° C. can get.

  Conventionally, an example in which a thin film transistor is manufactured using an a-Si (amorphous silicon) film obtained by a sputtering method to which hydrogen is added is known, but its electrical characteristics are known to be low. Therefore, in general, an a-Si film is obtained by sputtering without adding hydrogen.

  However, the present inventor can prevent the formation of a microstructure in the formed a-Si film by adding hydrogen in the sputtering method. In addition, it has been found that thermal crystallization can be performed at a low temperature of 600 ° C. or lower.

  The semiconductor film after this crystallization has an average crystal grain size of about 5 to 400%, and the hydrogen content present in the semiconductor film is 5 atomic% or less. Further, the semiconductor film having crystallinity has lattice distortion, and the interface of each crystal grain is microscopically close to each other and has an effect of eliminating a barrier against carriers at the crystal grain boundary.

For this reason, impurity atoms such as oxygen segregate at a polycrystalline grain boundary without lattice distortion, thereby forming a barrier (barrier) and hindering carrier movement. When formed in the reaction chamber, the amount of oxygen present in the film can be reduced to a very small amount of 7 × 10 ¹⁹ cm ^−3, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Since the barrier is not formed due to the lattice distortion, or the existence of the barrier is negligible, the mobility of the electrons has a very good characteristic of 50 to 300 cm ² / Vsec.

  In addition, the semiconductor film obtained by the plasma CVD method has a large proportion of the amorphous component, and the amorphous component part is naturally oxidized to form an oxide film inside, while the sputtered film is dense and the natural oxidation is a semiconductor film. The crystal grains with lattice distortions strongly press each other because of the denseness, and the energy barrier against carriers is not formed near the crystal grain interface. It has the characteristics.

  The present invention provides a method for manufacturing an insulating gate type semiconductor device by actively utilizing the excellent characteristics of a semiconductor film formed by such a sputtering method. It is made in the reaction chamber.

  The silicon oxide film formed by this sputtering method can be used as an insulating film or a gate insulating film on the substrate, and the semiconductor film can be used as an active layer, an impurity layer, or a gate electrode.

  As described above, according to the method of the present invention, it is possible to fabricate all the portions necessary for the insulated gate semiconductor device by the sputtering method. For this reason, in the insulated gate type semiconductor device as shown in FIG. 1D, the lower side (18) of the active layer, that is, the contact portion with the base insulating film is partially oxidized to be in a SiOx state. Electrical characteristics are slightly deteriorated. As a result, a back channel cannot be generated in this portion, and the reverse leakage current can be reduced. This is very effective when this semiconductor device is used as a CMOS, and shows a significant effect in reducing the off-current.

Furthermore, since it is a semiconductor film formed by sputtering, its particle size is 5 to 400 mm, typically 50 to 200 mm, after thermal crystallization. Reverse leakage can be reduced at the N ⁺ -I (P ⁺ -I) junction.

  By adopting the configuration of the present invention, it is possible to solve the problem of difficulty in thermal crystallization, which is a problem in the process of obtaining a semiconductor having crystallinity by thermally crystallizing a non-single crystal semiconductor obtained by an industrially useful sputtering method. In addition, it was possible to produce a high-performance thin film transistor by using this crystalline semiconductor layer.

  Further, according to the method of the present invention, all the minimum necessary portions of the insulated gate semiconductor device can be produced by the sputtering method. For this reason, in the insulated gate type semiconductor device as shown in FIG. 1D, the lower side (18) of the active layer, that is, the contact portion with the base insulating film is partially oxidized to have a semi-insulating state. The electrical characteristics at the part are slightly deteriorated. As a result, a back channel cannot be generated in this portion, and the reverse leakage current can be reduced. This is very effective when this semiconductor device is used as a CMOS, and shows a significant effect in reducing the off-current.

  In addition, it is possible to reduce the concentration of oxygen impurities present in the semiconductor film, and to form an insulated gate semiconductor device having a very high mobility, which is difficult to form a barrier against carriers near the crystal grain boundary. did it.

Furthermore, since a plurality of different processes can be performed in the same apparatus, continuous processes can be performed without being affected by the outside. In addition, productivity can be improved because a plurality of processes can be performed simultaneously.
Next, an Example is shown and this invention is demonstrated in detail.

  In this example, a silicon semiconductor layer having crystallinity is obtained by thermally crystallizing a Si film produced by a multi-chamber magnetron type RF sputtering apparatus as schematically shown in FIG. 2, and this silicon semiconductor layer is used. This is an example of manufacturing a thin film transistor.

  As shown in FIG. 2, this multi-chamber type sputtering apparatus has a preliminary chamber (1), a substrate passage chamber (2), a silicon oxide reaction chamber (3), and a semiconductor film reaction chamber (4) as a gate valve (6). (7) The system is partitioned and connected to (8), and each chamber is a system that can completely exhaust and introduce gas and the like.

This exhaust system has two systems: a reaction system in which a rotary pump and a turbo molecular pump are connected in series, an exhaust system for low vacuum, and a high vacuum exhaust system in which a cryopump is connected. The back pressure is 1 × 10 ^-7. It can exhaust to Pa.

  In addition, when loading a substrate into each room, it is after opening and closing the gate valve that partitions it, but at this opening and closing, the pressure difference between both chambers is reduced and the atmospheric gas in both chambers is reduced. Performed after aligning. Thereby, mixing of unnecessary impurities etc. can be reduced as much as possible.

  Further, the strength of the magnetic field supply means provided in the vicinity of the sputtering target can be varied by external control (for example, the amount of applied power or the distance to the target can be varied).

  The substrate passage chamber (2) of this sputtering apparatus is equipped with heating means and atmospheric gas supply means so that the semiconductor film can be heat-treated, so that the semiconductor film can be thermally crystallized without taking it out of the apparatus. It is. Furthermore, before the film is formed on the substrate, the substrate is heat-treated in the substrate passage chamber, and once the substrate is thermally contracted, the film can be formed on the substrate. The stress remaining in the film is relieved, and the adhesion between the substrate and the film is improved.

  FIG. 1 shows a thin film transistor manufacturing process manufactured in this example.

First, 10 glass substrates (11) / cassette are set in the reserve chamber (1) from the gate valve (5), and one of them passes through the substrate passage chamber (2) to form a reaction chamber for forming a silicon oxide film. Loaded into (3). A SiO ₂ film (12) was formed on a glass substrate (11) to a thickness of 200 nm by magnetron type RF sputtering under the following conditions.
O ₂ 100% atmosphere Deposition temperature 150 ° C
RF 813.56NHz) Output 400W
Pressure 0.5Pa
Using single crystal silicon as a target

  After the formation, the reaction chamber is evacuated to a high vacuum, the gate valve is opened and closed, the substrate is taken out to the passage chamber, the substrate is transferred to the semiconductor film reaction chamber (4) in the same manner, and then the Si film that becomes the channel formation region (13) is deposited to a thickness of 100 nm.

At this time, the back pressure was set to 1 × 10 ⁻⁷ Pa or less, and a turbo molecular pump and a cryopump were used for exhaust. The amount of gas to be supplied had a purity of 5N (99.999%) or more, and the additive gas was argon 4N or more used as necessary. The target single crystal silicon also has an oxygen concentration of 5 × 10 ¹⁸ cm ⁻³ or less, for example, an oxygen concentration of 1 × 10 ¹⁸ cm ⁻³ , and oxygen as an impurity in the formed film is extremely reduced.

The film forming conditions are as follows: Inert gas argon and hydrogen atmosphere
H ₂ / (H ₂ + Ar) = 80% (Partial pressure ratio)
Deposition temperature 150 ° C
RF (13.56MHz) Output 400W
Total pressure 0.5Pa
The target was a single crystal Si target.

  Thereafter, the substrate (11) is returned again to the substrate passage chamber, where it takes 10 hours in a temperature range of 450 ° C. to 700 ° C., particularly 600 ° C., in hydrogen or an inert gas, in this embodiment nitrogen 100. The Si film (13) was thermally crystallized in a% atmosphere to produce a highly crystalline silicon semiconductor layer (semi-amorphous or semi-crystal).

Impurity purity in the amorphous silicon film formed by this method and the film crystallized by heat treatment was examined by SIMS (secondary ion equivalence analysis) method. Then, of the impurity concentrations during film formation, oxygen was 8 × 10 ¹⁸ cm ⁻³ and carbon was 3 × 10 ¹⁶ cm ⁻³ . Moreover, hydrogen had 4 × 10 ²⁰ cm ⁻³ and the amount corresponding to 1 atomic% when the density of silicon was 4 × 10 ²² cm ⁻³ . These were examined on the basis of the oxygen concentration 1 × 10 ¹⁸ cm ⁻³ of the target single crystal silicon. In addition, this SIMS analysis examined the distribution (depth profile) in the depth direction of the film after film formation, and based on the minimum value. This is because the surface has naturally oxidized silicon oxide with the atmosphere. These values were not particularly changed even after the crystallization treatment, and the oxygen impurity concentration was 8 × 10 ¹⁸ cm ⁻³ .

In this example, oxygen was increased just in case, for example, N ₂ O was added at 0.1 cc / sec and 1 cc / sec. Then, the oxygen concentration after crystallization increased to 1 × 10 ²⁰ cm ⁻³ and 4 × 10 ²⁰ cm ⁻³ . However, when such a coating was used, crystallization could be achieved for the first time by simultaneously increasing the temperature necessary for crystallization to 700 ° C. or higher, or increasing the crystallization time by at least 5 times.

  That is, considering the softening temperature of the glass of the substrate industrially, treatment at 700 ° C. or less, preferably 600 ° C. or less is important, and it is also important to reduce the time required for crystallization. However, no matter how much impurities such as oxygen concentration are reduced, crystallization of a-Si semiconductor by thermal annealing was impossible experimentally below 450 ° C.

In the present invention, if the oxygen concentration during film formation is 1 × 10 ²⁰ cm ⁻³ or more due to leakage from the apparatus as a result of using such a high-quality sputtering apparatus, Such characteristics of the present invention cannot be expected.

In this way, it was determined that the oxygen concentration was 7 × 10 ¹⁹ cm ⁻³ or less and that the heat treatment temperature was 450 to 700 ° C.

  As can be seen from the laser Raman analysis data shown in FIG. 5, this semiconductor film has a peak position indicating the presence of crystals shifted to a lower wave number side than the peak position of normal single crystal silicon, and I wandered the existence of distortion.

  In this embodiment, the present invention is described using a silicon semiconductor. However, it is possible to use a germanium semiconductor or a semiconductor mixed with silicon and germanium. It was possible to reduce the temperature applied at that time by about 100 ° C.

  Next, the substrate is taken out from this apparatus, and device isolation patterning is performed on this thermally crystallized silicon semiconductor film to obtain the shape of FIG. 1A, and a part of this semiconductor film is channeled in an insulated gate type semiconductor device. It was configured as a formation region.

Next, the substrate is returned to the sputtering apparatus again, and a gate oxide film (SiO ₂ ) (15) is formed to a thickness of 100 nm by a magnetron type RF sputtering method in the reaction chamber (3) dedicated to silicon oxide under the following conditions. Filmed. Before forming the gate insulating film, a bias was applied to the substrate side in a 100% hydrogen atmosphere, and the surface of the semiconductor (13) was plasma hydrogen cleaned.

Preparation conditions of the gate insulating film of oxygen 95 vol% NF ₃ 5 vol%
Pressure 0.5pa
Deposition temperature 100 ° C
RF (13.56MHz) output 400W

  When forming this gate oxide film, sputtering with a high proportion of oxygen to the inert gas, most preferably 100% oxygen, can reduce the interface state density of the gate insulating film, realizing a very good transistor it can.

In this embodiment, since NF ₃ is added as a part of the reaction gas during the reaction, fluorine is added to the gate insulating film. As a result, it was possible to neutralize the dangling bonds of silicon in the film and eliminate the cause of the generation of fixed charges in the film.

  Next, the substrate is taken out from the multi-chamber sputtering apparatus, and a semiconductor layer mixed with phosphorus is formed thereon by a low pressure CVD method. Thereafter, photolithography was performed using a predetermined mask pattern to form a semiconductor film mixed with phosphorus as a gate electrode (20). Fig. 1 (B)

  By producing this electrode by a low pressure CVD method, good characteristics can be obtained without damaging the underlying gate insulating film.

  The gate electrode is not limited to a doped semiconductor layer, and other materials can be used. Next, using the resist pattern used when etching the gate electrode (20) or the gate electrode (20) as a mask, impurity regions (14) and (14 ') are formed in the self-line using an ion implantation technique. did. Thereafter, thermal annealing was performed for 15 minutes at 400 ° C. in a hydrogen atmosphere to activate.

  Thus, the semiconductor layer under the gate electrode (20) was configured as a channel region of the insulated gate semiconductor device.

  Next, an interlayer insulating film (17) was formed covering all of these upper surfaces, and the state shown in FIG. 1 (C) was obtained. After that, holes for contact of the source and drain electrodes are made, and metal aluminum is formed on the upper surface by sputtering, and predetermined patterning is performed to form the source and drain electrodes (16) and (16 '). Type semiconductor device was completed. Fig. 1 (D)

  In this embodiment, the semiconductor layer forming the channel region and the source and drain semiconductor layers are made of the same material, which simplifies the process. In addition, since the same semiconductor layer is used, the source and drain semiconductor layers have crystallinity and the carrier mobility is high, and thus an insulated gate semiconductor device having better electrical characteristics can be realized.

  The above is the manufacturing method of the thin film transistor using the thermocrystalline silicon semiconductor layer manufactured in this embodiment. For comparison, the Si layer (13) in FIG. Four reference examples in which the hydrogen concentration and the oxygen concentration, which are conditions for forming a film, are changed are shown below.

(Reference Example 1)
In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 0% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration was 2 × 10 ²⁰ cm ⁻³ .

(Reference Example 2)
In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 20% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration was 7 × 10 ¹⁹ cm ⁻³ .

(Reference Example 3)
In this embodiment, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 50% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration was 3 × 10 ¹⁹ cm ⁻³ .

(Reference Example 4)
In this reference example, the partial pressure ratio of the atmosphere at the time of sputtering when manufacturing (13) of FIG.
H ₂ / (H ₂ + Ar) = 70% (Partial pressure ratio)
Others were produced by the same method as in Example 1. At this time, the oxygen concentration was 1 × 10 ¹⁹ cm ⁻³ .

The results of comparing the electrical characteristics of the above described examples are shown below.
FIG. 3 shows the carrier mobility μ (FIELD MOBILITY) in the channel part of the completed Example 1 and Reference Examples 1 to 4 and the hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (H ₂ + Ar )) Is graphed.

  The correspondence between the plotted points in FIG. 3 and the respective examples is shown in Table 1 below.

According to FIG. 3, when the hydrogen partial pressure is 0%, the oxygen concentration is 2 × 10 ²⁰ cm ⁻³ , so it is extremely small as 3 × 10 ⁻¹ cm ² V / sec. It can be seen that a remarkably high mobility of 2 cm ² / Vsec or more μ (FIELD MOBILITY) is obtained at an oxygen concentration of 7% or more and 7 × 10 ¹⁹ cm ⁻³ or less.

  This is presumably because, when hydrogen was added, oxygen in the chamber in the sputter was water, and it was positively removed by the cryopump.

FIG. 4 is a graph showing the relationship between the threshold voltage and the hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (H ₂ + Ar)) during sputtering.
The correspondence relationship between the hydrogen partial pressure ratio (P _H / P _TOTAL = H ₂ / (H ₂ + Ar)) and the above example numbers is the same as in Table 1.

  The lower the threshold voltage, the lower the operating voltage for operating the thin film transistor, that is, the lower the gate voltage, and considering that good device characteristics can be obtained, the results in FIG. By the sputtering method, a normally-off state with a threshold voltage of 8 V or less can be obtained. That is, a device using a semiconductor layer having crystallinity obtained by obtaining the Si film shown in FIG. 1A (13) as a channel formation region and thermally crystallizing the Si film is satisfactory. It can be seen that it exhibits electrical characteristics.

  Also, according to FIG. 4, it can be seen that the higher the hydrogen partial pressure ratio, the lower the threshold voltage. From this, it can be seen that the electrical characteristics of the device tend to increase when the hydrogen partial pressure ratio is increased during the fabrication of the a-Si film to be the channel formation region in each of the above examples by sputtering.

  The mechanism of the semi-amorphous or semi-crystal semiconductor used in the present invention is abbreviated.

  In other words, when sputtering is performed using a single crystal silicon semiconductor as a target and sputtering is performed with a mixed gas of hydrogen and argon, atomic silicon is also separated from the target by sputtering (impact) of heavy atoms of argon, and has a surface to be formed. Let's fly on the substrate. At the same time, a lump of tens to hundreds of thousands of atoms is separated from the target as a cluster and flies to the formation surface.

  During the flight, hydrogen is combined with the dangling bonds of silicon around the outer periphery of the cluster, and is formed as a relatively highly ordered region on the formation surface.

  That is, a mixture of clusters having high order on the film forming surface and having Si—H bonds in the periphery and pure amorphous silicon is used. By heat-treating this in a non-oxidizing gas at 450 ° C to 700 ° C, the Si-H bonds around the outside of the cluster react with other Si-H bonds to form Si-Si bonds.

However, as this bond pulls together, the highly ordered clusters attempt to shift phase to a more highly ordered state, ie crystallization. However, between adjacent clusters, Si-Si bonded to each other pulls between the clusters.
As a result, the crystal has lattice distortion, and the crystal peak in laser Raman is measured by shifting to a lower wave number side than 520 cm ⁻¹ of the single crystal.

Further, since the Si—Si bonds between the clusters anchor each other, the energy bands in each cluster can be electrically coupled to each other via the anchoring point. Therefore, it is fundamentally different from polycrystalline silicon in which the crystal grain boundary functions as a carrier barrier, and the carrier mobility can be 10 to 200 cm ² / V Sec.

  In other words, as in the present invention, a semi-amorphous or semi-crystal based on such a definition can be expected to have a state of being substantially free from crystal grain boundaries while having apparent crystallinity.

  Of course, when the crystallization is accompanied by crystal growth of 1000 ° C. or higher, not the intermediate temperature annealing of 450 ° C. to 700 ° C. when the annealing temperature is a silicon semiconductor, this crystal growth causes oxygen in the film to become grain boundaries. Fold it to make a barrier. This is a material having the same crystal and grain boundary as a single crystal.

Further, when the degree of anchoring between clusters in this semiconductor is increased, the carrier mobility is further increased. For this purpose, if the amount of oxygen in the film is set to 7 × 10 ¹⁹ cm ^−3, preferably 1 × 10 ¹⁹ cm ⁻³ or less, crystallization can be performed at a temperature lower than 600 ° C. and high carriers are used. Mobility can be obtained.

  FIG. 5 shows hydrogen partial pressure ratios of 0%, 20%, and 50% during sputtering when forming the Si film (13) serving as the channel formation region of the reference examples 1, 2, 3, and 4 of the present invention. In this case, the Raman spectrum of a crystalline silicon semiconductor layer obtained by thermally crystallizing the a-Si film is shown.

  Table 2 shows the relationship between the symbols shown in FIG. 5, the example numbers, and the hydrogen partial pressure ratio during sputtering.

  FIG. 5 shows that the curve (62) is compared with the curve (61), that is, the case where the hydrogen partial pressure ratio at the time of sputtering when forming the Si semiconductor layer to be the channel formation region is 0% and 20%. By comparison, it can be seen that when thermal crystallization is performed, the crystallinity of the semiconductor silicon appears remarkably in the Raman spectrum when the hydrogen partial pressure ratio during sputtering is 20%.

The average crystal grain size is 5 to 400 mm, typically 50 to 300 mm, from the full width at half maximum.
The peak position of the Raman spectrum was shifted to the lower wavenumber side than the peak position of 520 cm ⁻¹ , which was the single crystal silicon peak position, and apparently had lattice distortion.

  This is a remarkable feature of the present invention. In other words, the effect of producing a Si film by a sputtering method with hydrogen added appears only when the Si film is thermally crystallized.

  In this way, since each of the microcrystalline grains is in a state where they are forcibly contracted with each other when they have lattice distortion, the closeness at each grain boundary becomes stronger, and the carrier at the grain boundary part becomes stronger. As a result, it is difficult to cause segregation of impurities such as oxygen, and as a result, high carrier mobility can be realized.

  The particle size referred to in the present invention is a numerical value calculated by the Raman spectrum obtained when the produced semiconductor film is subjected to Raman spectroscopic analysis, and it is not clear whether there is a grain boundary in the actual film. Rather, as described above, it is considered that there is no grain boundary.

  As a method of changing the crystal grain size of the semiconductor film, a method of changing the RF power applied during the sputtering film formation can be considered.

  As another method, the magnetic field strength of the magnetic field supply means installed in the vicinity of the target may be changed. For example, when the magnetic field supply means is an electromagnet, the grain size of the semiconductor film formed on the substrate can be increased by increasing the current flowing through the coil to increase the magnetic field. The reverse is also possible.

  Table 3 below shows data indicating the effects of the present invention.

  In Table 3, the hydrogen partial pressure ratio is a condition for producing a Si film ((13) in FIG. 1 (A)) as a channel formation region in this embodiment by magnetron type RF sputtering.

The S value is the minimum value of [d (ID) / d (VG)] ^-1 at the rising edge of the curve in the graph showing the relationship between the gate voltage (VG) and drain current (ID) indicating the device characteristics. The smaller the value, the greater the sharpness of the curve indicating the (VG-ID) characteristic, and the higher the electrical characteristics of the device.
VT represents a threshold voltage.
μ represents carrier mobility, and its unit is (cm ² / V · s).
The on / off characteristic is a logarithmic value of the ratio between the ID value and the minimum ID value at VG = 30 volts in the curve indicating the (VG-ID) characteristic.

In this embodiment, the underlying silicon oxide film and the semiconductor film are continuously formed in a dedicated reaction chamber. However, the present invention is not particularly limited to this, and the semiconductor depends on the structure of the semiconductor device to be manufactured. It is obvious that it is within the scope of the technical idea of the present invention to continuously form a film and a gate insulating film or a gate insulating film and a gate electrode in a dedicated reaction chamber.

In this embodiment, an insulated gate semiconductor device having the structure shown in FIG. 6 is shown.

Coating the silicon oxide film on the insulating substrate is the same as in Example 1, but this example shows a manufacturing method in which the formation of the gate insulating film is finished before the semiconductor layer constituting the channel region is manufactured. ing.
On the insulating film (12), metal molybdenum was formed to a thickness of 3000 mm by sputtering and predetermined patterning was performed to form the gate electrode (20).

Next, a gate oxide film (SiO ₂ ) (15) is formed using a sputtering apparatus in which another reaction chamber dedicated to the N-type semiconductor film is added to the configuration of the multi-chamber type sputtering apparatus used in Example 1. A film having a thickness of 100 nm was formed by magnetron type RF sputtering under the following conditions.
Oxidizing atmosphere 100%
Pressure 0.5pa
Deposition temperature 100 ° C
RF (13.56MHz) output 400W
A silicon target or a synthetic quartz target was used.

  When this oxide film is formed, sputtering is performed with a high proportion of oxygen with respect to the inert gas, most preferably 100% oxygen, which can reduce the interface state density of the gate insulating film and realize a transistor with very good characteristics. it can.

  Next, the substrate is moved to a reaction chamber dedicated to the semiconductor film, and an a-Si film (13) serving as a channel formation region is formed on the silicon oxide film to a thickness of 100 nm.

The film forming conditions are as follows: Inert gas argon and hydrogen atmosphere
H ₂ / (H ₂ + Ar) = 80% (Partial pressure ratio)
Deposition temperature 150 ° C
RF (13.56MHz) Output 400W
Total pressure 0.5Pa
The Si target was used as the target.

  Thereafter, the substrate on which the semiconductor film has been formed is removed from the reaction chamber, and the substrate is not taken out of the apparatus, and the substrate passage chamber is used for a time range of 450 ° C. to 700 ° C., particularly 600 ° C. for 10 hours. The a-Si film (13) was thermally crystallized in hydrogen or an inert gas in a 100% nitrogen atmosphere in this example to produce a highly crystalline silicon semiconductor layer. At the same time, a new substrate was moved from the preliminary chamber to the reaction chamber dedicated to the silicon oxide film, and a gate insulating film was produced under the conditions described above.

The amount of oxygen impurities present in the semiconductor film formed by such a method is 1 × 10 ¹⁹ cm ⁻³ by SIMS analysis, 4 × 10 ¹⁸ cm ⁻³ for carbon, and the hydrogen content is 1% or less. Met. As a result, the channel region (22) could be formed on the gate electrode (20). During this heat treatment, the substrate introduced into the reaction chamber for silicon oxide for the preparation of the gate insulating film later is moved to the reaction chamber for the semiconductor film through the substrate passage chamber, and the semiconductor film is formed under the same conditions. went.

Next, after the heat-treated substrate is moved from the passage chamber to the N-type semiconductor film formation reaction chamber, the n ⁺ a-Si film (14) is formed to a thickness of 50 nm by magnetron type RF sputtering under the following conditions. A film was formed. At the same time, the substrate on which the formation of the semiconductor film was completed was heat-treated in the substrate passage chamber, and at the same time, a new substrate was introduced into the gate insulating film reaction chamber.

The film forming conditions are as follows: in an atmosphere with a hydrogen partial pressure ratio of 10 to 99% or more (80% in this embodiment) and an argon partial pressure ratio of 10 to 99% (19% in this embodiment).
Deposition temperature 150 ° C
RF (13.56MHz) Output 400W
Total pressure 0.5Pa
And single crystal silicon doped with phosphorus was used as a target.

  Next, an aluminum film for the source and drain electrodes is formed on the semiconductor layer (14), patterned, and the source and drain impurity regions (14) and (14 ') and the source and drain electrodes ( 16) and (16 ') were formed to complete the semiconductor device.

  In this embodiment, since the gate insulating film is formed before the semiconductor film is formed in the channel forming region, the vicinity of the interface between the gate insulating film and the channel region is appropriately thermally annealed during the thermal crystallization process. It has the feature that the interface state density can be reduced.

Further, when each film is formed, the back pressure is set to 1 × 10 ⁻⁶ Pa or less, and the turbo system pump and the cryopump are combined in the exhaust system, so that the film can be formed with less oil-free impurities. The amount of oxygen impurities in the active layer (13) in this example was 1 × 10 ¹⁹ cm ⁻³ and the mobility μ was 41.4.

  In this example and the like, an a-Si film is used as a semiconductor layer to be thermally crystallized. However, it goes without saying that the present invention is also effective in thermally crystallizing other non-single crystal semiconductors. .

In addition, Ar is used as the inert gas at the time of sputtering, but other gases such as halogen gas such as He or reactive gas such as SiH ₄ or Si ₂ H ₆ may be used as plasma. . Moreover, in the film formation of the a-Si film by the magnetron type RF sputtering method of this example, the hydrogen concentration is 5 to 100%, the film formation temperature is in the range of 50 to 500 ° C., the RF output is in the range of 500 Hz to 100 GHz, It can be arbitrarily selected within the range of 1 W to 10 MW, and may be combined with a pulse energy transmission source.

  Sputtering may be performed by making hydrogen into a higher plasma by using more intense light irradiation (wavelength 1000 nm or less) energy or electron cyclotron resonance (ECR) conditions.

  This is because the micro structure in the film formed by sputtering by making light atoms such as hydrogen into plasma and efficiently generating positive ions necessary for sputtering, in the case of this example, the micro structure in the a-Si film. This is to prevent the occurrence of structure. Moreover, you may apply said other reactive gas to said means.

In this embodiment, an amorphous semiconductor film is simply described as an a-Si film. This usually indicates a silicon semiconductor, but may be germanium or a mixed Si _x Ge _1-X (0 <X <1) of silicon and germanium.

Needless to say, the configuration of the present invention can be applied to staggered, coplanar, reverse staggered, and reverse coplanar insulated gate field effect transistors.

FIG. 6 is a manufacturing process diagram of Example 1. 1 is a schematic view of a multi-chamber sputtering apparatus for the present invention. The relationship between the hydrogen partial pressure ratio and the carrier mobility is shown. The relationship between the partial pressure ratio of hydrogen and the threshold value is shown. 3 shows a Raman spectrum of the semiconductor film having crystallinity according to the present invention. Sectional drawing of the other Example of this invention.

Explanation of symbols

(1) ... Reserve room
(2) ... Substrate passage chamber
(3) (4) ・ ・ Sputtering chamber
(5) (6) (7) (8) ... Gate valve

Claims (4)

A silicon oxide film as a base is formed on the substrate,
Forming an amorphous silicon film in contact with the silicon oxide film without exposing the silicon oxide film to the atmosphere;
Heat-treating the amorphous silicon film to form a crystalline silicon film;
Patterning the crystalline silicon film to form a semiconductor layer in which a channel formation region is formed;
Forming a gate insulating film on the semiconductor layer;
A method of manufacturing an insulated gate field effect transistor, comprising forming a gate electrode on the gate insulating film. A silicon oxide film as a base is formed on the substrate,
Forming an amorphous silicon film in contact with the silicon oxide film without exposing the silicon oxide film to the atmosphere;
Heat-treating the amorphous silicon film to form a crystalline silicon film;
Patterning the crystalline silicon film to form a semiconductor layer in which a channel formation region is formed;
Forming a silicon oxide film to be a gate insulating film on the semiconductor layer;
A method of manufacturing an insulated gate field effect transistor, comprising forming a gate electrode on the silicon oxide film. A silicon oxide film as a base is formed on the substrate,
Forming an amorphous silicon film in contact with the silicon oxide film without exposing the silicon oxide film to the atmosphere;
Heat-treating the amorphous silicon film to form a crystalline silicon film;
Patterning the crystalline silicon film to form a semiconductor layer in which a channel formation region is formed;
Forming a silicon oxide film to be a gate insulating film on the semiconductor layer by containing fluorine;
A method of manufacturing an insulated gate field effect transistor, comprising forming a gate electrode on the silicon oxide film. Forming a gate electrode on the substrate,
Forming a silicon oxide film to be a gate insulating film on the gate electrode;
Forming an amorphous silicon film in contact with the silicon oxide film without exposing the silicon oxide film to the atmosphere;
Heat-treating the amorphous silicon film to form a crystalline silicon film;
A method for manufacturing an insulated gate field effect transistor, wherein the crystalline silicon film is patterned to form a semiconductor layer in which a channel formation region is formed.

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