JP2005019523A - Resin bonding method of semiconductor part - Google Patents

Resin bonding method of semiconductor part Download PDF

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Publication number
JP2005019523A
JP2005019523A JP2003179488A JP2003179488A JP2005019523A JP 2005019523 A JP2005019523 A JP 2005019523A JP 2003179488 A JP2003179488 A JP 2003179488A JP 2003179488 A JP2003179488 A JP 2003179488A JP 2005019523 A JP2005019523 A JP 2005019523A
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Prior art keywords
resin
elastic body
bonding
back surface
circuit board
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JP2003179488A
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Japanese (ja)
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Takashi Sakaki
隆 榊
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Canon Inc
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Canon Inc
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Priority to JP2003179488A priority Critical patent/JP2005019523A/en
Publication of JP2005019523A publication Critical patent/JP2005019523A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Abstract

<P>PROBLEM TO BE SOLVED: To provide a resin bonding method of a semiconductor, which is capable of solving the problem of uniformly distributed load that is caused by an elastic body and the other problem of unequal pressing caused by adhesion of resin to an IC pressing tool and the rear surface of an IC. <P>SOLUTION: In the semiconductor resin bonding method wherein the semiconductor part is electrically connected to a circuit board through the intermediary of bonding adhesive resin, an IC pressing/heating member is a rigid body having an elastic modulus of 1×10<SP>4</SP>MPa or above, an elastic body having an elastic modulus of 1×10<SP>3</SP>MPa or below is provided to the IC rear periphery contacting part of the IC pressing/heating member, the elastic body is brought into close contact with the rear peripheral part of an IC, the pressing/heating member is brought into close contact with the rear surface of the IC except its part where the elastic body is brought into close contact, and the IC is pressed and heated. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、ＩＣ等の半導体部品を回路基板上へ異方性導電接着フィルムや接着剤等を用いた樹脂接合する方法に関するものであり、電気回路部品を回路基板上に実装する際に適用され、特に薄いＩＣを樹脂接合する実装に好適に使用される。
【０００２】
【従来の技術】
近年、回路基板に搭載される電気実装部品等の電気回路装置は電気信号の高速化と共に高密度集積と小型化が進み、信号配線の微細化（ファインピッチ）と多ピン化が著しくなってきている。
【０００３】
それに伴い、回路基板上での電気回路部品の実装方法も搭載位置精度と共にファインピッチ及び多ピン化に対応した接続信頼性を得ることが益々厳しくなっている。
【０００４】
現在、微細パターン用セラミック基板やシリコン基板、液晶用ガラス基板等の回路基板上へのベアチップＩＣやセラミックコンデンサ等の電気回路部品の実装方法としては、ベアチップＩＣは、ワイヤーボンディング法やはんだバンプ、スタッドバンプ法、異方性導電膜（ＡＣＦ：Ａｎｉｓｏｔｒｏｐｉｃ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ ）、異方性導電ペースト（ＡＣＰ：Ａｎｉｓｏｔｒｏｐｉｃ ＣｏｎｄｕｃｔｉｖｅＰａｓｔｅ）、非導電性膜（ＮＣＦ：Ｎｏｎ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ ）、非導電性ペースト（ＮＣＰ：Ｎｏｎ ＣｏｎｄｕｃｔｉｖｅＰａｓｔｅ）等を併用してＣＯＢ（Ｃｈｉｐ Ｏｎ Ｂｏａｒｄ ）装置での実装を行っている。例えば、特許文献１に記載されているようにＡＣＦによる実装が行われつつある。この特許文献１には、ＩＣよりはみ出したＡＣＦの付着防止と、ＡＣＦと回路基板との密着性を向上させるための方法が提案されている。
【０００５】
【特許文献１】
特開２００１−１２７１０５号公報
【発明が解決しようとする課題】
しかしながら、従来の実装方法には以下のような問題があった。
【０００６】
先ず、ＡＣＦ等を用いた樹脂接合の場合、加圧ツールへ付着した樹脂の問題がある。
【０００７】
図６に示すように、先ず回路基板６上のＩＣ接合部にＡＣＦ４を仮圧着し、ＩＣ２を吸着した加圧ツール１を位置合わせする。次に、図７に示すように、ＩＣ２と回路基板６の間のＡＣＦ樹脂４が接合時の加圧によって、ＩＣ側面からはみ出し、加圧ツール１に付着する。付着した樹脂は加熱硬化される。そして、図８に示すように、次のＩＣ接合時に、加熱硬化した樹脂７はＩＣ２と加圧ツール１間で異物となり、ＩＣ裏面を不均一に加圧し、接合不良の原因となる。
【０００８】
一般的には、樹脂の付着防止対策としてテフロンシートをＩＣと加圧ツールの間に挟む手法が採られている。
【０００９】
しかしながら、テフロンシートは弾性体であるため、ＩＣ裏面を等分布荷重で加圧する。このことは、ＩＣのバンプ配列が不均一の場合に影響が大きくなる。即ち、バンプ部では荷重を受けることができるため変形しにくいが、バンプが無いところでは荷重を受け止めることができないため変形し易くなる。ＩＣが或る程度の厚みを有し剛性を持つ場合には問題ないが、厚みが２００μｍ程度以下と薄い場合は剛性も低くなり、ＩＣが凹形状に変形し易くなる。この場合の模式図を図４に示す。
【００１０】
ＩＣが変形すると、バンプの接触状態、接合状態が不均一となり接続不良を引き起こす原因となる。ＩＣが反った状態で接合実装されると、その後の熱が加わる工程や信頼性テストを経たときに、ＡＣＦ樹脂が変質や軟化すると同時に、反ったＩＣが戻ろうとする。すると、加圧接合時に大きく潰れたバンプが基板から離れ、接合不良になる問題が生じる。
【００１１】
もう１つの問題として、ＩＣ裏面への樹脂の回り込みによる問題がある。
【００１２】
ＩＣが薄い場合は、はみ出した樹脂がＩＣ裏面に回り込む現象が現れるようになり、フィルム状のＡＣＦやＮＣＦより粘度の低いペースト状のＡＣＰやＮＣＰの場合に、より顕著である。
【００１３】
図１０に示すように、裏面に回り込んだ樹脂９はそのまま加熱加圧工程で硬化し、異物となった硬化物９はＩＣの不均一加圧や熱伝導の違いによる不均一加熱を引き起こし、接合不良の原因となる。
【００１４】
又、特開２００１−１２７１０５号公報によると、はみ出したＡＣＦを加圧ツール周囲の突起で押し潰し、加圧ツールへの付着はテフロンシートを挟むことによって防ぐ方法が提案されている。
【００１５】
しかしながら、この方法では、薄いＩＣの場合はテフロンシートによりＩＣが変形させられてしまい、加圧ツール周囲の突起とＩＣの隙間から樹脂は侵入し、裏面回り込みを防ぐことはできない。
【００１６】
本発明は上記問題に鑑みてなされたもので、その目的とする処は、弾性体による等分布荷重の問題点や、ＩＣ加圧ツール及びＩＣ裏面への樹脂付着による不均一加圧の問題を解決した半導体の樹脂接合方法を提供することにある。
【００１７】
【課題を解決するための手段】
上記目的を達成するため、請求項１記載の発明は、半導体部品と回路基板とを接合用接着樹脂を介して電気的に接続する半導体部品の樹脂接合方法において、ＩＣ加圧加熱部材が弾性率１×１０４ ＭＰａ以上の剛性体であること、及び該ＩＣ加圧加熱部材のＩＣ裏面周辺接触部に弾性率１×１０３ ＭＰａ以下の弾性体を有すること、及びＩＣ裏面周辺部と該弾性体を密着させること、及び該弾性体接触部を除くＩＣ裏面とＩＣ加圧加熱部材を密着させること、及び該ＩＣを加圧加熱することを特徴とする。
【００１８】
請求項２記載の発明は、請求項１記載の発明において、前記弾性体が接合温度よりも高い耐熱性を有する樹脂であること、及び接合用接着樹脂と前記弾性体との接着力が接合用接着樹脂と回路基板、及びＩＣとの接着力よりも著しく弱いことを特徴とする。
【００１９】
【発明の実施の形態】
以下に本発明の実施の形態を添付図面に基づいて説明する。
【００２０】
図２は回路基板６上のＩＣ実装位置に接合用接着樹脂ＮＣＰ樹脂９を塗布し、ＩＣ加圧加熱ツールにＩＣを吸着後、位置合わせした状態を示した模式断面図である。
【００２１】
ＩＣ加圧加熱ツール１の周囲には弾性体１０が具備されており、本実施の形態では、その弾性体材料として接合温度１７０℃以上の耐熱性を有するシリコーン樹脂を用いた。又、接合用接着樹脂との剥離性に関しては、ＡＣＰやＮＣＰの主材料であるエポキシ樹脂とシリコーン樹脂との接着力がＡＣＰエポキシ樹脂と回路基板及びＩＣとの接着力よりも著しく弱いシリコーン樹脂を選定した。ＩＣ加圧加熱ツール１は、弾性率１×１０４ ＭＰａ以上の剛性体を用いた。
【００２２】
弾性体１０はＩＣ吸着面より僅かに突出しており、ＩＣ２の吸着時には突出した弾性体１０との接触面で吸着保持される。このとき、ＩＣ２の裏面はＩＣ加圧加熱ツール１の吸着面に接触していない。弾性体１０は弾性率１×１０３ ＭＰａ以下の材料を用いた
次に、図１はＩＣ２が回路基板６上に搭載され加圧加熱された状態を示した模式断面図である。
【００２３】
位置合わせしたＩＣを回路基板６上に加圧搭載すると、弾性体１０が変形し、ＩＣ２裏面がＩＣ加圧加熱ツール１の吸着面に接触する。弾性体１０が加圧され変形することによってＩＣ２の周辺端部に密着し、ＮＣＰ９がＩＣ２裏面へ回り込むのを防ぐ。その後、所望の加熱シーケンスに従ってＮＣＰ９が加熱硬化され、ＩＣ２の樹脂接合実装が完成する。
【００２４】
本実施の形態では、ＩＣを３０ｋｇで加圧し、加熱条件は１７０℃×３０秒で実装した。
【００２５】
回路基板６は、長さ１００ｍｍ、厚み７８０μｍのシリコン基板を使用し、ＩＣ２は厚さ１７５μｍの薄型で長さ１０．１１ｍｍ、幅２．６４ｍｍを用いた。ＩＣバンプ３高さは５μｍ、回路基板電極５高さは５μｍを用いた。
【００２６】
接合後のＩＣ２接続抵抗値を確認した結果、良好な抵抗値を示した。
【００２７】
図３にＩＣ裏面に樹脂付着した従来例と樹脂付着の無い本実施の形態について、それぞれ代表的なＩＣ１個分の接続抵抗値を示す。
【００２８】
横軸はＩＣ１箇所中の１２箇所の測定箇所名で、縦軸は接続抵抗値を示す。
【００２９】
従来例では、７０〜１８０ｍΩとバラツキがあるが、本実施の形態では、７０〜９０ｍΩと安定している。
【００３０】
又、ＩＣ裏面の反り量については、従来例による接合方法より反り量の少ない良好な結果となった。その結果を図４と図５に示す。それぞれＩＣ３個の反り形状を示している。図４から分かるように、テフロンシートを用いた従来例による接合では、裏面反り量が最大３μｍある。
【００３１】
一方、図５の本実施の形態による接合では、裏面反り量が最大１．５μｍに減少した。その結果、バンプの変形量が均一となり、より信頼性の高い接合が可能となった。
【００３２】
信頼性テストとして、８０℃×３０分／−３０℃×３０分のヒートサイクルテスト１０００サイクル、及び６０℃／９０％の高温高湿テスト１０００時間を行い、それぞれの信頼性テスト後においても、良好な接続抵抗値を維持した。
【００３３】
以上の結果から分かるように、弾性体を用いず樹脂付着のないＩＣ接合をすることによって信頼性のある樹脂接合が可能となった。
【００３４】
【発明の効果】
以上説明したように、本発明によれば、ＩＣ等の電気回路部品を回路基板上へ異方性導電膜や接着剤等を用いた樹脂接合する際にＩＣ端部を弾性体で密着させることにより、ＩＣ加圧加熱ツールへの樹脂付着を防ぐことが可能となり、ＩＣ裏面への樹脂回り込み及び付着を防ぐことが可能となった。その結果、ＩＣの信頼性の高いＩＣ樹脂接合が実現した。
【００３５】
又、本発明によれば、加圧加熱ツールへの樹脂付着防止用テフロンシートを使用することなく、ＩＣ樹脂接合が可能となり、大幅なコストダウンも実現することができる。
【図面の簡単な説明】
【図１】本発明の実施の形態を示す図である。
【図２】本発明の実施の形態を示す図である。
【図３】本発明の実施の形態による接続抵抗値比較を示す図である。
【図４】本発明の実施の形態によるＩＣ反り形状比較を示す図である。
【図５】本発明の実施の形態によるＩＣ反り形状比較を示す図である。
【図６】樹脂接合によるＩＣ実装の従来例を示す図である。
【図７】樹脂接合によるＩＣ実装の従来例を示す図である。
【図８】樹脂接合によるＩＣ実装の従来例を示す図である。
【図９】樹脂接合によるＩＣ実装の従来例を示す図である。
【図１０】樹脂接合によるＩＣ実装の従来例を示す図である。
【符号の説明】
１ ＩＣ加圧加熱ツール
２ ＩＣ
３ ＩＣバンプ
４ ＡＣＦ等の接合用接着樹脂
５ 回路基板電極
６ 回路基板
７ はみ出し硬化した樹脂
８ テフロンシート
９ ＡＣＰ、ＮＣＰ等の接合用接着樹脂
１０ 弾性体
１１ ＩＣ吸着用Ｖａｃ穴
１２ Ｖａｃ吸引方向[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of resin bonding using an anisotropic conductive adhesive film or an adhesive to a semiconductor component such as an IC on a circuit board, and is applied when mounting an electric circuit component on a circuit board. Especially, it is suitably used for mounting in which a thin IC is resin-bonded.
[0002]
[Prior art]
In recent years, electrical circuit devices such as electrical mounting components mounted on circuit boards have become more densely integrated and miniaturized along with the speeding up of electrical signals, and signal wiring has become increasingly finer (fine pitch) and more pins. Yes.
[0003]
Along with this, it is becoming increasingly strict to obtain electrical circuit component mounting methods on a circuit board as well as mounting position accuracy and connection reliability corresponding to fine pitch and multiple pins.
[0004]
At present, bare chip ICs are wire bonding methods, solder bumps, studs, etc. as mounting methods for electrical circuit components such as bare chip ICs and ceramic capacitors on circuit boards such as ceramic substrates for fine patterns, silicon substrates, and glass substrates for liquid crystals. Bump method, anisotropic conductive film (ACF: Anisotropic Conductive Film), anisotropic conductive paste (ACP: Anisotropic Conductive Paste), non-conductive film (NCF: Non Conductive Film), non-conductive paste (NCP: Non Cv) Etc. are used in combination with a COB (Chip On Board) device. For example, as described in Patent Document 1, mounting by ACF is being performed. This Patent Document 1 proposes a method for preventing adhesion of ACF protruding from an IC and improving adhesion between the ACF and a circuit board.
[0005]
[Patent Document 1]
JP, 2001-127105, A [Problems to be solved by the invention]
However, the conventional mounting method has the following problems.
[0006]
First, in the case of resin bonding using ACF or the like, there is a problem of resin adhering to the pressure tool.
[0007]
As shown in FIG. 6, first, the ACF 4 is temporarily pressure-bonded to the IC joint portion on the circuit board 6, and the pressurizing tool 1 that adsorbs the IC 2 is aligned. Next, as shown in FIG. 7, the ACF resin 4 between the IC 2 and the circuit board 6 protrudes from the side surface of the IC and adheres to the pressurizing tool 1 by pressurization during bonding. The adhered resin is cured by heating. Then, as shown in FIG. 8, at the time of the next IC bonding, the heat-cured resin 7 becomes a foreign substance between the IC 2 and the pressing tool 1 and presses the back surface of the IC unevenly, causing a bonding failure.
[0008]
In general, as a countermeasure for preventing adhesion of resin, a technique in which a Teflon sheet is sandwiched between an IC and a pressure tool is employed.
[0009]
However, since the Teflon sheet is an elastic body, the back surface of the IC is pressurized with a uniform load. This has a large effect when the bump arrangement of the IC is not uniform. In other words, the bump portion can receive a load and is not easily deformed. However, the load cannot be received where there is no bump, and the bump portion is easily deformed. There is no problem when the IC has a certain thickness and has rigidity, but when the thickness is as thin as about 200 μm or less, the rigidity becomes low and the IC is easily deformed into a concave shape. A schematic diagram in this case is shown in FIG.
[0010]
When the IC is deformed, the contact state and bonding state of the bumps are non-uniform, causing connection failure. If the IC is bonded and mounted in a warped state, the warped IC tends to return at the same time as the ACF resin is altered or softened after a process of applying heat or a reliability test. As a result, there is a problem that bumps that have been largely crushed at the time of pressure bonding are separated from the substrate, resulting in poor bonding.
[0011]
Another problem is that the resin wraps around the back of the IC.
[0012]
When the IC is thin, the phenomenon that the protruding resin wraps around the back surface of the IC appears, which is more remarkable in the case of paste-like ACP or NCP having a viscosity lower than that of film-like ACF or NCF.
[0013]
As shown in FIG. 10, the resin 9 wrapping around the back surface is cured as it is in the heating and pressurizing process, and the cured product 9 which becomes a foreign matter causes nonuniform heating due to nonuniform pressure of IC or a difference in heat conduction, It causes a bonding failure.
[0014]
Further, according to Japanese Patent Laid-Open No. 2001-127105, a method is proposed in which the protruding ACF is crushed by protrusions around the pressing tool, and adhesion to the pressing tool is prevented by sandwiching a Teflon sheet.
[0015]
However, in this method, in the case of a thin IC, the IC is deformed by the Teflon sheet, and the resin enters from the gap between the protrusion around the pressing tool and the IC, and the back surface wrap cannot be prevented.
[0016]
The present invention has been made in view of the above problems, and the purpose of the process is to solve the problem of uniformly distributed load due to the elastic body and the problem of non-uniform pressure due to resin adhesion to the IC pressure tool and the back surface of the IC. An object of the present invention is to provide a semiconductor resin bonding method that has been solved.
[0017]
[Means for Solving the Problems]
In order to achieve the above object, according to the first aspect of the present invention, there is provided a semiconductor component resin bonding method in which a semiconductor component and a circuit board are electrically connected via a bonding adhesive resin. It is a rigid body of 1 × 10 4 MPa or more, and has an elastic body having an elastic modulus of 1 × 10 3 MPa or less at the IC back surface peripheral contact portion of the IC pressure heating member, and the IC back surface peripheral portion and the elasticity It is characterized in that the body is brought into close contact, the IC back surface excluding the elastic body contact portion and the IC pressure heating member are brought into close contact, and the IC is pressurized and heated.
[0018]
The invention according to claim 2 is the invention according to claim 1, wherein the elastic body is a resin having a heat resistance higher than the bonding temperature, and the adhesive force between the bonding adhesive resin and the elastic body is for bonding. It is characterized by being significantly weaker than the adhesive force between the adhesive resin, the circuit board, and the IC.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the accompanying drawings.
[0020]
FIG. 2 is a schematic cross-sectional view showing a state where the bonding adhesive resin NCP resin 9 is applied to the IC mounting position on the circuit board 6 and the IC is attracted to the IC pressurizing and heating tool and then aligned.
[0021]
An elastic body 10 is provided around the IC pressurizing and heating tool 1, and in the present embodiment, a silicone resin having a heat resistance of a bonding temperature of 170 ° C. or higher is used as the elastic body material. In addition, regarding the peelability from the bonding adhesive resin, a silicone resin whose adhesive force between the epoxy resin, which is the main material of ACP or NCP, and the silicone resin is significantly weaker than the adhesive force between the ACP epoxy resin, the circuit board and the IC is used. Selected. The IC pressure heating tool 1 used a rigid body having an elastic modulus of 1 × 10 4 MPa or more.
[0022]
The elastic body 10 slightly protrudes from the IC adsorption surface, and is adsorbed and held on the contact surface with the protruding elastic body 10 when the IC 2 is adsorbed. At this time, the back surface of the IC 2 is not in contact with the suction surface of the IC pressure heating tool 1. Next, FIG. 1 is a schematic cross-sectional view showing a state where the IC 2 is mounted on the circuit board 6 and heated under pressure, using a material having an elastic modulus of 1 × 10 3 MPa or less for the elastic body 10.
[0023]
When the aligned IC is pressure-mounted on the circuit board 6, the elastic body 10 is deformed, and the back surface of the IC 2 comes into contact with the suction surface of the IC pressure heating tool 1. When the elastic body 10 is pressed and deformed, the elastic body 10 is brought into close contact with the peripheral edge of the IC 2 and prevents the NCP 9 from wrapping around the back surface of the IC 2. Thereafter, the NCP 9 is heat-cured according to a desired heating sequence, and the resin bonding mounting of the IC 2 is completed.
[0024]
In this embodiment, the IC was pressurized with 30 kg, and the heating condition was 170 ° C. × 30 seconds.
[0025]
The circuit board 6 was a silicon substrate having a length of 100 mm and a thickness of 780 μm, and the IC 2 was a thin film having a thickness of 175 μm and a length of 10.11 mm and a width of 2.64 mm. The IC bump 3 height was 5 μm, and the circuit board electrode 5 height was 5 μm.
[0026]
As a result of confirming the IC2 connection resistance value after bonding, a good resistance value was shown.
[0027]
FIG. 3 shows a typical connection resistance value for one IC for the conventional example in which the resin is adhered to the back surface of the IC and the present embodiment in which no resin is adhered.
[0028]
The horizontal axis indicates the names of 12 measurement locations in one IC location, and the vertical axis indicates the connection resistance value.
[0029]
In the conventional example, there is a variation of 70 to 180 mΩ, but in this embodiment, it is stable at 70 to 90 mΩ.
[0030]
Further, with respect to the warpage amount on the back surface of the IC, a good result was obtained in which the warpage amount was smaller than that of the conventional joining method. The results are shown in FIGS. Each shows a warped shape of three ICs. As can be seen from FIG. 4, in the conventional joining using the Teflon sheet, the back surface warping amount is 3 μm at the maximum.
[0031]
On the other hand, in the joining according to the present embodiment in FIG. 5, the back surface warpage amount decreased to a maximum of 1.5 μm. As a result, the amount of deformation of the bumps becomes uniform, and more reliable bonding is possible.
[0032]
As a reliability test, a heat cycle test of 1000 cycles of 80 ° C. × 30 minutes / −30 ° C. × 30 minutes and a high temperature and high humidity test of 60 ° C./90% for 1000 hours were performed, and good after each reliability test Maintained a good connection resistance.
[0033]
As can be seen from the above results, reliable resin bonding is possible by performing IC bonding without using an elastic body and without resin adhesion.
[0034]
【The invention's effect】
As described above, according to the present invention, when an electric circuit component such as an IC is bonded to a circuit board using an anisotropic conductive film or an adhesive, the end portion of the IC is brought into close contact with an elastic body. As a result, it is possible to prevent the resin from adhering to the IC pressure heating tool, and to prevent the resin from wrapping around and adhering to the back surface of the IC. As a result, IC resin bonding with high IC reliability was realized.
[0035]
Further, according to the present invention, IC resin bonding can be achieved without using a Teflon sheet for preventing resin adhesion to a pressure heating tool, and a significant cost reduction can be realized.
[Brief description of the drawings]
FIG. 1 is a diagram showing an embodiment of the present invention.
FIG. 2 is a diagram showing an embodiment of the present invention.
FIG. 3 is a diagram showing comparison of connection resistance values according to the embodiment of the present invention.
FIG. 4 is a diagram showing a comparison of IC warpage shapes according to the embodiment of the present invention.
FIG. 5 is a diagram showing a comparison of IC warpage shapes according to the embodiment of the present invention.
FIG. 6 is a diagram showing a conventional example of IC mounting by resin bonding.
FIG. 7 is a diagram showing a conventional example of IC mounting by resin bonding.
FIG. 8 is a diagram showing a conventional example of IC mounting by resin bonding.
FIG. 9 is a diagram showing a conventional example of IC mounting by resin bonding.
FIG. 10 is a diagram showing a conventional example of IC mounting by resin bonding.
[Explanation of symbols]
1 IC pressure heating tool 2 IC
3 IC bump 4 Bonding adhesive resin 5 such as ACF 5 Circuit board electrode 6 Circuit board 7 Extrusion cured resin 8 Teflon sheet 9 Bonding adhesive resin 10 such as ACP, NCP Elastic body 11 Vac hole 12 for IC adsorption Vac suction direction

Claims (2)

半導体部品と回路基板とを接合用接着樹脂を介して電気的に接続する半導体部品の樹脂接合方法において、
ＩＣ加圧加熱部材が弾性率１×１０４ ＭＰａ以上の剛性体であること、及び該ＩＣ加圧加熱部材のＩＣ裏面周辺接触部に弾性率１×１０３ ＭＰａ以下の弾性体を有すること、及びＩＣ裏面周辺部と該弾性体を密着させること、及び該弾性体接触部を除くＩＣ裏面とＩＣ加圧加熱部材を密着させること、及び該ＩＣを加圧加熱することを特徴とする半導体部品の樹脂接合方法。In a resin bonding method of a semiconductor component in which a semiconductor component and a circuit board are electrically connected via a bonding adhesive resin,
The IC pressure heating member is a rigid body having an elastic modulus of 1 × 10 4 MPa or more, and the IC pressure heating member has an elastic body having an elastic modulus of 1 × 10 3 MPa or less at the IC back surface peripheral contact portion; And an IC back surface peripheral portion and the elastic body, the IC back surface excluding the elastic body contact portion and the IC pressure heating member are closely contacted, and the IC is pressurized and heated. Resin bonding method. 前記弾性体が接合温度よりも高い耐熱性を有する樹脂であること、及び接合用接着樹脂と前記弾性体との接着力が接合用接着樹脂と回路基板、及びＩＣとの接着力よりも著しく弱いことを特徴とする請求項１記載の半導体部品の樹脂接合方法。The elastic body is a resin having heat resistance higher than the bonding temperature, and the adhesive strength between the bonding adhesive resin and the elastic body is significantly weaker than the adhesive strength between the bonding adhesive resin, the circuit board, and the IC. The resin bonding method of a semiconductor component according to claim 1.
JP2003179488A 2003-06-24 2003-06-24 Resin bonding method of semiconductor part Withdrawn JP2005019523A (en)

Priority Applications (1)

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