JP2005018677A - Power supply circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce transient lowering of an output potential of a charge pump when a regulator composing a load of the charge pump is turned ON. <P>SOLUTION: A power supply circuit 200, in which a power is input from a first power supply line VDD1 to the charge pump 10, and a boosted voltage VDD2 that has been output from the charge pump 10 to a second power supply line VDD2 is input to an operation amplifier 21 composing a regulator 20, outputs a regulated voltage Vout from the operation amplifier 21. In synchronization with a control signal Vc, an OFF control of a pull-down switch 25 and an ON control of a pull-up switch 31 are carried out, thereby pulling up an output potential of the operation amplifier 21 with the first power supply voltage VDD1. When a voltage detection circuit 40 detects that the output potential of the operation amplifier 21 has reached a threshold value or more of an inverter 41, an OFF control of the pull-up switch 31 and an ON control of the operation amplifier 21 are carried out in synchronization with the detection signal. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention includes a charge pump that inputs power from a first power line and outputs a boosted voltage to a second power line, and a regulator that inputs power from the second power line and outputs a regulated voltage to an output terminal. It relates to a power supply circuit.
[0002]
[Prior art]
A conventional power supply circuit 100 of this type (see, for example, Patent Document 1) will be described with reference to FIG. The power supply circuit 100 includes a charge pump 10 that charges and discharges in synchronization with a clock signal CLK and outputs a boosted voltage, and a regulator 20 that inputs the output voltage of the charge pump 10 and outputs a regulated voltage Vout. Has been.
[0003]
As shown in FIG. 4, the charge pump 10 is configured as a double boost type, and includes a boost capacitor 11, a smoothing capacitor 12, and switches 13, 14, 15, and 16. A switch 13, a boost capacitor 11, and a switch 14 are connected in series between the first power supply line VDD1 and the ground line Gnd. A switch 15 is connected between the connection points of the first power supply line VDD 1 and the boost capacitor 11 and the switch 14. A switch 16 and a smoothing capacitor 12 are connected in series between a connection point of the switch 13 and the boost capacitor 11 and the ground line Gnd, and the series connection point is connected to the second power supply line VDD2 as an output terminal of the charge pump 10. The switches 13 and 14 and the switches 15 and 16 are complementarily turned on / off by the input of the clock signal CLK. The switches 13, 14, 15, 16 are composed of, for example, MOS transistors.
[0004]
A boosting operation of the charge pump 10 will be described. First, when the clock signal CLK of “H” level is input, the switches 13 and 14 are turned on, the switches 15 and 16 are turned off, and the boost capacitor 11 is charged by the power supply voltage VDD1. Next, when the clock signal CLK of “L” level is input, the switches 13 and 14 are turned off and the switches 15 and 16 are turned on, the boost capacitor 11 is discharged, and the power supply voltage VDD1 is supplied to the voltage charged in the boost capacitor 11. The smoothing capacitor 12 is charged with the superimposed voltage. This on / off control is repeated, and the boosted voltage VDD2 is output from the output terminal of the charge pump 10 to the second power supply line VDD2. The charge pump 10 is turned on / off by the input of the clock signal CLK so that the charging voltages of the capacitors 11 and 12 are saturated, and a boosted voltage twice as high as the first power supply voltage VDD1 is output to the output terminal of the charge pump 10. The
[0005]
As shown in FIG. 3, the regulator 20 is supplied with the power supply voltage VDD2 from the second power supply line VDD2, and outputs the regulated voltage Vout and the output terminal potential of the operational amplifier 21 to divide the divided voltage. Is provided to the inverting input terminal of the operational amplifier 21, the reference voltage source 23 that supplies the reference voltage Vref to the non-inverting input terminal of the operational amplifier 21, and the output terminal of the operational amplifier 21. And a smoothing capacitor 24 connected between the ground lines Gnd. The operational amplifier 21 has an on / off control terminal 21a that is turned on after the charge pump 10 has fully boosted and is turned off to reduce power consumption when output is unnecessary. The on / off control terminal 21a is connected to the control signal input terminal Vc. Further, the regulator 20 includes an N-channel MOS transistor 25 which is a pull-down switch connected between the output terminal of the operational amplifier 21 and the ground line Gnd in order to pull down the output terminal potential of the operational amplifier 21 to the ground potential VSS when the operational amplifier 21 is off. And an inverter 26 connected between the control signal input terminal Vc and the gate of the MOS transistor 25. The power supply circuit 100 is constituted by a one-chip semiconductor integrated circuit, and the boost capacitor 11 and the smoothing capacitor 12 constituting the charge pump 10 and the smoothing capacitor 24 constituting the regulator 20 are connected to the semiconductor integrated circuit as external elements. Is done. The clock signal CLK input to the charge pump 10 is supplied from the outside of the semiconductor integrated circuit or is supplied from an oscillation circuit configured inside the semiconductor integrated circuit.
[0006]
The operation of the power supply circuit 100 having the above configuration will be described with reference to FIG. A time after the first power supply voltage VDD1 = 3v, for example, is supplied to the first power supply line VDD1 from a DC power supply such as a battery, the charge pump 10 is turned on at time T1, and the charge pump 10 has completely boosted. At T2, the boosted voltage VDD2 = 2 × VDD1 = 6v that is twice the power supply voltage VDD1 is output from the charge pump 10 to the second power supply line VDD2. When the control signal Vc of “H” level is inputted to the control signal input terminal Vc at this time T2, the regulator 20 is turned on, and the smoothing capacitor 24 is charged with the power supply voltage VDD2 = 6v from the second power supply line VDD2. Then, the voltage dividing resistors R1 and R2 of the voltage dividing circuit 22 are set to R1 / R2 = 1, for example, and the divided voltage is regulated to be equal to the reference voltage Vref, for example, Vref = 2.5v. At time T3, a regulated voltage of Vout = Vref (1 + R1 / R2) = 2.5 × (1 + 1) = 5v is output from the output terminal Vout.
[0007]
[Patent Document 1]
Japanese Patent Laid-Open No. 2000-1000018 (FIG. 1)
[0008]
[Problems to be solved by the invention]
By the way, in the conventional power supply circuit 100, the regulator 20 constitutes the load of the charge pump 10, and when the regulator 20 is turned on at time T2, the boost voltage VDD2 from the charge pump 10 is charged to the smoothing capacitor 24. At this time, the boosted voltage VDD2 drops transiently as shown in FIG. Since the charge pump 10 has a low load drive capability at the time of rising, if the voltage drop is too large, the charge pump 10 may remain falling or latch-up may occur due to other voltages. In order to prevent this, it is necessary to increase the load driving capability of the charge pump, and there is a problem that the chip size of the semiconductor integrated circuit constituting this power supply circuit is increased.
Therefore, an object of the present invention is to provide a power supply circuit in which the voltage drop of the charge pump when the regulator is started up is reduced.
[0009]
[Means for Solving the Problems]
The power supply circuit of the present invention is a power supply circuit that inputs the boosted voltage from the charge pump to the operational amplifier and outputs the regulated voltage to the output terminal of the operational amplifier to which the smoothing capacitor is connected. It is characterized by charging.
The power supply circuit of the present invention includes a pull-up switch circuit that pulls up an output terminal potential of an operational amplifier with a power supply of a charge pump in the power supply circuit, and a voltage detection circuit that detects that the output terminal potential of the operational amplifier has become a predetermined potential. The precharge is performed by a pull-up switch circuit, and the operational amplifier is turned on by a detection signal from a voltage detection circuit.
In addition, the power supply circuit of the present invention inputs a power supply from the first power supply line and outputs a boosted voltage to the second power supply line, and inputs a power supply from the second power supply line and outputs a regulated voltage to the output terminal. A regulator, and the regulator includes a control signal input terminal, an operational amplifier with an on / off control terminal that receives power from the second power supply line and outputs the regulated voltage, and an output terminal of the operational amplifier and a ground line. A connected capacitor, a pull-down switch connected between the output terminal of the operational amplifier and the ground line, a voltage dividing circuit that divides the potential of the operational amplifier output terminal and supplies the divided voltage to the inverting input terminal of the operational amplifier, In a power supply circuit having a reference voltage source for supplying a reference voltage to a non-inverting input terminal, the first power supply line and the operational amplifier A pull-up switch connected between the power terminals and a voltage detection circuit for detecting the potential of the operational amplifier output terminal and supplying the detected signal to the control terminal of the pull-up switch and the enable terminal of the operational amplifier are attached to the control terminal. The pull-down switch is turned off in synchronization with the control signal and the pull-up switch is turned on to pull up the output terminal potential of the operational amplifier with the first power supply line potential, so that the output terminal potential of the operational amplifier becomes a predetermined threshold value. This is detected by the voltage detection circuit, and the pull-up switch is turned off and the operational amplifier is turned on in synchronization with the detection signal.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
A power supply circuit 200 according to an embodiment of the present invention will be described below with reference to FIG. In addition, the same code | symbol is attached | subjected about the same thing as FIG. 3, and the description is abbreviate | omitted. 3 is different from the conventional power supply circuit 100 shown in FIG. 3 in that the power supply circuit 100 is provided with a pull-up switch circuit 30, a voltage detection circuit 40, and a control circuit 50, and an on / off control terminal 21a of the operational amplifier 21 is provided. It is not connected directly to the control signal input terminal Vc but connected via the control circuit 50. The power supply circuit 200 is constituted by a one-chip semiconductor integrated circuit, and the boost capacitor 11 and the smoothing capacitor 12 constituting the charge pump 10 and the smoothing capacitor 24 constituting the regulator 20 are connected to the semiconductor integrated circuit as external elements. Is done. The clock signal CLK input to the charge pump 10 may be supplied from the outside of the semiconductor integrated circuit, or may be supplied by an oscillation circuit inside the semiconductor integrated circuit.
[0011]
The pull-up switch circuit 30 includes a P-channel MOS transistor 31 that is a pull-up switch, and P-channel MOS transistors 32 and 33 that are switches for switching the connection of the back gate of the MOS transistor 31 to the source or drain. ing. The MOS transistors 32 and 33 are connected in series at the sources, connected in parallel with the MOS transistor 31, and connected between the first power supply line VDD 1 and the output terminal of the operational amplifier 21. The MOS transistors 31, 32, and 33 have back gates connected in common, and are connected to the sources of the MOS transistors 32 and 33.
[0012]
The voltage detection circuit 40 includes inverters 41 and 42 and a level shifter 43 and is vertically connected between the output terminal of the operational amplifier 21 and the input terminal of the control circuit 50. When the output terminal potential of the operational amplifier 21 becomes higher than the threshold voltage Vth of the inverter 41, the output of the inverter 42 becomes the “H” level of the first power supply voltage VDD1 level, and the level shifter 43 causes the “H” level of the second power supply voltage VDD2 level. Is converted to
[0013]
The control circuit 50 includes an XNOR circuit 51, an AND circuit 52, and an inverter 53. In the XNOR circuit 51 and the AND circuit 52, the control signal input terminal Vc is connected to one input terminal, and the output terminal of the level shifter 43 is connected to the other input terminal. The output terminal of the XNOR circuit 51 is connected to the gate of the MOS transistor 31, the output terminal of the AND circuit 52 is connected to the on / off control terminal 21a of the operational amplifier 21, and is connected to the gate of the MOS transistor 32. The transistor 33 is connected to the gate via the inverter 53. .
[0014]
The operation of the power supply circuit 200 having the above configuration will be described with reference to FIG. A time after the first power supply voltage VDD1 = 3v, for example, is supplied to the first power supply line VDD1 from a DC power supply such as a battery, the charge pump 10 is turned on at time T1, and the charge pump 10 has completely boosted. At T2, the boosted voltage VDD2 = 2 × VDD1 = 6v that is twice the power supply voltage VDD1 is output from the charge pump 10 to the second power supply line VDD2. Until this time T2, the control signal input terminal Vc is at "L" level, the output of the XNOR circuit 51 is at "H" level, the MOS transistor 31 is in the off state, and the output of the AND circuit 52 is at "L" level. 21 is an off state, the MOS transistor 25 is on, and the output terminal potential of the operational amplifier 21 is pulled down to the ground potential VSS. At this time, since the MOS transistor 32 is on and the MOS transistor 33 is off, the back gate of the MOS transistor 31 is connected to the first power supply line VDD1.
[0015]
When the control signal Vc of “H” level is input to the control signal input terminal Vc at time T2, at this time, the MOS transistor 25 is turned off, and the output of the XNOR circuit 51 becomes “L” level. 31 turns on. At this time, the output of the AND circuit 52 remains at “L” level, the MOS transistor 32 remains on, and the MOS transistor 33 and the operational amplifier remain off. When the MOS transistor 31 is turned on, charging of the smoothing capacitor 24 from the first power supply line VDD1 is started, and the output terminal potential of the operational amplifier 21 is pulled up from the ground potential VSS toward the potential of the first power supply line VDD1.
[0016]
When the output terminal potential of the operational amplifier 21 becomes higher than the threshold voltage Vth of the inverter 41, for example, Vth = 2v, at time T4, at this time, the voltage detection circuit 40 outputs an “H” level as a detection signal. Due to this “H” level detection signal, the outputs of the XNOR circuit 51 and the AND circuit 52 become “H” level, the MOS transistors 31 and 32 are turned off, the MOS transistor 33 is turned on, and the MOS transistor 33 is turned on. The back gate of the transistor 31 is connected to the output terminal of the operational amplifier 21. Further, when the output of the AND circuit 52 becomes the “H” level, the operational amplifier 21 is turned on, and charging of the smoothing capacitor 24 from the second power supply line VDD2 is started. Immediately after time T4, the potential of the second power supply line VDD2 drops due to charging of the smoothing capacitor 24. However, the smoothing capacitor 24 is driven by the first power supply line VDD1 between the time T2 and T4, and the threshold voltage of the inverter 41 = 2v. Thus, the voltage drop can be reduced as compared with the case of the conventional power supply circuit 100, and it is shorter than the time T3-T2 of the power supply circuit 100, at time T5-T2, at time T5 to Vout from the output terminal Vout. = Vref (1 + R1 / R2) = 2.5 × (1 + 1) = 5v regulated voltage is output.
[0017]
As described above, the boosted voltage input from the first power supply line VDD1 to the charge pump 10 and output from the charge pump 10 to the second power supply line VDD2 is input to the operational amplifier 21 constituting the regulator 20 and regulated from the operational amplifier 21. In the power supply circuit 200 that outputs a voltage, a smoothing capacitor connected between the output terminal of the operational amplifier 21 and the ground line Gnd until the output terminal potential of the operational amplifier 21 reaches the threshold voltage Vth of the inverter 41 immediately before the operational amplifier 21 is turned on. Since 24 is precharged by the first power supply line VDD1, the voltage drop of the second power supply line VDD2 when the operational amplifier 21 rises can be reduced.
[0018]
In the above embodiment, the charge pump has been described as an example of the double boost type, but it can be applied to other integer multiple boost type charge pumps. Further, although the charge pump has been described by taking a positive charge pump as an example, it can also be applied to a negative charge pump.
[0019]
【The invention's effect】
According to the present invention, the drop of the charge pump output potential at the time of regulator startup can be reduced as compared with the conventional power supply circuit, and the chip size of the semiconductor integrated circuit constituting this power supply circuit can be reduced.
[Brief description of the drawings]
1 is a circuit diagram of a power supply circuit 200 according to an embodiment of the present invention. FIG. 2 is a voltage waveform diagram showing an operation of the power supply circuit 200 shown in FIG.
3 is a circuit diagram of a conventional power supply circuit 100. FIG. 4 is a circuit diagram of an example of a charge pump 10 used in the power supply circuit 100 of FIGS.
FIG. 5 is a voltage waveform diagram showing an operation of the power supply circuit 100 shown in FIG. 3;
[Explanation of symbols]
VDD1 First power supply line VDD2 Second power supply line 10 Charge pump 20 Regulator 21 Operational amplifier 22 Voltage dividing circuit 23 Reference voltage source 24 Smoothing capacitor 25 N-channel MOS transistor (pull-down switch)
26 Inverter 30 Pull-up switch circuit 31 P-channel MOS transistor (pull-up switch)
32, 33 P-channel MOS transistor (back gate connection changeover switch)
40 voltage detection circuit 41, 42 inverter 43 level shifter 50 control circuit 51 XNOR circuit 52 AND circuit 53 inverter 200 power supply circuit

Claims (3)

In a power supply circuit that inputs a boosted voltage from a charge pump to an operational amplifier and outputs a regulated voltage to an output terminal of the operational amplifier to which a smoothing capacitor is connected, the smoothing capacitor is precharged immediately before the operational amplifier is turned on. Power supply circuit. A pull-up switch circuit that pulls up the output terminal potential of the operational amplifier with the power supply of the charge pump; and a voltage detection circuit that detects that the output terminal potential of the operational amplifier has reached a predetermined potential.
The precharge is performed by a pull-up switch circuit,
2. The power supply circuit according to claim 1, wherein the operational amplifier is turned on by a detection signal from a voltage detection circuit. A charge pump that inputs power from the first power line and outputs a boosted voltage to the second power line; and a regulator that inputs power from the second power line and outputs a regulated voltage to the output terminal,
A regulator, a control signal input terminal, an operational amplifier with an on / off control terminal that receives power from the second power line and outputs the regulated voltage, a capacitor connected between an output terminal of the operational amplifier and a ground line, A pull-down switch connected between the output terminal of the operational amplifier and the ground line, a voltage dividing circuit that divides the potential of the operational amplifier output terminal and supplies the divided voltage to the inverting input terminal of the operational amplifier, and a reference to the non-inverting input terminal of the operational amplifier A power supply circuit having a reference voltage source for supplying a voltage;
A pull-up switch connected between the first power supply line and the output terminal of the operational amplifier, and the potential of the operational amplifier output terminal are detected, and the detection signal is supplied to the control terminal of the pull-up switch and the on / off control terminal of the operational amplifier. And a voltage detection circuit,
The pull-down switch is turned off in synchronization with a control signal to the control signal input terminal, and the pull-up switch is turned on to pull up the output terminal potential of the operational amplifier with the first power supply line potential. A power supply circuit characterized in that the voltage detection circuit detects that the potential has reached a predetermined threshold value, and the pull-up switch is turned off and the operational amplifier is turned on in synchronization with the detection signal.

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