JP2005005688A - Solid-state imaging device, method for manufacturing the same, electrical component module, and electrical component having solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the sensitivity of a level shift transistor in an output buffer amplifier at the output section in a solid-state imaging device by shifting its Vth toward the side of enhancement without deteriorating the sensitivity. <P>SOLUTION: An insulation gate type field-effect transistor making up the level shift transistor that shifts the output direct current voltage value of the output buffer amplifier of the CCD solid-state imaging device element is configured in such a manner that the threshold voltage Vth is shifted toward the enhancement side by introducing negative fixed charges into a gate insulation film 115 at the gate section for an n-channel insulation gate type field-effect transistor and positive fixed charges for a p-channel insulation gate type field-effect transistor, and the obstruction of depletion in a well region is avoided. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device having a CCD (Charge Coupled Device) configuration, a method for manufacturing the solid-state imaging device, an electrical device module, and an electrical device having the solid-state imaging device.

Solid-state imaging devices based on CCDs are widely used in various electric devices such as camcorders and mobile phones. Especially in these portable devices, it is possible to use a power battery for a long time or to reduce the size and weight of the power source. From the demand, further reduction of power consumption is required.
By the way, the power consumption of the CCD solid-state imaging device is mostly occupied by the output buffer amplifier.

This output buffer amplifier is configured by a source follower circuit using an insulated gate field effect transistor (hereinafter abbreviated as a MOS transistor, but the gate insulating film is not limited to an oxide film) in order to lower the output impedance. However, in this case, the output impedance of the source follower circuit at the final stage is the smallest, and the direct current is large. Therefore, power consumption can be reduced by lowering the power supply voltage of the source follower circuit toward the rear stage where the direct current value increases (see Patent Document 1).
Further, by increasing the threshold voltage Vth of the MOS transistor of the source follower circuit on the rear stage side of this output buffer amplifier, the necessary power supply voltage can be lowered and the power consumption can be reduced (Patent Document 1). reference).

  By the way, in the output section of the CCD image pickup device, the input voltage of the output buffer circuit becomes a high voltage to some extent due to the restriction due to the reset voltage for resetting the charge from the horizontal register. On the other hand, when the DC voltage value is set to about 3 V, for example, on the output side, Vth in the enhancement type level shift transistor in which the gate-source voltage Vgs of the source follower is set to, for example, 4 V or more is set. It is necessary to enlarge it.

As described above, as a method of increasing the Vth of the MOS transistor, the dose amount of impurity implantation for Vth adjustment which is usually performed in the manufacture of the transistor is increased.
However, when the level shift transistor that requires Vgs of, for example, about 4 V as described above is obtained by increasing the dose amount as described above, there is a problem that sensitivity is lowered due to a so-called back gate effect.
Now, as shown in a schematic cross-sectional view in FIG. 12, a source region 103 and a drain region 104 are formed on a p-type well region 102 formed on a substrate made of, for example, an n-type Si substrate 101. FIG. 13 shows a potential diagram at the moment when a channel is formed in a cross section crossing the gate portion indicated by a chain line a in a MOS transistor in which a gate electrode 106 is formed through a gate insulating film 105. In FIG. 13, the chain line curve shows a case where the dose amount of the impurity implantation for Vth adjustment is relatively small, and the solid line curve shows a case where the dose amount is increased in order to increase Vth. In many cases, since the p-type well region 102 is not depleted, the substrate bias effect, so-called back gate effect, becomes large, the gain of the source follower is lowered, and the sensitivity is lowered.

Since Vth of the level shift transistor cannot be increased due to the above-described restrictions, for example, if the power supply voltage at the first stage is 12V, the power supply voltage after the second stage can be reduced only to about 5V. Conversely, when the power supply voltage at the second and subsequent stages is set to 5V, the power supply voltage at the first stage cannot be set to 15V.
For example, a technique for further reducing power consumption has been proposed by using a buffer circuit with a push-pull circuit at the final stage (see Patent Document 2). In this case, assuming that the input of 12V is a three-stage buffer amplifier that outputs 3V of DC voltage, the depletion type p-channel MOS transistor in the third-stage push-pull circuit of the final stage is shifted by 4V. It is difficult to form a transistor with Vth of 4V.
Therefore, in the output buffer amplifier having this push-pull circuit, a shift of, for example, 4.5 V is performed with a two-stage source follower. However, the formation of such a high Vth transistor by the above-described impurity ion implantation causes a significant reduction in sensitivity as described above.

Japanese Patent No. 3351503 (paragraph numbers 0021 and 0022) Japanese Patent Laid-Open No. 11-234567

  In the solid-state imaging device and the manufacturing method according to the CCD configuration of the present invention, the level shift transistor in the output buffer amplifier of the output unit in the above-described solid-state imaging device (the level shift transistor is a level shift transistor of about 4 V or more It is possible to shift the Vth to the enhancement side without causing a decrease in sensitivity, to increase the level shift, to reduce the number of stages of the buffer circuit, The circuit is simplified while reducing the number and reducing the power consumption in the buffer circuit.

  And, by the solid-state image pickup device having such a configuration, in a multi-pixel CCD solid-state image pickup device, a multi-pixel still camera mounted with the solid-state image pickup device, a camcorder, an electric device in a mobile phone, etc. It is an object of the present invention to provide a solid-state image pickup device, an electric device module, and an electric device having a solid-state image pickup device capable of reducing power consumption without causing a decrease in sensitivity.

  In the solid-state imaging device according to the present invention, the insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier is provided in the n-channel insulated gate type in the gate insulating film of the gate portion. A negative fixed charge is introduced in the field effect transistor, and a positive fixed charge is introduced in the p-channel insulated gate field effect transistor to shift the threshold voltage Vth to the enhancement side. It is characterized by that.

  In the solid-state imaging device according to the present invention, the thickness of the gate insulating film of the insulated gate field effect transistor constituting the level shift transistor for shifting the output DC voltage value of the output buffer amplifier of the solid-state imaging device The Vth is shifted to the enhancement side more than the thickness of the gate insulating film of the field effect transistor.

  In the solid-state imaging device according to the present invention, the well potential of the insulated gate field-effect transistor constituting the level shift transistor for shifting the output DC voltage value of the output buffer amplifier of the solid-state imaging device is replaced with another insulated gate type electric field. Compared to the well potential of the effect transistor, the n-channel insulated gate field effect transistor has a low negative potential, and the p-channel insulated gate field effect transistor has a high positive potential. The Vth is further shifted to the enhancement side.

In the solid-state imaging device according to the present invention, the gate electrode of the n-channel insulated gate field effect transistor constituting the level shift transistor for shifting the output DC voltage value of the output buffer amplifier of the solid-state imaging device is made of n-type polysilicon. The structure is made of an electrode material having a large work function and is characterized by shifting Vth to the enhancement side.
The electrode material having a large work function may be p ⁺ type polysilicon, Pt, or Au.

  In the method for manufacturing a solid-state imaging device according to the present invention, the insulated gate field effect transistor constituting the level shift transistor for shifting the output DC voltage value of the output buffer amplifier of the solid-state imaging device is replaced with the gate insulation of the gate portion. The n-channel insulated gate field effect transistor has a step of introducing a negative fixed charge into the film, and the p-channel insulated gate field effect transistor introduces a positive fixed charge. And a level shift transistor in which the threshold voltage Vth is shifted to the enhancement side by the introduction of the electric charge.

  In the above-described manufacturing method of the present invention, the step of introducing the negative fixed charge and the positive fixed charge may be performed by electrical charge injection, that is, charge injection by a tunnel current in the gate portion, or gate insulating film. It is characterized in that it is carried out by generating acceptor ions or donor ions by introducing impurities, or by plasma or radiation irradiation.

  In the solid-state imaging device manufacturing method according to the present invention, the gate electrode of the n-channel insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state imaging device is an n-type. It is characterized by comprising an electrode material having a work function larger than that of polysilicon.

  In the electrical equipment module according to the present invention, an imaging lens that captures an optical image of a subject, and imaging by an array of sensor units using a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. An electric device module comprising an area, a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit, and an output unit that outputs an imaging signal corresponding to the signal charges, An insulated gate field effect transistor constituting a level shift transistor for shifting the output DC voltage value of the output buffer amplifier of the output section is an n-channel insulated gate field effect transistor in the gate insulating film of the gate section. In a p-channel insulated gate field effect transistor, a positive fixed charge is introduced and a positive fixed charge is applied. Characterized by comprising a structure in which charge is introduced to shift the threshold voltage Vth more enhancement side.

  In the electrical equipment module according to the present invention, an imaging lens that captures an optical image of a subject, and imaging by an array of sensor units using a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. An electrical device module comprising: an area; a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit; and an output unit that outputs an imaging signal corresponding to the signal charges. The thickness of the gate insulating film of the insulated gate field effect transistor that constitutes the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the part, the thickness of the gate insulating film of the other insulated gate field effect transistor It is characterized by being larger than

  In the electrical equipment module according to the present invention, an imaging lens that captures an optical image of a subject, and an imaging area that includes an array of sensor units by a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed An electric equipment module comprising a vertical transfer unit and a horizontal transfer unit for transferring signal charges obtained by the sensor unit, and an output unit for outputting an imaging signal corresponding to the signal charges, The n-channel insulated gate is compared with the well potential of the insulated gate field effect transistor constituting the level shift transistor for shifting the output DC voltage value of the output buffer amplifier as compared with the well potential of the other insulated gate field effect transistors. In a field effect transistor, a low negative potential is used, and a p-channel insulated gate field effect transistor is used. In the Njisuta it is characterized by a high positive potential.

  In the electrical equipment module according to the present invention, an imaging lens that captures an optical image of a subject, and imaging by an array of sensor units using a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. An electrical device module comprising: an area; a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit; and an output unit that outputs an imaging signal corresponding to the signal charges. The gate electrode of the n-channel insulated gate field effect transistor that constitutes the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the part is made of an electrode material having a work function larger than that of n-type polysilicon. It is characterized by comprising.

  In the electric device according to the present invention, an imaging area that includes an imaging lens that captures an optical image of a subject, and an array of sensor units that includes a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. A solid-state imaging device having a vertical transfer unit and a horizontal transfer unit that transfer the signal charges obtained by the sensor unit, and an output unit that outputs an imaging signal corresponding to the signal charges, and a control system for the solid-state imaging device And a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit, which is an electric device having a solid-state image sensor having a display system based on an imaging signal from the solid-state image sensor The insulated gate field effect transistor is in the n channel insulated gate field effect transistor in the gate insulating film of the gate portion. Thus, a negative fixed charge is introduced, and the p-channel insulated gate field effect transistor has a configuration in which the positive fixed charge is introduced and the threshold voltage Vth is shifted to the enhancement side. It is characterized by.

  In addition, in the electrical apparatus according to the present invention, the imaging lens includes an imaging lens that captures an optical image of a subject, and an array of sensor units that includes a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. A solid-state imaging device having a vertical transfer unit and a horizontal transfer unit that transfer the signal charges obtained by the sensor unit, and an output unit that outputs an imaging signal corresponding to the signal charges, and a control system for the solid-state imaging device And a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit, which is an electric device having a solid-state image sensor having a display system based on an imaging signal from the solid-state image sensor Change the thickness of the gate insulating film of an insulated gate field effect transistor to the thickness of the gate insulating film of another insulated gate field effect transistor. And said that it has a large and.

  Furthermore, in the electrical apparatus according to the present invention, an imaging area that includes an imaging lens that captures an optical image of a subject and a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. A solid-state imaging device having a vertical transfer unit and a horizontal transfer unit that transfer the signal charges obtained by the sensor unit, and an output unit that outputs an imaging signal corresponding to the signal charges, and a control system for the solid-state imaging device And a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit, which is an electric device having a solid-state image sensor having a display system based on an imaging signal from the solid-state image sensor Compare the well potential of an insulated gate field effect transistor to the well potential of other insulated gate field effect transistors. In the insulated gate field effect transistor, and a low negative potential, in the p-channel insulated gate field effect transistor is characterized by a high positive potential.

  In addition, in the electrical apparatus according to the present invention, the imaging lens includes an imaging lens that captures an optical image of a subject, and an array of sensor units that includes a plurality of photoelectric conversion elements on which the optical image of the subject captured by the imaging lens is formed. A solid-state imaging device having a vertical transfer unit and a horizontal transfer unit that transfer the signal charges obtained by the sensor unit, and an output unit that outputs an imaging signal corresponding to the signal charges, and a control system for the solid-state imaging device And a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit, which is an electric device having a solid-state image sensor having a display system based on an imaging signal from the solid-state image sensor The gate electrode of the n-channel insulated gate field effect transistor constituting the insulated gate field effect transistor is an n-type policy. It is constituted by an electrode material having a large becomes work function than Con characterized by comprising.

In the above-described solid-state imaging device according to the present invention, the manufacturing method of the solid-state imaging device, the electrical device module, and the electrical device having the solid-state imaging device, each of the gate insulating films can be configured by an oxide film.
The gate insulating film is made of an oxide film, and the oxide film is formed on a Si semiconductor substrate. At the interface between the substrate and the oxide film, an n-channel insulated gate field effect transistor has a negative polarity. In the p-channel insulated gate field effect transistor, a positive surface level can be formed.
The gate insulating film is made of an oxide film. In the n-channel insulated gate field effect transistor, a negative charge is introduced into the interface between the oxide film and the gate electrode. A field effect transistor may have a configuration in which positive charges are introduced.
In addition, the gate unit includes a MONS (Metal-Oxide-Nitride-Semiconductor) structure, a MNOS (Metal-Nitride-Oxide-Semiconductor) structure, or a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor structure). The charge can be introduced into the interface between the oxide film (Oxide) and the nitride film (Nitride).

  As described above, in the solid-state imaging device and the method of manufacturing the same according to the present invention, a fixed charge is introduced into the gate insulating film of the level shift transistor, the gate insulating film is enlarged, or the well potential is changed to another. When the gate electrode having a large work function is used, the Vth in the level shift transistor is shifted to the enhancement side. Therefore, when the impurity is implanted into the semiconductor as in the conventional method described with reference to FIG. As described above, a decrease in sensitivity can be avoided by avoiding the phenomenon of inhibiting depletion in the well region. As described above, the enhancement of the MOS transistor can greatly increase the level shift, thereby reducing the number of stages and the number of power supplies in the buffer circuit.

Embodiments of a solid-state image pickup device, an electric equipment module, an electric device having a solid-state image pickup device, and a method of manufacturing a solid-state image pickup device according to the present invention will be described by way of example. However, the present invention is limited to the illustrated embodiment. is not.
First, an embodiment of a solid-state image sensor according to the present invention will be described.

[First Embodiment of Solid-State Image Sensor]
FIG. 1 shows a schematic configuration of an embodiment of a solid-state imaging device 10 having a CCD configuration according to the present invention. In this case, an imaging area 14 in which photoelectric conversion elements, for example, sensor units 11 having a photodiode configuration are arranged, It has a vertical CCD 13 as a vertical register, a horizontal CCD 15 as a horizontal register, and a charge-voltage converter 16 as an output unit.
Then, a signal charge corresponding to the amount of received light obtained by the sensor unit 11 is taken out to the vertical CCD 13 of the vertical transfer register, transferred to the horizontal CCD 15, and the horizontal CCD 15 converts the output unit, that is, a charge voltage for converting the imaging signal charge into an output voltage. The image is transferred to the conversion unit 16, and an imaging signal is extracted by the charge / voltage conversion unit 16.

  FIG. 2 is a circuit diagram of a main part related to the output buffer amplifier of the output unit of the solid-state imaging device according to the present invention, that is, the charge-voltage conversion unit 16, and the figure shows examples of numerical values of the respective voltages. In this example, a configuration is shown in which a buffer circuit with two-stage source followers is formed by MOS transistors M1, M2, M3, and M4, and a push-pull circuit PP is connected to the final stage. In this configuration, the transistor M3 is a so-called level shift transistor MS that performs a large level shift of 4V or more, in this case 6V.

A signal voltage corresponding to the signal charge from the horizontal CCD 15 converted by the floating diffusion FD unit is input to the input terminal of the buffer circuit, that is, the gate of the transistor M1.
In this example, the push-pull circuit PP is provided at the final stage of the buffer circuit, and the power consumption is further reduced (Japanese Patent Laid-Open No. 11-234567). Issue).

  FIG. 3 shows a schematic sectional view of the MOS transistors M1 to M4 of the buffer circuit, for example, the MOS transistor M3, that is, the level shift transistor MS. In this example, the case of having an n-channel MOS transistor configuration is illustrated. For example, a source region 113 and a drain region 114 are formed on a p-type well region 112 formed on the n-type semiconductor substrate 111, using the n-type substrate 111 as a substrate region sub, and the substrate region sub. A gate electrode 116 is formed between these regions via a gate insulating film 115.

The structure of the gate portion of the level shift transistor M3, and further, the gate portion of each of the other MOS transistors may be a MONS (Metal-Oxide-Nitride-Semiconductor) structure, an MNOS (Metal-Nitride-Oxide-Semiconductor) structure, or a MONOS ( (Metal-Oxide-Nitride-Oxide-Semiconductor) structure.
The semiconductor substrate 111 is formed of, for example, a Si substrate, and the gate insulating film 115 can be formed of an oxide film, such as a surface thermal oxide film of the Si substrate 111.

In the level shift transistor MS (M3), a negative fixed charge is introduced into the gate insulating film 115 in the n-channel insulated gate field effect transistor in the illustrated example.
4A and 4B are diagrams schematically showing a state where fixed charges are introduced in the cross section of the gate portion of the level shift transistor, which is indicated by a chain line a in FIG. 3. For example, as shown in FIG. A negative charge is introduced into the gate insulating film 115 made of a film as schematically shown by a circle.
Alternatively, as shown in FIG. 4B, for example, the gate insulating film 115 has a multilayer structure, for example, the above-described MONOS structure in which an oxide film 115a-nitride film 115b-oxide film 115c are sequentially stacked. A negative charge is introduced into the interface with the upper and lower oxide films 115a and 115c.

In this way the level shift transistor MS, for example In the n-channel, accumulation of negative charges in the gate insulating film, in the example Si substrate -SiO ₂ oxide film, the interface definitive negative the Si substrate and the SiO ₂ oxide film And the threshold Vth of the level shift transistor MS is made larger than those of the other MOS transistors M1, M2, and M4.

  That is, FIG. 5 shows a comparison of potential diagrams in the cross section in the thickness direction of the gate portion when there is a fixed charge in the gate insulating film in the MOS transistor (solid line curve) and when there is no fixed charge (dashed line curve). As is clear from the comparison of these curves, in this case, even when a fixed charge is present to deepen the negative potential and Vth is increased, the depletion state does not change in the well region.

[Second Embodiment of Solid-State Image Sensor]
This embodiment also has the same configuration as that of the first embodiment shown in FIGS. 1 to 3, but in this embodiment, the thickness ts of the gate insulating film of the level shift transistor MS is set as follows. Other transistors M1, M2, M2, M2, M4, M4, M4, M4, M4, M2, M2, M2 It was higher than Vth of M4.

  FIG. 6 shows a comparison of potential diagrams when the thickness of the gate insulating film is changed as described above. In this case as well, Vth increases, but well depletion is not inhibited.

[Third Embodiment of Solid-State Image Sensor]
This embodiment also has the same configuration as that of the first embodiment shown in FIGS. 1 to 3, but in this embodiment, the well region 112S of the level shift transistor MS is shown in FIG. The well potential Vws of each level shift transistor MS is separated from the well region 112 of the other MOS transistors M1, M2, and M4. In the n-channel type MOS, the well potential Vws is compared with the well potential Vw of the other MOS transistors M1, M2, and M4. And negative potential. That is, for example, when Vw is 0V, Vws = −6.5V. In this way, Vth of the level shift transistor MS is increased.
In FIG. 7, parts corresponding to those in FIG.

  FIG. 8 shows a comparison of potential diagrams when the well potential is changed in the third embodiment. Even in this case, Vth increases, but depletion is not inhibited as is apparent from the comparison between the well potential and the potential of the well region.

[Fourth Embodiment of Solid-State Image Sensor]
This embodiment also has the same configuration as that of the first embodiment shown in FIGS. 1 to 3, but in this embodiment, as shown in FIG. In the field effect transistor, the gate electrode 116 of the level shift transistor MS is formed of an electrode material having a work function larger than that of other transistors, particularly the gate electrodes 116 of the transistors M1, M2, and M4 of the buffer circuit. For example, when the gate electrode 116 is an n ⁺ type, the gate electrode 116 of the level shift transistor MS is made of p ⁺ type polysilicon, platinum (Pt), or gold (Au).

FIG. 10 shows a comparison between a potential diagram (solid curve) when the gate electrode material is p + polysilicon and a potential diagram (dashed curve) when n + polysilicon is used in this configuration. In the insulated gate field effect transistor MS, Vth increases, but well depletion is not inhibited.
In FIG. 10, parts corresponding to those in FIG.

Next, an embodiment of a method for manufacturing a solid-state imaging device according to the present invention will be described.
In the manufacturing method of the present invention, the solid-state imaging device having the above-described CCD structure can be manufactured by a conventionally known ordinary method. In particular, in the present invention, the output DC voltage value of the output buffer amplifier is set. In this example, the n-channel MOS transistor includes a step of introducing a negative fixed charge into the gate insulating film of the gate portion of the MOS transistor M3 constituting the level shift transistor to be shifted.

[First Embodiment of Manufacturing Method]
In this embodiment, in the level shift transistor M3 described above, negative charges are introduced into the gate insulating film 115 by applying a voltage of, for example, 20 V to 30 V between the gate electrode 116 and the semiconductor substrate, for example. A strong electric field is formed in the gate insulating film, and electrons are introduced by the tunnel current effect.
In this way, the solid-state imaging device according to the first embodiment of the solid-state imaging device described above is manufactured.

[Second Embodiment of Manufacturing Method]
In this embodiment, in the above-described level shift transistor M3, negative charges are introduced into the gate insulating film 115 by implanting impurities such as boron, and acceptor levels are formed in the gate insulating film. Do.
In this way, the solid-state imaging device according to the second embodiment of the solid-state imaging device described above is manufactured.

[Third Embodiment of Manufacturing Method]
In this embodiment, in the level shift transistor M3 described above, the introduction of negative charges into the gate insulating film 115 is performed by, for example, exposure to oxygen plasma or radiation, for example, α-ray irradiation.

[Fourth Embodiment of Manufacturing Method]
In this embodiment, the thickness ts of the gate insulating film of the level shift transistor M3 described above is made larger than the thickness t of the gate insulating films of the other MOS transistors M1, M2, and M4. For example, when ts = 35 nm, t = 20 nm.
In this method of forming gate insulating films having different thicknesses, for example, for all MOS transistors, for example, buffer circuits, first, the gate insulating film is formed to a uniform thickness with respect to M1 to M4, and then the level shift transistor M3 is formed. The insulating layer in the gate portion of the transistors other than (MS) is removed by etching, and then all the MOS transistors, for example, buffer circuits are formed again by forming a gate insulating film to a required thickness with respect to M1 to M4. .

[Fifth Embodiment of Manufacturing Method]
In this embodiment, the gate electrode of the above-described level shift transistor M3 is made of p ⁺ polysilicon, and the electrode of the gate portion of another insulated gate field effect transistor is made of n ⁺ polysilicon. For the formation of these gate electrodes, for example, the manufacturing method of Japanese Patent Application No. 2003-132611 related to the application of the present applicant can be applied.

Next, an embodiment in which an embodiment of an electric apparatus having a solid-state imaging device according to the present invention is applied to a digital still camera together with an embodiment of an electric apparatus module will be described.
FIG. 11 is a schematic configuration diagram illustrating an embodiment of a digital still camera. The imaging apparatus (camera system) shown in FIG. 11 includes a camera module 3 having a CCD solid-state imaging device 10, an imaging lens 50, and a drive control unit 96 that drives the CCD solid-state imaging device 10, and imaging obtained by the camera module 3. The digital still camera 1 includes a main unit 4 that generates a video signal based on the signal and outputs it to a monitor or stores an image in a predetermined storage medium.

  The electric device module, in this example, the drive control unit 96 in the camera module 3 includes a timing signal generation unit 40 that generates various pulse signals for driving the CCD solid-state imaging device 10, and the timing signal generation unit 40. A driver (driving unit) 42 that receives the pulse signal from the signal and converts it into a drive pulse for driving the CCD solid-state image sensor 10, and a drive power supply 46 that supplies power to the CCD solid-state image sensor 10, the driver 42, and the like are provided. ing. The solid-state imaging device 2 is configured by the CCD solid-state imaging device 10 and the drive control unit 96 in the camera module 3. The solid-state imaging device 2 is provided as a device in which the CCD solid-state imaging device 10 and the drive control unit 96 are arranged on one circuit board or formed on one semiconductor substrate. Is good.

  The processing system of the digital still camera 1 is roughly composed of an optical system 5, a signal processing system 6, a recording system 7, a display system 8, and a control system 9. Needless to say, the camera module 3 and the main unit 4 are housed in an exterior case (not shown), and an actual product (finished product) is finished.

  The optical system 5 includes a shutter 52, a lens 54 for condensing a light image of a subject, an imaging lens 50 having a diaphragm 56 for adjusting the light amount of the light image, and photoelectrically converting the collected light image into an electric signal. It comprises a CCD solid-state imaging device 10 for conversion. Light L from the subject Z passes through the shutter 52 and the lens 54, is adjusted by the diaphragm 56, and enters the CCD solid-state imaging device 10 with an appropriate brightness. At this time, the lens 54 adjusts the focal position so that an image composed of the light L from the subject Z is formed on the CCD solid-state imaging device 10.

  The signal processing system 6 includes an amplification amplifier that amplifies an analog imaging signal from the CCD solid-state imaging device 10, a CDS (Correlated Double Sampling) circuit that reduces noise by sampling the amplified imaging signal, and the like. A preamplifier unit 62, an A / D (Analog / Digital) converter unit 64 that converts an analog signal output from the preamplifier unit 62 into a digital signal, and predetermined image processing on the digital signal input from the A / D converter unit 64. The image processing unit 66 is configured by a DSP (Digital Signal Processor) to be applied.

  The recording system 7 encodes the image signal processed by the image processing unit 66 and the memory (recording medium) 72 such as a flash memory for storing the image signal, records the encoded image signal in the memory 72, and reads and decodes the image signal. 66 is provided with a CODEC (compression / decompression) 74 to be supplied to 66.

  The display system 8 includes a D / A (Digital / Analog) conversion circuit 82 that converts the image signal processed by the image processing unit 66 into an analog, and a liquid crystal (functioning as a finder) by displaying an image corresponding to the input video signal. The video monitor 84 includes an LCD (Liquid Crystal Display) and the like, and a video encoder 86 that encodes the analog image signal into a video signal of a format suitable for the video monitor 84 in the subsequent stage.

  First, the control system 9 controls a drive (drive device) (not shown) to read a control program stored in a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, and from the read control program or a user. And a central control unit 92 including a CPU (Central Processing Unit) that controls the entire digital still camera 1 based on the above command.

  The control system 9 also includes an exposure controller 94 that controls the shutter 52 and the diaphragm 56 so that the brightness of the image sent to the image processing unit 66 is kept at an appropriate level, from the CCD solid-state imaging device 10 to the image processing unit 66. A drive control unit 96 having a timing signal generation unit (timing generator; TG) 40 for controlling the operation timing of each functional unit, and an operation unit 98 for a user to input shutter timing and other commands. The central control unit 92 controls the image processing unit 66, the CODEC 74, the memory 72, the exposure controller 94, and the timing signal generation unit 40 connected to the bus 99 of the digital still camera 1.

  The digital still camera 1 includes automatic control devices such as auto focus (AF), auto white balance (AWB), and automatic exposure (AE). These controls are processed using an output signal obtained from the CCD solid-state imaging device 10. For example, the exposure controller 94 has its control value set by the central control unit 92 so that the brightness of the image sent to the image processing unit 66 is kept at an appropriate level, and controls the diaphragm 56 according to the control value. Specifically, the central control unit 92 acquires an appropriate number of luminance value samples from the image held in the image processing unit 66, and the average value falls within a predetermined appropriate luminance range. Thus, the control value of the diaphragm 56 is set.

  The timing signal generation unit 40 in the digital still camera 1 of the present embodiment is controlled by the central control unit 92 and is necessary for the operation of the CCD solid-state imaging device 10, the preamplifier unit 62, the A / D conversion unit 64, and the image processing unit 66. The timing pulse is generated and supplied to each part. The operation unit 98 is operated when the user operates the digital still camera 1.

  In the illustrated example, the preamplifier unit 62 and the A / D conversion unit 64 of the signal processing system 6 are built in the camera module 3. However, the configuration is not limited to such a configuration, and the preamplifier unit 62 and the A / D conversion unit 64 are included. The structure provided in the main body unit 4 can also be taken. A configuration in which the D / A conversion unit is provided in the image processing unit 66 can also be adopted.

  Further, although the timing signal generation unit 40 is built in the camera module 3, the configuration is not limited to such a configuration, and a configuration in which the timing signal generation unit 40 is provided in the main unit 4 can also be adopted. In addition, the timing signal generation unit 40 and the driver 42 are separate components, but the configuration is not limited to this, and the timing signal generation unit 40 and the driver 42 may be integrated (timing generator with built-in driver). By doing so, a more compact (small) digital still camera 1 can be configured.

  Further, the timing signal generation unit 40 and the driver 42 may be configured by individual discrete members, but are provided as an IC (Integrated Circuit) formed on a single semiconductor substrate. Is good. By doing so, not only can it be made compact, but the handling of the members becomes easy, and both can be realized at low cost. In addition, the digital still camera 1 can be easily manufactured. In addition, the timing signal generator 40 and the driver 42 which are strongly related to the CCD solid-state image sensor 10 to be used are integrated on the same substrate as the CCD solid-state image sensor 10 or integrated in the camera module 3. When integrated by mounting, handling and management of the members become simple. In addition, since these are integrated as a module, the digital still camera 1 (completed product) can be easily manufactured.

  The digital still camera 1 is specifically applied as a camera that can capture a color image during a still image capturing operation using a frame readout method. Note that the frame reading method of the digital still camera 1 of the present embodiment is not limited to the general two-field reading method by combining with the CCD solid-state imaging device 10, and is not limited to the three field, four field, or five field, Is configured to be applicable to a reading method having various numbers of fields such as more than that. In addition to the still image capturing mode, a moving image capturing mode is also prepared at a frame rate close to 30 frames / second (for example, 10 frames / second or more) using thinning readout.

  With reference to FIG. 1, the CCD solid-state image pickup device and the peripheral portion will be described by taking an example of driving the interline transfer (IT) type CCD solid-state image pickup device 10 in six phases or eight phases.

  In FIG. 1, a drain voltage VDD, a transfer channel voltage VGG, and a reset drain voltage VRD are applied from the drive power supply 46 to the CCD solid-state imaging device 10, and a predetermined voltage is also supplied to the driver 42. Yes.

  The CCD solid-state imaging device 10 constituting the solid-state imaging device 2 is the above-described solid-state imaging device according to the present invention. For example, a photodiode as an example of a light receiving element corresponding to a pixel (unit cell) on a semiconductor substrate 21. A large number of sensor units (photosensitive units; photocells) 11 are arranged in a two-dimensional matrix in the vertical (row) direction and the horizontal (column) direction. These sensor units 11 convert incident light incident from the light receiving surface into signal charges having a charge amount corresponding to the amount of light, and accumulate the signal charges.

  The CCD solid-state imaging device 10 is a vertical CCD in which a plurality of vertical transfer electrodes (6 or 8 per unit cell in this example) corresponding to 6-phase or 8-phase drive are provided for each vertical row of the sensor unit 11. (V register unit, vertical transfer unit) 13 are arranged.

  The transfer direction of the vertical CCD 13 is the vertical direction in the figure, the vertical CCD 13 is provided in this direction, and a plurality of vertical CCDs 13 are arranged in a direction (horizontal direction) orthogonal to this direction. Further, a read gate (ROG) 12 is interposed between the vertical CCD 13 and each sensor unit 11. A channel stop CS is provided at the boundary between the unit cells. An imaging area 14 is configured by a plurality of vertical CCDs 13 that are provided for each vertical row of the sensor units 11 and vertically transfer signal charges read from the sensor units 11 by the read gate unit 12.

  The signal charges accumulated in the sensor unit 11 are read out to the vertical CCD 13 by applying a drive pulse corresponding to the readout pulse XSG to the readout gate unit 12. The vertical CCD 13 is driven to transfer by drive pulses φV1 to φV6 (φV8) based on six-phase (eight-phase) vertical transfer clocks V1 to V6 (V8), and the read signal charges are part of the horizontal blanking period. Then, the portions corresponding to one scanning line (one line) are sequentially transferred in the vertical direction. This vertical transfer for each line is called a line shift.

  Further, the CCD solid-state image pickup device 10 includes horizontal CCDs (H register units, H) extending in the horizontal direction in the drawing adjacent to the respective transfer destination side ends of the plurality of vertical CCDs 13, that is, the vertical CCDs 13 in the last row. Horizontal transfer unit) 15 is provided for one line. The horizontal CCD 15 is driven to transfer by drive pulses φH1 and φH2 based on, for example, two-phase horizontal transfer clocks H1 and H2, and the signal charges for one line transferred from the plurality of vertical CCDs 13 are transferred after the horizontal blanking period. The images are sequentially transferred in the horizontal direction during the horizontal scanning period. For this reason, a plurality (two) of horizontal transfer electrodes (not shown) corresponding to two-phase driving are provided.

  At the end of the transfer destination of the horizontal CCD 15, for example, a charge-voltage converter 16 having a floating diffusion amplifier (FDA) configuration is provided. The charge / voltage converter 16 sequentially converts the signal charges horizontally transferred by the horizontal CCD 15 into voltage signals. Thereafter, the converted voltage signal is output with the impedance lowered by the buffer amplifier using the buffer circuit illustrated in FIG. 2 in the above-described solid-state imaging device of the present invention. That is, this voltage signal is derived as a CCD output (VOUT) corresponding to the amount of incident light from the subject.

  Needless to say, the present invention is not limited to the embodiment described above. For example, in each MOS transistor, when an n-channel MOS transistor and a p-channel MOS transistor are interchanged, the polarity of charge, the polarity of potential, and the like are reversed from those illustrated.

  As described above, in the solid-state imaging device, the electrical equipment module, and the electrical equipment having the solid-state imaging device according to the present invention, the level shift can be increased by increasing the Vth of the level shift transistor in the output buffer amplifier. As a result, the number of stages and the power supply can be reduced.

In the present invention, as a configuration for increasing the Vth, a conventional adjustment method for doping impurities into the semiconductor substrate itself is avoided, and a fixed charge is introduced into the gate insulating film of the level shift transistor, or the thickness is increased. In other words, since the well potential is adjusted, inhibition of depletion in the well region and substrate bias effect, so-called back gate effect, can be avoided when impurities are implanted into the semiconductor substrate itself. Therefore, a decrease in sensitivity can be avoided.
That is, in the present invention, in an electric device having a solid-state image sensor, an electric device module, and a solid-state image sensor, sensitivity can be improved while reducing power consumption.

It is a block diagram of an example of the solid-state image sensor by this invention. It is a circuit diagram of the principal part of the output part of an example of the solid-state image sensor by this invention. It is a schematic sectional drawing of the principal part of an example of the solid-state image sensor by this invention. FIGS. 7A and 7B are schematic views showing a charge introduction state in an example of the level shift transistor of the output buffer of the solid-state imaging device according to the present invention. It is a potential diagram in the section of the channel part of the level shift transistor of the output buffer of the solid-state image sensor by the present invention. It is a potential diagram in the section of the channel part of the level shift transistor of the output buffer of the solid-state image sensor by the present invention. It is a schematic sectional drawing of the principal part of an example of the solid-state image sensor by this invention. It is a potential figure in the section of the channel part of the level shift transistor of other examples of the output buffer of the solid-state image sensing device by the present invention. It is a schematic sectional drawing of the principal part of the other example of the solid-state image sensor by this invention. It is a potential figure in the section of the channel part of the level shift transistor of other examples of the output buffer of the solid-state image sensing device by the present invention. It is a block diagram of an example of the electric equipment by the present invention. It is a schematic sectional drawing of the level shift transistor of the output buffer of the conventional solid-state imaging device. It is a potential diagram in a section of a channel portion of a level shift transistor of an output buffer of a conventional solid-state imaging device.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Digital still camera, 2 ... Solid-state imaging device, 3 ... Camera module, 10 ... CCD solid-state image sensor, 11 ... Sensor part, 13 ... Vertical CCD, 14 ... Imaging area 15 ... Horizontal CCD 16 ... Charge voltage converter 40 ... Timing signal generator 42 ... Driver 46 ... Power source 50 ... Imaging lens 96 ..Drive control unit 101, 111 ... Base body, 102, 112 ... Well region, 103, 113 ... Source region, 104, 114 ... Drain region, 105, 115 ... Gate insulating film 106, 116 ... Gate electrodes

Claims (34)

An insulated gate field effect transistor that constitutes a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state imaging device,
In the gate insulating film of the gate part,
In the n-channel insulated gate field effect transistor, a negative fixed charge is introduced, and in the p-channel insulated gate field effect transistor, a positive fixed charge is introduced to further enhance the threshold voltage Vth. A solid-state imaging device that is shifted to the side.   The solid-state imaging device according to claim 1, wherein the gate insulating film is made of an oxide film. The gate insulating film is made of an oxide film, the oxide film is formed on a Si semiconductor substrate, and at the interface between the substrate and the oxide film,
A negative surface level is formed in an n-channel insulated gate field effect transistor, and a positive surface level is formed in a p-channel insulated gate field effect transistor. The solid-state imaging device according to claim 1. The gate insulating film is made of an oxide film, and at the interface between the oxide film and the gate electrode,
The n-channel insulated gate field effect transistor is introduced with negative charges, and the p-channel insulated gate field effect transistor is introduced with positive charges. The solid-state imaging device according to 1. The gate part is
MONS (Metal-Oxide-Nitride-Semiconductor) structure, MNOS (Metal-Nitride-Oxide-Semiconductor) structure, or MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor structure) The solid-state imaging device according to claim 1, wherein the charge is introduced into an interface between the substrate and a nitride film.   The thickness of the gate insulating film of the insulated gate field effect transistor that constitutes the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state image sensor is set to the thickness of the gate insulating film of the other insulated gate field effect transistor. A solid-state imaging device characterized by being larger than the thickness. The well potential of the insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state imaging device is compared with the well potential of other insulated gate field effect transistors,
A solid-state imaging device having a low negative potential for an n-channel insulated gate field effect transistor and a high positive potential for a p-channel insulated gate field effect transistor.   The gate electrode of an n-channel insulated gate field effect transistor that constitutes a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state imaging device has a work function that is higher than the gate electrode of other insulated gate field effect transistors. A solid-state imaging device comprising a large electrode material. 9. The solid-state imaging device according to claim 8, wherein the electrode material having a large work function is p ⁺ type polysilicon, Pt, or Au. A method of manufacturing a solid-state imaging device,
An insulated gate field effect transistor that constitutes a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state imaging device,
In the gate insulating film of the gate part,
The n-channel insulated gate field effect transistor has a step of introducing a negative fixed charge,
The p-channel insulated gate field effect transistor has a step of introducing a positive fixed charge,
A method of manufacturing a solid-state imaging device, wherein a level shift transistor having a threshold voltage Vth shifted to an enhancement side by introducing the charge is obtained.   11. The method of manufacturing a solid-state imaging device according to claim 10, wherein the step of introducing the negative fixed charge and the positive fixed charge is performed by electric charge injection.   11. The method of manufacturing a solid-state imaging device according to claim 10, wherein the step of introducing the negative fixed charge and the positive fixed charge is performed by generating acceptor ions or donor ions by introducing impurities.   The method of manufacturing a solid-state imaging device according to claim 10, wherein the step of introducing the negative fixed charge and the positive fixed charge is performed by plasma or radiation irradiation.   The method of manufacturing a solid-state imaging device according to claim 10, wherein the gate insulating film is made of an oxide film. The gate insulating film is composed of an oxide film, the oxide film is formed on a Si semiconductor substrate, and at the interface between the substrate and the oxide film,
An n channel type insulated gate field effect transistor forms a negative surface level, and a p channel type insulated gate field effect transistor forms a positive surface level. The manufacturing method of the solid-state image sensor of Claim 10. The gate insulating film is composed of an oxide film, and at the interface between the oxide film and the gate electrode,
11. The n channel type insulated gate field effect transistor introduces a negative charge, and the p channel type insulated gate field effect transistor introduces a positive charge. The manufacturing method of the solid-state image sensor of description. The gate part
MONS (Metal-Oxide-Nitride-Semiconductor) structure, MNOS (Metal-Nitride-Oxide-Semiconductor) structure, or MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor structure) The method of manufacturing a solid-state imaging device according to claim 10, wherein the charge is introduced into an interface with the nitride film (Nitride). A method of manufacturing a solid-state imaging device,
The gate electrode of the n-channel type insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the solid-state imaging device is made to work more than the gate electrode of the other insulated gate type field effect transistor. A method for manufacturing a solid-state imaging device, characterized by comprising an electrode material having a large thickness. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
An electrical device module comprising an output unit that outputs an imaging signal corresponding to the signal charge,
An insulated gate field effect transistor that constitutes a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit,
In the gate insulating film of the gate part,
In the n-channel insulated gate field effect transistor, a negative fixed charge is introduced, and in the p-channel insulated gate field effect transistor, a positive fixed charge is introduced to further enhance the threshold voltage Vth. An electric equipment module characterized by having a structure shifted to the side.   The electric device module according to claim 19, wherein the gate insulating film is made of an oxide film. The gate insulating film is made of an oxide film, the oxide film is formed on a Si semiconductor substrate, and at the interface between the substrate and the oxide film,
A negative surface level is formed in an n-channel insulated gate field effect transistor, and a positive surface level is formed in a p-channel insulated gate field effect transistor. The electrical equipment module according to claim 19. The gate insulating film is made of an oxide film, and at the interface between the oxide film and the gate electrode,
The n-channel insulated gate field effect transistor is introduced with negative charges, and the p-channel insulated gate field effect transistor is introduced with positive charges. 19. The electric equipment module according to 19. The gate part is
MONS (Metal-Oxide-Nitride-Semiconductor) structure, MNOS (Metal-Nitride-Oxide-Semiconductor) structure, or MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor structure) The electric device module according to claim 19, wherein the electric charge is introduced into an interface between the gate electrode and the nitride film. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
An electrical equipment module having an output unit that outputs an imaging signal corresponding to the signal charge,
The thickness of the gate insulating film of the insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output section is set to the thickness of the gate insulating film of the other insulated gate field effect transistor. An electrical equipment module characterized by being larger than its thickness. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
An electrical equipment module having an output unit that outputs an imaging signal corresponding to the signal charge,
The well potential of the insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit is compared with the well potential of other insulated gate field effect transistors,
An electric equipment module characterized in that an n-channel insulated gate field effect transistor has a low negative potential, and a p-channel insulated gate field effect transistor has a high positive potential. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
An electrical equipment module having an output unit that outputs an imaging signal corresponding to the signal charge,
The gate electrode of an n-channel insulated gate field effect transistor that constitutes a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output section has a work function greater than that of the gate electrode of another insulated gate field effect transistor. An electrical equipment module comprising a large electrode material. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
A solid-state imaging device having an output unit that outputs an imaging signal corresponding to the signal charge;
An electrical apparatus having a solid-state imaging device having a control system of the solid-state imaging device and a display system based on an imaging signal from the solid-state imaging device,
An insulated gate field effect transistor that constitutes a level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit,
In the gate insulating film of the gate part,
In the n-channel insulated gate field effect transistor, a negative fixed charge is introduced, and in the p-channel insulated gate field effect transistor, a positive fixed charge is introduced to further enhance the threshold voltage Vth. An electric apparatus having a solid-state imaging device, characterized by having a configuration that shifts to a side.   28. The electrical apparatus having a solid-state imaging device according to claim 27, wherein the gate insulating film is made of an oxide film. The gate insulating film is made of an oxide film, the oxide film is formed on a Si semiconductor substrate, and at the interface between the substrate and the oxide film,
A negative surface level is formed in an n-channel insulated gate field effect transistor, and a positive surface level is formed in a p-channel insulated gate field effect transistor. An electrical apparatus having the solid-state imaging device according to claim 27. The gate insulating film is made of an oxide film, and at the interface between the oxide film and the gate electrode,
The n-channel insulated gate field effect transistor is introduced with negative charges, and the p-channel insulated gate field effect transistor is introduced with positive charges. 27. An electric device having the solid-state imaging device according to 27 The gate part is
MONS (Metal-Oxide-Nitride-Semiconductor) structure, MNOS (Metal-Nitride-Oxide-Semiconductor) structure, or MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor structure) 28. The electric device having a solid-state imaging device according to claim 27, wherein the electric charge is introduced into an interface between the substrate and a nitride film. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
A solid-state imaging device having an output unit that outputs an imaging signal corresponding to the signal charge;
An electrical apparatus having a solid-state imaging device having a control system of the solid-state imaging device and a display system based on an imaging signal from the solid-state imaging device,
The thickness of the gate insulating film of the insulated gate field effect transistor constituting the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output section is set to the thickness of the gate insulating film of the other insulated gate field effect transistor. An electric apparatus having a solid-state image sensor characterized by being larger than a thickness. An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
A solid-state imaging device having an output unit that outputs an imaging signal corresponding to the signal charge;
An electrical apparatus having a solid-state imaging device having a control system of the solid-state imaging device and a display system based on an imaging signal from the solid-state imaging device,
The well potential of the insulated gate field effect transistor that constitutes the level shift transistor that shifts the output DC voltage value of the output buffer amplifier of the output unit is n channel compared to the well potential of the other insulated gate field effect transistors. An electric apparatus having a solid-state imaging device characterized in that a low-potential is applied to a p-channel insulated gate field effect transistor and a high positive potential is applied to a p-channel insulated gate field effect transistor. . An imaging lens that captures an optical image of the subject;
An imaging area based on an array of sensor units with a plurality of photoelectric conversion elements on which an optical image of the subject captured by the imaging lens is formed, and a vertical transfer unit and a horizontal transfer unit that transfer signal charges obtained by the sensor unit When,
A solid-state imaging device having an output unit that outputs an imaging signal corresponding to the signal charge;
An electrical apparatus having a solid-state imaging device having a control system of the solid-state imaging device and a display system based on an imaging signal from the solid-state imaging device,
The gate electrode of the n-channel insulated gate field effect transistor constituting the insulated gate field effect transistor constituting the level shift transistor for shifting the output DC voltage value of the output buffer amplifier of the output section is another insulated gate type. An electric apparatus having a solid-state imaging device, comprising an electrode material having a work function larger than that of a gate electrode of a field effect transistor.

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