JP2004507163A - スイッチ・ファブリック・チップセット・システムを介した送信用にパケットを準備するためのシステム、方法および製造品 - Google Patents

スイッチ・ファブリック・チップセット・システムを介した送信用にパケットを準備するためのシステム、方法および製造品 Download PDF

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Publication number
JP2004507163A
JP2004507163A JP2002520493A JP2002520493A JP2004507163A JP 2004507163 A JP2004507163 A JP 2004507163A JP 2002520493 A JP2002520493 A JP 2002520493A JP 2002520493 A JP2002520493 A JP 2002520493A JP 2004507163 A JP2004507163 A JP 2004507163A
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JP
Japan
Prior art keywords
packet
switch fabric
port
memory
switch
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Pending
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JP2002520493A
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English (en)
Japanese (ja)
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JP2004507163A5 (cg-RX-API-DMAC7.html
Inventor
チャン,ユー−スン
カン,ムー−キュン
Original Assignee
パイオン・カンパニー・リミテッド
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Publication date
Application filed by パイオン・カンパニー・リミテッド filed Critical パイオン・カンパニー・リミテッド
Publication of JP2004507163A publication Critical patent/JP2004507163A/ja
Publication of JP2004507163A5 publication Critical patent/JP2004507163A5/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/24Traffic characterised by specific attributes, e.g. priority or QoS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/33Flow control; Congestion control using forward notification
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • H04L49/901Buffering arrangements using storage descriptor, e.g. read or write pointers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • H04L49/9042Separate storage for different parts of the packet, e.g. header and payload
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/101Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • H04L49/3018Input queuing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/35Switches specially adapted for specific applications
    • H04L49/351Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H04L49/352Gigabit ethernet switching [GBPS]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22Parsing or analysis of headers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
JP2002520493A 2000-08-11 2001-08-09 スイッチ・ファブリック・チップセット・システムを介した送信用にパケットを準備するためのシステム、方法および製造品 Pending JP2004507163A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US22503400P 2000-08-11 2000-08-11
US66918400A 2000-09-25 2000-09-25
PCT/US2001/025075 WO2002015495A1 (en) 2000-08-11 2001-08-09 System, method and article of manufacture for preparing a packet for transmission through a switch fabric chipset system

Publications (2)

Publication Number Publication Date
JP2004507163A true JP2004507163A (ja) 2004-03-04
JP2004507163A5 JP2004507163A5 (cg-RX-API-DMAC7.html) 2005-01-06

Family

ID=26919239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002520493A Pending JP2004507163A (ja) 2000-08-11 2001-08-09 スイッチ・ファブリック・チップセット・システムを介した送信用にパケットを準備するためのシステム、方法および製造品

Country Status (4)

Country Link
EP (1) EP1236317A1 (cg-RX-API-DMAC7.html)
JP (1) JP2004507163A (cg-RX-API-DMAC7.html)
AU (1) AU2001284798A1 (cg-RX-API-DMAC7.html)
WO (1) WO2002015495A1 (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7460531B2 (en) * 2003-10-27 2008-12-02 Intel Corporation Method, system, and program for constructing a packet

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2236188C (en) * 1998-04-28 2002-10-01 Thomas Alexander Firmware controlled transmit datapath for high-speed packet switches

Also Published As

Publication number Publication date
WO2002015495A1 (en) 2002-02-21
EP1236317A1 (en) 2002-09-04
AU2001284798A1 (en) 2002-02-25

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