JP2004319567A - Process for fabricating semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process for fabricating a semiconductor device capable of forming a stabilized Co silicide while preventing leak and suppressing a variation in resistance, and to provide a semiconductor device. <P>SOLUTION: In the process for fabricating a semiconductor device by arranging an insulating film spacer at a gate insulating film on a substrate, a gate side part consisting of a polysilicon layer and performing self-aligned silicification on the gate and source/drain regions, a metal film being silicificated is controlled in the direction for lowering the sputtering temperature, reducing the sputtering pressure and increasing the power of a cathode electrode fixed with a target and sputtering is performed to increase kinetic energy of metal molecules (step S3). A cap metal film is sputtered and heat treated at a specified temperature (step S4). The fabrication process further comprises a primary heat treatment step for forming a silicide layer, and a secondary heat treatment step for removing the cap metal film and a nonreaction part of the metal film to provide a low resistance silicide layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having a step of forming a finer semiconductor element, particularly a silicide film, and a semiconductor device.
[0002]
[Prior art]
2. Description of the Related Art In a semiconductor integrated circuit that requires miniaturization and high speed, a salicide process of a MOSFET (MOS field effect transistor) is generally used. In the salicide process, the source / drain diffusion layers of the MOSFET and the upper portion of the polysilicon gate electrode are silicided in a self-aligning manner. The parasitic resistance of the element is reduced, and it is possible to cope with miniaturization and high-speed operation.
[0003]
The salicide process is realized as follows. As a MOSFET, a gate electrode is first formed of polysilicon. On both sides of the polysilicon gate electrode, an LDD (Lightly Doped Drain) structure, that is, spacers (sidewalls) for disposing low-concentration extension regions of source / drain are provided. The spacer serves as an isolation region when silicidation is performed, and it is possible to form a high-melting metal thin film → silicide → low-resistance silicide layer in a self-aligning manner on the gate electrode and on the source / drain Si substrate. Such a salicide process is a well-known technique as a MOSFET for reducing resistance and improving performance.
[0004]
It is known that Co is used as a refractory metal used in the salicide process. In addition to Co, Ti, Ni, and the like are known as metals having a reputation for the salicide process. It has been found that Co is superior in heat resistance to Ni and less affected by the fine wire effect during processing than Ti.
[0005]
Next, a method of utilizing Co as a salicide process in a MOSFET will be described. First, the native oxide film formed on the polysilicon surface of the gate electrode and the silicon substrate surface of the source / drain in the MOSFET is removed. This is achieved by hydrofluoric acid-based wet etching → cleaning with pure water. Subsequently, Co is sputter-deposited in a sputtering apparatus in an atmosphere of about 150 ° C., and TiN is successively deposited as a cap metal film for preventing oxidation. Thereafter, CoSi conversion (including Co ₂ Si) is performed through a first rapid thermal annealing step (for example, at 500 ° C. for about 30 seconds). This is because Co ₂ Si (dicobalt monosilicide) generated at the time of sputtering changes phase mainly to CoSi (cobalt monosilicide) after annealing. Next, after removing unreacted TiN and Co, a second rapid thermal annealing step (for example, 850 ° C., about 30 seconds) is performed to form a CoSi ₂ (cobalt disilicide) film to form a low-resistance silicide layer.
[0006]
[Problems to be solved by the invention]
The above conventional conditions, you should be sure to remove the natural oxide film is a pre-treatment of the sputtering process, can not be uniform Co 2 _Si reduction during the primary rapid thermal annealing process. In such a case, variation in CoSi conversion or CoSi ₂ conversion after annealing occurs, and a Co silicide layer with little leakage and resistance variation cannot be formed stably. If an attempt is made to take a long wet etching time to ensure the removal of the natural oxide film, the element isolation film (STI: Shallow Trench Isolation) is also etched, which affects the element to be formed, so that the wet etching time is sufficiently long. Can not.
[0007]
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a method of manufacturing a semiconductor device and a semiconductor device capable of forming a stable Co silicide with less resistance variation while preventing leakage.
[0008]
[Means for Solving the Problems]
According to a method of manufacturing a semiconductor device according to the present invention, a gate insulating film on a substrate, an insulating film spacer is disposed on a side of a gate formed of a polysilicon layer, and a silicide is formed on the gate and source / drain regions in a self-aligned manner. The method of manufacturing, wherein the metal film to be silicided, in the direction of lowering the sputtering temperature, and in the direction of reducing the sputtering pressure, further controlling the direction of increasing the power of the cathode electrode with the target, metal A first sputtering step of forming a sputter by increasing the kinetic energy of molecules, a second sputtering step of forming a cap metal film on at least the metal film by a heat treatment at a predetermined temperature, and covering the cap metal film. A first heat treatment step of forming a silicide layer by performing a heat treatment in a state in which the cap metal film and the unreacted Removing a portion of the serial metal film, characterized by comprising a second heat-treatment step of said silicide layer to further reduce the resistance of the silicide layer.
[0009]
According to the method for manufacturing a semiconductor device according to the present invention, in the first sputtering step, by setting the sputtering temperature to a lower direction, partial silicidation is suppressed, and a uniform metal film can be formed. . On the other hand, it is easily affected by a natural oxide film due to low-temperature sputtering. Therefore, by controlling the direction in which the sputtering pressure is reduced and the direction in which the power of the cathode electrode with the target is increased, the molecular kinetic energy of the sputtered metal is increased, and the sputtering which is not easily affected by the natural oxide film is performed. Realize. Further, the second sputtering step also serves as a heat treatment at a predetermined temperature, and contributes to stable silicidation of the metal film.
[0010]
In a method of manufacturing a semiconductor device according to a more preferred embodiment of the present invention, a gate insulating film on a substrate, an insulating film spacer is arranged on a side of a gate made of a polysilicon layer, and a self-alignment is formed on the gate and source / drain regions. A method of manufacturing a semiconductor device which is to be silicidized, wherein a Co film for silicidation is formed on the entire surface of the substrate at a predetermined sputtering temperature not exceeding 200 ° C., a predetermined sputtering pressure not exceeding 14 mPa, and a Co target. A first sputtering step of controlling the power of the attached cathode electrode at a predetermined power not lower than 10 W to increase the kinetic energy of Co molecules while forming a sputter, and at least a cap TiN film on the Co film at a predetermined temperature. A second sputtering step of forming a sputter also as a heat treatment, and a heat treatment in a state where the cap TiN film is covered. A first heat treatment step of forming a silicide layer, a step of removing the cap TiN film and the unreacted portion of the Co film, and a second heat treatment of making the silicide layer a lower resistance silicide layer. And a step.
[0011]
According to the method of manufacturing a semiconductor device according to the present invention, Co is suitable for fine processing and low resistance, and TiN has a high barrier property against oxidation. In the first sputtering step, by setting the sputtering temperature of the Co film to a predetermined sputtering temperature not exceeding 200 ° C., partial silicidation is suppressed, and a uniform Co film can be formed. On the other hand, it is easily affected by a natural oxide film due to low-temperature sputtering. Therefore, the sputtering pressure is reduced, preferably to a predetermined sputtering pressure not exceeding 14 mPa, and the power of the cathode electrode with the target is further increased so as not to drop below 10 W. In this way, the kinetic energy of the Co molecules is increased to achieve sputtering that is not easily affected by the natural oxide film. Further, in the second sputtering step, since the cap TiN film is formed also as a heat treatment at a predetermined temperature, it contributes to the stable silicidation of the Co film.
[0012]
A semiconductor device according to the present invention includes a MOS transistor element formed by using a method for manufacturing a semiconductor device. A semiconductor device having a stable silicide layer and having a highly reliable element with little resistance variation is realized.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a flowchart showing a main part of a method for manufacturing a semiconductor device according to one embodiment of the present invention. As the process S1, a MOSFET provided with a spacer (sidewall) having at least a low-concentration source / drain extension region on a semiconductor substrate is formed.
In the process S2, a wet etching process for removing a natural oxide film is performed. This is achieved by hydrofluoric acid-based wet etching → cleaning with pure water. In the wet etching, a time is selected that does not adversely affect the element isolation region such as STI locally.
Next, in process S3, a metal film for silicidation is formed using a sputtering apparatus. In this embodiment, the metal film to be silicided is controlled in the direction of lowering the sputtering temperature, in the direction of reducing the sputtering pressure, and in the direction of increasing the power of the cathode electrode provided with the target, so that the movement of the metal molecules is controlled. Sputtering is performed with increasing energy (first sputtering step).
Further, in process S4, a cap metal film for preventing oxidation is formed while maintaining a vacuum in the same sputtering apparatus (second sputtering step). At this time, at least a heat treatment at a predetermined temperature is performed on the metal film sputtered in the process S3. This stabilizes the silicide layer to some extent before the semiconductor substrate is carried out of the sputtering apparatus to the outside.
In the process S5, a first heat treatment process in a state where the cap metal film is covered is introduced. Thereby, a temporary silicide layer is formed.
In step S6, the cap metal film and the unreacted metal film are removed by using a wet etching technique.
In process S7, a second heat treatment process is performed. This makes the silicide layer a low-resistance and stable silicide layer.
[0014]
According to the method of the above embodiment, in the first sputtering step of the process S3, by making the sputtering temperature lower, partial silicidation is suppressed, and a uniform metal film can be formed. On the other hand, it is easily affected by a natural oxide film due to low-temperature sputtering. Therefore, by controlling the direction in which the sputtering pressure is reduced and the direction in which the power of the cathode electrode with the target is increased, the molecular kinetic energy of the sputtered metal is increased, and the sputter that is not easily affected by the natural oxide film is formed. Realize. Further, the second sputtering process of the process S4 also serves as a heat treatment at a predetermined temperature, and contributes to stable silicidation of the metal film. Thereafter, through processes S5 to S7, a metal silicide with less leakage and less resistance variation is stably formed.
[0015]
2 to 5 are cross-sectional views each showing a main part of a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.
As shown in FIG. 2, a gate oxide film 12 and a polysilicon layer are sequentially formed on a channel region in an element region of a Si substrate 11 having a predetermined impurity concentration, and a gate electrode 13 is patterned. Thereafter, the gate electrode 13 is post-oxidized (thermally oxidized), and using the region of the gate electrode 13 as a mask, a low concentration source / drain region 14 for an LDD (Lightly Doped Drain) structure, an extension region, is formed by impurity ion implantation. I do.
[0016]
Next, an insulating film, for example, a silicon oxide film is deposited so as to cover the gate electrode 13 by the CVD method, and anisotropic dry etching is performed to form a spacer 15 of the silicon oxide film. Next, using the region of the gate electrode 13 and the spacer 15 as a mask, a high concentration region 16 of source / drain is formed by impurity ion implantation. Thereafter, hydrofluoric acid-based wet etching → pure water cleaning is performed to remove the natural oxide film. In the wet etching, a time is selected that does not adversely affect the element isolation region such as STI locally.
[0017]
Next, as shown in FIG. 3, a metal film 18 contributing to silicidation is deposited on the entire surface so as to cover the upper portion of the gate electrode 13 and the high concentration region 16 of the source / drain. The metal film 18 is, for example, Co, and is deposited using a sputtering method (first sputtering step). That is, it is achieved by supplying an Ar (argon) gas in a vacuum chamber using Co as a target electrode to generate plasma, thereby exhibiting a Co sputtering phenomenon. At this time, the Co sputtering temperature is set to 200 ° C. or lower, for example, 150 ° C., the sputtering pressure is controlled to be in the range of 6 to 14 mPa, and the power of the cathode electrode provided with the Co target is set as high as about 10 W. The thickness of the metal film (Co) 18 greatly affects the thickness of a silicide layer to be formed later in the high-concentration source / drain regions 16. Therefore, it is important to control the thickness so as not to cause a junction leak such as spiking.
[0018]
Further, an oxidation-resistant cap metal film 19 is coated on the metal film (Co) 18 continuously. The cap metal film 19 is, for example, TiN and is deposited using a sputtering method (second sputtering step). While maintaining a vacuum in the same sputtering apparatus as when the metal film (Co) 18 was formed, the chamber is moved to a chamber using Ti as a target electrode. This is achieved by supplying a N ₂ (nitrogen) gas to generate plasma, thereby exhibiting a Ti sputtering phenomenon. The cap metal film (TiN) 19 prevents the Co surface from being oxidized until the process shifts to a thermal process for forming a silicide layer later.
[0019]
Note that the sputtering temperature of the cap metal film (TiN) 19 is desirably 300 ° C. to 400 ° C. Thereby, the silicide layer (Co ₂ Si) is also stabilized to some extent before carrying out the substrate 11 from the sputtering device to the outside, also serving as a heat treatment at a predetermined temperature on the metal film (Co) 18.
[0020]
Next, as shown in FIG. 4, a heat treatment for promoting silicidation of the above structure, that is, a so-called first rapid thermal annealing step is performed. This is a heat treatment (lamp anneal) for about 30 seconds at an annealing temperature (for example, about 500 ° C.) selected from 400 to 600 ° C. Thereby, the silicide layer 20 is formed at least on the gate electrode 13 and the source / drain region 16.
[0021]
Next, as shown in FIG. 5, unreacted metal, that is, unnecessary films of the metal film (TiN) 19 and the metal film (Co) 18 are removed. The silicide layer 20 is formed of a high-resistance CoSi film (including a Co ₂ Si film). The step of removing the unnecessary film is wet etching, and the substrate 11 is immersed in a solution containing ammonia + hydrogen peroxide solution (SC-1 in RCA cleaning) for a predetermined time. Thereafter, after cleaning and drying, the wafer is immersed in a solution containing, for example, hydrochloric acid + hydrogen peroxide solution (SC-2 in RCA cleaning) for a predetermined time. Thereafter, the substrate 11 is washed and dried.
[0022]
Thereafter, annealing is performed again (the second rapid thermal annealing step is performed). This is a heat treatment (lamp annealing) for about 30 seconds at an annealing temperature (for example, about 850 ° C.) selected from 800 to 900 ° C. Thus, the silicide layer 20 is changed to a stable low-resistance silicide layer (CoSi ₂ film) 21.
[0023]
According to the method of the above embodiment, Co is suitable for fine processing and low resistance, and TiN is rich in barrier properties against oxidation. In the first sputtering step, by setting the sputtering temperature of the Co film 18 to a predetermined sputtering temperature not exceeding 200 ° C., partial silicidation is suppressed, and a uniform Co film 18 can be formed. On the other hand, it is easily affected by a natural oxide film due to low-temperature sputtering. Therefore, the sputtering pressure is reduced, preferably to a predetermined sputtering pressure not exceeding 14 mPa, and the power of the cathode electrode with the target is further increased so as not to drop below 10 W. In this way, the kinetic energy of the Co molecules is increased to achieve sputtering that is not easily affected by the natural oxide film. Further, in the second sputtering step, the cap TiN film is formed also as a heat treatment at a predetermined temperature, so that the Co film 18 contributes to stable silicidation.
[0024]
As described above, according to the present invention, the problem can be solved without excessively performing wet etching in order to ensure removal of the natural oxide film. That is, the sputtering temperature is lowered to suppress partial silicidation and uniform film formation. Also, by reducing the sputtering pressure and increasing the power of the cathode electrode with the target to increase the molecular kinetic energy of the sputtered metal, a sputter forming process that is not greatly affected by the natural oxide film. Can be achieved. By having the MOS transistor element formed by using such a manufacturing method, a semiconductor device having a highly reliable element with a stable silicide layer and little resistance variation can be realized. As a result, it is possible to provide a method of manufacturing a semiconductor device and a semiconductor device capable of forming a stable Co silicide with less resistance variation while preventing leakage.
[Brief description of the drawings]
FIG. 1 is a flowchart showing a main part of a method for manufacturing a semiconductor device according to one embodiment.
FIG. 2 is a first cross-sectional view showing a method for manufacturing a semiconductor device in an embodiment in the order of steps;
FIG. 3 is a second sectional view following FIG. 2;
FIG. 4 is a third sectional view following FIG. 3;
FIG. 5 is a fourth sectional view following FIG. 4;
[Explanation of symbols]
S1 to S7: processing steps, 11: Si substrate, 12: gate oxide film, 13: gate electrode, 14: source / drain region (low concentration region) 15: spacer (sidewall) 16: source / drain region (high concentration) Region), 18: metal film (Co), 19: cap metal film (TiN), 20, 21: silicide layer.

Claims (3)

A method of manufacturing a semiconductor device in which an insulating film spacer is disposed on a side of a gate made of a polysilicon layer and a gate insulating film on a substrate, and the gate and source / drain regions are silicided in a self-aligning manner.
Regarding the metal film to be silicided, the kinetic energy of the metal molecules is increased by controlling the direction in which the sputtering temperature is reduced, the direction in which the sputtering pressure is reduced, and the direction in which the power of the cathode electrode with the target is increased. A first sputtering step of forming a sputter by
A second sputtering step of forming a cap metal film by sputtering at least on the metal film while also performing heat treatment at a predetermined temperature;
A first heat treatment step of forming a silicide layer by heat treatment in a state where the cap metal film is covered;
Removing the cap metal film and unreacted portions of the metal film;
A second heat treatment step of using the silicide layer as a silicide layer having a lower resistance. A method of manufacturing a semiconductor device in which an insulating film spacer is disposed on a side of a gate made of a polysilicon layer and a gate insulating film on a substrate, and the gate and source / drain regions are silicided in a self-aligning manner.
A predetermined sputtering temperature not exceeding 200 ° C., a predetermined sputtering pressure not exceeding 14 mPa, and a power of a cathode electrode provided with a Co target not lower than 10 W with a Co film for silicidation over the entire surface of the substrate. A first sputtering step of forming by sputtering while controlling with electric power so as to increase the kinetic energy of Co molecules;
A second sputtering step of forming a cap TiN film by sputtering at least on the Co film while also performing heat treatment at a predetermined temperature;
A first heat treatment step of forming a silicide layer by heat treatment with the cap TiN film covered;
Removing the cap TiN film and the unreacted portion of the Co film;
A second heat treatment step of using the silicide layer as a silicide layer having a lower resistance. 3. A semiconductor device having a MOS transistor element formed by using the method of manufacturing a semiconductor device according to claim 1.

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