JP2004311761A - Method for forming external electrode of chip electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that the production efficiency is low and the process is intricate because a work for holding electronic components individually is required when an external electrode is formed on a chip electronic component. <P>SOLUTION: After the second major surface of a semiconductor wafer is bonded through adhesive, each individual electronic component is diced and the first major surface is coated with conductive paste to form an external electrode. On the other hand, the first major surface of the semiconductor wafer is bonded through adhesive and the second major surface is coated with conductive paste. According to the method, a large number of external electrodes of a chip electronic component can be formed at once. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for forming an external electrode of a semiconductor component.
[0002]
[Prior art]
As a conventional method for forming an external electrode of a semiconductor component, an end of a chip component is inserted into a holding hole of a carrier plate to hold the chip component in a protruding state, and the protrusion height of the chip component held by the carrier plate is reduced. In some cases, a conductive paste is collectively attached to the protruding ends of the chip components held on the carrier plate (for example, see Patent Document 1).
[0003]
FIG. 2A is a cross-sectional view of an apparatus showing a method for forming external electrodes of a semiconductor component using the conventional technique described in Patent Document 1, and FIG. 2B is a perspective view of a portion A in FIG. FIG. As shown in FIGS. 2A and 2B, 101 is a chip component, 102 is an elastic plate having a large number of holding holes capable of holding the chip component in a protruding state, and 103 supports the periphery of the elastic plate. A support frame 104 is a conductive paste, and 105 is a spacer for applying a conductive paste having a predetermined thickness to the end of the chip.
[0004]
The detailed configuration will be described below. After inserting the end of the chip component 101 into each holding hole of the carrier plate composed of the elastic plate 102 and the support frame 103 supporting the periphery thereof, and holding the chip component 101 in a protruding state, the carrier plate and the conductive plate are electrically connected. When the protruding end of each chip component 101 is brought into contact with the conductive paste 104 by approaching the dip surface on which the conductive paste 104 is applied, the frame surface on the chip insertion side of the carrier plate is dipped through the spacer 105 having a predetermined thickness. It is configured to be pressed against a surface.
[0005]
[Patent Document 1]
JP 08-46344 A
[Problems to be solved by the invention]
However, in the above configuration, the chip components 101 must be individually inserted into the elastic plate 102, and the production efficiency is low. Further, if the amount of pressing into the elastic plate 102 varies, the application thickness of the conductive paste 104 varies, and it is difficult to perform stable application. Further, in this structure, when the conductive paste 104 is applied to both ends of the chip component 101, after applying the conductive paste 104 to one side and then to the opposite side, once the chip component 101 is entirely removed from the elastic plate 102, It is confirmed whether or not the conductive paste 104 is applied to the chip component 101. Then, the chip component 101 is again held on the elastic plate 102 so that the end where the conductive paste 104 is not applied is projected, and There is a problem that the pressing is performed and the process becomes very complicated.
[0007]
An object of the present invention is to solve the above-described problem, and to apply a conductive paste 104 to both ends of a chip component 101 without complicating the process.
[0008]
[Means for Solving the Problems]
In order to solve the above-mentioned conventional problems, a method for forming an external electrode of a semiconductor component according to the present invention comprises forming a bump on a first main surface and fixing a semiconductor wafer having a metal layer formed on a second main surface to an adhesive. A second main surface fixing step, a first dicing step of dicing the individual electronic components while leaving the metal layer of the semiconductor wafer, and a resin filling step of filling a sealing resin around the electronic component A second dicing step of dicing individual electronic components according to the external dimensions of the electronic components while leaving the metal layer of the semiconductor wafer, and a conductive dicing process of applying a conductive paste to the first main surface of the electronic components. A paste application step, a first main surface fixing step of fixing the first main surface with an adhesive, an adhesive peeling step of peeling the adhesive formed on the second main surface, and a metal layer formed on the second main surface Dicing into individual electronic components A third dicing step, a conductive paste application step of applying a conductive paste to the second main surface of the electronic component, and an adhesive peeling step of peeling the adhesive formed on the first main surface. The conductive paste is applied by a dipping method, and the adhesive is an ultraviolet release tape.
[0009]
According to this, it is possible to form external electrodes on chip components for one wafer at a time without arranging the chip components one by one at the same time. Paste can be applied.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0011]
(Embodiment)
FIG. 1A shows a second main surface fixing step of fixing a semiconductor wafer having a metal layer formed on a second main surface with a bump while forming a bump on the first main surface, and FIG. This is a first dicing step of dicing the individual electronic components while the metal layer of the semiconductor wafer remains, and FIG. 1C is a resin filling step of filling a sealing resin around the electronic components. FIG. 1D is a second dicing step of dicing the individual electronic components according to the external dimensions of the electronic components while the metal layer of the semiconductor wafer remains, and FIG. FIG. 1 (f) is a first principal surface fixing step of fixing a first principal surface with an adhesive, and FIG. 1 (g) is a first principal surface fixing step of fixing a first principal surface with an adhesive. An adhesive peeling step of peeling the adhesive formed on the second main surface, and forming the second main surface FIG. 1 (h) is a third dicing step of dicing the separated metal layer into individual electronic components, and FIG. 1 (h) is a conductive paste application step of applying a conductive paste on the second main surface of the electronic component. Is an adhesive peeling step of peeling the adhesive formed on the first main surface.
[0012]
1 (a) to 1 (i), reference numeral 1 denotes a semiconductor wafer, 2 denotes a bump provided on a first main surface of the semiconductor wafer 1 and made of a metal such as Cu, for example, and 3 denotes a second main surface of the semiconductor wafer 1. The metal layers 4a and 4b formed of a metal such as Cu are provided as adhesives for fixing the semiconductor wafer 1 on the second main surface, for example, ultraviolet (hereinafter referred to as UV) release tapes, and 5 is a diode element, for example. Are formed in the semiconductor wafer 1, 6 is a sealing resin that fills the groove 6 to protect the electronic component 5, and 8 is a dip coating to form an external electrode, for example, silver. Is a conductive paste mainly containing.
[0013]
The second main surface of the semiconductor wafer 1 is fixed by the UV release tape 4a (FIG. 1A). At this time, a plurality of electronic components 5 are formed on the semiconductor wafer 1, the bumps 2 made of a metal such as Cu are formed on the first main surface, and the bumps 2 made of a metal such as Cu are formed on the second main surface. A metal layer 3 is formed.
[0014]
Dicing is performed for each electronic component 5 while leaving the metal layer 3 and the UV release tape 4a (FIG. 1B). At this time, a groove 6 of about 0.5 mm is formed in consideration of a conductive paste 8 made of a metal filler such as silver, which will be applied later, between the individual electronic components 5.
[0015]
The groove 6 covers the side surface of the chip component and is filled with a sealing resin 7 made of, for example, a thermosetting epoxy resin for protecting the element from moisture and external force (FIG. 1C). The sealing resin 7 used at this time may be a resin generally used as a sealing resin.
[0016]
Dicing is performed to the outer dimensions of the individual electronic components 5 while leaving the metal layer 3 and the UV release tape 4a (FIG. 1D). At this time, the side surfaces of the electronic component 5 are covered with the sealing resin 7 and are arranged on the metal layer 3 at regular intervals.
[0017]
A conductive paste 8 is applied to the first main surface of the electronic component 5 aligned on the metal layer 3 of the semiconductor wafer 1 by a dipping method and dried (FIG. 1E). At this time, the semiconductor wafer 1 is held by a jig (not shown) so that the metal layer 3 is on the upper side, and the jig (not shown) is moved up and down to dip-coat the conductive paste 8. are doing. According to this, the conductive paste 8 can be applied to the semiconductor wafer 1 at a time. Further, the surface of the conductive paste 8 is made uniform with a squeegee or the like so that the coating thickness of the conductive paste 8 in the semiconductor wafer 1 does not become uneven.
[0018]
The application thickness of the conductive paste 8 may be, for example, about 0.15 mm for a diode having an outer dimension of 0.6 mm × 0.3 mm × t0.3 mm.
[0019]
After the conductive paste 8 is applied, it is dried using a hot plate, a baking furnace, or the like.
[0020]
The first main surface of the semiconductor wafer 1 is fixed with a UV peeling tape 4b (FIG. 1F).
[0021]
After irradiating UV to remove the adhesive strength and remove the UV release tape 4a fixing the semiconductor wafer 1, the metal layer 3 is diced into individual electronic components 5 (FIG. 1 (g)).
[0022]
A conductive paste 8 is applied by a dipping method to the second main surface of the electronic component 5 aligned and fixed with the UV peeling tape 4b of the semiconductor wafer 1 and dried (FIG. 1 (h)). At this time, the semiconductor wafer 1 is held by a jig (not shown) so that the first main surface is on the upper side, and the jig (not shown) is moved up and down to dip the conductive paste 8. Coated. According to this, the conductive paste 8 can be applied to the semiconductor wafer 1 at a time. Further, the surface of the conductive paste 8 is made uniform with a squeegee or the like so that the coating thickness of the conductive paste 8 in the semiconductor wafer 1 does not become uneven. Further, similarly to the step shown in FIG. 1E, the conductive paste 8 is applied to the semiconductor wafer 1 at a time, and the conductive paste 8 is dried using a hot plate or a baking furnace.
[0023]
The individual electronic components 5 having the external electrodes formed by exposing the UV peeling tape 4b fixing the individual electronic components 5 by irradiating UV to lose the adhesive strength are configured (FIG. 1 (i)).
[0024]
In this embodiment, a diode has been described as an electronic component, but the present invention is not limited to this as long as it is an electronic component formed of a semiconductor wafer.
[0025]
As described above, the airtight terminal and the plating method of the airtight terminal according to the present invention have been described, but can be appropriately changed without departing from the spirit of the present invention.
[0026]
【The invention's effect】
As described above, according to the method for forming external electrodes of a chip-type electronic component of the present invention, it is possible to apply a conductive paste to a large number of chip components at the wafer level with high accuracy. In addition, a metal layer is provided on one side of the semiconductor wafer, only the semiconductor portion is diced and cut into chip components, a conductive paste is applied to one end, and the metal layer is diced later, and a conductive layer is applied to the other end. By applying the paste, the conductive paste can be applied to both ends of the chip component at the wafer level to form external electrodes.
[Brief description of the drawings]
FIG. 1 is a process diagram of a method for forming external electrodes in a chip-type semiconductor component according to the present invention; FIG. 2 (a) is a process diagram of a method for forming external electrodes in a conventional chip-type semiconductor component; A perspective view of part A
DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Bump 3 Metal layer 4a Adhesive 4b Adhesive 5 Electronic component 6 Groove 7 Sealing resin 8 Conductive paste 101 Chip component 102 Elastic plate 103 Support frame 104 Conductive paste 105 Spacer

Claims (3)

A second main surface fixing step of forming a bump on the first main surface and fixing the semiconductor wafer having a metal layer formed on the second main surface to an adhesive, and in a state where the metal layer of the semiconductor wafer is left. A first dicing step of dicing individual electronic parts, a resin filling step of filling a sealing resin around the electronic parts, and an outer shape of the electronic parts with the metal layer of the semiconductor wafer remaining. In accordance with the dimensions, a second dicing step of dicing into individual electronic components, a conductive paste applying step of applying a conductive paste to the first main surface of the electronic component, and bonding the first main surface with an adhesive A first main surface fixing step of fixing, an adhesive peeling step of peeling the adhesive formed on the second main surface, and a second step of dicing the metal layer formed on the second main surface into individual electronic components. Three dicing works And a conductive paste applying step of applying a conductive paste to the second main surface of the electronic component, and an adhesive peeling step of peeling the adhesive formed on the first main surface, Method for forming external electrodes of a chip-type electronic component. 2. The method according to claim 1, wherein the application of the conductive paste is a dipping method. The method for forming an external electrode according to claim 1, wherein the adhesive is an ultraviolet release tape.

Images