JP2004310861A - Information reproducing device and information reproducing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable lengthening equivalently a gap between digital information of which the sync-length are different, and to enable securing sufficiently a signal processing space between digital information of which the sync-length required when correction processing is performed are different. <P>SOLUTION: This device is provided with a helical reproducing head 55 reading digital information of first and second sync-length from a magnetic tape based on a signal of the prescribed clock frequency, a signal processing means 5 signal-processing digital information read successively by this helical reproducing head 55, a clock replacing unit 90 converting a clock frequency of the digital information signal-processed by this signal processing means 5 to a frequency of (n) times, and a correction processing means 8 error correction-processing successively digital information of the first and the second sync-length of the clock frequency converted to (n) times by this clock replacing unit 90. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an information reproducing apparatus and an information reproducing method suitable for application to home and business video recording and reproducing apparatuses for reproducing digital information from a tape recording medium.
[0002]
More specifically, when digital information is reproduced from an information recording medium having a recording format in which two types of information recording lengths exist, clocks of digital information of first and second information recording lengths sequentially read from the information recording medium. A signal converting means for converting the frequency to n times is provided so that the gap between the digital information of the first information recording length and the digital information of the second information recording length can be equivalently lengthened, and C1 A sufficient signal processing space between the digital information of the first information recording length and the digital information of the second information recording length necessary for performing error correction processing such as correction processing can be ensured. .
[0003]
[Prior art]
In recent years, video reproducing apparatuses for reproducing digital information such as video data and audio data from tape recording media for home use and business use are often used. A cassette around which a magnetic tape is wound is mounted on this type of video reproducing apparatus. The video data and audio data recorded on the magnetic tape are reproduced by eight reproducing magnetic heads (hereinafter referred to as reproducing heads). Video data and audio data are recorded on the magnetic tape in a predetermined recording format (hereinafter, referred to as a VTR format).
[0004]
FIG. 10 is a diagram showing an example of a VTR footprint in which a video sync (M) and an audio sync (N) are mixed according to a conventional example. FIGS. 11A and 11B are diagrams illustrating a configuration example of one sync block of an ECC block related to a product code of video data, audio data, and the like.
[0005]
The conventional VTR footprint (ECC configuration and data recording format) shown in FIG. 10 is a format recorded by a helical recording head (not shown). In the 12 tracks of the footprint shown in FIG. 10, a video sync (sync: (M)) is arranged above the magnetic tape 80, and the video sink (M) has tables “0” to “35”. Up to 36 ECC blocks (coding unit data) are recorded.
[0006]
A video sync (M) is arranged below the magnetic tape 80 shown in FIG. 10, and the video sync (M) has 36 ECC blocks (codes “0” to “35”). Of the chemical unit) is recorded. The size of each of the upper and lower video syncs (M) is 12 tracks × 189 bytes. An audio sync (N) is arranged between the upper and lower video syncs (M), and audio data Da is recorded. The audio sink (N) is divided into eight sections, and the size of one section is 4 bytes × 12 tracks.
[0007]
Here, assuming that the recording head scans from the lower video sink (M) side to the upper video sink (M) side, audio data A1, A9, and A5 are arranged in the first section, and the audio data A1, A9, and A5 are arranged in the second section. Are audio data A2, A10 and A6, audio data A3, A11 and A7 are arranged in the third division, audio data A4, A12 and A8 are arranged in the fourth division, and audio data is arranged in the fifth division. Data A5, A1 and A9 are arranged, audio data A6, A2 and A10 are arranged in the sixth division, audio data A7, A3 and A11 are arranged in the seventh division, and audio data A8 is arranged in the eighth division. , A4, A12 are arranged respectively.
[0008]
Further, a gap Gav is arranged between the upper video sync (M) and the audio sync (N) in the eighth section. A gap Gaa is arranged between the audio sinks of each section. A servo pilot (servo control signal: CTL signal) is arranged between the audio sync (N) in the fourth section and the audio sink (N) in the fifth section. Gaps Gs1 and Gs2 are arranged between the servo pilot and the audio sync (N) of the fourth division and the audio sink (N) of the fifth division. A gap Gsa is arranged between the lower video sync (M) and the servo pilot, and a gap Gva is arranged between the audio sync (N) in the first section and the lower video sink (M). . This is to secure a signal processing space during reproduction.
[0009]
FIGS. 11A and 11B are diagrams showing a configuration example of one sync block of an ECC block relating to a product code of video data and audio data. For video data having a data array of 226 bytes × 114 bytes shown in FIG. 11A, data (data sequence) of each column is, for example, a (126, 114) Reed-Solomon code for an outer code operation data sequence indicated by an arrow b. It is encoded to generate a 12-byte C2 parity (outer code parity: OUTER).
[0010]
Further, with respect to the video data and the C2 parity, data (data sequence) of each row is encoded by, for example, a (242, 226) Reed-Solomon code for an inner code operation data sequence indicated by an arrow a shown in FIG. A byte C1 parity (inner parity: INNER) is generated. At the head of each data line, sync data and ID each having a size of 2 bytes are arranged.
[0011]
The first two bytes shown in FIG. 11A are sync data. The next two bytes are an ID. This ID includes a track ID for identifying which of the 12 tracks the one sync block is recorded on, and which of a plurality of sync blocks recorded on one inclined track is the same as the one sync block. The sync block ID to be identified is included. One segment is formed for every 12 tracks, and segment numbers “0 to 3” are sequentially and repeatedly assigned. The above-mentioned 2-byte ID includes the segment number of the segment in which the one sync block is recorded. The included segment ID is also included. This ID is followed by 226 bytes of video data (or C2 parity) and 16 bytes of C1 parity.
[0012]
FIG. 11B is a diagram illustrating a configuration example of a product code of the audio data Da. In the audio sink (N) of the VTR footprint shown in FIG. 10, 24 ECC blocks (data in units of coding) from table “0” to table “23” are recorded. One ECC block is configured as follows. That is, for audio data having a data array of 189 bytes × 8 bytes, data (data sequence) of each column is encoded by, for example, a (16,8) Reed-Solomon code for an outer code operation data sequence indicated by an arrow b. Then, an 8-byte C2 parity (outer code parity: OUTER) is generated.
[0013]
Further, with respect to the audio data and the C2 parity, the data (data sequence) of each row is encoded by, for example, a (205, 189) Reed-Solomon code for an inner code operation data sequence indicated by an arrow a shown in FIG. A byte C1 parity (inner parity: INNER) is generated. At the head of each data line, sync data and ID each having a size of 2 bytes are arranged.
[0014]
By the way, in the VTR format in which two types of sync lengths exist as described above, signal processing is performed between a video sync (M) and an audio sync (N) necessary for performing the C1 correction process, separately from the edit gap. It is necessary to make room for space. This principle is shown in FIG. 12A and 12B are timing charts showing an example of MN switching of the C1 corrector.
[0015]
Generally, the C1 correction processing requires a delay according to the sync length. This can be expressed by multiplying the sync length and the length of its C1 parity by a coefficient. Actually, this coefficient differs depending on the C1 correction circuit, but in the examples shown in FIGS. 12A and 12B, both the coefficient for the sync length and the parity are set to “2”.
[0016]
FIG. 12A shows a case where the gap Gva at a portion where the transition from the video sink (M) to the audio sink (N) is sufficiently long. The gap Gva is set between the video sync (M) and the audio sync (N). Here, the delay of the C1 correction process for the sync length M is P1, and the delay of the C1 correction process for the sync length N is P2.
[0017]
Although the delay P2 of the C1 correction process for the sync length N is shorter than that for the video sync (M), the video sync (M) and the audio sync (N) collide at the output of the C1 correction circuit because the gap Gva is sufficiently long. Never. That is, even if (M + P1) × 2 processing time is spent for the C1 correction processing related to the video sync (M), the gap Gva is set to be sufficiently long, so that the audio sync (N) follows the video sync (M). Is input to the C1 corrector, a C1 correction process for the audio sync (N) can be performed after an elapsed time of (M + P2) × 2.
[0018]
FIG. 12B shows a case where the gap Gva ′ at the transition from the video sync (M) to the audio sync (N) is shorter than Gva. The gap Gva 'is set between the video sync (M) and the audio sync (N). Since the delay P2 of the C1 correction processing for the sync length N is shorter than that for the video sync (M) and the gap Gva 'is not sufficient, the video sync (M) and the audio sync (N) are output from the C1 correction circuit. Is bumping.
[0019]
Patent Document 1 discloses a portable camera-integrated digital video tape recorder. According to this video tape recorder, the video signal captured by the video camera is band-limited by the band-limiting means, and then the signal subjected to band compression processing by the bit rate reduction encoder circuit is recorded on the tape recording medium. With this configuration, the size and weight of the video tape recorder can be reduced, and the power consumption can be reduced.
[0020]
[Patent Document 1]
JP-A-9-247709 (pages 2 to 4, FIG. 1)
[0021]
[Problems to be solved by the invention]
By the way, according to the conventional VTR footprint, there are the following problems.
{Circle around (1)} Servo pilots are arranged in the middle of the recording tracks of the magnetic tape 80 shown in FIG. 10, audio syncs (N) are evenly arranged before and after this, and video syncs (M) are evenly arranged before and after this. Are located. Therefore, this becomes a factor of shortening the wavelength for the limited effective track length of the magnetic tape 80.
[0022]
{Circle around (2)} In addition, the portion that shifts from the video sync (M) to the audio sync (N) shown in FIG. 12B, that is, the C1 correction process related to the video sync (M) is performed by spending (M + P1) × 2 processing time. However, since the gap Gva ′ is not set long enough, the audio sync (N) is input to the C1 corrector after the video sync (M), and the audio is output after an elapsed time of (M + P2) × 2. The C1 correction process for the sync (N) is performed, and the data after the video sync (M) is destroyed because it is overtaken by the audio sync (N).
[0023]
{Circle around (3)} According to Patent Literature 1, after a video signal captured by a video camera is band-limited, a signal subjected to band compression processing by a bit rate reduction encoder circuit is recorded on a tape recording medium. However, in a case where digital information is to be reproduced from a magnetic tape having a VTR format having two types of sync lengths, and the function of a portable camera-integrated digital video tape recorder disclosed in Patent Document 1 is applied as it is. In addition, problems similar to those in (1) and (2) occur.
[0024]
In view of the above, the present invention has solved such a conventional problem, and enables the gap between digital information having different information recording lengths to be equivalently increased, and the information necessary for performing error correction processing. An object of the present invention is to provide an information reproducing apparatus and an information reproducing method capable of sufficiently securing a signal processing space between digital information having different recording lengths.
[0025]
[Means for Solving the Problems]
The above-described problem is an apparatus for reproducing digital information from an information recording medium having a recording format in which two types of information recording lengths exist, and the first and second information recording media are reproduced based on a signal of a predetermined clock frequency. 2, information reading means for sequentially reading digital information having an information recording length of 2, information processing means for performing signal processing on the digital information sequentially read by the information reading means, and a clock frequency of the digital information signal-processed by the signal processing means. And a correction processing means for sequentially performing error correction processing on digital information of the first and second information recording lengths of the clock frequency converted to n times by the signal conversion means. This is solved by an information reproducing apparatus characterized by the following.
[0026]
According to the information reproducing apparatus of the present invention, when digital information is reproduced from an information recording medium having a recording format in which two types of information recording lengths exist, the information reading means uses a predetermined clock frequency signal. Digital information of the first and second information recording lengths is sequentially read from the information recording medium. In the signal processing unit, the digital information sequentially read by the information reading unit is subjected to signal processing such as decoding and detection of a synchronization signal. On the premise of this, the signal conversion means converts the clock frequency of the digital information signal-processed by the signal processing means to n times. The correction processing means sequentially performs error correction processing on the digital information having the first and second information recording lengths of the clock frequency converted n times by the signal conversion means.
[0027]
Therefore, at the time of this error correction process, the gap between the digital information of the first information recording length and the digital information of the second information recording length can be equivalently increased. For example, in the recording format of the information recording medium, a gap is provided between the digital information of the first information recording length and the digital information of the second information recording length, and the first information recording length of the digital information is The second information recording length is shorter than the second information recording length, the second information recording length of the digital information is set to N, and the digital information of the first information recording length and the second information recording at the clock frequency before the conversion are set. When the gap between the digital information of the first information recording length and the digital information of the second information recording length at the clock frequency after conversion is G ′,
G ′ = n · G + (n−1) · N
Given by
[0028]
As described above, in the recording format (footprint) of the information recording medium, even if the gap is actually a short gap, the digital information having the first information recording length necessary for performing the error correction processing such as the C1 correction processing is provided. A sufficient signal processing space between the digital information having the second information recording length and the digital information having the second information recording length can be secured. Therefore, it is possible to prevent a situation where the error correction processing of the digital information of the second information recording length is started before the error correction processing of the digital information of the first information recording length is completed.
[0029]
An information reproducing method according to the present invention is a method for reproducing digital information from an information recording medium having a recording format in which two types of information recording lengths exist. The digital information having the first and second information recording lengths is sequentially read and subjected to signal processing. Here, the clock frequency of the digital information subjected to the signal processing is converted into n times, and the clock frequency of the n times converted clock frequency is converted. The digital information of the first and second information recording lengths is sequentially subjected to error correction processing.
[0030]
According to the information reproducing method of the present invention, when reproducing digital information from an information recording medium having a recording format in which two types of information recording lengths exist, the first information recording length is used for error correction processing. , And the gap between the digital information of the second information recording length and the digital information of the second information recording length can be equivalently increased.
[0031]
Therefore, in the recording format (footprint) of the information recording medium, even if the gap is actually a short gap, the digital information having the first information recording length and the second information necessary for performing the error correction processing such as the C1 correction processing. A sufficient signal processing space between the digital information having the information recording length and the information recording length can be secured.
[0032]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, an embodiment of an information reproducing apparatus and an information reproducing method according to the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a configuration example of a VTR 100 to which an information reproducing apparatus as an embodiment according to the present invention is applied.
In this embodiment, when reproducing digital information from an information recording medium having a recording format in which two types of information recording lengths exist, the digital information of the first and second information recording lengths sequentially read from the information recording medium And a signal converting means for converting the clock frequency of the first information recording signal into n times so that the gap between the digital information of the first information recording length and the digital information of the second information recording length can be equivalently increased. And a signal processing space between the digital information of the first information recording length and the digital information of the second information recording length necessary for performing error correction processing such as C1 correction processing. It is.
[0033]
A video tape recorder (hereinafter, referred to as a VTR) 100 shown in FIG. 1 is an example of an information reproducing apparatus, and has a magnetic tape (information recording medium) having a recording format in which two types of information recording lengths (hereinafter, referred to as sync lengths) exist. It is a device for reproducing digital information from 80. In this example, the digital information includes video data and audio data. The video data has a first sync length M, and the audio data has a second sync length N. Hereinafter, the first sync length is referred to as a video sync (M), and the second sync length is referred to as an audio sync (N).
[0034]
The recording system of the VTR 100 includes a video compression circuit 11, a parity addition circuit 21, a recording circuit 40, a helical recording head 50, a video input terminal 110, and an audio input terminal 130. A video compression circuit 11 is connected to the video input terminal 110, and receives and compresses a recording video signal VSin from a video camera or the like. For example, the video compression circuit 11 divides the recording video signal VSin into a two-dimensional block of 8 × 8 pixels, and performs data compression processing using block coding such as DCT. In this example, the compressed video data is also referred to as compression encoded data.
[0035]
A parity addition circuit 21 is connected to the video compression circuit 11 and receives the compressed video data and the recording audio signal ASin input from the audio input terminal 130. The error correction encoding process using the product code is performed for each recording, and the error correction encoding process using the product code is performed on the recording audio signal ASin.
[0036]
The recording circuit 40 is connected to the parity addition circuit 21 and amplifies the video data (error correction coded data) VDb after the error correction coding processing. The amplified error-corrected coded data VDb is output to the helical recording head 50. The helical recording head 50 sequentially records the error correction coded data VDb on the recording track of the magnetic tape 80. Although not shown, a servo control signal (hereinafter referred to as a CTL signal) serving as a reference when reproducing digital information is recorded on the magnetic tape 80.
[0037]
The reproduction system of the VTR 100 shown in FIG. 1 includes a signal processing unit 5, a correction processing unit 8, a video output terminal 19, a helical reproduction head 55, a clock transfer unit 90, and a video decompression circuit 91.
[0038]
The helical reproducing head 55 is an example of information reading means, and sequentially reproduces reproduced video data of the first sync length + audio data VDc of the second sync length from a recording track of the magnetic tape 80 based on a signal of a predetermined clock frequency. It is made to read.
[0039]
The signal processing means 5 is connected to the helical reproducing head 55. The signal processing unit 5 includes, for example, an equalization decoder 56 and a sync detector 57, and performs signal processing on digital information sequentially read by the helical reproduction head 55. Although not shown, the equalization decoding circuit 56 includes a reproduction amplifier, a waveform equalization circuit, and a decoding circuit.
[0040]
In the VTR 100, video data of the first sync length and audio data of the second sync length (hereinafter, also simply referred to as reproduction data) VDc reproduced from the recording track are amplified by a reproduction amplifier. Thereafter, the reproduced data VDc is equalized in waveform by a waveform equalizing circuit. Further, the decoding circuit performs a decoding process using, for example, a Viterbi algorithm on the reproduced signal after the waveform equalization, and corresponds to the recorded video data VDb output from the parity adding circuit 21 of the recording system described above. The reproduction data VDc is obtained.
[0041]
A sync detector 57 is connected to the equalization decoder 56, and detects a synchronization signal from the reproduced video data VDc. The clock switch 90 is connected to the sync detector 57. The clock switcher 90 is an example of a signal converter, and converts the clock frequency of the reproduced data VDc signal-processed by the equalization decoder 56 and the sync detector 57 to n times. In the clock switching unit 90, the reproduction data VDc is switched to a higher frequency clock signal. For example, a clock frequency of 56 MHz is converted to a double frequency of 112 MHz.
[0042]
Further, the clock switching unit 90 is connected to the correction processing unit 8. The correction processing means 8 has, for example, a C1 correction circuit 81 and a C2 correction circuit 82, and converts the video data of the first sync length of the clock frequency converted to n times by the clock switching unit 90, and the second data. The audio data having the sync length is sequentially subjected to error correction processing.
[0043]
The C1 correction circuit 81 performs an error correction process using the C1 parity added to the video data + audio data VDc of the frame. The error correction processing is performed on the video data + audio data VDc replaced with the clock frequency = 112 MHz. The C2 correction circuit 82 performs error correction using the C2 parity added to the video data + audio data VDc of the frame. The compressed and coded data after error correction includes video data Dv and audio data Da, and the audio data Da becomes a reproduced audio signal ASout. The reproduced audio signal ASout is output to an audio output terminal 18.
[0044]
A video decompression circuit 91 is connected to the C2 correction circuit 82, and the error-corrected video data (compression-coded data) Dv output from the C2 correction circuit 82 is processed by a process reverse to that of the video compression circuit 11 of the recording system. Data decompression is performed. Then, the reproduced video signal VSout output from the video expansion circuit 91 is output to the output terminal 19. Although not shown, a servo control signal (CTL signal) is reproduced from a servo pilot on a recording track of the magnetic tape 80. The capstan drum is driven based on the CTL signal.
[0045]
FIG. 2 is a conceptual diagram showing a configuration example of the rotary drum 140 according to the VTR 100 shown in FIG. The rotary drum 140 shown in FIG. 2 is equipped with a helical recording head (magnetic head) 50 and a helical reproducing head 55 described later. For example, the magnetic tape 80 is obliquely wound around the rotary drum 140 at a winding angle of 180 degrees. The magnetic tape 80 runs at a predetermined speed while being wound around the rotating drum 140 in this manner.
[0046]
In addition, four recording heads RECA to RECD are arranged on the rotating drum 140, and four recording heads RECE to RECH are arranged at an angular interval of 180 degrees with respect to the four recording heads RECA to RECD. Are located. Further, on the rotating drum 140, eight reproducing heads PBA to PBH corresponding to the recording heads RECA to RECH are arranged at 90-degree angular intervals with respect to the recording heads RECA to RECH. That is, the helical recording head 50 is composed of eight recording heads RECA to RECH, and the helical reproducing head 55 is composed of eight reproducing heads PBA to PBH.
[0047]
FIG. 3 is a diagram showing an example of a recording format on the magnetic tape 80. On the magnetic tape 80 shown in FIG. 3, tracks T inclined with respect to the longitudinal direction are sequentially formed. In this case, the recording azimuths in the two tracks T adjacent to each other are made different. The areas on the scanning start end side and the scanning end end side of the track T are respectively a video data area ARV. _L , ARV _U Assigned to. This video data area ARV _L , ARV _U The video data Dv output from the parity adding circuit 21 described above is recorded in the. Also, the video area ARV of the track T _L , ARV _U Are allocated to the audio data area ARA. Audio data Da is recorded in this area ARA.
[0048]
FIG. 4 is a diagram illustrating a configuration example of an ECC block related to a product code of video data Dv. FIG. 5 is a diagram illustrating a configuration example of one sync block of the ECC block. In this example, one field of video data Dv is recorded on each of 12 tracks. At the time of recording and reproduction, four tracks are simultaneously scanned by four heads in one scan, so that 12 tracks are scanned by three scans.
[0049]
One ECC block is configured as follows. That is, with respect to video data having a data array of 226 bytes × 114 bytes shown in FIG. It is coded by a code to generate a 12-byte C2 parity (outer code parity: OUTER). Further, with respect to the video data and the C2 parity, data (data sequence) of each row is encoded by, for example, a (242, 226) Reed-Solomon code for an inner code operation data sequence indicated by an arrow a in FIG. A byte C1 parity (inner parity: INNER) is generated. At the head of each data line, sync data and ID each having a size of 2 bytes are arranged.
[0050]
The first two bytes shown in FIG. 5 are sync data. The next two bytes are an ID. This ID includes a track ID for identifying which of the 12 tracks the one sync block is recorded on, and which of a plurality of sync blocks recorded on one inclined track is the same as the one sync block. The sync block ID to be identified is included. One segment is formed for every 12 tracks, and segment numbers “0 to 3” are sequentially and repeatedly assigned. The above-mentioned 2-byte ID includes the segment number of the segment in which the one sync block is recorded. The included segment ID is also included. This ID is followed by 226 bytes of video data (or C2 parity) and 16 bytes of C1 parity.
[0051]
6A to 6C show a video data area ARV in 12 tracks constituting one segment. _L , ARV _U FIG. 6 is a diagram showing an example (part 1) of arrangement of one sync block of each ECC block in FIG. As shown in FIG. 6A, regarding the four tracks “0 to 3” scanned for the first time, the video data area ARV _L Records 21Row sync blocks from 0Row to 20Row in the ECC block of “0 to 35”, and stores the video data area ARV. _U In the ECC block, 21 Row sync blocks from 21 Row to 41 Row in the ECC blocks “0 to 35” are recorded.
[0052]
For the four tracks “4 to 7” scanned for the second time, the video data area ARV _L Records 21Row sync blocks from 42Row to 62Row in the ECC block of “0 to 35”, and stores the video data area ARV. _U , 21Row sync blocks from 63Row to 83Row in the ECC block of 0 to 35 are recorded.
[0053]
Further, regarding the four tracks “8 to 11” scanned for the third time, the video data area ARV _L Records 21Row sync blocks from 84Row to 104Row in the ECC block of “0 to 35”, and stores the video data area ARV. _U In the ECC block, 21 Row sync blocks from 105 Row to 125 Row in the ECC blocks “0 to 35” are recorded.
[0054]
Here, the sync block of 0 Row is composed of the 0th sync block in each of the ECC blocks of “0 to 35”, and these 36 sync blocks are “0 to 4” as shown in FIG. 6B. ”Are recorded in the track of“ 9 ”in a distributed manner by nine sync blocks. That is, the 0th sync block of the ECC block of “0, 18, 1, 19, 2, 20, 3, 21, 4” is recorded on the track “0”, and the track “22” is recorded on the track “1”. , 5, 23, 6, 24, 7, 25, 8, 26 ”, the 0th sync block is recorded, and“ 9, 27, 10, 28, 11, 29, The 0th sync block in the ECC block of "12, 30, 13" is recorded, and the track of "3" is recorded in the ECC block of "31, 14, 32, 15, 33, 16, 34, 17, 35". The 0th sync block is recorded.
[0055]
Hereinafter, similarly, the sync blocks of 1 to 125 Row are respectively composed of the first to 125th sync blocks in the ECC blocks of “0 to 35”, and each of the 36 sync blocks is 9 in the corresponding four tracks. Sync blocks are sorted and recorded. In this case, for each row, an ECC block from which nine sync blocks recorded on each of four tracks are extracted is rotated. As shown in FIG. 6C, one sync block includes 2-byte sync data, 2-byte ID, 226-byte video data (or C2 parity), and 16-byte C1 parity.
[0056]
Here, sync blocks of 0 Row to 125 Row are sequentially recorded on 12 tracks “0 to 11”. In this case, the sync blocks of 0Row to 113Row are obtained by adding a C1 parity to the data sequence of the video data forming the inner code operation data sequence, while the sync blocks of 114Row to 125Row are the inner code operation data sequence. The C1 parity is added to the data string of the C2 parity constituting the above.
[0057]
FIG. 7 shows a 12-track video data area ARV constituting one segment. _L , ARV _U FIG. 10 is a diagram showing an example (No. 2) of arrangement of one sync block of each ECC block in FIG. In this embodiment, when 36 ECC blocks “0 to 35” are recorded on 12 tracks, first, as shown in FIG. 7, the data string of the video data constituting the inner code operation data sequence is C1 A first sync block to which parity is added is sequentially recorded, and after recording of the first sync block is completed, a C1 parity is added to a C2 parity data sequence forming an inner code operation data sequence. The second sync blocks are sequentially recorded.
[0058]
FIG. 8 is a block diagram showing an example of the internal configuration of the C2 correction circuit 82. The C2 correction circuit 82 shown in FIG. 8 has an SDRAM 41 and an SDRAM interface 42 which is an interface for writing and reading to and from the SDRAM 41. The SDRAM 41 has a capacity capable of storing video data and audio data of a plurality of fields. In this case, the SDRAM 41 has a memory space corresponding to 36 ECC blocks (see FIG. 4) for each field.
[0059]
An input write buffer 43 is connected to the SDRAM interface 42, and serves as a buffer for writing reproduction video data (compression-coded data) + reproduction audio data VDc supplied from a C1 correction circuit (not shown) to the SDRAM 41. The reproduced video data + reproduced audio data VDc output from the C1 correction circuit is based on the clock frequency = 112 MHz.
[0060]
A video C2 read buffer 44 is connected to the SDRAM interface 42, and a buffer for supplying reproduced video data Dv corresponding to 36 ECC blocks read from the SDRAM 41 to a video C2 corrector 45 described later. Done. The frequency of the read clock signal at this time is 56 MHz. C2 correction processing is performed based on this clock signal.
[0061]
A C2 corrector 45 is connected to the C2 read buffer 44 to calculate C2 parity (outer code parity) in 36 ECC blocks for each field. The C2 corrector 45 has 36 calculators for calculating the C2 parity, and can calculate the C2 parity in the 36 ECC blocks in parallel. Therefore, video data corresponding to 36 ECC blocks is supplied from the C2 read buffer 44 to the C2 corrector 45 in parallel. In that case, the video data of each ECC block is supplied in the order of the data of the sync blocks “0 to 113”.
[0062]
Further, a C2 write buffer 46 is connected to the C2 corrector 45, and serves as a buffer for writing the C2 parity in the 36 ECC blocks calculated by the C2 corrector 45 into the SDRAM 41 for each field. Further, an output buffer 410 for video is connected to the SDRAM interface 42, and serves as a buffer for outputting video data and C2 parity corresponding to 36 ECC blocks read from the SDRAM 41 for each field. The video data (output of the video C2 corrector) Dv after the C2 correction is output to the video decompression circuit 91.
[0063]
An audio C2 read buffer 47 is connected to the SDRAM interface 42 described above, and serves as a buffer for outputting audio data Da and C2 parity corresponding to 24 ECC blocks read from the SDRAM 41 for each field. .
[0064]
An audio C2 corrector 48 is connected to the audio C2 read buffer 47, and calculates C2 parity (outer code parity) in 24 ECC blocks for each field. An output buffer 49 is connected to the C2 corrector 48, and serves as a buffer for outputting audio data Da and C2 parity corresponding to 24 ECC blocks for each field. The audio data after C2 correction (output from the audio C2 corrector) is output to the output terminal 18 as a reproduced audio signal ASout.
[0065]
Subsequently, an operation example of the VTR 100 will be described with respect to the information reproducing method according to the present invention. FIGS. 9A and 9B are time charts showing an operation example of the clock switching unit 90. FIG.
[0066]
FIG. 9A shows a case where the process shifts to the C1 correction process with a clock signal that is one time that of the conventional system. In this example, in the recording format of the magnetic tape 80, a gap G is provided between the video data (video sync) having the first sync length and the audio data (audio sync) having the second sync length. This is a case where the sync length of the audio data Da is shorter than the sync length of the video data Dv.
[0067]
FIG. 9B shows a case in which the clock signal is replaced with a clock signal twice as large as the method of the present invention and the process shifts to the C1 correction process. In this example, the sync length of the audio data Dv is N, the gap between the video data Dv of the first sync length and the audio data Da of the second sync length at the clock frequency before the frequency conversion is G, Assuming that the gap between the video data Dv having the first sync length and the audio data Da having the second sync length at the clock frequency after the conversion is G ′, Expression (1), that is,
G ′ = n · G + (n−1) · N (1)
Given by
[0068]
Based on this, an example of the operation of the VTR 100 at the time of reproduction will be described. First, the helical reproducing head 55 sequentially reads reproduced video data of the first sync length + audio data VDc of the second sync length from the recording track of the magnetic tape 80 based on a signal of a predetermined clock frequency. .
[0069]
This playback video data + audio data VDc is sequentially output from the helical playback head 55 to the signal processing means 5. In the signal processing means 5, for example, the equalization decoder 56 amplifies the video data of the first sync length + the audio data (reproduction data) VDc of the second sync length by a reproduction amplifier (not shown). Thereafter, the reproduced data VDc is equalized in waveform by a waveform equalizing circuit. Further, the decoding circuit performs a decoding process using, for example, a Viterbi algorithm on the reproduced signal after the waveform equalization, and corresponds to the recorded video data VDb output from the parity adding circuit 21 of the recording system described above. The reproduction data VDc is obtained.
[0070]
The reproduced data VDc is output from the equalization decoder 56 to the sync detector 57. The sync signal is detected by the sync detector 57. The reproduction data VDc from which the synchronization signal has been detected is output from the sync detector 57 to the clock switching unit 90.
[0071]
The clock transposition unit 90 converts the clock frequency of the reproduction data VDc to n times. At this time, the reproduced data VDc is replaced by a clock signal having a higher frequency by the clock switching device 90. For example, the reproduced data is replaced with a clock signal having a frequency of n = 2 times. In this way, by doubling the clock signal, the gap G ′ between the video sync (M) and the audio sync (N) is equivalently obtained from the equation (1), that is,
G '= 2 · G + N
It becomes.
[0072]
The reproduced data VDc after the clock replacement is output from the clock replacement unit 90 to the correction processing unit 8. At the time of this error correction processing, the gap G ′ between the video sync (M) and the audio sync (N) can be equivalently lengthened as shown in Expression (1). In the correction processing means 8, for example, the C1 correction circuit 81 performs error correction using the C1 parity added to the video data + audio data VDc of the frame.
[0073]
At this time, the gap between the signal processings can be set longer by the gap G 'shown in FIG. 9B, as compared with the case where the C1 correction processing is performed with the clock signal of 1 time as in the conventional method. If the audio sync (N) is longer than the signal processing space between the video sync (M) and the audio sync (N) required for performing the C1 correction process, the gap G may be zero. .
[0074]
Further, in the C2 correction circuit 82, error correction is performed using the C2 parity added to the video data + audio data VDc of the frame. The compressed and coded data after error correction includes video data Dv and audio data Da, and the audio data Da becomes a reproduced audio signal ASout. The reproduced audio signal ASout is output to an audio output terminal 18.
[0075]
The video data Dv is output from the C2 correction circuit 82 to the video decompression circuit 91. In the video decompression circuit 91, the video data (compression-encoded data) Dv output from the C2 correction circuit 82 after error correction is subjected to data decompression by a process reverse to that of the video compression circuit 11 of the recording system. Then, the reproduced video signal VSout output from the video expansion circuit 91 is output to the output terminal 19. Although not shown, a servo control signal (CTL signal) is reproduced from a servo pilot on a recording track of the magnetic tape 80. The capstan drum is driven based on the CTL signal.
[0076]
As described above, according to the VTR 100 and the information reproducing method according to the embodiment of the present invention, when reproducing the reproduction data (digital information) VDc from the magnetic tape 80 having a recording format having two types of sync lengths, , C1 before the correction processing, the reproduced data VDc is replaced with a clock signal of a higher frequency (for example, twice the frequency), so that the gap G ′ between the video sync (M) and the audio sync (N) is equivalent. Can be made longer.
[0077]
Therefore, in the recording format (footprint) of the magnetic tape 80, even if the gap G is actually a short gap, the signal processing space between the M and N required for performing the C1 correction processing as a result of the replacement of the clock signal. Can be secured. Thus, it is possible to prevent a situation where the error correction processing of the audio data having the second sync length is started before the error correction processing of the video data having the first sync length is completed.
[0078]
【The invention's effect】
As described above, according to the information reproducing apparatus and the information reproducing method according to the present invention, when reproducing digital information from an information recording medium having a recording format in which two types of information recording lengths exist, a signal conversion unit is used. The signal conversion means converts the clock frequency of the digital information of the first and second information recording lengths sequentially read from the information recording medium to n times.
[0079]
According to this configuration, the gap between the digital information having the first information recording length and the digital information having the second information recording length can be equivalently increased, and the recording format of the information recording medium is actually shorter. Even in the case of a gap, a sufficient signal processing space between the digital information of the first information recording length and the digital information of the second information recording length required for performing error correction processing such as C1 correction processing is sufficiently secured. can do. Thus, it is possible to prevent a situation in which the error correction processing of the digital information having the second information recording length is started before the error correction processing of the digital information having the first information recording length is completed, and the information processing is mixed.
[0080]
INDUSTRIAL APPLICABILITY The present invention is very suitably applied to home and business video recording / reproducing apparatuses for reproducing digital information from a tape recording medium.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of a VTR 100 to which an information reproducing apparatus as an embodiment according to the present invention is applied.
FIG. 2 is a conceptual diagram showing a configuration example of a rotary drum 140 according to the VTR 100 shown in FIG.
FIG. 3 is a diagram showing an example of a recording format on a magnetic tape 80.
FIG. 4 is a diagram illustrating a configuration example of an ECC block related to a product code of video data Dv.
FIG. 5 is a diagram illustrating a configuration example of one sync block of an ECC block.
FIGS. 6A to 6C show a video data area ARV in 12 tracks constituting one segment. _L , ARV _U FIG. 6 is a diagram showing an example (part 1) of arrangement of one sync block of each ECC block in FIG.
FIG. 7 shows a 12-track video data area ARV that constitutes one segment. _L , ARV _U FIG. 10 is a diagram showing an example (No. 2) of arrangement of one sync block of each ECC block in FIG.
FIG. 8 is a block diagram showing an example of the internal configuration of a C2 correction circuit 82.
FIGS. 9A and 9B are time charts showing an operation example in the clock transfer unit 90. FIGS.
FIG. 10 is a diagram showing an example of a VTR footprint in which a video sync (M) and an audio sync (N) are mixed according to a conventional example.
11A and 11B are diagrams illustrating a configuration example of one sync block of an ECC block related to a product code of video data and audio data.
FIGS. 12A and 12B are timing charts showing an example of MN switching of the C1 correction circuit.
[Explanation of symbols]
5 ... signal processing means, 8 ... correction processing means, 11 ... video compression circuit, 21 ... parity addition circuit, 50 ... helical recording head, 55 ... helical reproduction head, 56 ..Equalization decoding circuit, 57 ... Sink detector, 81 ... C1 correction circuit, 82 ... C2 correction circuit, 90 ... Clock transfer circuit, 91 ... Video decompression circuit, 100 ..VTRs (information reproduction devices)

Claims (4)

An apparatus for reproducing digital information from an information recording medium having a recording format having two types of information recording lengths,
Information reading means for sequentially reading digital information of a first and second information recording length from the information recording medium based on a signal of a predetermined clock frequency;
Signal processing means for signal processing digital information sequentially read by the information reading means,
Signal conversion means for converting the clock frequency of the digital information signal-processed by the signal processing means to n times;
An information reproducing apparatus, comprising: a correction processing means for sequentially performing error correction processing on digital information of the first and second information recording lengths of the clock frequency converted n times by the signal conversion means. In the recording format of the information recording medium,
A gap is provided between the digital information of the first information recording length and the digital information of the second information recording length, and a second information recording length of the digital information is larger than the first information recording length. Is short,
A second information recording length of the digital information is N,
G is a gap between the digital information of the first information recording length and the digital information of the second information recording length at the clock frequency before conversion,
When a gap between the digital information of the first information recording length and the digital information of the second information recording length at the clock frequency after the conversion is G ′,
G ′ = n · G + (n−1) · N
The information reproducing apparatus according to claim 1, wherein the information is given by: A method for reproducing digital information from an information recording medium having a recording format having two types of information recording lengths,
Performing signal processing by sequentially reading digital information of the first and second information recording lengths from the information recording medium based on a signal of a predetermined clock frequency;
Converting the clock frequency of the signal-processed digital information to n times,
An information reproducing method, comprising sequentially performing error correction processing on digital information of the first and second information recording lengths of the clock frequency converted to n times. In the recording format of the information recording medium,
A gap is provided between the digital information of the first information recording length and the digital information of the second information recording length, and a second information recording length of the digital information is larger than the first information recording length. Is short,
A second information recording length of the digital information is N,
G is a gap between the digital information of the first information recording length and the digital information of the second information recording length at the clock frequency before conversion,
When a gap between the digital information of the first information recording length and the digital information of the second information recording length at the clock frequency after the conversion is G ′,
G ′ = n · G + (n−1) · N
The information reproducing method according to claim 3, wherein:

Images