JP2004273863A - Method for manufacturing semiconductor wafer - Google Patents

Method for manufacturing semiconductor wafer Download PDF

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Publication number
JP2004273863A
JP2004273863A JP2003064139A JP2003064139A JP2004273863A JP 2004273863 A JP2004273863 A JP 2004273863A JP 2003064139 A JP2003064139 A JP 2003064139A JP 2003064139 A JP2003064139 A JP 2003064139A JP 2004273863 A JP2004273863 A JP 2004273863A
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JP
Japan
Prior art keywords
electron beam
semiconductor wafer
irradiating
semiconductor
irradiation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003064139A
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Japanese (ja)
Inventor
Yoshikazu Nishimura
良和 西村
Saburo Okumura
三郎 奥村
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Sansha Electric Manufacturing Co Ltd
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Sansha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to JP2003064139A priority Critical patent/JP2004273863A/en
Publication of JP2004273863A publication Critical patent/JP2004273863A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for improving productivity by reducing costs as to an electron beam irradiation method which is one of methods for forming carrier traps on a monocrystal semiconductor layer in manufacturing processes of semiconductor wafers for high-speed recovery diodes. <P>SOLUTION: The method capable of irradiating semiconductor wafers with ten times of electron beams in conventional irradiation time by irradiating two or more laminated semiconductor wafers with electron beams from the surface side of the uppermost semiconductor wafer or the rear face of the lowermost semiconductor wafer, and improving a dose distribution characteristic in the depth direction of a sample to be irradiated, is obtained. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
高速リカバリーダイオードの製造工程の中で,高速性に関与するキャリアトラップを単結晶半導体領域に形成する方法に関し,とくに電子線照射工程を単純化して安価にキャリアトラップを形成した半導体ウエハを製造する方法に関する。
【0002】
【従来の技術】
従来,高速リカバリー性を実現する方法としては重金属拡散法によって半導体領域にキャリアトラップを形成して高速性を実現する方法が知られていたが,その他に最近の関連技術としては次のようなものがある。
【0003】
【特許文献1】
「特開平6ー77423号公報」には段落(0010)から(0019)に,「シリコン単結晶半導体領域に電子線照射を行い200℃以上でアニールを行うことで,再結合中心を形成し高速性を得る」と記述されており,段落(0026)と上記公報の図3には,「製造方法である電子線照射の様子を示す模式的図と,ポリエチレン袋にウエハを入れ真空に引かれて密封され,電子線を照射ノズルから約1メートルのところに置かれて照射した。Siウエハの表裏はどちらでもかまわない」との記述がある。段落(0037)には,「これまでウエハ全面一様に照射されるように説明してきたが,ビーム状にて,必要な部分のみ照射する事で時間短縮が可能」との説明がある。
【0004】
図2は我々が実施してきた従来の技術による工程説明図である。厚さ300乃至400ミクロンの一枚の半導体ウエハが上方から電子線照射装置によって電子線照射が行われている。照射エネルギー(電子加速エネルギー)は2MeVで,ウエハ表面に照射ノズルで走査してウエハ全面に照射量分布が均等になるよう照射する。1回のウエハ全面への照射では必要な線量に達しないのでパス回数を増やす事にしており,パス回数が多くなってコストに不利であったが,数十回のパスで所望の照射量(電子線量)に達している。
【0005】
【発明が解決しようとする課題】
上記特許文献1による半導体ウエハの電子線照射はチップ全面に照射したり,局部に選択的照射したりして,一枚毎に照射する技術であり,その工程に要する時間(工数)が掛かり,高精密照射設備の使用経費が製品コスト高の原因となってしまう。チップの局部に照射する方法では,チップの照射位置を精度良く微調整する工数が余分に掛かり全体としての時間(工数)が掛かる欠点があった。この欠点を排除して電子線照射工程の工数を削減し製品のコストを安価にする製造法の提供が本発明の課題である。
【0006】
【課題を解決するための手段】
電子線照射工程の高能率化に着目し検討されたが,複数の半導体ウエハを重ねて,その水平面に上方または下方から各半導体ウエアを貫通させて電子線照射を行い,重ねられた全ウエハに同一の線量分布で電子線照射できることが確認された。
【0007】
請求項1に関しては,半導体ウエハの表面又は裏面から電子線を照射して,単結晶半導体領域にキャリアトラップを形成し,高速リカバリーダイオード用半導体ウエハを製造する工程において,二枚以上の半導体ウエハを積み重ねて,最上段の半導体ウエハの上面,又は最下段の半導体ウエハの下面に対して電子線照射することによって,積み重ねられている全枚数の半導体ウエハが,照射エネルギーをある値より大きくすることによって,同じ線量分布で電子線照射されることが確認された。重ね枚数を増すことによって生産性を向上させることが出来た。
【0008】
請求項2に関しては,電子線照射する電子加速エネルギーが5MeVを超える照射エネルギーで電子線照射されることによって,照射される試料の厚み方向に対する線量分布のバラツキが大幅に抑えられ,有効な製造法であることが確認された。
【0009】
【発明の実施の形態】
本発明による実施の形態を説明する。図1は本発明による一実施形態を説明する工程説明図。複数の半導体ウエハが重ねられた状態で,その上方から照射装置によって電子線照射が行われている。照射エネルギーは10MeVで重ね枚数10枚の半導体ウエハの,最も上のウエハ表面に電子線照射ノズルで走査してウエハ全面に照射量分布が均等になるよう照射した。ウエハのパス回数が数十回で従来の電子線量に相当する照射量が得られた。
【0010】
図3は本発明による一実施形態で照射されたエネルギーと透過率曲線図であり,縦軸は相対線量,横軸は重ねられたウエハの厚さ合計(単位はmm)である。電子線照射する電子加速エネルギーが低い従来の場合と高い場合について線量の分布を示した。図4は比較の為に示した従来の技術で照射されたエネルギーと透過率曲線図である。例えば図3において厚さ300μmのウエハを10枚重ねて総厚み3mmとした場合の相対線量は厚さの変化3mmに対し6%の変動範囲に抑えることが可能である。従来の方法では図4に示す様に線量の変動範囲が6%に抑えるには0.5mmの厚さの変化に対して可能と示されておりウエハ厚さ300μmの場合の重ね厚さ1.6枚となり,実際の工程では1枚づつに対し照射することになる。図3における透過率曲線と図4の透過率曲線とを比較して,本発明による実施例の10枚のウエハを重ねて照射する工程で照射された場合,従来の技術による一枚ずつ照射した場合と同等の線量が得られたことが判る。
【0011】
積み重ねられている全枚数の半導体ウエハが同じ線量で電子線照射されることが本発明の成立する条件である。この条件を充たすかどうかを実験した結果,電子線照射エネルギーが500keV乃至4.9MeV未満では,半導体ウエハの厚み方向に対する線量バラツキガ大きくて,これを解決するために電子線照射エネルギーを5MeV以上とした。電子線照射エネルギーを上げるほどウエハ間の特性バラツキが抑えられ,この方法で製作したウエハを用いた最終製品である高速リカバリーダイオードについて検査した結果,特性が満足できるものであることを確認した。
【0012】
【発明の効果】
本発明によれば,従来と同じ時間内における照射枚数が10倍になるので,この発明による新しい製造法によれば照射工程に必要なコストが約10分の1に削減でき製品が安価に提供でき,製造時における省資源,省エネルギーにも寄与し工業的価値は大きい。
【図面の簡単な説明】
【図1】本発明による一実施形態を説明する工程説明図。
【図2】従来の方法による製造法を説明するための工程説明図。
【図3】本発明によって照射されたエネルギーと透過率曲線図。
【図4】従来の方法によって照射されたエネルギーと透過率曲線図。
【符号の説明】
U ウエハ
e 電子線
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for forming a carrier trap related to high speed in a single crystal semiconductor region in a manufacturing process of a high-speed recovery diode, and particularly to a method for manufacturing a semiconductor wafer in which a carrier trap is formed at a low cost by simplifying an electron beam irradiation process. About.
[0002]
[Prior art]
Hitherto, as a method of realizing high-speed recovery, a method of forming a carrier trap in a semiconductor region by a heavy metal diffusion method to realize high speed has been known, but other recent related technologies include the following. There is.
[0003]
[Patent Document 1]
In JP-A-6-77423, paragraphs (0010) to (0019) state that "a single-crystal silicon semiconductor region is irradiated with an electron beam and annealed at 200 ° C. or more to form a recombination center and achieve high-speed In the paragraph (0026) and FIG. 3 of the above publication, a schematic diagram showing the state of electron beam irradiation, which is a manufacturing method, and a case where a wafer is put in a polyethylene bag and evacuated. And irradiating with the electron beam placed about 1 meter from the irradiation nozzle. The front and back of the Si wafer may be either side. " In paragraph (0037), there is a description that "was described so far as to irradiate the entire wafer uniformly, but it is possible to shorten the time by irradiating only a necessary portion in a beam form".
[0004]
FIG. 2 is an explanatory view of a process according to a conventional technique that has been implemented. One semiconductor wafer having a thickness of 300 to 400 microns is irradiated with an electron beam from above by an electron beam irradiation apparatus. The irradiation energy (electron acceleration energy) is 2 MeV, and the surface of the wafer is scanned with an irradiation nozzle to irradiate the entire surface of the wafer so that the irradiation amount distribution becomes uniform. Since the required dose cannot be reached by one irradiation of the entire wafer, the number of passes is increased, and the number of passes is increased, which is disadvantageous to cost. Electron dose).
[0005]
[Problems to be solved by the invention]
The electron beam irradiation of the semiconductor wafer according to Patent Document 1 is a technique of irradiating the entire chip or selectively irradiating a local area to irradiate the wafer one by one, and it takes time (man-hours) for the process. The cost of using high-precision irradiation equipment causes high product costs. The method of irradiating a local portion of the chip has a disadvantage that extra man-hours for finely adjusting the irradiation position of the chip with high precision are required, and the whole time (man-hour) is required. It is an object of the present invention to provide a manufacturing method that eliminates this drawback and reduces the number of steps in the electron beam irradiation step and reduces the cost of products.
[0006]
[Means for Solving the Problems]
The study focused on improving the efficiency of the electron beam irradiation process. However, multiple semiconductor wafers were stacked, and each semiconductor wafer was pierced from above or below the horizontal plane to irradiate the wafer with electron beams. It was confirmed that electron beam irradiation can be performed with the same dose distribution.
[0007]
According to the first aspect, in the step of irradiating an electron beam from the front surface or the back surface of the semiconductor wafer to form a carrier trap in a single crystal semiconductor region and manufacturing a semiconductor wafer for a high-speed recovery diode, two or more semiconductor wafers are formed. By stacking and irradiating the upper surface of the uppermost semiconductor wafer or the lower surface of the lowermost semiconductor wafer with an electron beam, the total number of semiconductor wafers stacked can be set so that the irradiation energy becomes larger than a certain value. , It was confirmed that the electron beam was irradiated with the same dose distribution. The productivity could be improved by increasing the number of stacked sheets.
[0008]
According to the second aspect, the electron beam irradiation is performed with the electron acceleration energy of the irradiation energy exceeding 5 MeV, so that the variation of the dose distribution in the thickness direction of the sample to be irradiated is largely suppressed, and an effective manufacturing method is provided. Was confirmed.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment according to the present invention will be described. FIG. 1 is a process explanatory view illustrating an embodiment according to the present invention. In a state in which a plurality of semiconductor wafers are stacked, an electron beam is radiated from above by an irradiation device. The irradiation energy was 10 MeV, and the uppermost wafer surface of the ten semiconductor wafers was scanned with an electron beam irradiation nozzle and irradiated over the entire surface of the wafer so that the irradiation amount distribution became uniform. When the number of passes of the wafer was several tens, an irradiation dose equivalent to the conventional electron dose was obtained.
[0010]
FIG. 3 is a diagram showing the energy and transmittance curves irradiated in one embodiment according to the present invention, in which the vertical axis represents the relative dose and the horizontal axis represents the total thickness (unit: mm) of the stacked wafers. The dose distribution is shown for the conventional case where the electron acceleration energy for electron beam irradiation is low and for the case where it is high. FIG. 4 is a diagram showing the energy and transmittance curves irradiated by the conventional technique shown for comparison. For example, in FIG. 3, when 10 wafers each having a thickness of 300 μm are stacked to have a total thickness of 3 mm, the relative dose can be suppressed to a fluctuation range of 6% with respect to a thickness change of 3 mm. According to the conventional method, as shown in FIG. 4, it is possible to suppress the variation range of the dose to 6% for a thickness change of 0.5 mm. There are six sheets, and in the actual process, irradiation is performed on each sheet. By comparing the transmittance curve in FIG. 3 with the transmittance curve in FIG. 4, when the irradiation was performed in the step of irradiating 10 wafers in an embodiment according to the present invention, the irradiation was performed one by one according to the conventional technique. It can be seen that the same dose was obtained.
[0011]
It is a condition that the present invention is satisfied that all the stacked semiconductor wafers are irradiated with the electron beam at the same dose. As a result of an experiment as to whether or not this condition was satisfied, when the electron beam irradiation energy was 500 keV to less than 4.9 MeV, the dose variation in the thickness direction of the semiconductor wafer was large, and in order to solve this, the electron beam irradiation energy was set to 5 MeV or more. . As the electron beam irradiation energy was increased, the variation in characteristics between wafers was suppressed, and high-speed recovery diodes, which are final products using wafers manufactured by this method, were inspected and found to have satisfactory characteristics.
[0012]
【The invention's effect】
According to the present invention, since the number of irradiations in the same time as the conventional case is ten times, according to the new manufacturing method of the present invention, the cost required for the irradiation step can be reduced to about 1/10 and the product can be provided at a low cost. It also contributes to resource saving and energy saving during manufacturing, and has a large industrial value.
[Brief description of the drawings]
FIG. 1 is a process explanatory view illustrating an embodiment according to the present invention.
FIG. 2 is a process explanatory view for explaining a manufacturing method by a conventional method.
FIG. 3 is a graph showing energy and transmittance curves irradiated according to the present invention.
FIG. 4 is a diagram showing energy and transmittance curves irradiated by a conventional method.
[Explanation of symbols]
U wafer e electron beam

Claims (2)

半導体ウエハの表面又は裏面から電子線を照射して,単結晶半導体領域にキャリアトラップを形成し,高速リカバリーダイオード用半導体ウエハを製造する工程において,二枚以上の半導体ウエハを積み重ねて,最上段の半導体ウエハの上面,又は最下段の半導体ウエハの下面に対して電子線照射することによって,積み重ねられている全てが同じ線量分布で電子線照射されることを特徴とした高速リカバリーダイオード用半導体ウエハの製造法。In the process of irradiating an electron beam from the front or back surface of a semiconductor wafer to form a carrier trap in a single crystal semiconductor region and manufacturing a semiconductor wafer for a high-speed recovery diode, two or more semiconductor wafers are stacked, and By irradiating the upper surface of the semiconductor wafer or the lower surface of the lowermost semiconductor wafer with an electron beam, all of the stacked wafers are irradiated with the same dose distribution of the electron beam. Manufacturing method. 電子線照射する電子加速エネルギーが5MeVを超える照射エネルギーで電子線照射されることを特徴とした請求項1記載の高速リカバリーダイオード用半導体ウエハの製造法。2. The method for manufacturing a semiconductor wafer for a high-speed recovery diode according to claim 1, wherein the electron beam is irradiated at an electron acceleration energy of more than 5 MeV.
JP2003064139A 2003-03-10 2003-03-10 Method for manufacturing semiconductor wafer Pending JP2004273863A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102082080A (en) * 2010-11-19 2011-06-01 南京大学 Electron radiation processing method for chips of semiconductor element
CN104103501A (en) * 2013-04-08 2014-10-15 富士电机株式会社 Semiconductor device and manufacturing method therefor
WO2021181644A1 (en) * 2020-03-13 2021-09-16 三菱電機株式会社 Semiconductor device, and manufacturing method therefor

Citations (3)

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Publication number Priority date Publication date Assignee Title
JPS5738763A (en) * 1980-06-30 1982-03-03 Allied Chem Oxidation of primary amine to oxime by elementary oxygen
JPH0116005B2 (en) * 1980-12-23 1989-03-22 Ise Electronics Corp
JPH09157099A (en) * 1995-12-08 1997-06-17 Denso Corp Doping method using irradiation with electron beam

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5738763A (en) * 1980-06-30 1982-03-03 Allied Chem Oxidation of primary amine to oxime by elementary oxygen
JPH0116005B2 (en) * 1980-12-23 1989-03-22 Ise Electronics Corp
JPH09157099A (en) * 1995-12-08 1997-06-17 Denso Corp Doping method using irradiation with electron beam

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102082080A (en) * 2010-11-19 2011-06-01 南京大学 Electron radiation processing method for chips of semiconductor element
CN102082080B (en) * 2010-11-19 2012-05-02 南京大学 Electron radiation processing method for chips of semiconductor element
CN104103501A (en) * 2013-04-08 2014-10-15 富士电机株式会社 Semiconductor device and manufacturing method therefor
US9076725B2 (en) 2013-04-08 2015-07-07 Fuji Electric Co., Ltd. Semiconductor device and manufacturing method therefor
JP2015173238A (en) * 2013-04-08 2015-10-01 富士電機株式会社 Semiconductor device and method of manufacturing the same
US9431290B2 (en) 2013-04-08 2016-08-30 Fuji Electric Co., Ltd. Semiconductor device and manufacturing method therefor
CN104103501B (en) * 2013-04-08 2019-01-01 富士电机株式会社 Semiconductor device and its manufacturing method
WO2021181644A1 (en) * 2020-03-13 2021-09-16 三菱電機株式会社 Semiconductor device, and manufacturing method therefor

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