JPH0116005B2 - - Google Patents
Info
- Publication number
- JPH0116005B2 JPH0116005B2 JP55181203A JP18120380A JPH0116005B2 JP H0116005 B2 JPH0116005 B2 JP H0116005B2 JP 55181203 A JP55181203 A JP 55181203A JP 18120380 A JP18120380 A JP 18120380A JP H0116005 B2 JPH0116005 B2 JP H0116005B2
- Authority
- JP
- Japan
- Prior art keywords
- impurity
- semiconductor substrate
- doping
- sheet
- electron beam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000012535 impurity Substances 0.000 claims description 48
- 239000004065 semiconductor Substances 0.000 claims description 32
- 239000000758 substrate Substances 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 18
- 238000010894 electron beam technology Methods 0.000 claims description 17
- 239000000498 cooling water Substances 0.000 claims description 7
- 230000007547 defect Effects 0.000 description 7
- 150000001875 compounds Chemical class 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002775 capsule Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
Description
【発明の詳細な説明】
本発明は電子線照射による半導体基板への不純
物ドーピング方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of doping impurities into a semiconductor substrate by electron beam irradiation.
従来、半導体基板中へ不純物をドーピングする
方法としては熱拡散法およびイオンインプランテ
ーシヨン法がある。前者の熱拡散法はドーピング
したい不純物と半導体基板とを同一のカプセル内
に封入したのち、相当の高温（例えば約1000℃）
に加熱し、表面より不純物を熱的に拡散するもの
である。次に、後者のイオンインプランテーシヨ
ン法は30KeV以上の不純物イオンビームを直接
半導体基板へ打ち込むものである。 Conventionally, methods for doping impurities into a semiconductor substrate include a thermal diffusion method and an ion implantation method. In the former thermal diffusion method, the impurity to be doped and the semiconductor substrate are encapsulated in the same capsule and then heated at a considerably high temperature (for example, about 1000°C).
This method heats the material to thermally diffuse impurities from the surface. Next, the latter ion implantation method is a method in which an impurity ion beam of 30 KeV or higher is directly implanted into a semiconductor substrate.
しかしながら、従来の不純物ドーピング方法で
は例えば熱拡散法は高温処理を行なうため、−
族あるいは−族の化合物半導体のような蒸
気圧の高い半導体ではいずれかの元素が蒸発し
て、半導体基板そのものの電気的特性が損なわれ
ることがあり、特にアモルフアス半導体基板では
高温処理により、アモルフアス性がこわれ、半導
体特性が失なわれる。また、不純物によつては熱
拡散不可能な元素があり、熱拡散によつて得られ
るドーピング深さは余り深くすることができず、
場所的に選択ドーピングを行なう場合にはSiO2
などのマスクを必要とする。一方、イオンインプ
ランテーシヨン法では半導体基板の特性に非常に
悪影響を及ぼす数Åの大きさの欠陥のかたまり
（変位スパイクなど）が生ずることがある。通常、
これらの欠陥はドーピング後の熱処理などによつ
ても回復不可能な欠陥である。しかも、イオンは
衝突断面積が大きいため、ドーピング深さも浅い
ものしか実現できない。また、イオンビームを多
量に照射した場合は半導体基板の表面が非晶質状
態となる。また、ドーピング不純物は化合物
（GaP、GaAs）状態でドーピングすることは全
く不可能であるなどの欠点があつた。 However, conventional impurity doping methods, such as thermal diffusion, require high-temperature treatment;
In semiconductors with high vapor pressure, such as group or - group compound semiconductors, some elements may evaporate and the electrical characteristics of the semiconductor substrate itself may be impaired. is destroyed and semiconductor properties are lost. In addition, some impurities cannot be thermally diffused, so the doping depth obtained by thermal diffusion cannot be made very deep.
SiO 2 when performing selective doping locally
etc. Requires a mask. On the other hand, in the ion implantation method, clusters of defects (displacement spikes, etc.) with a size of several angstroms may be generated, which can have a very adverse effect on the characteristics of the semiconductor substrate. usually,
These defects cannot be recovered even by heat treatment after doping. Moreover, since ions have a large collision cross section, only a shallow doping depth can be achieved. Furthermore, when a large amount of ion beam is irradiated, the surface of the semiconductor substrate becomes amorphous. Further, there were drawbacks such as the fact that it was completely impossible to dope the doping impurity in a compound state (GaP, GaAs).
したがつて、本発明の目的は半導体基板、化合
物半導体基板、アモルフアス半導体基板、あるい
は金属基板などに、簡単に不純物をドーピングす
ることができる不純物ドーピング方法を提供する
ものである。 Accordingly, an object of the present invention is to provide an impurity doping method that can easily dope impurities into a semiconductor substrate, a compound semiconductor substrate, an amorphous semiconductor substrate, a metal substrate, or the like.
このような目的を達成するため、本発明は半導
体基板上にドーピングしたい不純物シートを重ね
合わせ、この不純物シート面上に低温の冷却用流
水中で１〜10keVの高エネギーを有する高速電子
線を照射し、前記半導体基板内のエネルギー帯に
不純物準位を形成するものであり、以下実施例を
用いて詳細に説明する。 In order to achieve such an objective, the present invention superimposes an impurity sheet to be doped on a semiconductor substrate, and irradiates the impurity sheet surface with a high-speed electron beam having a high energy of 1 to 10 keV in low-temperature cooling water. However, an impurity level is formed in an energy band within the semiconductor substrate, and will be explained in detail below using examples.
第１図は本発明に係る不純物ドーピング方法の
一実施例を示す一部破断した斜視図である。同図
において、１はAlチユーブ、２はこのAlチユー
ブ１内に設け、図示せぬ支持機構によつて固定し
た半導体基板、３はこの半導体基板２上に重ね合
わせて固定したドーピングしたい不純物シート、
４は前記Alチユーブ１中に流れる冷却用流水、
５は高エネルギーの高速電子線６を加速して前記
不純物シート３に照射する電子線加速器である。
これらの装置は真空槽の中に配置され、冷却用流
水の給排水は真空槽の外部から行なうようになつ
ている。 FIG. 1 is a partially cutaway perspective view showing an embodiment of the impurity doping method according to the present invention. In the figure, 1 is an Al tube, 2 is a semiconductor substrate provided in this Al tube 1 and fixed by a support mechanism (not shown), 3 is an impurity sheet to be doped which is superimposed and fixed on this semiconductor substrate 2;
4 is cooling water flowing into the Al tube 1;
Reference numeral 5 denotes an electron beam accelerator that accelerates a high-energy high-speed electron beam 6 and irradiates the impurity sheet 3 with it.
These devices are placed in a vacuum tank, and cooling water is supplied and drained from outside the vacuum tank.
なお、高速電子線６のエネルギーは0.5MeV以
上であれば電子による原子の反跳現象が生ずる
が、最も効率的によいのは１〜10MeV程度であ
る。 Note that if the energy of the high-speed electron beam 6 is 0.5 MeV or more, a recoil phenomenon of atoms due to electrons will occur, but the most efficient energy is about 1 to 10 MeV.
次に、上記の構成に係る不純物ドーピング方法
の動作について説明する。 Next, the operation of the impurity doping method according to the above configuration will be explained.
まず、半導体基板２上に不純物シート３を重ね
合わせたのち、Alチユーブ１内の図示せぬ支持
機構に固定する。そして、このAlチユーブ１中
に冷却用流水４を流す。そして、この不純物シー
ト３上に電子加速器５によつて加速された高エネ
ルギーの高速電子線６を照射する。このため、不
純物シート３から反跳された原子が超拡散により
半導体基板２へ浸入し、不純物をドーピングする
ことができる。例えば7MeVのエネルギーで照射
した場合、電子線はAl中、Si中では15mm位まで、
水中では35mm位までは貫通するので、電子線はエ
ネルギーを殆ど失わずに不純物シート３と半導体
基板２を照射することができる。 First, the impurity sheet 3 is superimposed on the semiconductor substrate 2, and then fixed to a support mechanism (not shown) in the Al tube 1. Then, cooling water 4 is made to flow into this Al tube 1. Then, a high-energy high-speed electron beam 6 accelerated by an electron accelerator 5 is irradiated onto this impurity sheet 3. Therefore, atoms recoil from the impurity sheet 3 can penetrate into the semiconductor substrate 2 by superdiffusion, thereby doping the semiconductor substrate 2 with impurities. For example, when irradiated with an energy of 7 MeV, the electron beam reaches up to about 15 mm in Al or Si.
Since the electron beam penetrates up to about 35 mm underwater, the impurity sheet 3 and the semiconductor substrate 2 can be irradiated with the electron beam without losing much of its energy.
なお、AlとGaPとを不純物シートとして、Si
基板上に重ね合わせてドーピングした場合のシー
ト厚みによる影響をIMAにより分析した結果を
第２図に示す。また、厚さｔ＝0.3mmのIoシート
を不純物シートとして、Si基板上に重ね合わせ
て、Ｅ＝10MeVのエネルギーでもつてφ＝1.8×
1017electron／cm2の照射を行なつた場合の深さに
対する不純物濃度の分析結果を第３図に示す。ま
た、厚さｔ＝0.4mmのGaPシートを不純物シート
としてSi基板上に重ね合わせて、Ｅ＝9MeVのエ
ネルギーで照射すると共に照射時間を増加して、
電子ビーム量を増加したときの深さと不純物濃度
の関係を第４図に示す。この第４図に示すよう
に、長時間の照射を行なうか、または高エネルギ
ー照射を行なうことにより、不純物濃度が高く、
しかも深いドーピングが可能になる。 Note that Al and GaP are used as impurity sheets, and Si
Figure 2 shows the results of an IMA analysis of the effect of sheet thickness when doping is done over a substrate. In addition, when an I o sheet with a thickness t = 0.3 mm was used as an impurity sheet and superimposed on a Si substrate, φ = 1.8 ×
Figure 3 shows the analysis results of impurity concentration versus depth when irradiation was performed at 10 17 electrons/cm 2 . In addition, a GaP sheet with a thickness of t = 0.4 mm was superimposed on the Si substrate as an impurity sheet, and irradiated with an energy of E = 9 MeV and the irradiation time was increased.
FIG. 4 shows the relationship between depth and impurity concentration when the electron beam amount is increased. As shown in Fig. 4, the impurity concentration is high due to long-time irradiation or high-energy irradiation.
Furthermore, deep doping becomes possible.
ところで、同様の効果を得る方法としては、シ
ートではなく、蒸着またはスパツタリングなどに
よつて半導体基板面に不純物膜を形成しておき、
これに高速電子線を照射することにより不純物ド
ーピングを行なうことも考えられる。しかし、こ
の方法によるときは、膜形成工程の他、ドーピン
グ後にその不純物膜をエツチング等により除去す
る工程を必要とし、不純物膜のエツチング液によ
り半導体基板が全く侵されないという組合せの場
合以外には利用することができない。また、不純
物ドーピングを冷却用流水中で実施することか
ら、温度上昇が生ずることがなく、電子による原
子の反跳現象による超拡散のみで不純物ドーピン
グが行なえる。この際、使用する高速電子線の加
速エネルギーは、前述したように0.5MeV以上で
あれば、電子による原子の反跳現象を生じさせる
ことができるが、冷却を行ない、しかも効率的に
不純物をシードからドーピングするには1MeV以
上のエネルギーにすることが望ましいことが、実
験で確認された。なお、この加速エネルギーの値
が10MeVを越えると、熱スパイク、欠陥のクラ
スター等が生成し、しかもそれらが高温焼成して
も消滅せずに残り、半導体デバイスに悪影響を与
える場合が生じ、好ましくない。 By the way, a method to obtain a similar effect is to form an impurity film on the semiconductor substrate surface by vapor deposition or sputtering instead of using a sheet.
It is also possible to do impurity doping by irradiating this with a high-speed electron beam. However, when using this method, in addition to the film formation process, it is necessary to remove the impurity film by etching after doping, and it cannot be used unless the semiconductor substrate is not attacked at all by the etching solution for the impurity film. Can not do it. Furthermore, since the impurity doping is carried out in the cooling water, no temperature rise occurs, and the impurity doping can be carried out only by superdiffusion due to the recoil phenomenon of atoms caused by electrons. At this time, if the acceleration energy of the high-speed electron beam used is 0.5 MeV or more as mentioned above, it is possible to cause the atoms to recoil due to the electrons, but it is also necessary to perform cooling and efficiently seed impurities. Experiments have confirmed that it is desirable to use an energy of 1 MeV or more to dope the material. If the value of this acceleration energy exceeds 10 MeV, thermal spikes, clusters of defects, etc. will be generated, which will not disappear even after high-temperature firing, and may adversely affect semiconductor devices, which is not desirable. .
また、通常電子はイオンに比較して、衝突断面
積が非常に小さいため、イオンインプランテーシ
ヨン法で生ずる欠陥は生じにくいが、たとえ、電
子線照射により欠陥が生じても、その欠陥はドー
ピング後のアニール処理により、完全に回復する
ことができる。また、以上は半導体基板としてSi
基板を用いて説明したが、化合物半導体、アモル
フアス半導体、金属基板などにも同様に不純物ド
ーピングができることはもちろんである。 In addition, since the collision cross section of electrons is usually very small compared to ions, defects that occur in ion implantation methods are less likely to occur, but even if defects occur due to electron beam irradiation, those defects will Complete recovery can be achieved by subsequent annealing treatment. In addition, the above uses Si as a semiconductor substrate.
Although the description has been made using a substrate, it goes without saying that compound semiconductors, amorphous semiconductors, metal substrates, etc. can also be similarly doped with impurities.
以上、詳細に説明したように、本発明に係る不
純物ドーピング方法によれば(A)不純物をシート状
あるいは膜状にしたため、不純物を元素状態で
も、化合物状態でも使用でき、しかも、繰り返し
使用することができる。(B)熱的な問題でドーピン
グが困難である半導体基板あるいは不純物に対し
ても、低温にて電子線照射するため、熱欠陥が生
じない。(C)不純物濃度が高く、しかも深いレベル
までドーピングが可能になる。(D)電子ビームを収
束して照射することにより、SiO2などのマスク
を形成することなく、任意のパターンにドーピン
グができる、などの効果がある。 As explained above in detail, according to the impurity doping method according to the present invention, (A) the impurity is formed into a sheet or a film, so that the impurity can be used in either an elemental state or a compound state, and moreover, it can be used repeatedly. Can be done. (B) Semiconductor substrates or impurities that are difficult to dope due to thermal issues are irradiated with electron beams at low temperatures, so thermal defects do not occur. (C) Impurity concentration is high, and doping can be done to a deep level. (D) By converging the electron beam and irradiating it, there are effects such as doping into any pattern without forming a mask such as SiO 2 .
第１図は本発明に係る不純物ドーピング方法の
一実施例を示す一部破断した斜視図、第２図は第
１図の不純物シートの厚みによる影響を示す図、
第３図および第４図はそれぞれ第１図の半導体基
板における深さと不純物濃度との関係を示す図で
ある。
１……Alチユーブ、２……半導体基板、３…
…不純物シート、４……冷却用流水、５……電子
線加速器。
FIG. 1 is a partially cutaway perspective view showing an embodiment of the impurity doping method according to the present invention, FIG. 2 is a diagram showing the influence of the thickness of the impurity sheet in FIG. 1,
3 and 4 are diagrams showing the relationship between depth and impurity concentration in the semiconductor substrate of FIG. 1, respectively. 1... Al tube, 2... semiconductor substrate, 3...
... Impurity sheet, 4... Cooling water, 5... Electron beam accelerator.
Claims (1)
したい不純物のシートを重ね合わせ、低温の冷却
用流水中で、前記不純物シート面側から、１〜
10MeVの高速電子線を照射して行なう不純物ド
ーピング方法。1. Overlap a sheet of impurity to be doped into the semiconductor substrate on a semiconductor substrate, and place 1 to 1 on the impurity sheet surface side in low-temperature cooling water.
An impurity doping method that uses 10MeV high-speed electron beam irradiation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18120380A JPS57111018A (en) | 1980-12-23 | 1980-12-23 | Doping method for impurity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18120380A JPS57111018A (en) | 1980-12-23 | 1980-12-23 | Doping method for impurity |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57111018A JPS57111018A (en) | 1982-07-10 |
| JPH0116005B2 true JPH0116005B2 (en) | 1989-03-22 |
Family
ID=16096637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18120380A Granted JPS57111018A (en) | 1980-12-23 | 1980-12-23 | Doping method for impurity |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57111018A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004273863A (en) * | 2003-03-10 | 2004-09-30 | Sansha Electric Mfg Co Ltd | Method for manufacturing semiconductor wafer |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50126168A (en) * | 1974-03-23 | 1975-10-03 | ||
| JPS5270754A (en) * | 1975-12-10 | 1977-06-13 | Toshiba Corp | Impurity doping method |
-
1980
- 1980-12-23 JP JP18120380A patent/JPS57111018A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50126168A (en) * | 1974-03-23 | 1975-10-03 | ||
| JPS5270754A (en) * | 1975-12-10 | 1977-06-13 | Toshiba Corp | Impurity doping method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004273863A (en) * | 2003-03-10 | 2004-09-30 | Sansha Electric Mfg Co Ltd | Method for manufacturing semiconductor wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57111018A (en) | 1982-07-10 |
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