JP2004260047A - Optically coupled semiconductor relay device - Google Patents

Optically coupled semiconductor relay device Download PDF

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Publication number
JP2004260047A
JP2004260047A JP2003050544A JP2003050544A JP2004260047A JP 2004260047 A JP2004260047 A JP 2004260047A JP 2003050544 A JP2003050544 A JP 2003050544A JP 2003050544 A JP2003050544 A JP 2003050544A JP 2004260047 A JP2004260047 A JP 2004260047A
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JP
Japan
Prior art keywords
gate
voltage
cathode
anode
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2003050544A
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Japanese (ja)
Inventor
Kazuo Yamagishi
和夫 山岸
Shinichi Chikasawa
信一 近澤
Eiji Yasuda
英司 安田
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Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
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Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
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Priority to JP2003050544A priority Critical patent/JP2004260047A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To reduce a drop of voltage at the time when voltage generated in a photovoltaic diode array is applied between a gate and a source of a MOSFET, and to reduce a leak current among output terminals at the time of turning off of the MOSFET. <P>SOLUTION: In a discharge circuit 21 of the semiconductor relay device, a diode 9 is provided between an N gate and an anode of four-terminal thyristor 11, and a low resistance 22 is provided between a P gate and a cathode thereof. When a voltage generating in a photovoltaic diode array 4 is applied between gate sources of MOSFETs 6 and 7, it can be suppressed by a drop of voltage resulting from VF of one-step diode 9. In addition, when the gate potential of the MOSFETs 6 and 7 is not fixed at a source potential and unstable condition occurs while the voltage is applied between them, the voltage can be kept within a range of voltage of VF due to PN junction by one piece of the four-terminal thyristor 11. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、スイッチング素子としてMOSFETを用いた光結合型半導体リレー装置に関する。
【0002】
【従来の技術】
この種の光結合型半導体リレー装置は、従来の電磁リレー装置に代わりリレー装置として小型、高感度、高速、高信頼性化等したものとして開発されたもので、電気信号を半導体発光素子、例えば、発光ダイオードで光信号に変換し、発光ダイオードと光結合された半導体光起電素子、例えば、光起電ダイオード(PVD;Photo Voltaic Diode)アレーで光信号を電気信号に変換し、この電気信号によってスイッチング素子としてのMOSFETを駆動させ、出力接点信号を得るようにしている(例えば、特許文献1を参照。)。
【0003】
以下、特許文献1を参考に従来の光結合型半導体リレー装置について、図2を参照して説明する。入力端子1a、1b間に電気信号を供給すると、入力端子1a、1b間に接続された半導体発光素子としての発光ダイオード2で光信号に変換される。この光信号は、発光ダイオード2と光結合された半導体光起電素子としての複数個直列接続の光起電ダイオード3で構成された光起電ダイオードアレー4で電気信号に変換される。この電気信号は、放電回路5を介して、ソースを共通に逆直列接続した2個のエンハンスメント形(ノーマリオフ形)のNチャネル型MOSFET6、7のそれぞれのゲート・ソース間に供給され、MOSFET6、7をオン駆動させ、MOSFET6、7のそれぞれのドレインに接続された出力端子8a、8b間にノーマリオープンの出力接点信号を得るようにしている。
【0004】
放電回路5は、ダイオード9、10と4端子サイリスタ11と高抵抗素子12とで構成されている。ダイオード9は、アノードが光起電ダイオードアレー4のアノードに接続され、カソードがMOSFET6、7のそれぞれのゲートに接続されている。ダイオード10は、カソードが光起電ダイオードアレー4のカソードに接続され、アノードがMOSFET6、7のそれぞれのソースに接続されている。4端子サイリスタ11は、アノードがダイオード9のカソードとMOSFET6、7のゲートとの接続点に接続され、カソードがダイオード10のアノードとMOSFET6、7のソースとの接続点に接続され、Nゲートが光起電ダイオードアレー4のアノードとダイオード9のアノードとの接続点に接続され、Pゲートが光起電ダイオードアレー4のカソードとダイオード10のカソードとの接続点に接続されている。高抵抗素子12は、一端が光起電ダイオードアレー4のアノードとダイオード9のアノードとの接続点に接続され、他端が光起電ダイオードアレー4のカソードとダイオード10のカソードとの接続点に接続されている。
【0005】
上記構成の光結合型半導体リレー装置において、入力端子1a、1b間に電気信号が供給されると、発光ダイオード2で光信号に変換され、光起電ダイオードアレー4で再び電気信号に変換される。このとき、放電回路5に用いている4端子サイリスタ11はオフ状態であり、光起電ダイオードアレー4からの電気信号がダイオード9、10を通ってMOSFET6、7のそれぞれのゲートとソース間に直ちに印加され、MOSFET6、7をオンさせ、出力端子8a、8b間を導通させる。
【0006】
次に、入力端子1a、1b間に供給されていた電気信号が供給されなくなると、発光ダイオード2からの光信号がなくなり、光起電ダイオードアレー4からの電気信号もなくなるが、ダイオード9、10および4端子サイリスタ11によりMOSFET6、7のそれぞれのゲート電圧は、そのまま保たれている。この状態で光起電ダイオードアレー4の両端の電圧は高抵抗素子12に電流が流れることによりすばやく低下する。この電圧低下により、光起電ダイオードアレー4のアノード・カソード間電圧V1と4端子サイリスタ11のアノード・カソード間電圧V2とがV2>V1の関係となったとき、4端子サイリスタ11がオンするようになる。
【0007】
4端子サイリスタ11は自己保持特性を持つため、一度オンすると、アノード・カソード間電圧が1V程度に下がるまでオン状態を保つ。このため、MOSFET6、7のゲートに蓄積された電荷は4端子サイリスタ11を通って速やかに放電され、MOSFET6、7はオフし、出力端子8a、8b間が非導通となる。
【0008】
【特許文献1】
特開平5−268042号公報(「発明の詳細な説明」、図4)
【0009】
【発明が解決しようとする課題】
ところで、上述した従来の光結合型半導体リレー装置は、次に示す2つの問題がある。1つ目は、放電回路5を構成するダイオード9、10がMOSFET6、7のゲート・ソース間に直列に接続されているため、入力端子1a、1b間に電気信号が供給され、光起電ダイオードアレー4に発生した電圧がMOSFET6、7のゲート・ソース間に印加されるとき、2段のダイオード9、10の2×VFによる電圧降下があり、その電圧降下分を補償するために、光起電ダイオードアレー4の光起電ダイオード3の段数を多くする必要がある。2つ目は、入力端子1a、1b間に電気信号が供給されずMOSFET6、7がオフした状態において、出力端子8a、8b間に電圧が印加されているとき、MOSFET6、7のゲート電位がソース電位に対して固定されず不安定な状態となっている。この不安定な状態は、MOSFET6、7のゲート・ソース間に対して、4端子サイリスタ11の等価回路を構成するPNPトランジスタのエミッタとベースによるPN接合とNPNトランジスタのベースとエミッタによるPN接合とが高抵抗素子12を介して直列接続されているため、この2個のPN接合による2×VFの電圧の範囲で生じる。その結果、出力端子8a、8b間には、MOSFET6、7のゲート・ソース間に最大2×VFの電圧が印加された場合のドレイン・ソース間リーク電流とほぼ同じリーク電流ILoffが流れるという問題がある。
本発明は上記問題点を解決するために、光起電ダイオードアレーに発生した電圧がMOSFETのゲート・ソース間に印加されるとき、ダイオードのVFによる電圧降下を1段分に抑えるとともに、MOSFETがオフした状態において、出力端子間に電圧が印加されているとき、MOSFETのゲート電位がソース電位に対して固定されず不安定な状態を4端子サイリスタの1個分のPN接合によるVFの電圧の範囲に抑える。
【0010】
【課題を解決するための手段】
本発明の光結合型半導体リレー装置は、半導体発光素子と、半導体発光素子からの光信号を電気信号に変換する半導体光起電素子と、この電気信号によって駆動されるMOSFETと、MOSFETのゲートに蓄積された電荷を放電する放電回路とを具備し、放電回路が、MOSFETのゲートとソース間にアノードとカソードで接続され、さらに半導体光起電素子のアノードとカソード間にNゲートとPゲートで接続された4端子サイリスタと、半導体光起電素子のアノードとカソード間に接続された高抵抗素子とを有する光結合型半導体リレー装置において、 放電回路が、さらに、4端子サイリスタのNゲートとアノード間またはカソードとPゲート間の一方にアノードとカソードで接続されたダイオードと、4端子サイリスタのNゲートとアノード間またはカソードとPゲート間の他方に接続された低抵抗素子とを有することを特徴とする。
【0011】
【発明の実施の形態】
以下に、本発明の一実施例の光結合型半導体リレー装置について、図1を参照して説明する。尚、図2と同一部分には同一符号を付してその説明を省略し、異なる点のみ説明する。図2と異なるのは、放電回路21がダイオード10の替わり低抵抗素子22を有している点である。
【0012】
低抵抗素子22は、R<VF(0.5V)/Ipd(PVDのホト電流)により抵抗値が設定され、数十kΩが適切である。
【0013】
入力端子1a、1b間に電気信号が供給されると、発光ダイオード2で光信号に変換され、光起電ダイオードアレー4で再び電気信号に変換される。このとき、放電回路21に用いている4端子サイリスタ11はオフ状態であり、光起電ダイオードアレー4からの電気信号がダイオード9と低抵抗素子22を通ってMOSFET6、7のそれぞれのゲートとソース間に直ちに印加され、MOSFET6、7をオンさせ、出力端子8a、8b間を導通させる。光起電ダイオードアレー4に発生した電圧がMOSFET6、7のゲート・ソース間に印加されるとき、4端子サイリスタ11のカソードとPゲート間にダイオードの替わりに低抵抗素子22を接続しているので、1段のダイオード9のVFによる電圧降下分だけに抑えることができる。
【0014】
次に、入力端子1a、1b間に供給されていた電気信号が供給されなくなると、図2の光結合型半導体リレー装置と同様に、MOSFET6、7はオフし、出力端子8a、8b間が非導通となる。このMOSFET6、7がオフした状態において、出力端子8a、8b間に電圧が印加されているとき、MOSFET6、7のゲート電位がソース電位に対して固定されず不安定な状態となるのを、4端子サイリスタ11のカソードとPゲート間にダイオードの替わりに低抵抗素子22を接続しているので、MOSFET6、7のゲート・ソース間に4端子サイリスタ11の等価回路を構成するPNPトランジスタのエミッタとベースによるPN接合が高抵抗素子12と低抵抗素子22を介して接続された状態となるため、この1個分のPN接合によるVFの電圧の範囲に抑えることができる。その結果、出力端子8a、8b間には、MOSFET6、7のゲート・ソース間に最大VFの電圧が印加された場合のドレイン・ソース間リーク電流とほぼ同じリーク電流ILoffが流れ、図2の光結合型半導体リレー装置に比べて、出力端子8a、8b間のリーク電流ILoffを低減することができる。
【0015】
【発明の効果】
本発明の光結合型半導体リレー装置によれば、4端子サイリスタのNゲートとアノード間またはカソードとPゲート間の一方にアノードとカソードで接続されたダイオードと、4端子サイリスタのNゲートとアノード間またはカソードとPゲート間の他方に接続された低抵抗素子とを有するので、従来の光結合型半導体リレー装置にくらべて、光起電ダイオードアレーに発生した電圧がMOSFETのゲート・ソース間に印加されるときの電圧降下を少なくでき、また、MOSFETのオフ時の出力端子間のリーク電流を減少させることができる。
【図面の簡単な説明】
【図1】本発明の一実施例の光結合型半導体リレー装置を示す回路図。
【図2】従来の光結合型半導体リレー装置を示す回路図。
【符号の説明】
2 発光ダイオード(半導体発光素子)
4 光起電ダイオードアレー(半導体光起電素子)
6、7 MOSFET
9 ダイオード
11 4端子サイリスタ
12 高抵抗素子
21 放電回路
22 低抵抗回路
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an optically coupled semiconductor relay device using a MOSFET as a switching element.
[0002]
[Prior art]
This type of optically coupled semiconductor relay device has been developed as a small, high-sensitivity, high-speed, high-reliability relay device instead of a conventional electromagnetic relay device. A light emitting diode converts the light signal into an optical signal, and the light signal is converted into an electric signal by a semiconductor photovoltaic device optically coupled to the light emitting diode, for example, a photovoltaic diode (PVD) array. Drives a MOSFET as a switching element to obtain an output contact signal (for example, see Patent Document 1).
[0003]
Hereinafter, a conventional optically coupled semiconductor relay device will be described with reference to FIG. When an electric signal is supplied between the input terminals 1a and 1b, the electric signal is converted into an optical signal by a light emitting diode 2 as a semiconductor light emitting element connected between the input terminals 1a and 1b. This light signal is converted into an electric signal by a photovoltaic diode array 4 composed of a plurality of photovoltaic diodes 3 connected in series as semiconductor photovoltaic elements optically coupled to the light emitting diode 2. This electric signal is supplied via a discharge circuit 5 between the gate and source of each of two enhancement-type (normally-off) N-channel MOSFETs 6 and 7 whose sources are connected in reverse series in common. Is turned on to obtain a normally open output contact signal between the output terminals 8a and 8b connected to the respective drains of the MOSFETs 6 and 7.
[0004]
The discharge circuit 5 includes diodes 9 and 10, a four-terminal thyristor 11, and a high-resistance element 12. The diode 9 has an anode connected to the anode of the photovoltaic diode array 4 and a cathode connected to the respective gates of the MOSFETs 6 and 7. The diode 10 has a cathode connected to the cathode of the photovoltaic diode array 4 and an anode connected to the respective sources of the MOSFETs 6 and 7. The four-terminal thyristor 11 has an anode connected to a connection point between the cathode of the diode 9 and the gates of the MOSFETs 6 and 7, a cathode connected to a connection point between the anode of the diode 10 and the sources of the MOSFETs 6 and 7, and an N gate connected to the light. The P-gate is connected to the connection point between the anode of the photovoltaic diode array 4 and the anode of the diode 9, and the P-gate is connected to the connection point between the cathode of the photovoltaic diode array 4 and the cathode of the diode 10. One end of the high resistance element 12 is connected to a connection point between the anode of the photovoltaic diode array 4 and the anode of the diode 9, and the other end is connected to a connection point between the cathode of the photovoltaic diode array 4 and the cathode of the diode 10. It is connected.
[0005]
In the optically coupled semiconductor relay device having the above configuration, when an electric signal is supplied between the input terminals 1a and 1b, the electric signal is converted into an optical signal by the light emitting diode 2, and is converted again into an electric signal by the photovoltaic diode array 4. . At this time, the four-terminal thyristor 11 used in the discharge circuit 5 is in the off state, and the electric signal from the photovoltaic diode array 4 passes between the gates and the sources of the MOSFETs 6 and 7 through the diodes 9 and 10 immediately. The MOSFETs 6 and 7 are turned on, and the output terminals 8a and 8b are conducted.
[0006]
Next, when the electric signal supplied between the input terminals 1a and 1b is no longer supplied, the light signal from the light emitting diode 2 disappears and the electric signal from the photovoltaic diode array 4 also disappears. And the gate voltage of each of the MOSFETs 6 and 7 is kept as it is by the four-terminal thyristor 11. In this state, the voltage at both ends of the photovoltaic diode array 4 rapidly decreases due to the current flowing through the high-resistance element 12. Due to this voltage drop, when the anode-cathode voltage V1 of the photovoltaic diode array 4 and the anode-cathode voltage V2 of the four-terminal thyristor 11 have a relationship of V2> V1, the four-terminal thyristor 11 is turned on. become.
[0007]
Since the four-terminal thyristor 11 has a self-holding characteristic, once it is turned on, it stays on until the anode-cathode voltage drops to about 1V. Therefore, the charges accumulated in the gates of the MOSFETs 6 and 7 are quickly discharged through the four-terminal thyristor 11, the MOSFETs 6 and 7 are turned off, and the output terminals 8a and 8b become non-conductive.
[0008]
[Patent Document 1]
JP-A-5-268042 ("Detailed description of the invention", FIG. 4)
[0009]
[Problems to be solved by the invention]
By the way, the above-mentioned conventional optically coupled semiconductor relay device has the following two problems. First, since the diodes 9 and 10 constituting the discharge circuit 5 are connected in series between the gates and sources of the MOSFETs 6 and 7, an electric signal is supplied between the input terminals 1a and 1b, and the photovoltaic diode When a voltage generated in the array 4 is applied between the gates and sources of the MOSFETs 6 and 7, there is a voltage drop due to 2 × VF of the two-stage diodes 9 and 10, and in order to compensate for the voltage drop, a photovoltaic voltage is generated. It is necessary to increase the number of photovoltaic diodes 3 of the photodiode array 4. Second, in a state where an electric signal is not supplied between the input terminals 1a and 1b and the MOSFETs 6 and 7 are turned off and a voltage is applied between the output terminals 8a and 8b, the gate potentials of the MOSFETs 6 and 7 become the source. It is not fixed with respect to the potential and is in an unstable state. This unstable state is caused by the PN junction between the emitter and the base of the PNP transistor and the PN junction between the base and the emitter of the NPN transistor, which constitute an equivalent circuit of the four-terminal thyristor 11, between the gate and the source of the MOSFETs 6 and 7. Since the two PN junctions are connected in series via the high resistance element 12, the voltage is generated within a range of 2 × VF by the two PN junctions. As a result, there is a problem that a leak current ILoff substantially equal to a drain-source leak current when a voltage of 2 × VF at the maximum is applied between the gates and the sources of the MOSFETs 6 and 7 flows between the output terminals 8a and 8b. is there.
The present invention solves the above-mentioned problem by suppressing the voltage drop due to the diode VF to one stage when the voltage generated in the photovoltaic diode array is applied between the gate and the source of the MOSFET. In the off state, when a voltage is applied between the output terminals, the gate potential of the MOSFET is not fixed with respect to the source potential and is unstable, and the VF voltage of the PN junction of one 4-terminal thyristor is changed. To the range.
[0010]
[Means for Solving the Problems]
An optically coupled semiconductor relay device according to the present invention includes a semiconductor light emitting element, a semiconductor photovoltaic element that converts an optical signal from the semiconductor light emitting element into an electric signal, a MOSFET driven by the electric signal, and a gate of the MOSFET. A discharge circuit for discharging the accumulated charges, the discharge circuit being connected between the gate and the source of the MOSFET at an anode and a cathode, and further having an N gate and a P gate between the anode and the cathode of the semiconductor photovoltaic device. In an optically coupled semiconductor relay device having a connected four-terminal thyristor and a high-resistance element connected between an anode and a cathode of the semiconductor photovoltaic element, the discharge circuit further comprises an N-gate and an anode of the four-terminal thyristor A diode connected between the anode or the cathode on one side or between the cathode and the P gate, and an N-gate of the four-terminal thyristor And a low resistance element connected to the other between the anode and the anode or between the cathode and the P gate.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an optically coupled semiconductor relay device according to one embodiment of the present invention will be described with reference to FIG. The same parts as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. Only different points will be described. The difference from FIG. 2 is that the discharge circuit 21 has a low resistance element 22 instead of the diode 10.
[0012]
The resistance value of the low resistance element 22 is set by R <VF (0.5 V) / Ipd (photo current of PVD), and several tens kΩ is appropriate.
[0013]
When an electric signal is supplied between the input terminals 1a and 1b, the electric signal is converted into an optical signal by the light emitting diode 2, and is converted again into an electric signal by the photovoltaic diode array 4. At this time, the four-terminal thyristor 11 used in the discharge circuit 21 is in the off state, and the electric signal from the photovoltaic diode array 4 passes through the diode 9 and the low-resistance element 22 to the respective gates and sources of the MOSFETs 6 and 7. Immediately, the MOSFETs 6 and 7 are turned on, and the output terminals 8a and 8b are conducted. When the voltage generated in the photovoltaic diode array 4 is applied between the gates and sources of the MOSFETs 6 and 7, the low resistance element 22 is connected between the cathode of the four-terminal thyristor 11 and the P gate instead of the diode. , It can be suppressed to only the voltage drop due to the VF of the diode 9 of one stage.
[0014]
Next, when the electric signal supplied between the input terminals 1a and 1b is no longer supplied, the MOSFETs 6 and 7 are turned off and the connection between the output terminals 8a and 8b is not connected, as in the optically coupled semiconductor relay device of FIG. It becomes conductive. When a voltage is applied between the output terminals 8a and 8b in a state where the MOSFETs 6 and 7 are turned off, the gate potentials of the MOSFETs 6 and 7 are not fixed with respect to the source potential and become unstable. Since the low-resistance element 22 is connected between the cathode and the P gate of the terminal thyristor 11 in place of the diode, the emitter and the base of the PNP transistor forming an equivalent circuit of the four-terminal thyristor 11 between the gates and sources of the MOSFETs 6 and 7. Is connected via the high-resistance element 12 and the low-resistance element 22, so that the voltage of the VF by one PN junction can be suppressed. As a result, a leakage current ILoff substantially equal to the drain-source leakage current when a voltage of maximum VF is applied between the gate and the source of the MOSFETs 6 and 7 flows between the output terminals 8a and 8b. The leakage current ILoff between the output terminals 8a and 8b can be reduced as compared with the coupled semiconductor relay device.
[0015]
【The invention's effect】
According to the optically coupled semiconductor relay device of the present invention, a diode connected between the N gate and the anode or between the cathode and the P gate of the four terminal thyristor at one of the anode and the cathode, and between the N gate and the anode of the four terminal thyristor Alternatively, since a low-resistance element is connected between the cathode and the P-gate, the voltage generated in the photovoltaic diode array is applied between the gate and source of the MOSFET as compared with a conventional optically coupled semiconductor relay device. In this case, the voltage drop at the time of the operation can be reduced, and the leak current between the output terminals when the MOSFET is off can be reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an optically coupled semiconductor relay device according to one embodiment of the present invention.
FIG. 2 is a circuit diagram showing a conventional optically coupled semiconductor relay device.
[Explanation of symbols]
2 Light emitting diode (semiconductor light emitting device)
4 Photovoltaic diode array (semiconductor photovoltaic element)
6, 7 MOSFET
9 Diode 11 4 terminal thyristor 12 High resistance element 21 Discharge circuit 22 Low resistance circuit

Claims (1)

半導体発光素子と、半導体発光素子からの光信号を電気信号に変換する半導体光起電素子と、この電気信号によって駆動されるMOSFETと、MOSFETのゲートに蓄積された電荷を放電する放電回路とを具備し、
放電回路が、MOSFETのゲートとソース間にアノードとカソードで接続され、さらに半導体光起電素子のアノードとカソード間にNゲートとPゲートで接続された4端子サイリスタと、半導体光起電素子のアノードとカソード間に接続された高抵抗素子とを有する光結合型半導体リレー装置において、
放電回路が、さらに、4端子サイリスタのNゲートとアノード間またはカソードとPゲート間の一方にアノードとカソードで接続されたダイオードと、4端子サイリスタのNゲートとアノード間またはカソードとPゲート間の他方に接続された低抵抗素子とを有することを特徴とする光結合型半導体リレー装置。
A semiconductor light-emitting element, a semiconductor photovoltaic element that converts an optical signal from the semiconductor light-emitting element into an electric signal, a MOSFET driven by the electric signal, and a discharge circuit that discharges charges accumulated in the gate of the MOSFET. Equipped,
A four-terminal thyristor connected between the gate and the source of the MOSFET at the anode and the cathode, and further connected between the anode and the cathode of the semiconductor photovoltaic device by the N gate and the P gate; In an optically coupled semiconductor relay device having a high resistance element connected between an anode and a cathode,
The discharge circuit further includes a diode connected between the N-gate and the anode or between the cathode and the P-gate of the four-terminal thyristor at one of the anode and the cathode, and a diode connected between the N-gate and the anode or the cathode and the P-gate of the four-terminal thyristor. An optically coupled semiconductor relay device having a low resistance element connected to the other end.
JP2003050544A 2003-02-27 2003-02-27 Optically coupled semiconductor relay device Withdrawn JP2004260047A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2161761A2 (en) 2008-09-09 2010-03-10 NEC Electronics Corporation Relay circuit
US7893415B2 (en) 2007-11-05 2011-02-22 Renesas Electronics Corporation Optical semiconductor relay device for reducing transient voltage between output terminals of the relay and maintaining high operation speed and low capacitance characteristics

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7893415B2 (en) 2007-11-05 2011-02-22 Renesas Electronics Corporation Optical semiconductor relay device for reducing transient voltage between output terminals of the relay and maintaining high operation speed and low capacitance characteristics
EP2161761A2 (en) 2008-09-09 2010-03-10 NEC Electronics Corporation Relay circuit

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