JP2004242304A5 - - Google Patents
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- Publication number
- JP2004242304A5 JP2004242304A5 JP2004025173A JP2004025173A JP2004242304A5 JP 2004242304 A5 JP2004242304 A5 JP 2004242304A5 JP 2004025173 A JP2004025173 A JP 2004025173A JP 2004025173 A JP2004025173 A JP 2004025173A JP 2004242304 A5 JP2004242304 A5 JP 2004242304A5
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- current
- modulation
- differential output
- differential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/360,159 US7184469B2 (en) | 2003-02-06 | 2003-02-06 | Systems and methods for injection of test jitter in data bit-streams |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004242304A JP2004242304A (ja) | 2004-08-26 |
| JP2004242304A5 true JP2004242304A5 (enExample) | 2007-04-05 |
| JP4410574B2 JP4410574B2 (ja) | 2010-02-03 |
Family
ID=32771369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004025173A Expired - Lifetime JP4410574B2 (ja) | 2003-02-06 | 2004-02-02 | データビットストリーム中にテストジッタを注入するためのシステムおよび方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7184469B2 (enExample) |
| JP (1) | JP4410574B2 (enExample) |
| DE (1) | DE10348327B4 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7315574B2 (en) * | 2004-05-03 | 2008-01-01 | Dft Microsystems, Inc. | System and method for generating a jittered test signal |
| US7480329B2 (en) * | 2004-10-29 | 2009-01-20 | Agilent Technologies, Inc. | Method of finding data dependent timing and voltage jitter for different bits in an arbitrary digital signal in accordance with selected surrounding bits |
| US7369605B2 (en) * | 2004-12-15 | 2008-05-06 | Spirent Communications | Method and device for injecting a differential current noise signal into a paired wire communication link |
| WO2006129491A1 (ja) * | 2005-06-01 | 2006-12-07 | Advantest Corporation | ジッタ発生回路 |
| JP4384207B2 (ja) * | 2007-06-29 | 2009-12-16 | 株式会社東芝 | 半導体集積回路 |
| US8179952B2 (en) * | 2008-05-23 | 2012-05-15 | Integrated Device Technology Inc. | Programmable duty cycle distortion generation circuit |
| US8194721B2 (en) * | 2008-05-23 | 2012-06-05 | Integrated Device Technology, Inc | Signal amplitude distortion within an integrated circuit |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3325730A (en) * | 1963-12-23 | 1967-06-13 | Hughes Aircraft Co | Pulse time jitter measuring system |
| US3937945A (en) * | 1974-06-25 | 1976-02-10 | The United States Of America As Represented By The United States National Aeronautics And Space Administration Office Of General Counsel-Code Gp | Apparatus for simulating optical transmission links |
| US6466072B1 (en) * | 1998-03-30 | 2002-10-15 | Cypress Semiconductor Corp. | Integrated circuitry for display generation |
| EP1162739B1 (en) | 2001-04-03 | 2003-03-05 | Agilent Technologies, Inc. (a Delaware corporation) | Filter injecting data dependent jitter and level noise |
| US6847232B2 (en) * | 2001-11-08 | 2005-01-25 | Texas Instruments Incorporated | Interchangeable CML/LVDS data transmission circuit |
| US6958640B2 (en) * | 2003-12-31 | 2005-10-25 | Intel Corporation | Interpolation delay cell for 2ps resolution jitter injector in optical link transceiver |
-
2003
- 2003-02-06 US US10/360,159 patent/US7184469B2/en not_active Expired - Lifetime
- 2003-10-17 DE DE10348327A patent/DE10348327B4/de not_active Expired - Fee Related
-
2004
- 2004-02-02 JP JP2004025173A patent/JP4410574B2/ja not_active Expired - Lifetime
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