JP2004231513A - Circuit board excellent in high strength/high heat conductivity - Google Patents

Circuit board excellent in high strength/high heat conductivity Download PDF

Info

Publication number
JP2004231513A
JP2004231513A JP2004031711A JP2004031711A JP2004231513A JP 2004231513 A JP2004231513 A JP 2004231513A JP 2004031711 A JP2004031711 A JP 2004031711A JP 2004031711 A JP2004031711 A JP 2004031711A JP 2004231513 A JP2004231513 A JP 2004231513A
Authority
JP
Japan
Prior art keywords
silicon nitride
circuit board
substrate
phase
grain boundary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004031711A
Other languages
Japanese (ja)
Inventor
Shigeyuki Hamayoshi
繁幸 濱吉
Toshiyuki Imamura
寿之 今村
Masahisa Sofue
昌久 祖父江
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Original Assignee
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals Ltd filed Critical Hitachi Metals Ltd
Priority to JP2004031711A priority Critical patent/JP2004231513A/en
Publication of JP2004231513A publication Critical patent/JP2004231513A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Ceramic Products (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board having excellent bonding strength and thermal cycle resistant property. <P>SOLUTION: The circuit board excellent in high strength/high heat conductivity has a silicon nitride substrate in which the surface area ratio of silicon nitride grain is 85-100% when the total surface area ratio of the silicon nitride grain and a grain boundary phase is defined as 100% in the silicon nitride sintered compact substrate composed of the silicon nitride grain and the grain boundary phase, the height difference (L) between the crest part of the maximum height of silicon nitride particle exposed to the surface and the root part of the minimum height of the silicon nitride grain or the grain boundary phase is 1.5-15 μm, the center line average surface roughness (Ra) is 0.2-5 μm and a Cu circuit plate or an Al circuit plate is bonded to at least one surface of the silicon nitride substrate through a brazing filler metal phase or an oxide film phase. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

本発明は、高耐圧・高電流のパワ−モジュ−ル等の実装に適した高強度・高熱伝導性に優れた回路基板に関する。   The present invention relates to a circuit board excellent in high strength and high thermal conductivity suitable for mounting a power module or the like with high withstand voltage and high current.

窒化ケイ素焼結体は、高温強度特性、耐摩耗性等の機械的特性に加え、耐熱性、低熱膨張性、耐熱衝撃性及び金属に対する耐食性に優れているので、従来からガスタ−ビン用部材、エンジン用部材、製鋼用機械部材あるいは溶融金属の耐溶部材等の各種の構造用部材に用いられている。また、高い絶縁性を利用して電気絶縁材料としても使用されている。   Silicon nitride sintered bodies have excellent heat resistance, low thermal expansion, thermal shock resistance, and corrosion resistance to metals, in addition to mechanical properties such as high-temperature strength properties and wear resistance. It is used for various structural members such as engine members, steelmaking mechanical members, and molten metal melt-resistant members. In addition, it is used as an electrical insulating material by utilizing high insulating properties.

最近、高周波トランジスタ、パワーIC等の発熱量の大きい半導体素子の発展に伴い、電気絶縁性に加えて良好な放熱特性(高い熱伝導率)を有するセラミックス基板の需要が増加している。このようなセラミックス基板として既に窒化アルミニウム基板が用いられているが、窒化アルミニウム基板は機械的強度や破壊靭性等が低く、基板ユニットの組立て工程での締め付けによって割れるおそれがある。また、ケイ素半導体素子を窒化アルミニウム基板に実装した回路基板では、ケイ素(Si)と窒化アルミニウム基板との熱膨張差が大きいため、冷熱サイクルにより窒化アルミニウム基板にクラックや割れが発生し、実装信頼性が低下するという問題がある。   2. Description of the Related Art In recent years, with the development of semiconductor elements having a large amount of heat, such as high-frequency transistors and power ICs, the demand for ceramic substrates having good heat dissipation characteristics (high thermal conductivity) in addition to electrical insulation has been increasing. An aluminum nitride substrate is already used as such a ceramic substrate. However, the aluminum nitride substrate has low mechanical strength, low fracture toughness, and the like, and may be broken by tightening in the assembly process of the substrate unit. In addition, in a circuit board in which a silicon semiconductor element is mounted on an aluminum nitride substrate, the thermal expansion difference between silicon (Si) and the aluminum nitride substrate is large. Is reduced.

そこで、窒化アルミニウムより熱伝導率は劣るものの、熱膨張率がSiに近似すると共に、機械的強度、破壊靭性及び耐熱疲労特性に優れた高熱伝導性窒化ケイ素焼結体からなる基板が注目されている。   Therefore, although thermal conductivity is inferior to that of aluminum nitride, the thermal expansion coefficient is close to that of Si, and a substrate made of a high thermal conductive silicon nitride sintered body having excellent mechanical strength, fracture toughness and thermal fatigue resistance has attracted attention. I have.

また、回路基板としては、上記のような材料特性に優れる窒化ケイ素基板に銅回路を形成させてなるものや、更なる耐冷熱サイクル特性に対する向上を目的にアルミニウム回路を形成させてなるものが種々検討されている。   Further, as the circuit board, there are various ones in which a copper circuit is formed on a silicon nitride substrate having excellent material properties as described above, and those in which an aluminum circuit is formed for the purpose of further improving the cooling / heating cycle resistance. Is being considered.

例えば銅回路基板については、特許文献1(特開平6−216481号公報)には、熱伝導率が60〜180W/m・Kである窒化ケイ素基板の表面に、活性金属を含有する接合金属層を介して、銅回路板を一体的に接合してなるセラミックス銅回路基板が記載されている。この回路基板では、15〜35重量%のCuと、Ti、Zr、Hf及びNbからなる群から選択された少なくとも一種の活性金属1〜10重量%とを含有し、残部実質的にAgからなる組成を有するろう材を用いることにより、銅回路板と窒化ケイ素基板との間の接合強度を向上させている。   For example, with respect to a copper circuit board, Patent Document 1 (Japanese Patent Application Laid-Open No. 6-216481) discloses a bonding metal layer containing an active metal on the surface of a silicon nitride substrate having a thermal conductivity of 60 to 180 W / m · K. Discloses a ceramic copper circuit board formed by integrally joining a copper circuit board via a substrate. This circuit board contains 15 to 35% by weight of Cu, and 1 to 10% by weight of at least one active metal selected from the group consisting of Ti, Zr, Hf and Nb, and the balance substantially consists of Ag By using a brazing material having a composition, the bonding strength between the copper circuit board and the silicon nitride substrate is improved.

また、特許文献2(特開平8−319187号公報)には、大気中にて温度150〜360℃の範囲で表面酸化処理により酸化銅層を形成した銅回路板を窒化ケイ素基板表面の所定位置に配置し、銅の融点(1083℃)未満で銅−酸化銅の共晶温度(1065℃)以上の温度に加熱し、生成したCu-O共晶化合物液相を接合剤として銅回路板を窒化ケイ素基板表面に直接的に接合する、いわゆるDBC(Direct Bonding Cupper)回路基板が記載されている。この回路基板では、銅板を窒化珪素基板に直接接合するため、金属回路板と窒化珪素基板との間に接着剤及びろう材のような介在物が存在しない。したがって両者間での熱抵抗が低く、金属回路板上に設けられた半導体素子の発熱を系外に迅速に放散できるという利点を有する。   Patent Document 2 (Japanese Patent Application Laid-Open No. 8-319187) discloses that a copper circuit board on which a copper oxide layer is formed by surface oxidation at a temperature of 150 to 360 ° C. in the atmosphere is placed at a predetermined position on the surface of a silicon nitride substrate. And heated to a temperature higher than the eutectic temperature of copper-copper oxide (1065 ° C) at a temperature lower than the melting point of copper (1083 ° C), and using the generated Cu-O eutectic compound liquid phase as a bonding agent to form a copper circuit board A so-called DBC (Direct Bonding Cupper) circuit board which is directly bonded to a silicon nitride substrate surface is described. In this circuit board, since the copper plate is directly joined to the silicon nitride substrate, there is no inclusion such as an adhesive or a brazing material between the metal circuit board and the silicon nitride substrate. Therefore, there is an advantage that the heat resistance between the two is low, and the heat generated by the semiconductor element provided on the metal circuit board can be quickly radiated out of the system.

また、アルミニウム回路基板については、特許文献3(特開平10−65296号公報)には、Siにより形成されたセラミックス基板と、当該セラミックス基板の両面にAl-Siろう材を介してそれぞれ接着したアルミニウム板とを備えた回路基板が記載されている。この回路基板は、従来の銅や銅合金等にて形成された金属部材に比して変形抵抗が小さくなり、回路基板に冷熱サイクルを付加したとき、セラミックス基板に作用する熱応力が小さいので、セラミックス基板にクラックが発生しないという利点を有する。 Patent Document 3 (Japanese Patent Application Laid-Open No. H10-65296) discloses an aluminum circuit board, in which a ceramic substrate formed of Si 3 N 4 and two surfaces of the ceramic substrate with Al-Si brazing material interposed therebetween. A circuit board with an adhered aluminum plate is described. This circuit board has a smaller deformation resistance than conventional metal members made of copper, copper alloy, etc., and the thermal stress acting on the ceramics substrate when a cooling cycle is added to the circuit board is small. This has the advantage that cracks do not occur in the ceramic substrate.

特開平6−216481号公報JP-A-6-216481 特開平8−319187号公報JP-A-8-319187 特開平10−65296号公報JP-A-10-65296

しかしながら、上記従来の回路基板では、銅又はアルミニウム等の金属回路板と窒化ケイ素基板との接合状態を支配する窒化ケイ素基板の表面形態の検討はなされていない。上記したいずれの接合方法でも窒化ケイ素基板の表面形態を調整しないと、銅又はアルミニウム等の金属回路板と窒化ケイ素基板との接合強度および耐冷熱サイクル特性等にばらつきが生じ、高信頼性の回路基板が得られないといった問題がある。   However, in the above-described conventional circuit board, no study has been made on the surface morphology of the silicon nitride substrate which governs the bonding state between the metal circuit board such as copper or aluminum and the silicon nitride substrate. If the surface morphology of the silicon nitride substrate is not adjusted by any of the above-described bonding methods, variations occur in the bonding strength between the metal circuit board such as copper or aluminum and the silicon nitride substrate and the thermal cycling characteristics, and the high reliability circuit. There is a problem that a substrate cannot be obtained.

本発明は、上記従来の問題に鑑みてなされたものであり、接合強度および耐冷熱サイクル特性に優れた回路基板の製造に好適な表面性状を有する窒化ケイ素基板を用いた回路基板を提供することを目的とする。   The present invention has been made in view of the above-described conventional problems, and provides a circuit board using a silicon nitride substrate having a surface property suitable for manufacturing a circuit board having excellent bonding strength and thermal cycling resistance. With the goal.

本発明は、実質的に窒化ケイ素粒子と粒界相とからなる窒化ケイ素焼結体基板において、当該焼結体基板表面における窒化ケイ素粒子と粒界相の合計面積率を100%としたとき、前記窒化ケイ素粒子の面積率が85〜100%であり、表面に露出した窒化ケイ素粒子の最大高さの山頂部と、窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)が1.5〜15μmであり、中心線平均粗さ(Ra)が0.2〜5μmの表面性状となした窒化ケイ素基板を有し、当該窒化ケイ素基板の少なくとも一面にCu回路板をろう材相又は酸化膜相を介して接合してなる高強度・高熱伝導性に優れた回路基板である。   The present invention, in a silicon nitride sintered body substrate substantially consisting of silicon nitride particles and grain boundary phase, when the total area ratio of silicon nitride particles and grain boundary phase on the surface of the sintered body substrate is 100%, The area ratio of the silicon nitride particles is 85 to 100%, and the height difference between the peak of the maximum height of the silicon nitride particles exposed on the surface and the valley bottom of the minimum height of the silicon nitride particles or the grain boundary phase ( L) has a surface property of 1.5 to 15 μm and a center line average roughness (Ra) of 0.2 to 5 μm, and a Cu circuit board is formed on at least one surface of the silicon nitride substrate by a brazing material phase or This is a circuit board that is bonded through an oxide film phase and has excellent high strength and high thermal conductivity.

本発明は、実質的に窒化ケイ素粒子と粒界相とからなる窒化ケイ素焼結体基板において、当該焼結体基板表面における窒化ケイ素粒子と粒界相の合計面積率を100%としたとき、前記窒化ケイ素粒子の面積率が85〜100%であり、表面に露出した窒化ケイ素粒子の最大高さの山頂部と、窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)が1.5〜15μmであり、中心線平均粗さ(Ra)が0.2〜5μmの表面性状となした窒化ケイ素基板を有し、当該窒化ケイ素基板の少なくとも一面にAl回路板をろう材相又は酸化膜相を介して接合してなる高強度・高熱伝導性に優れた回路基板である。   The present invention, in a silicon nitride sintered body substrate substantially consisting of silicon nitride particles and grain boundary phase, when the total area ratio of silicon nitride particles and grain boundary phase on the surface of the sintered body substrate is 100%, The area ratio of the silicon nitride particles is 85 to 100%, and the height difference between the peak of the maximum height of the silicon nitride particles exposed on the surface and the valley bottom of the minimum height of the silicon nitride particles or the grain boundary phase ( L) having a surface property of 1.5 to 15 μm and a center line average roughness (Ra) of 0.2 to 5 μm, and an Al circuit board is formed on at least one surface of the silicon nitride substrate by a brazing material phase or This is a circuit board that is bonded through an oxide film phase and has excellent high strength and high thermal conductivity.

本発明の回路基板は、前記窒化ケイ素粒子の面積率が90〜100%であり、前記中心線平均粗さ(Ra)が0.2〜2μmのとき、前記高低差(L)が1.5〜5μmであることが望ましい。   In the circuit board of the present invention, when the area ratio of the silicon nitride particles is 90 to 100% and the center line average roughness (Ra) is 0.2 to 2 μm, the height difference (L) is 1.5 to 5 μm. It is desirable.

本発明に用いられる窒化ケイ素基板は、中心線平均粗さ(Ra)が5μm超では、窒化ケイ素基板に金属回路板を接合したとき接合界面に局所的にボイドが生成し、未接着面積が多くなり接合強度の著しい低下を招く。一方、中心線平均粗さ(Ra)が0.2μm未満では、ボイドの生成を抑制できるが、アンカ−リングによる複合効果が得られないため、やはり充分な接合強度が得られない。従って、窒化ケイ素基板の表面性状に関し、中心線平均粗さ(Ra)は0.2〜5μmが望ましい。さらに望ましくは0.2〜2μmである。
また、本発明に用いられる窒化ケイ素基板は、実質的に窒化ケイ素粒子と粒界相とからなる窒化ケイ素焼結体からなり、基板表面における前記窒化ケイ素粒子及び前記粒界相の合計面積率を100%として、前記窒化ケイ素粒子の面積率が85〜100%であるのが好ましい。この条件を満たす窒化ケイ素基板は、優れた耐熱衝撃性及び耐熱疲労信頼性を有する。さらに望ましくは90〜100%である。
また、本発明に用いられる窒化ケイ素基板は、基板表面に露出した窒化ケイ素粒子の最大高さの山頂部と、窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)が1.5〜15μmの表面性状を有することを特徴とする。高低差(L)が15μm超では窒化ケイ素基板と金属回路板との接合界面に局所的にボイドが生成し、未接着面積が多くなり接合強度の低下を生じる。また1.5μm未満ではボイドの生成を抑制できるが、アンカ−リングによる複合効果が得られないため、やはり充分な接合強度が得られない。さらに望ましくは1.5〜5μmである。
When the silicon nitride substrate used in the present invention has a center line average roughness (Ra) of more than 5 μm, voids are locally generated at the bonding interface when a metal circuit board is bonded to the silicon nitride substrate, and the unbonded area is large. This causes a significant decrease in bonding strength. On the other hand, when the center line average roughness (Ra) is less than 0.2 μm, generation of voids can be suppressed, but sufficient bonding strength cannot be obtained because the composite effect by anchoring cannot be obtained. Therefore, regarding the surface properties of the silicon nitride substrate, the center line average roughness (Ra) is desirably 0.2 to 5 μm. More preferably, it is 0.2 to 2 μm.
Further, the silicon nitride substrate used in the present invention is substantially composed of a silicon nitride sintered body composed of silicon nitride particles and a grain boundary phase, and has a total area ratio of the silicon nitride particles and the grain boundary phase on the substrate surface. As 100%, the area ratio of the silicon nitride particles is preferably 85 to 100%. A silicon nitride substrate satisfying this condition has excellent thermal shock resistance and thermal fatigue reliability. More preferably, it is 90 to 100%.
Further, the silicon nitride substrate used in the present invention has a height difference (L) between the peak of the maximum height of the silicon nitride particles exposed on the substrate surface and the bottom of the valley of the minimum height of the silicon nitride particles or the grain boundary phase. Has a surface property of 1.5 to 15 μm. If the height difference (L) exceeds 15 μm, voids are locally formed at the bonding interface between the silicon nitride substrate and the metal circuit board, and the unbonded area increases, resulting in a decrease in bonding strength. If the thickness is less than 1.5 μm, the generation of voids can be suppressed, but the combined effect of anchoring cannot be obtained, so that sufficient bonding strength cannot be obtained. More preferably, it is 1.5 to 5 μm.

以上の通り、本発明の回路基板は、銅あるいはアルミニウム等の金属回路基板を接合するのに好適な表面形態を有し、金属回路板と窒化ケイ素基板との接合強度を著しく向上することができる。また本発明で用いる窒化ケイ素基板は、本来有する高強度/高靭性に加えて高い熱伝導率を具備するので、半導体素子用回路基板を構成した場合に半導体素子の作動に伴う繰り返しの冷熱サイクルに起因する基板の割れや金属回路板の剥離の発生を抑制でき、耐熱衝撃性ならびに耐冷熱サイクル性を著しく向上した回路基板を提供することができる。   As described above, the circuit board of the present invention has a surface morphology suitable for bonding a metal circuit board such as copper or aluminum, and can significantly improve the bonding strength between the metal circuit board and the silicon nitride substrate. . Further, the silicon nitride substrate used in the present invention has a high thermal conductivity in addition to the inherently high strength / high toughness, so that when a circuit board for a semiconductor element is formed, it can be subjected to repeated cooling / heating cycles accompanying the operation of the semiconductor element. It is possible to provide a circuit board which can suppress the occurrence of cracking of the board and peeling of the metal circuit board due to the occurrence thereof, and can significantly improve the thermal shock resistance and the thermal cycling resistance.

以下、本発明の実施態様について詳細に説明する。まず、本発明の窒化ケイ素基板の表面性状を調整する方法としては、例えばサンドブラスト、ショットブラスト、グリッドブラストまたはハイドロブラスト等の機械加工により粒界相を機械的に除去する方法がある。   Hereinafter, embodiments of the present invention will be described in detail. First, as a method of adjusting the surface properties of the silicon nitride substrate of the present invention, there is a method of mechanically removing a grain boundary phase by machining such as sand blasting, shot blasting, grid blasting or hydroblasting.

銅又はアルミニウム等の金属板を窒化ケイ素基板に接合するには、ろう付け法が好ましい。前述のように、銅板に対してはTi、ZrまたはHf等の活性金属を含有するAg−Cu合金を、またアルミニウム板に対してはAl-Si合金をろう材として用いるのが好ましい。さらに銅板およびアルミニウム板にそれぞれCu-O及びAl−O共晶化合物液相を接着層として用い、これらの金属回路板を直接窒化ケイ素基板に接合しても良い。   In order to join a metal plate such as copper or aluminum to a silicon nitride substrate, a brazing method is preferable. As described above, an Ag-Cu alloy containing an active metal such as Ti, Zr or Hf is preferably used as a brazing material for a copper plate, and an Al-Si alloy is preferably used as a brazing material for an aluminum plate. Furthermore, a Cu—O and Al—O eutectic compound liquid phase may be used as an adhesive layer for a copper plate and an aluminum plate, respectively, and these metal circuit boards may be directly bonded to a silicon nitride substrate.

金属回路板と窒化ケイ素基板との接合強度を支配する因子には、(1)接合物質間のぬれ及び拡散、(2)界面生成物の強度、及び(3)界面構造がある。例えば、活性金属のTiを含有するAg-Cu合金をろう材として、金属板を窒化ケイ素基板に接合する活性金属法では、界面の接合強度は、(2)および(3)の因子に大きく影響される。この場合、界面生成物はろう材相/窒化ケイ素の界面に生成するTiN相である。このTiN相の生成過程について詳述すると、窒化ケイ素が加熱処理過程でろう材相と接触すると、SiとNはろう材相に解けて液相の混相が生成する。次に分解によって生成した液相領域からTiN粒子が核生成し、窒化ケイ素とろう材との接合界面に沿って成長する。TiN粒子は特定の結晶学的方位関係にある結晶粒界で生成し成長するため、TiN相と窒化ケイ素とは結晶的整合性があり、接合強度が上昇する。したがって、強固な接合強度を得るためには、ろう材相/窒化ケイ素界面に、充分にTiN粒子を析出させることが肝要である。   Factors governing the bonding strength between a metal circuit board and a silicon nitride substrate include (1) wetting and diffusion between bonding materials, (2) strength of interface products, and (3) interface structure. For example, in the active metal method in which a metal plate is bonded to a silicon nitride substrate using an Ag-Cu alloy containing active metal Ti as a brazing material, the bonding strength at the interface greatly affects the factors (2) and (3). Is done. In this case, the interface product is a TiN phase formed at the brazing material phase / silicon nitride interface. The generation process of the TiN phase will be described in detail. When silicon nitride comes into contact with the brazing material phase in the heat treatment process, Si and N are melted into the brazing material phase and a liquid phase mixed phase is formed. Next, TiN particles are nucleated from the liquid phase region generated by the decomposition, and grow along the bonding interface between the silicon nitride and the brazing material. Since TiN particles are generated and grown at a crystal grain boundary having a specific crystallographic orientation relationship, the TiN phase and silicon nitride have a crystalline consistency, and the bonding strength increases. Therefore, in order to obtain a strong bonding strength, it is important to sufficiently precipitate TiN particles at the brazing filler metal phase / silicon nitride interface.

また、銅又はアルミニウムの共晶酸化物液相を接着剤として用いる直接接合法でも、接合界面に界面生成物となる酸化膜相の最適化を図る必要がある。ここで、酸化膜相は、窒化ケイ素基板の場合、焼結助剤成分とSiOとのシリケ−ト結晶相およびガラス相からなる。具体的に焼結助剤としてYを用いる場合、Y・2SiO相とY−SiO系ガラスとを生成する。金属回路板と窒化ケイ素基板との接合強度はこれらシリケ−ト相及びガラス相の生成形態に大きく依存する。したがって、直接接合法では、酸化膜相の生成形態を制御することが肝要である。 Also, in the direct bonding method using a eutectic oxide liquid phase of copper or aluminum as an adhesive, it is necessary to optimize an oxide film phase that is an interface product at a bonding interface. Here, in the case of a silicon nitride substrate, the oxide film phase comprises a silicate crystal phase of a sintering aid component and SiO 2 and a glass phase. Specifically, when Y 2 O 3 is used as a sintering aid, a Y 2 O 3 .2SiO 2 phase and a Y 2 O 3 —SiO 2 glass are generated. The bonding strength between the metal circuit board and the silicon nitride substrate largely depends on the form of formation of these silicate phase and glass phase. Therefore, in the direct bonding method, it is important to control the generation form of the oxide film phase.

しかしながら、これら金属回路板と窒化ケイ素基板との接合強度を支配するTiN相又は酸化膜相の生成は、基板表面性状が適切な場合にのみ形成される。前者では、窒化ケイ素基板表面に大きな凹凸があると、ろう材相が全面に浸透せず、ろう材相/窒化ケイ素界面にボイドが形成され、接合不良が生じる。後者では、酸化膜相の生成はあるものの、やはり全面に浸透せず、同様に接合不良が生じる。一方、窒化ケイ素基板の表面に凹凸が極めて少ない場合、界面生成物は析出するが、その反面、ろう材相の窒化ケイ素粒子間への噛み込みによるアンカ−効果がなくなり、その結果、接合強度が低下する。このように充分な接合強度を得るためには、窒化ケイ素基板の表面形態は所定の条件を満たす必要がある。   However, the generation of a TiN phase or an oxide film phase that governs the bonding strength between the metal circuit board and the silicon nitride substrate is formed only when the surface properties of the substrate are appropriate. In the former case, if there are large irregularities on the surface of the silicon nitride substrate, the brazing material phase does not penetrate the entire surface, and voids are formed at the brazing material phase / silicon nitride interface, resulting in poor bonding. In the latter case, although an oxide film phase is generated, the oxide film phase does not penetrate the entire surface, and a bonding failure similarly occurs. On the other hand, when the surface of the silicon nitride substrate has very few irregularities, interface products are precipitated, but on the other hand, the anchoring effect due to the brazing material phase being caught between the silicon nitride particles is lost, and as a result, the bonding strength is reduced. descend. In order to obtain such a sufficient bonding strength, the surface morphology of the silicon nitride substrate needs to satisfy predetermined conditions.

また、本発明の窒化ケイ素基板では、窒化ケイ素粒子の面積率が70〜100%であるものが好ましい。上述した活性金属法の場合、ろう材相と窒化ケイ素粒子とが接触した結果生成するTiN相が接合強度を支配するが、焼結助剤成分からなる粒界相が多いと、このTiN相に加え粒界相に溶解したSi成分が粒界相を通じて拡散し、過剰なTi成分と反応して5Ti+3Si→TiSiの反応によりTiケイ化物を形成する。このTiケイ化物は低強度であるのみならず、熱膨張係数は9.5×10−6/KとSi34の熱膨張係数3.2×10−6/Kの約3倍も大きい。このため、熱膨張係数差に起因するSi34/TiSi間での界面剥離が生じ、著しい接合強度の低下を招く。したがって、充分な接合強度を得るために、粒界相量を低減することが重要である。 In the silicon nitride substrate of the present invention, the silicon nitride particles preferably have an area ratio of 70 to 100%. In the case of the active metal method described above, the TiN phase formed as a result of the contact between the brazing filler metal phase and the silicon nitride particles governs the bonding strength. However, if there are many grain boundary phases composed of the sintering aid component, this TiN phase Si components dissolved in the grain boundary phase in addition to diffuse through the grain boundary phase to form a Ti silicide reacts with excess Ti component by reaction 5Ti + 3Si → Ti 5 Si 3 . This Ti silicide has not only low strength but also a thermal expansion coefficient of 9.5 × 10 −6 / K, which is about three times as large as a thermal expansion coefficient of 3.2 × 10 −6 / K of Si 3 N 4 . For this reason, interface delamination between Si 3 N 4 / Ti 5 Si 3 due to a difference in thermal expansion coefficient occurs, which causes a significant decrease in bonding strength. Therefore, it is important to reduce the amount of the grain boundary phase in order to obtain sufficient bonding strength.

また直接接合法の場合、接合界面に生成する酸化膜相が接合強度を支配するが、この酸化膜は焼結助剤成分とSiOとのシリケ−ト結晶相およびガラス相からなり、Yを焼結助剤とした場合はY・2SiO相及びY−SiO系ガラス相を生成する。接合界面において助剤成分からなる粒界相量が多くなると、ガラス相の生成割合が高くなり、これに伴い接合強度は向上する。しかしながら、更に粒界相量が増大すると低強度であるシリケ−ト相の生成割合が大きくなり、強度は著しく低下する。したがって、いずれの接合方法を用いる場合も、窒化ケイ素粒子及び粒界相の適正な比率範囲が存在する。本発明では窒化ケイ素基板での窒化ケイ素粒子の面積率は70〜100%であるのが好ましいことを新しく知見した。 In the case of direct bonding method, oxide film phase generated at the joint interface dominates the bonding strength, the oxide film silicate with sintering aid component and SiO 2 - consists preparative crystalline phase and glass phase, Y 2 the O 3 If a sintering agent to produce a Y 2 O 3 · 2SiO 2 phase and Y 2 O 3 -SiO 2 based glass phase. When the amount of the grain boundary phase composed of the auxiliary component at the bonding interface increases, the generation ratio of the glass phase increases, and accordingly, the bonding strength improves. However, when the amount of the grain boundary phase is further increased, the generation rate of the silicate phase having a low strength is increased, and the strength is significantly reduced. Therefore, when any of the joining methods is used, there is an appropriate ratio range of the silicon nitride particles and the grain boundary phase. In the present invention, it has been newly found that the area ratio of silicon nitride particles on the silicon nitride substrate is preferably 70 to 100%.

本発明の窒化ケイ素基板を用いて構成される回路基板は、金属とセラミックス基板の接合強度が優れる点、また高い耐冷熱サイクル特性等の強度信頼性を生かしてパワー半導体用基板、マルチチップモジュール用基板などの各種基板、ペルチェ素子用熱伝板、あるいは各種発熱素子用ヒートシンクなどの電子部品用部材として好適である。   The circuit board formed by using the silicon nitride substrate of the present invention is a substrate for a power semiconductor and a multi-chip module by taking advantage of an excellent bonding strength between a metal and a ceramic substrate and a strength reliability such as a high resistance to heat and heat cycle. It is suitable as a member for electronic components such as various substrates such as a substrate, a heat transfer plate for a Peltier element, or a heat sink for various heating elements.

本発明の窒化ケイ素基板により半導体素子用基板を構成した場合、半導体素子の作動に伴う繰り返しの冷熱サイクルによる基板のクラックの発生が抑制され、耐熱衝撃性および耐冷熱サイクル性が著しく向上し、耐久性ならびに信頼性に優れたものを提供できる。また、高出力化および高集積化を指向する半導体素子を搭載した場合でも熱抵抗特性の劣化が少なく、かつ優れた放熱特性を発揮する。また本発明の窒化ケイ素基板による優れた機械的特性を反映してそれ自体が構造部材を兼ねることができるので回路基板構造を簡略化できるという実用性に富んだ利点を有する。   When a substrate for a semiconductor device is constituted by the silicon nitride substrate of the present invention, the occurrence of cracks in the substrate due to repeated cooling and heating cycling accompanying the operation of the semiconductor device is suppressed, and the thermal shock resistance and the cooling and heat cycling resistance are remarkably improved. It is possible to provide products excellent in performance and reliability. Further, even when a semiconductor element for high output and high integration is mounted, deterioration of thermal resistance characteristics is small and excellent heat radiation characteristics are exhibited. In addition, since the silicon nitride substrate of the present invention can also serve as a structural member by reflecting the excellent mechanical properties of the silicon nitride substrate, it has a practical advantage that the circuit substrate structure can be simplified.

以下、実施例により本発明を詳細に説明するが、それら実施例により本発明が限定されるものではない。
(実施例1)
平均粒子径が0.2〜3.0μmの窒化ケイ素粉末:96重量部に対し、MgO:3重量部、および Y:1重量部の焼結助剤を添加した混合粉末を作製した。次に、アミン系の分散剤を2wt%添加したトルエン・ブタノール溶液を満たしたボールミルの樹脂製ポット中に、前記混合粉末および粉砕媒体の窒化ケイ素製ボールを投入し、48時間湿式混合した。次に、前記ポット中の混合粉末:83.3重量部に対しポリビニル系の有機バインダー:12.5重量部および可塑剤(ジメチルフタレ−ト):4.2重量部を添加し、次いで48時間湿式混合しシート成形用スラリーを得た。この成形用スラリーを調整後、ドクターブレード法によりグリーンシートを成形した。次に、成形したグリーンシートを空気中400〜600℃で2〜5時間加熱することにより前記有機バインダー成分を十分に除去し、脱脂したグリーンシートを0.9MPa(9気圧)の窒素雰囲気中で1850℃で5時間焼結し、さらに同じ窒素雰囲気中で1900℃で24時間熱処理し、次いで室温に冷却した。得られたシート状窒化ケイ素焼結体を機械加工し、サンドブラストにより表面性状を調整し、縦50mm×横50mm×厚さ0.6mmの半導体モジュール用窒化ケイ素基板を得た。サンドブラスト条件は以下の通りであった。
基板の送り速度:20 cm/分
処理ゾーンの長さ:80 cm
ノズル数:4本
ノズルの噴出圧力:0.35 Mpa
基板表面に対する噴射角度:30°
砥粒:アルミナ製#240
Hereinafter, the present invention will be described in detail with reference to examples, but the present invention is not limited to the examples.
(Example 1)
A mixed powder was prepared by adding 96 parts by weight of silicon nitride powder having an average particle diameter of 0.2 to 3.0 μm and 3 parts by weight of MgO and 1 part by weight of Y 2 O 3 . Next, into a resin pot of a ball mill filled with a toluene / butanol solution to which 2% by weight of an amine-based dispersant was added, the mixed powder and the silicon nitride ball as a pulverizing medium were charged and wet-mixed for 48 hours. Next, 12.5 parts by weight of a polyvinyl organic binder and 4.2 parts by weight of a plasticizer (dimethyl phthalate) were added to 83.3 parts by weight of the mixed powder in the pot, and then wet-mixed for 48 hours to obtain a slurry for sheet forming. Got. After adjusting the molding slurry, a green sheet was formed by a doctor blade method. Next, the formed green sheet is heated in air at 400 to 600 ° C. for 2 to 5 hours to sufficiently remove the organic binder component, and the degreased green sheet is placed in a nitrogen atmosphere of 0.9 MPa (9 atm) for 1850 hours. C. for 5 hours, heat treated at 1900.degree. C. for 24 hours in the same nitrogen atmosphere, and then cooled to room temperature. The obtained sheet-shaped silicon nitride sintered body was machined, and the surface properties were adjusted by sand blasting to obtain a silicon nitride substrate for a semiconductor module having a length of 50 mm, a width of 50 mm and a thickness of 0.6 mm. Sandblast conditions were as follows.
Substrate feed rate: 20 cm / min Processing zone length: 80 cm
Number of nozzles: 4 Nozzle ejection pressure: 0.35 Mpa
Spray angle to substrate surface: 30 °
Abrasive: Alumina # 240

サンドブラスト処理により焼結体表面の粒界相が除去されるので、サンドブラスト処理条件(板の送り速度、処理ゾーンの長さ、ノズルの数及び噴出圧力、基板表面に対する噴射角度、砥粒の種類及び粒度等)を調整すれば、焼結体の中心線平均表面粗さ(Ra)、窒化ケイ素粒子、粒界相の面積率、及び粒界相の頂部と谷底間の高低差(L)を自在に変化させた窒化ケイ素基板を得ることができる。上記のサンドブラスト条件で処理して得られた本発明の半導体モジュール用の代表的な窒化ケイ素基板の中心線平均粗さ(Ra)を触針式表面粗さ測定器により測定した結果を図1に示す。図1において、横軸は窒化ケイ素基板表面の測定長さ(30mm)を示し、縦軸はRaを示す。また測定の原点は0であり、Raおよび測定長さのスケールは左下に示す。この結果、本実施例の窒化ケイ素基板のRaは0.6μmであり、窒化ケイ素粒子の面積率は81.0%であり、粒界相の面積率は19.0%であった。   Since the grain boundary phase on the surface of the sintered body is removed by sand blasting, the sand blasting conditions (plate feed speed, length of processing zone, number of nozzles and ejection pressure, spray angle with respect to the substrate surface, type of abrasive grains, By adjusting the grain size, etc., the center line average surface roughness (Ra) of the sintered body, the silicon nitride particles, the area ratio of the grain boundary phase, and the height difference (L) between the top and the bottom of the grain boundary phase can be freely adjusted. Can be obtained. FIG. 1 shows the results of measuring the center line average roughness (Ra) of a typical silicon nitride substrate for a semiconductor module of the present invention obtained by processing under the above sandblasting conditions using a stylus type surface roughness measuring instrument. Show. In FIG. 1, the horizontal axis represents the measured length (30 mm) of the surface of the silicon nitride substrate, and the vertical axis represents Ra. The origin of the measurement is 0, and the scale of Ra and the measurement length are shown at the lower left. As a result, Ra of the silicon nitride substrate of this example was 0.6 μm, the area ratio of silicon nitride particles was 81.0%, and the area ratio of the grain boundary phase was 19.0%.

得られた窒化ケイ素基板の表面部組織を走査型電子顕微鏡(日立製作所製、商品名:S4500)により倍率2000倍で撮影した写真を図2(a)に示す。図2(b)は図2(a)の走査型電子顕微鏡写真に対応する模式図であり、窒化ケイ素粒子は21、粒界相は22で示されている。また、比較例として窒化ケイ素粒子の面積率が5%である窒化ケイ素基板の表面組織写真を図7に示す。次に、図3(a)および(b)はRa=0.6μmの前記窒化ケイ素基板を用いて構成した本発明の回路基板の代表的な断面組織を走査型電子顕微鏡により倍率50倍及び4000倍で撮影した写真であり、Cu回路板31と窒化ケイ素基板33とがろう材層32を介して接合されている。図4は、図3(b)におけるCu回路板31とろう材層32とを除去した状態、すなわちCu回路板31に接合する前の窒化ケイ素基板33の表面状態を示す断面模式図である。ここで窒化ケイ素基板33における(L)は、窒化ケイ素粒子21の最大高さの山頂部41と、窒化ケイ素粒子21あるいは粒界相22の最低高さの谷底部42との高低差43に相当する。   FIG. 2A is a photograph of the surface structure of the obtained silicon nitride substrate taken at a magnification of 2000 times with a scanning electron microscope (trade name: S4500, manufactured by Hitachi, Ltd.). FIG. 2B is a schematic view corresponding to the scanning electron micrograph of FIG. 2A, in which silicon nitride particles are denoted by 21 and grain boundary phases are denoted by 22. FIG. 7 shows a photograph of the surface structure of a silicon nitride substrate having a silicon nitride particle area ratio of 5% as a comparative example. Next, FIGS. 3A and 3B show a typical cross-sectional structure of a circuit board of the present invention constituted by using the silicon nitride substrate having Ra = 0.6 μm by a scanning electron microscope at a magnification of 50 × and 4000 ×. The Cu circuit board 31 and the silicon nitride substrate 33 are joined via the brazing material layer 32. FIG. 4 is a schematic cross-sectional view showing a state in which the Cu circuit board 31 and the brazing material layer 32 in FIG. 3B have been removed, that is, a surface state of the silicon nitride substrate 33 before bonding to the Cu circuit board 31. Here, (L) in the silicon nitride substrate 33 corresponds to a height difference 43 between the peak 41 of the maximum height of the silicon nitride particles 21 and the valley bottom 42 of the silicon nitride particles 21 or the minimum height of the grain boundary phase 22. I do.

次に、サンドブラスト処理条件を適宜変えて作製した前記窒化ケイ素基板のうちの代表的なもの(試料No.1〜10)をサンプリングし、それらの断面組織写真を前記走査型電子顕微鏡により倍率2000倍で撮影し、得られた断面組織写真の200μm×500μmの視野において長さ:500μmにわたり窒化ケイ素粒子の最大高さの山頂部と窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)を測定した。また得られた断面組織写真の200μm×500μmの視野を画像解析装置により解析し、窒化ケイ素粒子および粒界相の平均面積率を求めた。また金属回路板と窒化ケイ素基板(試料No.1〜10)との接合強度を評価するためにピール強度試験を行った。ピール強度試験は、図5に示す回路基板50の銅製またはアルミニウム製回路板52の一端部が窒化ケイ素基板51の側面に対し5mm突出するように予め接合しておき、これを90度上方に引張りあげるのに要する単位長さ当りの力で評価した。   Next, representative samples (samples Nos. 1 to 10) of the silicon nitride substrates produced by appropriately changing the sandblasting conditions were sampled, and their cross-sectional micrographs were taken with the scanning electron microscope at a magnification of 2000 times. In the 200 μm × 500 μm field of view of the obtained cross-sectional structure photograph, the height: the height between the peak of the maximum height of the silicon nitride particles and the bottom of the minimum height of the silicon nitride particles or the grain boundary phase over 500 μm The difference (L) was measured. Further, the visual field of 200 μm × 500 μm of the obtained cross-sectional structure photograph was analyzed by an image analyzer to determine the average area ratio of the silicon nitride particles and the grain boundary phase. Further, a peel strength test was performed to evaluate the bonding strength between the metal circuit board and the silicon nitride substrate (Sample Nos. 1 to 10). In the peel strength test, one end of the copper or aluminum circuit board 52 of the circuit board 50 shown in FIG. 5 was joined in advance so that it protruded 5 mm from the side surface of the silicon nitride board 51, and this was pulled upward by 90 degrees. Evaluation was based on the force per unit length required for raising.

次に、作製した前記窒化ケイ素基板(試料No.1〜10)により図6の回路基板60を作製した。回路基板60は前記縦50mm×横50mm×厚さ0.6mmの寸法の窒化ケイ素基板51の表面に銅製またはアルミニウム製の回路板61をろう材53により接合して設け、基板51の裏面には銅板またはアルミニウム板62をろう材53により接合して構成している。試料No.1〜10の各窒化ケイ素基板の中心線平均粗さRa、窒化ケイ素粒子、粒界相の面積率およびLを表1に示す。また前記窒化ケイ素基板を用い、接合金属板が銅またはアルミニウム製で、ろう付けまたは直接接合した場合のピール強度および破壊発生位置(破壊モード)を表1に示す。なお、表1中の破壊モードの項目において、Cuは接合金属の銅より破壊した、Alは接合金属のアルミニウムより破壊した、接合界面は基板と接合金属との接合界面から破壊したことをそれぞれ示している。   Next, a circuit board 60 shown in FIG. 6 was produced from the produced silicon nitride substrate (sample Nos. 1 to 10). The circuit board 60 is provided by bonding a copper or aluminum circuit board 61 to the surface of a silicon nitride substrate 51 having the dimensions of 50 mm × 50 mm × 0.6 mm by brazing material 53, and a copper plate on the back of the board 51. Alternatively, an aluminum plate 62 is joined by a brazing material 53. Table 1 shows the center line average roughness Ra, the silicon nitride particles, the area ratio of the grain boundary phase, and L of each of the silicon nitride substrates of Sample Nos. 1 to 10. In addition, Table 1 shows the peel strength and the breakage occurrence position (breakage mode) when the bonding metal plate is made of copper or aluminum using the silicon nitride substrate and brazed or directly bonded. In the breakdown mode items in Table 1, Cu indicates that the bonding metal was broken from copper, Al indicates that the bonding metal was broken from aluminum, and the bonding interface was broken from the bonding interface between the substrate and the bonding metal. ing.

(比較例1)
サンドブラスト処理条件を変化させた以外は実施例1と同様にして、窒化ケイ素基板及び回路基板を作製し、評価した。結果を表1の試料No.21〜28に示す。
(Comparative Example 1)
A silicon nitride substrate and a circuit board were prepared and evaluated in the same manner as in Example 1 except that the sandblasting conditions were changed. The results are shown in sample Nos. 21 to 28 of Table 1.

Figure 2004231513
Figure 2004231513

表1の実施例の試料No.1〜10から、以下の知見が得られた。中心線平均粗さ(Ra)が0.2〜5μmの表面性状を有し、表面部の窒化ケイ素粒子の面積率が85〜100%であり、窒化ケイ素粒子の最大高さの山頂部と窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)が1.5〜15μmである窒化ケイ素基板を用い、銅またはアルミニウム製の金属板を接合した回路基板を作製し、ピ−ル強度を測定した場合、得られた回路基板のいずれも22.0kN/m以上と高いピール強度を有し、破壊は接合部から起こらないことが確認できた。   The following findings were obtained from Sample Nos. 1 to 10 of the examples in Table 1. The center line average roughness (Ra) has a surface property of 0.2 to 5 μm, the area ratio of the silicon nitride particles on the surface is 85 to 100%, the peak of the maximum height of the silicon nitride particles and the silicon nitride particles Alternatively, a circuit board in which a metal plate made of copper or aluminum is bonded to a silicon nitride substrate having a height difference (L) of 1.5 to 15 μm from the bottom of the valley having the lowest height of the grain boundary phase, and a peel strength is obtained. When measured, all of the obtained circuit boards had a high peel strength of 22.0 kN / m or more, and it was confirmed that destruction did not occur from the joint.

これに対し、表1の比較例1の試料No.21〜23から、以下の知見が得られた。
(1)No.21の中心線平均粗さ(Ra)は0.2μm未満であり、ピール強度は8.5 kN/mと低く、破壊は接合界面から生じた。
(2)No.22の中心線平均粗さ(Ra)は20μm超であり、ピール強度は9.5kN/mと低く、破壊は接合界面から生じた。
(3)No.23は窒化ケイ素粒子の面積率が70%未満でかつ粒界相の面積率が30%超であり、ピール強度は5.5kN/mと低く、破壊は接合界面から生じた。
(4)No.24の窒化ケイ素粒子の最大高さの山頂部と窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)は1μm未満であり、ピール強度は7.0kN/mと低く、破壊は接合界面から生じた。
(5)No.25の窒化ケイ素粒子の最大高さの山頂部と窒化ケイ素粒子あるいは粒界相の最低高さの谷底部の高低差(L)は45μmであり、ピ−ル強度は6.5kN/mと低く、破壊は接合界面から生じた。
(6)No.26は、接合方法をろう付けから直接接合に変更した以外No.22と同じであるが、この場合もピール強度は7.0kN/mと低く、破壊は接合界面から生じた。
(7)No.27は、金属回路板を銅製からアルミニウム製に変更した以外No.22と同じであるが、この場合もピール強度は6.5kN/mと低く、破壊は接合界面から生じた。
(8)No.28は、接合方法をろう付けから直接接合に変更した以外No.27と同じであるが、この場合もピール強度は6.2kN/mと低く、破壊は接合界面から生じた。
In contrast, the following findings were obtained from Sample Nos. 21 to 23 of Comparative Example 1 in Table 1.
(1) The center line average roughness (Ra) of No. 21 was less than 0.2 μm, the peel strength was as low as 8.5 kN / m, and the fracture occurred from the joint interface.
(2) The center line average roughness (Ra) of No. 22 was more than 20 μm, the peel strength was as low as 9.5 kN / m, and the fracture occurred from the joint interface.
(3) In No. 23, the area ratio of the silicon nitride particles was less than 70% and the area ratio of the grain boundary phase was more than 30%, the peel strength was as low as 5.5 kN / m, and the fracture occurred from the joint interface.
(4) The height difference (L) between the peak of the maximum height of the silicon nitride particles of No. 24 and the valley bottom of the silicon nitride particles or the minimum height of the grain boundary phase is less than 1 μm, and the peel strength is 7.0 kN. / m, which was low, and fracture occurred from the joint interface.
(5) The height difference (L) between the peak of the maximum height of the silicon nitride particles of No. 25 and the valley bottom of the silicon nitride particles or the minimum height of the grain boundary phase is 45 μm, and the peel strength is 6.5 kN. / m, which was low, and fracture occurred from the joint interface.
(6) No. 26 was the same as No. 22 except that the joining method was changed from brazing to direct joining. In this case, too, the peel strength was as low as 7.0 kN / m, and destruction occurred from the joining interface.
(7) No. 27 was the same as No. 22 except that the metal circuit board was changed from copper to aluminum, but also in this case, the peel strength was as low as 6.5 kN / m, and destruction occurred from the joint interface.
(8) No. 28 was the same as No. 27 except that the joining method was changed from brazing to direct joining, but also in this case, the peel strength was as low as 6.2 kN / m, and the fracture occurred from the joining interface.

(実施例2)
実施例1と同様の製造条件により作製した窒化ケイ素基板により図6の回路基板60を作製した。回路基板60は作製した縦50mm×横50mm×厚さ0.6mm寸法の窒化ケイ素基板51の表面にろう材53を介して銅製回路板61を設け、また窒化ケイ素基板51の裏面にもろう材53を介して銅製回路板62を接合して構成されている。得られた窒化ケイ素基板51のRaは5μmであり、窒化ケイ素粒子の面積率は85%であり、粒界相の面積率は15%であり、表面の頂部と谷底との高低差Lは5μmであった。回路基板60に対し、3点曲げ強度試験および耐冷熱サイクル試験を行った。その結果、曲げ強度は600MPa以上と大きく、回路基板60の実装工程における締め付け割れ及びはんだ付け工程時の熱応力に起因するクラックの発生は見られなかった。また回路基板60を実装した半導体装置(図示省略)の製造歩留まりが飛躍的に向上することが実証された。また耐冷熱サイクル試験は、−40℃での冷却を30分間、室温での保持を10分間、及び125℃における加熱を30分間とする昇温/降温サイクルを1サイクルとし、これを繰り返し行い、回路基板60にクラック等が発生するまでのサイクル数を測定した。その結果、1000サイクル経過後でも窒化ケイ素基板51の割れや銅製回路板61、62の剥離はなく、優れた耐久性と信頼性とを兼備することが確認された。また1000サイクル経過後においても回路基板60の耐電圧特性の低下はなかった。さらに、回路基板60を1000枚製造し、上記耐冷熱サイクル試験による不良発生個数のばらつきを調査したが、いずれの回路基板においても窒化ケイ素基板の割れや銅回路板の剥離は発生せず、優れた耐熱衝撃及び耐熱疲労信頼性を堅持していることが確認された。
(Example 2)
A circuit board 60 shown in FIG. 6 was manufactured from a silicon nitride substrate manufactured under the same manufacturing conditions as in Example 1. The circuit board 60 is provided with a copper circuit board 61 via a brazing material 53 on the surface of a manufactured silicon nitride substrate 51 having a size of 50 mm × 50 mm × 0.6 mm in thickness, and a brazing material 53 on the back surface of the silicon nitride substrate 51. The circuit board 62 made of copper is joined through the intermediary of. Ra of the obtained silicon nitride substrate 51 is 5 μm, the area ratio of silicon nitride particles is 85%, the area ratio of the grain boundary phase is 15%, and the height difference L between the top and the valley bottom of the surface is 5 μm. Met. The circuit board 60 was subjected to a three-point bending strength test and a cold / heat resistance test. As a result, the flexural strength was as large as 600 MPa or more, and no crack was generated due to tightening cracks in the mounting process of the circuit board 60 and thermal stress in the soldering process. Further, it has been demonstrated that the manufacturing yield of a semiconductor device (not shown) on which the circuit board 60 is mounted is remarkably improved. In addition, the cooling / heating cycle test was performed by repeating a heating / cooling cycle in which cooling at −40 ° C. for 30 minutes, holding at room temperature for 10 minutes, and heating at 125 ° C. for 30 minutes were one cycle. The number of cycles until a crack or the like occurred on the circuit board 60 was measured. As a result, there was no cracking of the silicon nitride substrate 51 and no peeling of the copper circuit boards 61 and 62 even after the lapse of 1000 cycles, and it was confirmed that both the durability and the reliability were excellent. Also, even after 1000 cycles, the withstand voltage characteristics of the circuit board 60 did not decrease. In addition, 1000 circuit boards 60 were manufactured, and the variation in the number of failures was investigated by the above-mentioned cooling and heat cycle test, but none of the circuit boards showed cracking of the silicon nitride board or peeling of the copper circuit board. It was confirmed that the thermal shock resistance and thermal fatigue reliability were maintained.

本発明の窒化ケイ素基板の代表的な表面部のRa測定結果の一例を示す図である。FIG. 4 is a diagram showing an example of Ra measurement results of a typical surface portion of the silicon nitride substrate of the present invention. 本発明の窒化ケイ素基板の代表的な表面部組織を走査型電子顕微鏡により撮影した顕微鏡写真(a)、(a)に対応する模式図(b)である。FIG. 3 is a schematic diagram (b) corresponding to micrographs (a) and (a) of a typical surface structure of a silicon nitride substrate of the present invention taken by a scanning electron microscope. 本発明の窒化ケイ素基板の代表的な断面組織を走査型電子顕微鏡により撮影した顕微鏡写真(a)および(b)である。3A and 3B are micrographs (a) and (b) of a typical cross-sectional structure of the silicon nitride substrate of the present invention taken by a scanning electron microscope. 図3(b)に対応する模式図である。FIG. 4 is a schematic diagram corresponding to FIG. ピール強度試験用試料を示す断面図である。It is sectional drawing which shows the sample for a peel strength test. 本発明の代表的な回路基板を示す断面図である。1 is a cross-sectional view illustrating a typical circuit board of the present invention. 比較例の窒化ケイ素基板の表面部組織を走査型電子顕微鏡で撮影した写真である。5 is a photograph taken by a scanning electron microscope of a surface structure of a silicon nitride substrate of a comparative example.

符号の説明Explanation of reference numerals

21:窒化ケイ素粒子
22:粒界相
31:Cu回路板
32:ろう材層
33:窒化ケイ素基板
41:窒化ケイ素粒子の最大高さの山頂部
42:窒化ケイ素粒子あるいは粒界相の最低高さの谷底部
43:窒化ケイ素粒子の最大高さの山頂部と窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)
50、60:回路基板
51:窒化ケイ素基板
52:銅合金製またはアルミニウム合金製回路板
53:ろう材
61、62:銅合金製回路板
21: Silicon nitride particles 22: Grain boundary phase 31: Cu circuit board 32: Brazing material layer 33: Silicon nitride substrate 41: Peak height of maximum height of silicon nitride particles 42: Minimum height of silicon nitride particles or grain boundary phase Valley bottom 43: Height difference (L) between the peak of the maximum height of the silicon nitride particles and the valley bottom of the minimum height of the silicon nitride particles or the grain boundary phase
50, 60: circuit board 51: silicon nitride substrate 52: copper alloy or aluminum alloy circuit board 53: brazing material 61, 62: copper alloy circuit board

Claims (3)

実質的に窒化ケイ素粒子と粒界相とからなる窒化ケイ素焼結体基板において、当該焼結体基板表面における窒化ケイ素粒子と粒界相の合計面積率を100%としたとき、前記窒化ケイ素粒子の面積率が85〜100%であり、表面に露出した窒化ケイ素粒子の最大高さの山頂部と、窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)が1.5〜15μmであり、中心線平均粗さ(Ra)が0.2〜5μmの表面性状となした窒化ケイ素基板を有し、当該窒化ケイ素基板の少なくとも一面にCu回路板をろう材相又は酸化膜相を介して接合してなることを特徴とする高強度・高熱伝導性に優れた回路基板。 In a silicon nitride sintered body substrate substantially consisting of silicon nitride particles and a grain boundary phase, when the total area ratio of the silicon nitride particles and the grain boundary phase on the surface of the sintered body substrate is 100%, the silicon nitride particles And the height difference (L) between the peak of the maximum height of the silicon nitride particles exposed on the surface and the bottom of the valley of the lowest height of the silicon nitride particles or the grain boundary phase is 1.5 to 100%. And a center line average roughness (Ra) having a surface property of 0.2 to 5 μm. A Cu circuit board is formed on at least one surface of the silicon nitride substrate with a brazing material phase or an oxide film phase. A circuit board excellent in high strength and high thermal conductivity, characterized by being joined through a substrate. 実質的に窒化ケイ素粒子と粒界相とからなる窒化ケイ素焼結体基板において、当該焼結体基板表面における窒化ケイ素粒子と粒界相の合計面積率を100%としたとき、前記窒化ケイ素粒子の面積率が85〜100%であり、表面に露出した窒化ケイ素粒子の最大高さの山頂部と、窒化ケイ素粒子あるいは粒界相の最低高さの谷底部との高低差(L)が1.5〜15μmであり、中心線平均粗さ(Ra)が0.2〜5μmの表面性状となした窒化ケイ素基板を有し、当該窒化ケイ素基板の少なくとも一面にAl回路板をろう材相又は酸化膜相を介して接合してなることを特徴とする高強度・高熱伝導性に優れた回路基板。 In a silicon nitride sintered body substrate substantially consisting of silicon nitride particles and a grain boundary phase, when the total area ratio of the silicon nitride particles and the grain boundary phase on the surface of the sintered body substrate is 100%, the silicon nitride particles And the height difference (L) between the peak of the maximum height of the silicon nitride particles exposed on the surface and the bottom of the valley of the lowest height of the silicon nitride particles or the grain boundary phase is 1.5 to 100%. And a center line average roughness (Ra) having a surface property of 0.2 to 5 μm. The Al circuit board is formed on at least one surface of the silicon nitride substrate with a brazing material phase or an oxide film phase. A circuit board excellent in high strength and high thermal conductivity, characterized by being joined through a substrate. 前記窒化ケイ素粒子の面積率が90〜100%であり、前記中心線平均粗さ(Ra)が0.2〜2μmのとき、前記高低差(L)が1.5〜5μmであることを特徴とする請求項1又は2記載の高強度・高熱伝導性に優れた回路基板。 The height difference (L) is 1.5 to 5 μm when the area ratio of the silicon nitride particles is 90 to 100% and the center line average roughness (Ra) is 0.2 to 2 μm. 3. The circuit board according to 1 or 2, which is excellent in high strength and high thermal conductivity.
JP2004031711A 2000-10-26 2004-02-09 Circuit board excellent in high strength/high heat conductivity Pending JP2004231513A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004031711A JP2004231513A (en) 2000-10-26 2004-02-09 Circuit board excellent in high strength/high heat conductivity

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000326489 2000-10-26
JP2004031711A JP2004231513A (en) 2000-10-26 2004-02-09 Circuit board excellent in high strength/high heat conductivity

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2001328477A Division JP3539634B2 (en) 2000-10-26 2001-10-26 Silicon nitride substrate for circuit mounting and circuit substrate

Publications (1)

Publication Number Publication Date
JP2004231513A true JP2004231513A (en) 2004-08-19

Family

ID=32964278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004031711A Pending JP2004231513A (en) 2000-10-26 2004-02-09 Circuit board excellent in high strength/high heat conductivity

Country Status (1)

Country Link
JP (1) JP2004231513A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009060902A1 (en) * 2007-11-06 2009-05-14 Mitsubishi Materials Corporation Ceramic substrate, method for producing ceramic substrate, and method for producing substrate for power module
JP2010103168A (en) * 2008-10-21 2010-05-06 Mitsubishi Materials Corp Method for producing ceramic substrate, and method for producing substrate for power-module
EP3125288A4 (en) * 2014-03-25 2017-11-29 KYOCERA Corporation Passage member and semiconductor module
JP2018046106A (en) * 2016-09-13 2018-03-22 三菱マテリアル株式会社 Copper/titanium/aluminum conjugate, insulation circuit board, insulation circuit board with heat sink, power module, led module, and electro-thermal module
US10276757B2 (en) 2016-12-27 2019-04-30 Nichia Corporation Light emitting device and method for manufacturing the same
JP2019114782A (en) * 2017-12-21 2019-07-11 京セラ株式会社 Ceramic plate, semiconductor device, and semiconductor module
US10418533B2 (en) 2016-05-31 2019-09-17 Nichia Corporation Light-emitting device having a light-transmissive member including particles of at least one first filler and method for manufacturing the same
US11887909B2 (en) 2018-02-13 2024-01-30 Mitsubishi Materials Corporation Copper/titanium/aluminum joint, insulating circuit substrate, insulating circuit substrate with heat sink, power module, LED module, and thermoelectric module

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009060902A1 (en) * 2007-11-06 2009-05-14 Mitsubishi Materials Corporation Ceramic substrate, method for producing ceramic substrate, and method for producing substrate for power module
US9079264B2 (en) 2007-11-06 2015-07-14 Mitsubishi Materials Corporation Ceramic substrate, method of manufacturing ceramic substrate, and method of manufacturing power module substrate
JP2010103168A (en) * 2008-10-21 2010-05-06 Mitsubishi Materials Corp Method for producing ceramic substrate, and method for producing substrate for power-module
EP3125288A4 (en) * 2014-03-25 2017-11-29 KYOCERA Corporation Passage member and semiconductor module
US11430928B2 (en) 2016-05-31 2022-08-30 Nichia Corporation Light-emitting device with exposed filter particles
US10418533B2 (en) 2016-05-31 2019-09-17 Nichia Corporation Light-emitting device having a light-transmissive member including particles of at least one first filler and method for manufacturing the same
JP2018046106A (en) * 2016-09-13 2018-03-22 三菱マテリアル株式会社 Copper/titanium/aluminum conjugate, insulation circuit board, insulation circuit board with heat sink, power module, led module, and electro-thermal module
US10276757B2 (en) 2016-12-27 2019-04-30 Nichia Corporation Light emitting device and method for manufacturing the same
US10741733B2 (en) 2016-12-27 2020-08-11 Nichia Corporation Light emitting device
JP2019114782A (en) * 2017-12-21 2019-07-11 京セラ株式会社 Ceramic plate, semiconductor device, and semiconductor module
JP7264627B2 (en) 2017-12-21 2023-04-25 京セラ株式会社 Ceramic plates, semiconductor devices and semiconductor modules
JP7519497B2 (en) 2017-12-21 2024-07-19 京セラ株式会社 CERAMIC PLATE, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MODULE
US11887909B2 (en) 2018-02-13 2024-01-30 Mitsubishi Materials Corporation Copper/titanium/aluminum joint, insulating circuit substrate, insulating circuit substrate with heat sink, power module, LED module, and thermoelectric module

Similar Documents

Publication Publication Date Title
KR100836150B1 (en) Sintered silicon nitride, method of manufacturing the same and sintered silicon nitride substrate
JP3539634B2 (en) Silicon nitride substrate for circuit mounting and circuit substrate
KR100232660B1 (en) Silicon nitride circuit board
KR100371974B1 (en) Copper circuit junction substrate and method of producing the same
JP5245405B2 (en) Silicon nitride substrate, manufacturing method thereof, silicon nitride wiring substrate using the same, and semiconductor module
EP2296177B1 (en) Method for manufacturing a power module substrate
US6569514B2 (en) Ceramic circuit board and method of manufacturing the same
JP2010103570A (en) Ceramic circuit board
KR20200021019A (en) Production method of nitride ceramics active metal brazing substrate having excellent bonding strength
JP2698780B2 (en) Silicon nitride circuit board
JP5667045B2 (en) Aluminum nitride substrate, aluminum nitride circuit substrate, and semiconductor device
TW201841310A (en) Manufacturing method of insulated circuit substrate with heat sink
JP2004231513A (en) Circuit board excellent in high strength/high heat conductivity
JP2013182960A (en) Silicon nitride circuit substrate and method of manufacturing the same
JP3450570B2 (en) High thermal conductive silicon nitride circuit board
JP2772273B2 (en) Silicon nitride circuit board
JP5248381B2 (en) Aluminum nitride substrate, method for manufacturing the same, circuit substrate, and semiconductor device
JP2009088330A (en) Semiconductor module
JP4404602B2 (en) Ceramics-metal composite and high heat conduction heat dissipation substrate using the same
JPH1065292A (en) Composite circuit board
JP2005255462A (en) Silicon nitride sintered compact, method for manufacturing the same and circuit board using the same
JP4772187B2 (en) AlN sintered body and AlN circuit board using the same
JPH11100274A (en) Silicon nitride sintered compact, its production and circuit board
JP5073135B2 (en) Aluminum nitride sintered body, production method and use thereof
JP2967065B2 (en) Semiconductor module