JP2004221319A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device using a COF (chip-on film) method capable of preventing the generation of any void in the periphery of an electrode pad in sealing with resin due to the narrowly pitching of a clearance between the electrode/electrode pad of a semiconductor chip. <P>SOLUTION: When an Au bump 4 of a semiconductor chip 1 is connected to predetermined conductor wiring 6 of a film substrate 5, a semiconductor chip 1 is connected in a status 20 where a film base material 5 is bent so that a clearance between the semiconductor chip 1 and the film base material 5 can be made large. In this status, resin 7 is injected from the semiconductor chip 1 side face by a nozzle 8, and the film base material 6 is pressurized by a tool 22 so that the resin 7 can be exposed from the semiconductor chip 1 side face. Thus, any void generated in the neighborhood of the Au bump 4 can be pushed out and eliminated at the time of injecting the resin. Then, the resin 7 is hardened. Thus, it is possible to prevent any void (clearance) in the periphery of the electrode in sealing with resin, and to realize the highly reliable semiconductor device. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device manufacturing method related to a chip-on-film (COF) method using a film substrate.
[0002]
[Prior art]
In recent years, demand for liquid crystal displays, such as notebook PCs, liquid crystal TVs, mobile phones, and car navigation systems, has exploded. The main method of expressing images with liquid crystal is the STN or TFT method, but semiconductor devices and liquid crystal drivers that drive liquid crystals with vivid image color, high brightness, and compatibility with moving images are also highly efficient. Is required.
[0003]
Conventionally, semiconductor devices called liquid crystal drivers are:
(1) COG (chip-on-glass) method of mounting on the periphery of a liquid crystal glass substrate (2) A method of mounting a package called TCP (tape carrier package) on the periphery of a liquid crystal glass substrate has been adopted. The TCP of the above (2) includes a TAB (tape automated bonding) method and a COF (chip-on-film) method.
[0004]
The TAB method will be described with reference to the drawings. FIG. 9A is a perspective view of a manufacturing process for explaining the TAB method, and FIG. 9B is a cross-sectional view of the same process. As shown in FIG. 9, a device hole 25 is opened in the film base 5 at a portion where the semiconductor chip 1 is connected. Here, the wiring 6 is slightly projected from the film substrate 5 into the device hole 25, and is bonded to the Au bump 4 on the electrode pad of the semiconductor chip 1 (this is called inner lead bonding (ILB)). After that, the resin 7 is dropped from the nozzle 8 into the device hole 25 to cover the surface of the semiconductor chip 1.
[0005]
However, the COF method has been increasing in recent years instead of the TAB method. This COF method has no device holes and connects semiconductor chips on a film substrate on which conductor wiring is formed. This configuration has an advantage that the Au bumps of the semiconductor chip having a reduced pitch can be more stably connected to the conductor wiring on the film substrate.
[0006]
A conventional semiconductor device using the COF method will be described with reference to the drawings.
[0007]
First, FIG. 6 is a plan view showing a layout of electrode pads of a semiconductor chip used in a conventional semiconductor device and a partially enlarged view thereof.
[0008]
As shown in FIG. 6, a semiconductor chip 1 mainly serving as a liquid crystal driving driver has a rectangular surface shape, and hundreds to thousands of scanning lines intersecting on a liquid crystal screen for displaying an image. Need to be driven by In order to drive each of these scanning lines, one semiconductor chip 1 needs to have several hundred or more electrode pads 2 serving as I / O terminals. However, the wiring rule of the semiconductor chip 1 has been miniaturized every day, and the pitch of the adjacent electrode pads 2 has been narrowed accordingly. The current electrode pad pitch is about 40 to 50 μm, but in the future, the pitch is becoming narrower and it is about to become smaller than 40 μm. For this purpose, when the semiconductor chip is directly connected to the wiring of the film base as in a chip-on-glass (COG) method or a COF method in which the semiconductor chip is mounted on the periphery of a liquid crystal glass substrate, as shown in FIG. It is known that the arrangement of the pads 2 is staggered in two or more rows (for example, see Patent Document 1).
[0009]
7A is a perspective view showing a conventional method of manufacturing a semiconductor device by the COF method, FIG. 7B is a cross-sectional view thereof, and FIG. 7C is a cross-sectional view in which a part thereof is enlarged.
[0010]
The configuration of the COF has a plurality of Au bumps 4 on the electrode pads 2 of the semiconductor chip 1, and the Au bumps 4 are connected to the conductor wires 6 of the film base 5 having the plurality of conductor wires 6, and The space between the film bases 5 is sealed so as to cover the entire surface of the semiconductor chip 1 including the Au bumps 4 on the electric circuit side, which is the surface of the semiconductor chip 1, with the resin 7. The film substrate 5 has the same wiring 6 pattern as one semiconductor device continuously connected so that a plurality of semiconductor devices can be manufactured continuously.
[0011]
In this method of manufacturing a semiconductor device, the semiconductor chip 1 is thermocompressed by being opposed to the surface of the film substrate 5 having the conductor wiring 6 placed on a flat surface with the surface of the semiconductor chip 1 having the Au bumps 4 facing down. A step of connecting the wiring 6 and the Au bump 4 and a resin sealing step of injecting a liquid resin 7 between the surface side of the semiconductor chip 1 including the Au bump 4 and the film substrate 5 to cover and cure the resin. I have.
[0012]
Further, conventionally, since the pitch between the electrode pads of the semiconductor chip is reduced, a method of improving the pattern of the film base material has been devised as a method of solving a void generated near the electrode pad during resin sealing (for example, Patent Document 2).
[0013]
[Patent Document 1]
JP-A-62-152154 (page 1-2, FIG. 2)
[Patent Document 2]
JP-A-2002-124526 (pages 5 to 6, FIGS. 1 and 2)
[0014]
[Problems to be solved by the invention]
However, in the conventional semiconductor device, since the electrode pads of the semiconductor chip are narrowed and staggered, there is a problem that voids are generated near the electrode pads during resin sealing.
[0015]
This problem will be described with reference to FIG. FIG. 8 shows a state in which voids are generated between electrode pads of a semiconductor chip at the time of resin sealing. FIG. 8A is a plan view thereof, and FIG. 8B is a plan view thereof. 5 is a sectional view taken along line YY ′ of FIG. 8A, a liquid resin 7 is applied by a nozzle 8 (FIG. 7) along the side surface of the connected semiconductor chip 1 from the resin injection direction indicated by the arrow, and the liquid resin 7 is applied between the semiconductor chip 1 and the film base 5. Inject into At that time, the resin 7 enters between the Au bumps 4 connected to the wirings 6 of the film base 5. At this time, air is entrained in the vicinity of the bumps 4, and voids 19 (voids) are generated. Here, the space between the semiconductor chip 1 and the film substrate 5 is only 10 to 30 μm, and the gap between the conductor wirings 6 is 10 to 25 μm.
[0016]
SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problem, and in a semiconductor device using the COF method, prevents generation of voids around an electrode at the time of resin sealing due to a narrow pitch of an electrode (electrode pad) of a semiconductor chip. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be used.
[0017]
[Means for Solving the Problems]
The method of manufacturing a semiconductor device according to the present invention is directed to a semiconductor device in which bumps are formed on a plurality of electrodes arranged on a rectangular surface, and among the plurality of electrodes, electrodes along at least one side of the rectangular surface are staggered. Connecting the bumps and the wiring electrodes with the surface of the chip and the surface of the film substrate on which the wiring electrodes are formed facing, injecting a sealing resin between the semiconductor chip and the film substrate; A method of manufacturing a semiconductor device including a step of curing a resin.
[0018]
In the method of manufacturing a semiconductor device according to the first aspect of the present invention, when the bump and the wiring electrode are connected, the distance between the semiconductor chip and the film substrate is smaller than that of the peripheral portion where the electrode of the semiconductor chip exists. The part of the film substrate facing the center is connected in a bent state so that the center part becomes larger, and after the sealing resin is injected and cured, the film substrate is on the side opposite to the semiconductor chip side. From the pressure.
[0019]
According to the first aspect, the semiconductor chip is connected in a state where the film substrate is deflected, and after the sealing resin is injected and cured, the film substrate is pressed from the side opposite to the semiconductor chip side. In addition, the sealing resin protrudes from between the semiconductor chip and the film substrate by bending outwardly of the film substrate, and the voids generated during the resin injection can be pushed out, thereby narrowing the pitch of the electrodes of the semiconductor chip. This can prevent the generation of voids around the electrodes during resin sealing.
[0020]
In the method of manufacturing a semiconductor device according to claim 2 of the present invention, in the step of injecting the sealing resin, the semiconductor chip and the film substrate are inclined with respect to a horizontal plane, and the side where the semiconductor chip is located at the higher side and the film It is characterized in that a sealing resin is injected from a gap with the substrate.
[0021]
According to the second aspect, the flow of the sealing resin can be improved by injecting the sealing resin from the higher gap while the semiconductor chip and the film substrate are inclined with respect to the horizontal plane, so that the flow of the semiconductor chip can be improved. The generation of voids around the electrodes during resin sealing due to the narrow pitch of the electrodes can be prevented.
[0022]
According to a third aspect of the present invention, in the method of manufacturing a semiconductor device, after the bump and the wiring electrode are connected, the film substrate is heated when the sealing resin is injected immediately before the sealing resin is injected. And heating at a second temperature lower than the second temperature.
[0023]
According to the third aspect, immediately before the sealing resin is injected, the film substrate is heated at a temperature lower than the temperature at which the film substrate is heated when the sealing resin is injected. Since the flowability of the sealing resin can be improved and the pitch of the electrodes of the semiconductor chip can be narrowed, the generation of voids around the electrodes during resin sealing can be prevented.
[0024]
According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device according to the third aspect, the second temperature is 30 to 60 ° C. It is preferable to set the temperature in this manner.
[0025]
In the method of manufacturing a semiconductor device according to a fifth aspect of the present invention, before the step of connecting the bump and the wiring electrode, the surface of the semiconductor chip branches between the electrodes in the direction of injection of the sealing resin. The method is characterized by including a step of forming a projected portion.
[0026]
According to the fifth aspect, by forming the projections on the surface of the semiconductor chip, the flow of the sealing resin can be promoted when the sealing resin is injected, and the pitch of the electrodes of the semiconductor chip can be reduced. This can prevent the generation of voids around the electrodes during resin sealing.
[0027]
The method of manufacturing a semiconductor device according to claim 6 of the present invention includes a step of irradiating the surface of the semiconductor chip or the surface of the film substrate with plasma before the step of connecting the bump and the wiring electrode. I do.
[0028]
According to the sixth aspect, by irradiating the surface of the semiconductor chip or the film substrate with plasma, the wettability of the surface of the semiconductor chip or the film substrate with the sealing resin can be improved. Flow can be improved, so that the generation of voids around the electrodes at the time of resin sealing due to the narrow pitch of the electrodes of the semiconductor chip can be prevented.
[0029]
A method of manufacturing a semiconductor device according to a seventh aspect of the present invention is the method of manufacturing a semiconductor device according to any one of the first to fourth aspects, wherein the semiconductor chip is mounted before the step of connecting the bump and the wiring electrode. A step of forming a projection branched on the surface of the substrate toward the injection direction of the sealing resin by passing between the electrodes.
[0030]
According to the seventh aspect, in addition to the effect of any one of the first to fourth aspects, by forming the above-described protrusion on the surface of the semiconductor chip, the flow of the sealing resin is prevented when the sealing resin is injected. This can further promote the generation of voids around the electrodes during resin sealing due to the narrow pitch of the electrodes of the semiconductor chip.
[0031]
According to a method of manufacturing a semiconductor device according to claim 8 of the present invention, in the method of manufacturing a semiconductor device according to any one of claims 1 to 5 and 7, before the step of connecting the bump and the wiring electrode, A step of irradiating the surface of the semiconductor chip or the surface of the film substrate with plasma.
[0032]
According to the eighth aspect, in addition to the effect of any one of the first to fifth and seventh aspects, the surface of the semiconductor chip or the film substrate is irradiated with plasma to seal the surface of the semiconductor chip or the film substrate. Since the wettability with the sealing resin can be improved and the flow of the sealing resin can be improved, the generation of voids around the electrodes at the time of resin sealing due to the narrow pitch of the electrodes of the semiconductor chip can be further prevented.
[0033]
According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device according to any one of the first to eighth aspects, the step of injecting the sealing resin includes the step of staggering the semiconductor chips. The sealing resin is injected from a gap between the side along the electrode and the film substrate.
[0034]
As in the ninth aspect, it is preferable to inject the sealing resin from the gap between the side along the staggered electrodes of the semiconductor chip and the film substrate.
[0035]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each of the embodiments described below, a semiconductor device manufactured by the COF method is described, and the features of the present invention in the manufacturing process of the semiconductor device will be mainly described.
[0036]
(First Embodiment)
FIG. 1 is a cross-sectional view showing a part of a manufacturing process of a semiconductor device according to a first embodiment of the present invention.
[0037]
FIG. 1 shows a connecting step of the semiconductor chip 1 and a resin sealing step in the manufacturing steps of the semiconductor device. In the step of connecting the Au bumps 4 of the semiconductor chip 1 to the predetermined conductor wirings 6 of the film substrate 5, the film substrate 5 is bent so that the gap between the semiconductor chip 1 and the film substrate 5 becomes large. At 20, the semiconductor chip 1 is pressed and connected by a bonding tool 17, and in a resin sealing step, the resin 7 is injected from the side of the semiconductor chip 1 with the nozzle 8 so as to enter the gap. Pressing at 22 causes the resin 7 to protrude from the side surface of the semiconductor chip 1. As a result, the voids generated near the bumps 4 can be pushed out and disappear. Thereafter, the resin 7 is cured. Here, for example, in the present embodiment, the semiconductor substrate 1 is connected while the film base 5 is being sucked by the suction holes 21 of the bonding stage 16 to create a bent state 20 of the film base 5.
[0038]
As described above, according to the present embodiment, the semiconductor chip 1 is connected in a state where the film base member 6 has a flexure, and the flexure is returned to its original state before the resin 7 is applied and cured, and the resin 7 is converted into a semiconductor. By protruding from the chip 1, voids generated at the time of injecting the resin 7 can be pushed out. Therefore, generation of voids around the electrode pads 2 at the time of resin sealing due to narrowing of the pitch of the electrode pads 2 of the semiconductor chip 1 can be prevented. Can be prevented.
[0039]
(Second embodiment)
2A and 2B are diagrams showing a part of a manufacturing process of a semiconductor device according to a second embodiment of the present invention. FIG. 2A is a perspective view, and FIG. 2B is a sectional view.
[0040]
As shown in FIG. 2, the resin sealing step in the manufacturing process of the semiconductor device is shown. In order to improve the fluidity of the sealing resin, the resin coating stage 11 in the resin sealing step is set at 5 ° to 45 °.傾斜 has an inclination angle of 14. For example, in this embodiment, the inclination angle 14 is 30 °, and the resin 7 is injected from the nozzle 8 along a predetermined side surface of the semiconductor chip 1 at this inclination angle. Thereafter, the resin 7 is cured.
[0041]
As described above, according to the present embodiment, the resin coating stage 11 is provided with the angle 14 at the time of resin sealing to improve the flow of the resin 7, and thereby the resin sealing by narrowing the pitch of the electrode pads 2 of the semiconductor chip 1 The generation of voids around the electrode pad 2 at the time of stopping can be prevented. Further, a higher effect can be obtained by giving a twist angle to the resin application stage 11 and setting the corner portion of the semiconductor chip 1 at the beginning of the resin injection to the highest position. This utilizes two things: capillary action, in which liquid penetrates into a narrow part, and gravity. Here, as an effect of further enclosing the resin application stage 11 at an angle 14 and sealing the resin, immediately after the resin 7 is dropped, the resin 7 tends to go downward under the position where the semiconductor chip 1 is placed according to gravity. There is also an advantage that it is difficult to spread upward, and as a result, the area of the sealing resin can be formed small.
[0042]
(Third embodiment)
FIG. 3 is a cross-sectional view showing a part of a manufacturing process of a semiconductor device according to a third embodiment of the present invention, and FIG. 3A is an enlarged view on a resin application stage 11 of FIG. It is.
[0043]
FIG. 3 shows a resin sealing step in the manufacturing steps of the semiconductor device. In a resin sealing step of injecting a resin 7 between the semiconductor chip 1 and the film base 5 and covering the entire surface of the semiconductor chip 1 including the Au bumps 4 on the electric circuit side, which is the surface, with the resin 7, Before the resin sealing 7 is applied, a pre-heater 10 is provided immediately below the film substrate 5 in order to improve the fluidity. Then, preheating is performed at a temperature lower by 10 ° C. to 40 ° C. than the temperature at the time of applying the sealing resin 7 (however, within a range of 30 to 60 ° C.). For example, in the case of the present embodiment, the temperature of the heater 10 is set to 50 ° C. Then, at the time of resin sealing application, the temperature is set so that the viscosity of the sealing resin 7 is low and the wettability is improved. For example, in the case of the present embodiment, the temperature of the resin application stage 11 is set to 80 ° C. As another method, a method of exposing to a temperature atmosphere or a method of partially increasing the temperature by infrared rays may be used. Immediately after the application of the resin sealing, the temperature required to prevent the sealing resin 7 from solidifying to some extent and not flowing to other parts, for example, in the case of the present embodiment, the temperature in the temporary curing furnace or the main curing furnace 12 Applies 120 ° C. heat. Further, the syringe 24 of the sealing resin 7 is heated by the electric heating coil 13 to hold the sealing resin 7 immediately before application at a temperature of 30 ° C. to 60 ° C. For example, in the case of the present embodiment, heating is performed at 40 ° C.
[0044]
As described above, according to the present embodiment, by heating with the heater 10 immediately before the application of the resin 7, the wettability of the film substrate 5 with the resin 7 can be improved, and the flow of the resin 7 can be improved. The resin 7 quickly penetrates between the chip 1 and the film base 5, and the generation of voids around the electrode pads 2 during resin sealing due to the narrow pitch of the electrode pads 2 of the semiconductor chip 1 can be prevented.
[0045]
Further, a heater (electric heating coil 13) is also attached to the syringe 24 of the resin 7 to reduce the viscosity of the resin, so that the flow of the resin 7 is further improved, and the space between the semiconductor chip 1 and the film base 5 is more quickly increased. The resin 7 permeates and the generation of voids can be further prevented.
[0046]
FIG. 4 is an example of a graph showing the correlation between the temperature and the viscosity characteristics of the sealing resin 7 which is a liquid epoxy resin used in the present embodiment, and the horizontal axis shows the temperature and the vertical axis shows the viscosity.
[0047]
As shown in FIG. 4, the correlation between the temperature and the viscosity of the liquid epoxy resin is about 1 Pa · S at 20 ° C., which is room temperature, but is 0.20 Pa · S at 40 ° C. and 0.03 Pa · S at 60 ° C. It becomes. However, since the curing reaction of the resin starts when the temperature exceeds 80 ° C., the temperature load before application of the resin 7 needs to be suppressed to 60 ° C. or less in practice.
[0048]
(Fourth embodiment)
FIG. 5 is a plan view showing an example of a semiconductor chip used in the fifth embodiment of the present invention and an enlarged view thereof.
[0049]
As shown in FIG. 5, at least a part of the electrode pads 2 of the semiconductor chip 1 is arranged in a staggered pattern, and a capillary-shaped projection pattern 3 is formed of polyimide on a portion other than the electrode pads 2 of the semiconductor chip 1. I have. The capillary-shaped pattern 3 promotes the flow of the resin 7 in the resin sealing step, and eliminates voids between the electrode pads 2. The line width of the capillary-shaped pattern 3 is set to a line width of about 0.01 μm to 0.5 μm, and the design becomes more branched like a tree branch toward the tip.
[0050]
The capillary-shaped pattern 3 is to form interpenetrating polymer networks by a resin on the semiconductor chip 1, and the molecules of the linear polymer are densely cross-linked to form a capillary like a human body. A structure in which meshes are intertwined can be formed. For example, when an epoxy resin is formed as a main component, it can be formed, for example, by adding 1 to 3% of ethylene glycol dimethacrylate as a crosslinking agent to the composition of a glycidyl methacrylate-based epoxy resin and an acrylic monomer.
[0051]
As described above, by forming the capillary-shaped pattern 3 passing between the electrode pads 2 arranged in a staggered manner on the surface of the semiconductor chip 1, the resin 7 is sealed in the resin sealing step after the connection step of the semiconductor chip 1. The flow can be promoted, and the generation of voids around the electrode pads 2 during resin sealing due to the narrow pitch of the electrode pads 2 of the semiconductor chip 1 can be prevented.
[0052]
Further, before the step of connecting the semiconductor chip 1 and the film substrate 5, the surface of the semiconductor chip 1 or the film substrate 5 is further subjected to plasma irradiation 15 so that the surface of the semiconductor chip 1 or the film substrate 5 is The wettability with the sealing resin 7 may be improved to improve the flowability of the sealing resin 7. That is, for example, when the irradiation target substance is a polyimide material, the plasma irradiation 15 generates a reactive functional group such as a carboxyl group or an amino group to improve the wettability, and also etches (roughens) the surface to provide an anchor effect. Adhesion can be improved.
[0053]
The effect can be obtained only by forming the capillary-shaped pattern 3 on the surface of the semiconductor chip 1, and the effect can be obtained only by applying the plasma irradiation 15 to the surface of the semiconductor chip 1 or the film substrate 5. .
[0054]
In the first, second, and third embodiments described above, a capillary-shaped pattern 3 is further formed on the surface of the semiconductor chip 1, and plasma irradiation 15 is performed on the surface of the semiconductor chip 1 or the film base 5. By performing the above, the generation of voids can be further prevented.
[0055]
In the semiconductor devices according to the first to fourth embodiments, as shown in FIG. 5 or FIG. 6, there are electrode pads 2 along four sides of the semiconductor chip 1, and one of the electrode pads 2 2 may be in a staggered arrangement, or a plurality of sides, or in some cases, four sides may be in a staggered arrangement. Further, the application (injection) of the sealing resin 7 from the nozzle 8 is not limited to only one side having a staggered arrangement, but may be on a plurality of sides.
[0056]
In Japanese Unexamined Patent Application Publication No. 2002-124526 (the aforementioned Patent Document 2), a dummy pattern is provided at a corner portion of a semiconductor chip so that the semiconductor chip functions as a dam in the direction of injection of the sealing resin. The purpose is to reduce the injection speed of the sealing resin from the, and to reduce the variation of the injection speed of the resin depending on the location.In this case, some effects may be expected for large voids in the chip, No action is taken against the cause of the voids when the protruding electrodes are arranged in a staggered arrangement, and there is no effect. On the other hand, in the embodiment of the present invention, first, in the case of FIG. 1, even if a void is generated in a portion where the electrode pads 2 and the Au bumps 4 are arranged in a staggered manner, it is devised so as to be driven out. In the case of FIG. 3 and the plasma irradiation 15 of FIG. 5, the resin injection speed is promoted to such an extent that the sealing resin injection speed variation due to the staggered design variation can be ignored. Further, in the capillary-shaped pattern 3 in FIG. 5, the patterns are arranged so as to make the staggered design variation less noticeable. Therefore, in each method, it is possible to reduce the voids generated due to the design variation of the staggered arrangement.
[0057]
【The invention's effect】
As described above, according to the present invention, by narrowing the pitch of the electrodes of the semiconductor chip, it is possible to eliminate voids (voids) around the electrodes at the time of resin sealing, which has conventionally occurred, and to obtain a highly reliable semiconductor. The device can be realized.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a part of a manufacturing process of a semiconductor device according to a first embodiment of the present invention.
FIGS. 2A and 2B are a perspective view and a cross-sectional view illustrating a part of a manufacturing process of a semiconductor device according to a second embodiment of the present invention; FIGS.
3A and 3B are a cross-sectional view and an enlarged view showing a part of a manufacturing process of a semiconductor device according to a third embodiment of the present invention.
FIG. 4 is a diagram showing a correlation between temperature and viscosity characteristics of a sealing resin according to a third embodiment of the present invention.
FIG. 5 is a plan view showing an example of a semiconductor chip used in a semiconductor device according to a fourth embodiment of the present invention, and an enlarged view thereof.
FIG. 6 is a plan view showing an example of a semiconductor chip used in a conventional semiconductor device and an enlarged view thereof.
FIG. 7 is a perspective view, a cross-sectional view, and an enlarged view showing a part of a manufacturing process of a conventional semiconductor device.
8A and 8B are a plan view and a cross-sectional view of a part of a semiconductor device showing a conventional problem.
FIG. 9 is a perspective view and a cross-sectional view showing a part of a conventional semiconductor device manufacturing process by a TAB method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Electrode pad 3 Capillary pattern on semiconductor chip 4 Au bump 5 Film base 6 Conductor wiring 7 Sealing resin 8 Nozzle 9 Heater 10 Preheater 11 Resin application stage 12 Temporary curing furnace or full curing furnace 13 Syringe heating coil 14 Stage angle 15 Plasma irradiation 16 Bonding stage 17 Bonding tool 18 Sprocket hole 19 Void 20 Deflection of film base material 21 Suction hole 22 Sealing resin extrusion tool 23 Solder resist 24 Syringe 25 Device hole

Claims (9)

A bump is formed on a plurality of electrodes arranged on a rectangular surface, and the surface of the semiconductor chip in which electrodes along at least one side of the rectangular surface among the plurality of electrodes are arranged in a staggered manner; Connecting the bumps and the wiring electrodes with the surface of the film substrate having the surface formed thereon facing thereto, injecting a sealing resin between the semiconductor chip and the film substrate, Curing the semiconductor device, comprising:
When connecting the bumps and the wiring electrodes, the distance between the semiconductor chip and the film substrate is larger in a central part where the electrodes are not present than in a peripheral part where the electrodes of the semiconductor chip are present. The portion of the film substrate facing the central portion is connected in an outwardly bent state, and after the sealing resin is injected and cured, the film substrate is pressed from the side opposite to the semiconductor chip side. A method for manufacturing a semiconductor device, comprising: A bump is formed on a plurality of electrodes arranged on a rectangular surface, and the surface of the semiconductor chip in which electrodes along at least one side of the rectangular surface among the plurality of electrodes are arranged in a staggered manner; Connecting the bumps and the wiring electrodes with the surface of the film substrate having the surface formed thereon facing thereto, injecting a sealing resin between the semiconductor chip and the film substrate, Curing the semiconductor device, comprising:
In the step of injecting the sealing resin, the semiconductor chip and the film substrate are inclined with respect to a horizontal plane, and the sealing resin is injected from a gap between the higher side of the semiconductor chip and the film substrate. A method for manufacturing a semiconductor device, comprising: A bump is formed on a plurality of electrodes arranged on a rectangular surface, and the surface of the semiconductor chip in which electrodes along at least one side of the rectangular surface among the plurality of electrodes are arranged in a staggered manner; Connecting the bumps and the wiring electrodes by facing the surface of the film substrate on which is formed, and sealing the semiconductor chip and the film substrate while heating the film substrate to a first temperature. A method of manufacturing a semiconductor device including a step of injecting a sealing resin and a step of curing the sealing resin,
A step of heating the film substrate at a second temperature lower than the first temperature immediately after connecting the bump and the wiring electrode and immediately before injecting the sealing resin. Device manufacturing method. The method according to claim 3, wherein the second temperature is 30 to 60 ° C. 5. A bump is formed on a plurality of electrodes arranged on a rectangular surface, and the surface of the semiconductor chip in which electrodes along at least one side of the rectangular surface among the plurality of electrodes are arranged in a staggered manner; Connecting the bumps and the wiring electrodes with the surface of the film substrate having the surface formed thereon facing thereto, injecting a sealing resin between the semiconductor chip and the film substrate, Curing the semiconductor device, comprising:
Before the step of connecting the bump and the wiring electrode, the method further comprises a step of forming a projection branched on the surface of the semiconductor chip in the injection direction of the sealing resin through the space between the electrodes. Semiconductor device manufacturing method. A bump is formed on a plurality of electrodes arranged on a rectangular surface, and the surface of the semiconductor chip in which electrodes along at least one side of the rectangular surface among the plurality of electrodes are arranged in a staggered manner; Connecting the bumps and the wiring electrodes with the surface of the film substrate having the surface formed thereon facing thereto, injecting a sealing resin between the semiconductor chip and the film substrate, Curing the semiconductor device, comprising:
A method of manufacturing a semiconductor device, comprising a step of irradiating a plasma to a surface of the semiconductor chip or a surface of the film substrate before the step of connecting the bump and the wiring electrode. 2. The method according to claim 1, further comprising, before the step of connecting the bump and the wiring electrode, a step of forming a projection on the surface of the semiconductor chip, the projection protruding toward the injection direction of the sealing resin through the space between the electrodes. 5. The method for manufacturing a semiconductor device according to any one of items 4 to 4. 8. The semiconductor according to claim 1, further comprising a step of irradiating a plasma to a surface of the semiconductor chip or a surface of the film substrate before the step of connecting the bump and the wiring electrode. Device manufacturing method. 9. The step of injecting the sealing resin, wherein the sealing resin is injected from a gap between a side of the semiconductor chip along the staggered electrodes and a film substrate. 13. The method for manufacturing a semiconductor device according to claim 1.

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