JP2004221285A - Device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin device equipped with a semiconductor element and a micro machine. <P>SOLUTION: A board 20 where the micro machine (MEMS:micro electromechanical system) 1 is formed, and a semiconductor layer 3 where the semiconductor element is provided, are joined together with an adhesive layer 2 for the formation of a mixed mounting device. The semiconductor layer 3 can be formed through such a manner that a member equipped with an isolation layer (e.g. a porous layer) under the semiconductor layer 3 where the semiconductor element is formed and the board 20 are laminated together, and the member is divided along the isolation layer. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a device having a semiconductor element and a micromachine.
[0002]
[Prior art]
2. Description of the Related Art In recent years, attention has been focused on sensors and communication devices using micromachines. Micromachines are also called MEMS (microelectromechanical systems).
[0003]
As an application of the MEMS technology, RF (Radio Frequency) -MEMS is attracting attention. RF-MEMS includes, for example, a switch, an inductor, a variable capacitor, and the like, and each has advantageous characteristics as compared with a device that does not use MEMS. The switch has features such as low insertion loss and low isolation at high frequencies, for example, as compared with commonly used PIN diodes and the like. The inductor has, for example, a feature that the generated magnetic field is not applied to the lower high-frequency circuit because the winding direction can be parallel to the substrate. The variable capacitor has a feature that, for example, since the electrode width of the capacitor physically moves, a filter having a high Q value can be manufactured. For example, assuming that only the switch is formed by MEMS technology, the other parts can be configured by conventional semiconductor circuits instead of MEMS, and the entire high-frequency circuit can be constructed by utilizing the excellent high-frequency characteristics of the MEMS switch. .
[0004]
Switches, inductors, variable capacitors, and the like based on MEMS, for example, RF-MEMS, tend to be large in size because they have mechanically movable parts.
[0005]
Therefore, when the MEMS and the high-frequency circuit are arranged side by side, the overall size increases.
[0006]
Further, RF-MEMS has a thickness of several tens of μm and a width of several μm, for example, like a comb-shaped electrode, and is thus produced by a so-called electrodeposition process in which a desired structure is electrochemically deposited in a solution. Often. On the other hand, in a semiconductor portion such as a high frequency or an amplifier circuit, each element constituting the semiconductor portion is formed in a submicron size of about 0.1 to 0.5 μm. Process is mainly used.
[0007]
Therefore, the MEMS portion and the semiconductor portion such as a high-frequency circuit and an amplifier circuit have different environments such as required dimensions, manufacturing facilities, and required cleanliness, and are often manufactured on different manufacturing lines. Therefore, it is difficult to fabricate the MEMS portion and the semiconductor portion on the same substrate on the same manufacturing line.
[0008]
[Problems to be solved by the invention]
As described above, in the device having the conventional semiconductor element and the micromachine, 1) the portion formed by the MEMS technology requires a relatively large area due to the presence of a mechanically movable portion. The arrangement increases the size of the entire device. 2) Since the semiconductor portion and the MEMS portion are manufactured by different processes, if they are formed on the same substrate, the acidity used in the electrodeposition process is high. There is a problem that the liquid may come into contact with the semiconductor portion, and the process becomes complicated to prevent the liquid.
[0009]
Further, in a conventional technology in which a substrate on which a MEMS is formed and a substrate on which a semiconductor circuit is formed are bonded with an adhesive or the like, the MEMS is formed on a semiconductor circuit formed on a silicon substrate with an insulating film interposed therebetween. The formed substrate is arranged. In this case, there is a problem that the thickness of the entire device to be manufactured is large, it is difficult to apply the device to an application requiring flexibility, and it is difficult to laminate the device with other members.
[0010]
The present invention has been made in consideration of the above problems, and has as its object to provide, for example, a thin device having a semiconductor element and a micromachine.
[0011]
[Means for Solving the Problems]
A device according to a first aspect of the present invention relates to a device having a semiconductor element and a micromachine. The device includes a semiconductor layer on which a semiconductor element is formed, and a substrate on which a micromachine is formed. The semiconductor layer is laminated with the substrate, and the semiconductor layer is a semiconductor layer obtained by dividing a member having a separation layer below the semiconductor layer by the separation layer.
[0012]
A device according to a second aspect of the present invention relates to a device having a semiconductor element and a micromachine. The device includes a semiconductor layer on which a semiconductor element is formed, and a substrate on which a micromachine is formed. , A first surface and a second surface, wherein the first surface is bonded to the substrate directly or via a bonding layer, and the second surface has a layer having a structure weaker than the semiconductor layer. Are adjacent. Here, the layer having the fragile structure may include, for example, a porous layer or an ion-implanted layer.
[0013]
A device according to a third aspect of the present invention relates to a device having a semiconductor element and a micromachine. The device includes a semiconductor layer on which a semiconductor element is formed, and a substrate on which a micromachine is formed. The semiconductor substrate is laminated with the substrate, and the semiconductor layer is a semiconductor layer formed by an epitaxial growth method. Here, the semiconductor layer has a first surface and a second surface, wherein the first surface is directly connected to the substrate or via a bonding layer, and the second surface is directly connected to an insulator. Alternatively, they are bonded or adjacent via a bonding layer.
[0014]
In the device according to the first to third aspects, the bonding layer may include, for example, an adhesive or an adhesive layer.
[0015]
A device according to a fourth aspect of the present invention relates to a device having a semiconductor element and a micromachine. The device includes a semiconductor layer on which a semiconductor element is formed, and a substrate on which a micromachine is formed. The semiconductor substrate is laminated with the substrate, and the semiconductor layer has a thickness of 50 μm or less.
[0016]
A device according to a fifth aspect of the present invention relates to a device having a semiconductor element and a micromachine. The device includes a semiconductor layer on which a semiconductor element is formed, and a substrate on which a micromachine is formed. The semiconductor substrate is laminated, and the semiconductor layer has a thickness of 30 μm or less.
[0017]
In the device according to any one of the first to fifth aspects, the micromachine may include, for example, at least one of a switch, a variable capacitor, and an inductor.
[0018]
The devices according to the first to fifth aspects can be applied, for example, such that a semiconductor circuit is formed in the semiconductor layer, and the semiconductor circuit and the micromachine constitute at least a part of a wireless communication device.
[0019]
A manufacturing method according to a sixth aspect of the present invention relates to a method for manufacturing a device having a semiconductor element and a micromachine, the method including a semiconductor layer and a separation layer, wherein the semiconductor layer is disposed on the separation layer. Preparing a member, a step of preparing a substrate on which a micromachine is formed, and a step of forming a bonded substrate by bonding the semiconductor layer side of the member to the substrate directly or via a bonding layer. Including. Here, it is preferable that the manufacturing method of the present invention further includes a step of dividing the bonding substrate by the separation layer. In the step of preparing the member, for example, the separation layer may be formed by anodization, or the separation layer may be formed by ion implantation. The tie layer may include, for example, an adhesive or an adhesive layer.
[0020]
According to the present invention, a structure in which a thin semiconductor layer on which a semiconductor element is formed (for example, a semiconductor layer obtained by dividing a member having a semiconductor layer) and a substrate on which a micromachine is formed is adopted, A device having a semiconductor element and a micromachine can be thinned. A thin device is resistant to bending and is suitable for mounting on, for example, a thin device (for example, an IC card or the like). In addition, by forming a semiconductor circuit in a thin semiconductor layer, high-frequency characteristics can be improved and power consumption can be reduced. In addition, a device obtained by stacking a semiconductor layer having a semiconductor element and a substrate having a micromachine can be manufactured, for example, by a separate process for the semiconductor element and the micromachine. A semiconductor device and a micromachine can be manufactured by a manufacturing process and an electrodeposition process.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
[0022]
First, as a description of a preferred embodiment of the present invention, a structure of a device having a semiconductor element (or a semiconductor circuit) and a MEMS (micromachine) (hereinafter, referred to as an embedded device) will be described.
[0023]
FIG. 1 is a diagram showing an example of a cross-sectional structure of a hybrid device according to a preferred embodiment of the present invention. The example shown in FIG. 1 is an embedded device having a wireless communication function and having a MEMS switch as a MEMS element. In the hybrid device 200 shown in FIG. 1, a substrate 20 on which the MEMS element 1 is formed and a thinned semiconductor layer 3 including a wireless communication circuit as a semiconductor circuit are bonded via an adhesive or an adhesive layer 2 as a bonding layer. It is configured by lamination. Note that the bonding layer is not necessarily required, and the substrate 20 and the semiconductor layer 3 may be directly bonded. FIG. 2 is a plan view of the hybrid device 200 shown in FIG. 1 as viewed from above.
[0024]
The semiconductor layer 3 preferably has a thickness of 50 μm or less, more preferably 30 μm, and even more preferably 20 μm or less. By using the thinned semiconductor layer as a constituent member, a hybrid device having high resistance to bending can be manufactured.
[0025]
FIGS. 4A and 4B show the OFF and ON states of the MEMS switch 1, respectively. The upper electrode 17 of the switch 1 supported by the anchor portion 71 and the lower electrode 10 formed on the substrate 20 are wide electrodes, and when a voltage is applied between these electrodes 17, 10, the terminal is caused by electrostatic force. 11 comes into contact with the terminal 74.
[0026]
Compared with semiconductor switching elements such as PIN diodes and MESFETs, MEMS switches physically separate completely two electrodes in the OFF state to provide a space between the electrodes, and in the ON state, contact the two electrodes to conduct. Therefore, there are characteristics such as low insertion loss (transmission loss such as power loss or voltage loss) and a large isolation effect. That is, the MEMS switch has characteristics that the insertion loss can be reduced and the insulating property in the off state can be improved.
[0027]
Here, the MEMS inductor will be described. The MEMS inductor has characteristics that, for example, a parasitic capacitance is small and a high Q value can be obtained as compared with a normal on-chip planar inductor.
[0028]
In addition, the MEMS capacitor will be described. If a variable capacitor is configured using a comb-shaped electrode, the capacitance can be directly changed by reducing the electrode width by applying a voltage. Therefore, a tuning circuit having a high Q value can be realized by using a filter including such a MEMS capacitor as a component.
[0029]
Also, by inserting a MEMS switch between multiple dipole antennas and patch antennas, the length of the antenna can be changed to form a high-frequency circuit corresponding to multiple frequencies, or the power supply pattern of the patch antenna can be changed to reduce the electromagnetic wave. The radiation pattern can be changed to change the directivity.
[0030]
As described above, the MEMS element has a wide range of applications in addition to the switch, and therefore, the MEMS element may include various types (functions) of the elements as described above.
[0031]
The hybrid device according to a preferred embodiment of the present invention is configured such that a semiconductor layer is laminated on a substrate 20 on which a MEMS (micromachine) is formed, instead of a semiconductor substrate. That is, in the related art, the mixed device is manufactured by bonding the substrate on which the MEMS is formed and the semiconductor substrate on which the semiconductor circuit is formed with an adhesive, so that the total thickness of the mixed device is equal to the thickness of two substrates. Will be. On the other hand, in the hybrid device according to the preferred embodiment of the present invention, since the semiconductor layer is laminated on the substrate on which the MEMS is formed, the thickness of the entire hybrid device can be reduced.
[0032]
As one method for forming a semiconductor layer, there is a method in which a substrate on which a semiconductor circuit is formed is thinned by grinding or polishing. As a method of polishing and thinning a substrate, there is a chemical mechanical polishing (CMP) method. However, the method employing the CMP method may complicate the process and may adversely affect the performance of the MEMS element during polishing. Further, in the CMP method, there is a limit to thinning, and it is difficult to reduce the thickness to 50 μm or less, particularly in consideration of the thickness variation in the wafer surface.
[0033]
In the method of forming an insulating film on a substrate on which a semiconductor circuit is formed and forming a MEMS element thereon, a solution used for forming the MEMS element can come into contact with a semiconductor circuit portion, and thus is sufficiently thick. There are problems such as the necessity of forming an insulating film and the contamination of the manufacturing environment of a semiconductor element requiring a high-purity and clean environment. According to the manufacturing method according to the preferred embodiment of the present invention, such a problem can be solved.
[0034]
The substrate 20 on which the MEMS 1 is formed and the thinned semiconductor layer 3 including a semiconductor circuit such as a wireless communication circuit are electrically connected to each other. As this connection method, there is a method of electrically connecting using a conductive metal as the adhesive 2.
[0035]
Various methods other than those described above can be applied to the electrical connection between the substrate 20 and the semiconductor layer 3 as exemplified in FIG. The example shown in FIG. 8A is a method of providing a conductive metal 25 in the adhesive 2. The example shown in FIG. 8B is a method in which pads 25 are provided on each of the substrate 20 and the semiconductor layer 3 and both pads are connected by wire bonding. The example shown in FIG. 8C does not physically contact the electrode on the substrate 20 side and the electrode on the semiconductor layer 3 side. For example, coils 27 and 28 are provided on the substrate 20 and the semiconductor layer 3 respectively. This is a method of electromagnetically connecting (inductively coupling) the electrode of the substrate 20 and the electrode of the semiconductor layer 3. In the three examples shown in FIG. 8, a non-conductive substance can be used as the adhesive 2.
[0036]
Further, although not shown, the substrate 20 and the semiconductor layer 3 may be connected by applying a mounting method based on a BGA (Ball Grid Array) method. Note that the MEMS element 1 is not limited to a switch, and may be, for example, an RF-MEMS such as an inductor or a variable capacitor, a sensor such as an acceleration sensor or a pressure sensor, or another element. There may be.
[0037]
FIG. 6 is a block diagram of a wireless communication device including a receiver (RECEIVER (Rx)) and a transmitter (TRANSMITTER (Tx)). The wireless communication device includes, for example, an LNA (low noise amplifier) 601, a BPF (bandpass filter) 602, a VCO (voltage controlled oscillator) 603, a PLL (phase locked loop circuit) 604, a PA (power amplifier) 605, a matching circuit 606, It can be composed of a mixer 607, an AGC (auto gain controller) 608, an antenna switch 609, a transmission / reception (Tx / Rx) switch 610, an antenna 611, and the like.
[0038]
For example, a case in which the portion of the antenna switch 609 in FIG. 6 is replaced with MEMS will be described. As shown in FIG. 7, a substrate having a MEMS switch 800 and a semiconductor layer having a semiconductor circuit 801 for wireless communication are each provided. After they are formed, they are combined. Here, the MEMS switch 800 and the antenna 802 may be formed on one substrate.
[0039]
In addition to the antenna switch, for example, a part or all of a BPF, a matching, a Tx / Rx switch, an LNA, a PLL, a VCO, and a mixer may be replaced by MEMS, and a part thereof is formed by MEMS. Then, it may be laminated with other parts.
[0040]
One of the features of the hybrid device according to the preferred embodiment of the present invention is that the entire thickness is very small because the semiconductor circuit portion is formed in a thin semiconductor layer. For example, in the above example, the entire thickness can be 25 μm. Such a structure can be realized by using, for example, a device layer transfer (DLT) process.
[0041]
Next, a method for manufacturing the MEMS device will be described with reference to FIG. FIG. 3 is a diagram illustrating an example of a method for manufacturing a MEMS switch.
[0042]
First, a metal layer made of AuGe having a thickness of 90 nm, Ni having a thickness of 10 nm, and Au having a thickness of 1.5 μm is formed on a GaAs substrate 20 and patterned to form a lower electrode 10 and a terminal 11. (FIG. 3A).
[0043]
Next, a 2.2 μm thick SiO ₂ A layer (sacrifice layer) 14 is formed, and the portion of the via anchor 13 is CF ₄ / O ₂ Dry etching is performed by plasma (FIG. 3B).
[0044]
Next, the SiN layer 15 is formed by the CVD method (FIG. 3C). After the formation of the SiN layer 15, a region where a switch contact portion is to be formed is etched by 500 nm. (FIG. 3 (d)).
[0045]
Next, a layer made of Ti with a thickness of 20 nm and gold with a thickness of 100 nm is formed, and is patterned to form an upper electrode 17 and a terminal 74, which are then covered (FIG. 3E). .
[0046]
Finally, the concentrated hydrofluoric acid is used ₂ The layer (sacrifice layer) 14 is removed (FIG. 3F).
The MEMS switch 1 formed in this way has excellent high-frequency characteristics. By bonding this to the semiconductor layer on which the semiconductor circuit is formed, a hybrid device as shown in FIG. 1 can be manufactured.
[0047]
Next, an example of a manufacturing process of a hybrid device having a semiconductor element and a MEMS element will be described with reference to FIG.
[0048]
FIG. 5 is a diagram illustrating an example of a manufacturing process of the embedded device according to the preferred embodiment of the present invention. Here, FIGS. 5A to 5H show a device layer transfer (DLT) process. Among them, FIGS. 5A to 5F show semiconductor layer having a semiconductor circuit such as a wireless circuit. This is a process for producing a substrate having a substrate and a separation layer. (G) and (h) are bonding processes. First, an example of a process for forming a semiconductor circuit will be described with reference to FIGS.
[0049]
First, as shown in FIG. 5A, a Si seed substrate 100 is prepared as a semiconductor substrate. Next, as shown in FIG. 5B, a first porous Si layer 110 is formed by a first anodization step. Next, as shown in FIG. 5C, a second porous Si layer 120 is formed by a second anodization step. Here, typically, the first porous Si layer 110 is used as a separation layer, and the second porous Si layer 120 is used to form a good non-porous semiconductor layer thereon. However, both the first porous Si layer 110 and the second porous Si layer 120 or only the second porous Si layer 120 can be used as the separation layer.
[0050]
Next, as shown in FIG. 5D, a semiconductor layer (described here as a Si layer) 130 is formed by hydrogen annealing and a high-temperature CVD process. Next, as shown in FIG. 5E, a semiconductor layer (here, described as an epitaxial Si layer) 140 is formed by epitaxial growth of Si. Next, as shown in FIG. 5F, a semiconductor element or a semiconductor integrated circuit 150 such as a high-frequency circuit or an amplifier circuit of a sensor is formed on the epitaxial Si layer 140 by a normal semiconductor manufacturing process.
[0051]
Here, in the manufacturing process exemplarily shown in FIG. 5, in the steps shown in FIGS. 5 (b) and 5 (c), a porous layer having a two-layer structure having different porosity is formed. May be formed, or a porous layer having three or more layers may be formed. When a porous layer having a two-layer structure is formed, for example, it is preferable to form a high-porosity porous layer as the first porous layer, and then form a low-porosity porous layer thereon. When a porous layer having a three-layer structure is formed, a first porous layer having a low porosity, a second porous layer having a high porosity, and a third porous layer having a low porosity are formed in this order from the substrate side. Is preferred. Here, it is preferable that the high porosity is, for example, in a range of 10% to 90%, and the low porosity is, for example, in a range of 0% to 70%. The porosity of the high porosity porous layer is set higher than the porosity of the low porosity porous layer. The plurality of porous layers having different porosity can be formed by, for example, changing the current density during anodization, or changing the type or concentration of the formation solution.
[0052]
In the case of forming a porous layer by anodization, a protective film forming step of providing a protective film such as a nitride film or an oxide film on inner walls of holes of the porous layer before growing a semiconductor layer on the porous layer. Alternatively, a heat treatment step in an atmosphere containing hydrogen is preferably performed. It is also preferable to perform a heat treatment step after the protection film forming step.
[0053]
Instead of forming the separation layer (porous layer) by anodization, the separation layer may be formed by ion implantation. That is, instead of the steps shown in FIGS. 5 (b) to 5 (d) or 5 (b) to 5 (e) including the anodizing step shown in FIGS. A method of forming an ion-implanted layer by ion-implanting a rare gas such as hydrogen, nitrogen, or helium into the substrate 100 can be employed.
[0054]
In this ion implantation method, first, a semiconductor element or a semiconductor integrated circuit is formed on a surface of a silicon substrate (or an epitaxial wafer). After that, a protective film is formed as necessary on the semiconductor element or the semiconductor integrated circuit, and then ions such as hydrogen ions are implanted to a desired depth to form an ion-implanted layer functioning as a separation layer. In this way, a structure as shown in FIG. 5E is obtained. After the ion implantation layer is formed at a predetermined depth from the surface of the silicon substrate, the semiconductor element may be formed on the surface of the silicon substrate. If the ion implantation amount is large, a separation phenomenon may occur in the process of forming the semiconductor element. Therefore, the implantation amount is reduced (and thereafter, if necessary, by annealing), and the separation is performed during the device formation process. The process so that no problems occur.
[0055]
When the semiconductor layer is grown by the CVD method in the step shown in FIG. 5D, it is preferable that the semiconductor layer be grown at a low growth rate of 20 nm / min or less up to a predetermined thickness (for example, 10 nm). The semiconductor layer 140 is preferably a compound semiconductor film such as GaAs, InP, or GaN, in addition to a non-porous single-crystal silicon thin film. When the semiconductor layer 140 is made of single crystal silicon, the source gas is, for example, SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiH ₄ Or HCl gas can be used. As a method for forming the semiconductor layer 140, for example, MBE, sputtering, or the like is suitable in addition to CVD.
[0056]
After the formation of the porous layers 120 and 130, the substrate is subjected to a first heat treatment in an atmosphere containing hydrogen, and thereafter, before growing the semiconductor layer 140, at a temperature higher than the first heat treatment temperature. It is also preferable to perform the second heat treatment. The first heat treatment temperature is preferably in the range of, for example, 800 ° C. to 1000 ° C., and the second heat treatment temperature is preferably in the range of, for example, 900 ° C. to the melting point of the constituent material of the substrate. Thereby, the pores on the surface of the porous layer are sealed. For example, it is preferable that the first heat treatment temperature be 950 ° C. and the second heat treatment be 1100 ° C.
[0057]
As the semiconductor element or the semiconductor integrated circuit 150, for example, elements such as CMOS, bipolar transistors, diodes, coils, and capacitors, and semiconductor integrated circuits such as DRAMs, microprocessors, logic ICs, and memories can be manufactured. The application of the element or the circuit may include an electronic circuit, an oscillation circuit, a light receiving / emitting element, an optical waveguide, various sensors, and the like.
[0058]
The process may be designed so that the trench or LOCOS (local oxidation) used for element isolation reaches the isolation layer such as the porous layer or the ion-implanted layer.
[0059]
The regions between the chip regions to be formed into individual chips may be oxidized or mesa-etched by the LOCOS method so that the semiconductor film does not exist between the chip regions.
[0060]
Next, the step of bonding the semiconductor circuit substrate shown in FIG. 5F to the substrate 1 on which the MEMS 1 is formed and the subsequent steps will be described.
[0061]
In the step shown in FIG. 5G, for example, the antenna coil 802 and the antenna switch are formed on the surface of the semiconductor circuit substrate (the surface opposite to the Si seed substrate 100) shown in FIG. The MEMS substrate 20 on which 800 is formed is bonded (bonded) to produce a bonded substrate. As the adhesive layer 160, an epoxy-based adhesive or another adhesive can be used.
[0062]
Next, in the step illustrated in FIG. 5H, the bonding substrate is divided into two regions at the region between the second porous Si layer 120 and the Si layer 130 or at the boundary of the second porous Si layer 120. . Specifically, pressure is applied to the side surface of the second porous Si layer 120 as the separation layer or the vicinity thereof by a fluid. As a method of applying, for example, a method of spraying a liquid or a gas to the separation layer or its vicinity from the outside or a method of applying a static pressure to the separation layer is preferable. As the fluid, water, an etching solution, alcohol, or the like is preferable as the liquid, and as the gas, air, nitrogen gas, argon gas, or the like is preferable. At the time of separation, ultrasonic vibration may be applied to the combined substrate.
[0063]
If the porous layer or the ion-implanted layer, which is the separation layer, is not exposed on the side surface of the member during division or separation, the porous layer may be exposed in the pretreatment.
[0064]
In order to divide or separate a bonded substrate under static pressure (under pressure of a substantially stationary fluid), for example, a hermetic seal for surrounding at least a part of a peripheral portion of a member to be split or separated to form a closed space It is useful to use a separation device including a space constituent member and a pressure application mechanism that applies a higher pressure to the closed space than to an external space.
[0065]
When the separation layer is formed by ion implantation of hydrogen, nitrogen, He, a rare gas, or the like, a heat treatment at about 400 ° C. to 600 ° C. is performed on the bonding substrate to form a microbubble layer (microbubble) formed by ion implantation. Layer, microcavity layer) aggregate. Therefore, in this case, instead of or in addition to the application of the pressure by the fluid, the bonding substrate can be divided or separated by using a heat treatment. Also, CO ₂ A method of heating with a laser or the like is also useful.
[0066]
The hybrid device 200 formed as shown in FIG. 5H has a structure in which the substrate 20 on which the MEMS (micromachine) 1 is formed and the semiconductor layer 3 on which a semiconductor element or a semiconductor circuit is formed. Have. Here, in the example shown in FIG. 5H, the substrate 20 and the semiconductor layer 3 are bonded by the adhesive 160 as a bonding layer, but the substrate 20 and the semiconductor layer 3 may be directly bonded. . The semiconductor layer 3 has a first surface coupled directly or via a coupling layer to the substrate 20 on which the MEMS is formed, and a second surface opposite to the first surface. A portion of the porous layer typically remains on the second surface. Thus, the porous layer remaining on the second surface may be removed by etching or the like.
[0067]
The mixed device 200 shown in FIG. 5H typically has a plurality of chip regions, and the plurality of chips are divided into individual chips (made into chips). Processing for chipping can be typically performed from the separation layer side. For chip formation, a commonly used dicing apparatus can be applied, and etching, laser ablation, an ultrasonic cutter, a high-pressure jet (for example, a water jet), or the like can be applied. It is suitable. HF + H for chip making using etching ₂ O ₂ , HF + HNO ₃ And an etching solution such as an alkaline solution. As the laser, YAG laser, CO ₂ Lasers and excimer lasers are suitable.
[0068]
After chip formation, each chip can be connected to other circuits or packaged. In addition, each chip may be bonded directly or via a bonding layer (for example, an adhesive or an adhesive layer) on a plastic card (insulating card) 210 as illustrated in FIG. 5 (h). . Here, after removing the porous layer 120 remaining on the second surface of the semiconductor layer 3, the chip is directly attached to the plastic card (insulating card) 210 or via a bonding layer (for example, an adhesive or an adhesive layer). They may be combined. In this case, the structure is such that the semiconductor layer 3 is bonded to the insulator directly or via the bonding layer.
[0069]
According to the preferred embodiment of the present invention, since the member on which the semiconductor element is formed is not a semiconductor substrate but a semiconductor layer, the chip to be manufactured has high bending resistance, and can be a plastic card (IC card) or the like. It is suitable for mounting on or application to.
[0070]
The thickness of the semiconductor layer 3 is preferably 50 μm or less, more preferably 30 μm or less, even more preferably 20 μm or less, and the thickness of the embedded device 200 is preferably 100 μm or less, and is 50 μm or less. Is more preferable.
[0071]
【The invention's effect】
According to the present invention, a thin device having a semiconductor element and a micromachine can be provided.
[Brief description of the drawings]
FIG. 1 is a diagram showing an example of a cross-sectional structure of a mixed device of a semiconductor element and a micromachine according to a preferred embodiment of the present invention.
FIG. 2 is a plan view of the hybrid device shown in FIG. 1 as viewed from above.
FIG. 3 is a diagram illustrating an example of a method for manufacturing a MEMS element.
FIG. 4 is a diagram showing an OFF state and an ON state of the MEMS switch 1 shown in FIG. 1;
FIG. 5 is a diagram showing an example of a manufacturing process of a mixed device of a semiconductor element and a micromachine according to a preferred embodiment of the present invention.
FIG. 6 is a block diagram illustrating an example of a wireless communication device.
FIG. 7 is a diagram illustrating a wireless communication apparatus as one application example of the embedded device of the present invention.
FIG. 8 is a view exemplarily showing a method of electrical connection between a substrate on which a micromachine is formed and a semiconductor layer on which a semiconductor element or a semiconductor circuit is formed.
[Explanation of symbols]
1 MEMS device (micro machine)
2 Adhesive layer (bonding layer)
3 Semiconductor layer
10. Lower electrode
11 terminals (under switch)
13 Via anchor
14 Sacrificial layer (SiO ₂ layer)
15 Insulating film (SIN layer)
17 Upper electrode
20 substrates
71 Anchor
74 terminal (upper switch)
100 Si seed substrate
110 1st porous Si layer
120 Second porous Si layer
130 Si layer
150 Semiconductor element or semiconductor integrated circuit
160 adhesive layer (bonding layer)
200 mixed devices
210 Plastic card (insulating card)

Claims (1)

A device having a semiconductor element and a micromachine,
A semiconductor layer on which a semiconductor element is formed;
A substrate on which a micromachine is formed,
The semiconductor layer and the substrate are stacked,
The device, wherein the semiconductor layer is a semiconductor layer obtained by dividing a member having a separation layer below the semiconductor layer by the separation layer.

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