JP2004207701A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the yield and reliability of a BGA type semiconductor device having a ball-shaped conductive terminal. <P>SOLUTION: A semiconductor wafer 1a having warping is supported by a plurality of pins 21 and is separated from a heated stage 20. The semiconductor wafer 1a is heated so that a radiant heat is uniformly emitted to the whole the wafer 1a by using an IR heater 45 arranged above the wafer 1a and a side heater 47 opposite to the side surface of the wafer 1a. Thus, a reflow of a plurality of conductive terminals 9 on the wafer 1a is uniformly performed, so that the shape becomes uniform. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a BGA (Ball Grid Array) type semiconductor device having ball-shaped conductive terminals.

  In recent years, CSP (Chip Size Package) has attracted attention as a three-dimensional packaging technology and a new packaging technology. The CSP refers to a small package having an outer size substantially the same as the outer size of a semiconductor chip.

  Conventionally, a BGA type semiconductor device has been known as a kind of CSP. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of a metal member such as solder are arranged in a grid on one main surface of a package, and electrically connected to a semiconductor chip mounted on another surface of the package. Connected to.

  When the BGA type semiconductor device is incorporated into an electronic device, each conductive terminal is pressed against a wiring layer pattern on a printed circuit board to electrically connect the semiconductor chip and an external circuit mounted on the printed circuit board. Connected to

  Such a BGA type semiconductor device is provided with a larger number of conductive terminals than other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package) having lead pins protruding from the side. And has the advantage that it can be miniaturized. This BGA type semiconductor device is used, for example, as an image sensor chip of a digital camera mounted on a mobile phone.

  FIG. 10 shows a schematic configuration of a conventional BGA type semiconductor device, and FIG. 10 (A) is a front perspective view of the BGA type semiconductor device. FIG. 10B is a perspective view of the back surface side of the BGA type semiconductor device.

  In the BGA type semiconductor device 101, a semiconductor chip 104 is sealed between first and second glass substrates 102 and 103 via epoxy resins 105a and 105b. On one main surface of the second glass substrate 103, that is, on the back surface of the BGA type semiconductor device 101, a plurality of ball-shaped terminals (hereinafter, referred to as conductive terminals 106) are arranged in a grid.

  The conductive terminal 106 is connected to the semiconductor chip 104 via the second wiring layer 110. The plurality of second wiring layers 110 are connected to aluminum wiring layers drawn from inside the semiconductor chip 104, respectively, and each of the conductive terminals 106 is electrically connected to the semiconductor chip 104.

  The sectional structure of the BGA type semiconductor device 101 will be described in more detail with reference to FIG. FIG. 11 shows a sectional view of a BGA type semiconductor device 101 divided into individual chips along a dicing line.

  The first wiring layer 107 is provided on the insulating film 108 arranged on the surface of the semiconductor chip 104. The semiconductor chip 104 is bonded to the first glass substrate 102 with a resin 105a. The back surface of the semiconductor chip 104 is bonded to the second glass substrate 103 with a resin 105b.

One end of the first wiring layer 107 is connected to the second wiring layer 110. The second wiring layer 110 extends from one end of the first wiring layer 107 to the surface of the second glass substrate 103. The ball-shaped conductive terminals 106 are formed on the second wiring layer 110 extending on the second glass substrate 103.
Patent Publication No. 2002-512436

  In the BGA type semiconductor device 101 described above, a protective film 111 is formed on the surface of the semiconductor device having the V-shaped groove VG by using an organic resin before the dicing step (FIG. 12A). reference). As a method of forming the protective film 111, a thermosetting organic resin is podged (dropped) from above with the back surface of the semiconductor chip 104 facing upward, and the semiconductor wafer itself is rotated. The method of forming the protective film 111 on the surface of the second wiring layer 110 using centrifugal force has been adopted.

However, in this method, as shown in FIG. 12A, the thermosetting organic resin is unnecessarily thickened at the bottom of the V-shaped groove VG of the dicing line (broken line in the figure). This is because the organic resin has a viscous paste property. Therefore, the protective film 11
When 1 is thermally cured by baking (heat treatment), the organic resin accumulated in the V-shaped groove VG shrinks more than the organic resin covering other portions of the semiconductor device 101. As a result, there is a problem that the V-shaped groove VG undergoes a larger shrinkage, and the semiconductor wafer which will later become an individual semiconductor chip is warped (warpage occurs in the direction of the arrow in FIG. 12B). .

  Such a warped semiconductor wafer hinders the subsequent manufacturing process. In particular, in the step of reflowing (high-temperature processing) the conductive terminals 106 (so-called bump electrodes) made of a conductive material having a heating fluidity such as solder, the entire semiconductor wafer cannot be heated uniformly, causing a problem in reliability. There was a fear.

  For example, as shown in FIG. 13, when reflowing the conductive terminals 106, the warped semiconductor wafer 124 is mounted on the stage 123 in the reflow apparatus 120. The reflow device 120 is heated to a predetermined temperature by a downward heat radiation a from the IR heater 121 provided on the ceiling and an upward heat radiation b from the hot plate 122 provided below the stage 123. Will be maintained. The arrows in FIG. 13 schematically represent the heat radiation a and the heat radiation b. The dashed circle in the drawing indicates the warpage formed at the end of the semiconductor wafer 124, and FIG. 14 is an enlarged view in the dashed circle.

  As shown in FIG. 14, the semiconductor wafer 124 includes a flat portion (hereinafter, referred to as a flat portion 125) and a warped portion at the end thereof (hereinafter, referred to as a warped portion 126). The flat part 125 is in direct contact with the lower stage 123 (hereinafter, referred to as a direct contact part 127). On the other hand, since the warped portion 126 is warped, it does not directly contact the stage 123. If reflow of the conductive terminal 106 is performed in this state, the direct contact portion 127 may be heated to an unnecessarily high temperature by the hot plate 122.

  On the other hand, in the warped portion 126, the heat radiation a1 and the heat radiation a2 from the IR heater (infrared heater) arranged above are applied. The thermal radiation a1 heats the edge of the semiconductor wafer 124, and the thermal radiation a2 heats a portion inside the semiconductor wafer 124. There was a slight difference in intensity between the heat radiation a1 and the heat radiation a2, and it was difficult to heat the semiconductor wafer 124 uniformly.

  Also, there is a slight difference in intensity between the heat radiation rays b1 and b2 from below. The thermal radiation b1 is applied below the edge of the semiconductor wafer 124, and the thermal radiation b2 is applied below the semiconductor wafer 124 near the flat portion 125.

  Therefore, a temperature difference occurs between the warped portion 126 and the flat portion 125 of the semiconductor wafer 124. As described above, when a temperature difference occurs depending on the location of the semiconductor wafer 124, it becomes difficult to form the plurality of conductive terminals 106 having a uniform shape on the semiconductor wafer 124, and as a result, the yield and reliability of the semiconductor device are improved. Properties were significantly reduced.

  An object of the present invention is to eliminate the influence of warpage of a semiconductor wafer occurring during a manufacturing process of a BGA type semiconductor device on a reflow process of a conductive terminal, thereby improving the yield and reliability of the semiconductor device.

  Accordingly, the present invention provides a semiconductor wafer having a plurality of conductive terminals formed on one surface, supporting the other surface of the semiconductor wafer while being separated from a heating stage, and supporting the semiconductor wafer on one surface of the semiconductor wafer. By heating the semiconductor wafer with a first heater facing the first heater, reflow of the plurality of conductive terminals is performed.

  According to this configuration, even if the semiconductor wafer is warped, the entire semiconductor wafer can be uniformly heated, and a plurality of conductive terminals having a uniform shape can be formed over the entire surface of the semiconductor wafer. . Thus, the yield and the reliability of the BGA type semiconductor device can be improved.

  According to the present invention, a plurality of conductive terminals on a warped semiconductor wafer can be uniformly reflowed. Thus, the yield and reliability of the BGA type semiconductor device can be improved.

  Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. As shown in FIG. 1, a semiconductor wafer 1a is prepared. The semiconductor wafer 1a is divided into a plurality of semiconductor chips 1 along a boundary line S (called a dicing line or a scribe line).

  These semiconductor chips 1 are, for example, CCD image sensor chips, and are formed by a semiconductor wafer process. An insulating film 2 is formed on the semiconductor wafer 1a, and a pair of first wiring layers 3 are formed on the insulating film 2. The pair of first wiring layers 3 are formed by sputtering a metal layer over the entire surface and selectively etching the metal layer. The thickness of the pair of first wiring layers 3 is about 1 μm.

  The pair of first wiring layers 3 are formed to face both sides of the boundary line S. The pair of first wiring layers 3 are pads extended from the bonding pads of the semiconductor chip 1 to the boundary line S. That is, the pair of first wiring layers 3 are external connection pads, and are electrically connected to a circuit (not shown) of the semiconductor chip 1.

  Next, as shown in FIG. 2, a first glass substrate 4 as a support substrate having a film thickness of about 200 μm is formed on a surface of the semiconductor wafer 1 a on which the first wiring layer 3 is formed from a transparent epoxy material. Using a resin layer 5a as an adhesive. Then, after the back surface of the semiconductor wafer 1a is back-ground to reduce the chip thickness to about 100 μm, the semiconductor wafer 1a is dry-etched along the boundary line S from the back surface to expose the insulating film 2.

  Although the semiconductor wafer 1a is once separated into individual semiconductor chips 1 by this dry etching, these semiconductor chips 1 are supported by the first glass substrate 4, and as a whole, form a single semiconductor wafer 1a. Have.

  Next, as shown in FIG. 3, a second glass substrate 6 as a support substrate having a thickness of about 100 μm is attached to the back surface of the semiconductor chip 1 using the resin layer 5b as an adhesive. Note that the second glass substrate 6 need not be attached. The support substrate may be made of a material other than glass.

  Next, as shown in FIG. 4A, a buffer member 7 made of a photosensitive organic film having flexibility is formed at a predetermined position on the flat portion of the second glass substrate 6. The buffer member 7 absorbs a force applied to a conductive terminal 9 described later, and prevents the glass substrate from cracking.

  When the second glass substrate 6 is not attached to the back surface of the semiconductor chip 1, the buffer member 7 is formed on the back surface of the semiconductor chip 1. Thereafter, notching is performed from the back surface side of the semiconductor chip 1 along the boundary line S. The notching means that a cutting process is performed from the back surface side of the semiconductor chip 1 using a saw-like tool or the like, for example, a blade.

  This notching is performed from the second glass substrate 6 to the first glass substrate 4 until the first glass substrate 4 is slightly cut to expose the side surface of the first wiring layer 3. . Due to this notching, a V-shaped groove VG is formed along the boundary line S. At this time, the exposed surface may be contaminated by notching, so that the exposed surface may be cleaned by dry etching or the like as necessary.

  Next, as shown in FIG. 4B, an aluminum layer having a thickness of about 3 μm is formed by a sputtering method so as to cover the second glass substrate 6 and the V-shaped groove VG formed by notching. I do. Thereafter, the aluminum layer is patterned into a predetermined wiring layer pattern to form a second wiring layer 8 electrically connected to the exposed side surface of the first wiring layer 3.

  This second wiring layer 8 extends on the surface of the second glass substrate 6 on the back surface of the semiconductor chip 1. On the second wiring layer 8 extending on the surface of the second glass substrate 6, a conductive terminal 9 described later is formed. When the second glass substrate 6 is not attached to the back surface of the semiconductor chip 1, the second wiring layer 8 extends on the back surface of the semiconductor chip 1.

  Next, as shown in FIG. 5, a protective film 10 is formed on the second wiring layer 8. The protective film 10 functions as a solder mask in a later screen printing process. As a method of forming the protective film 10, a thermosetting organic resin is podged (dropped) from above with the back surface of the semiconductor chip 1 facing upward, and the semiconductor wafer 1a is rotated. The protective film 10 is formed on the surface of the second wiring layer 8 using centrifugal force. This is the same process as that of the prior art shown in FIG. Incidentally, the protective film 10 may be formed of a resist material.

  Thereafter, the protective film 10 is thermally cured by baking (heat treatment). Due to this baking, the semiconductor wafer is in a state in which its ends are warped. Next, an opening is formed in the protective film 10 so that the second wiring layer 8 is exposed in order to form a conductive terminal 9 described below at a predetermined position of the protective film 10 above the second glass substrate 6. . The opening is formed at a position corresponding to the buffer member 7 when the buffer member 7 is provided.

  Thereafter, a conductive terminal 9 made of a material having a thermal fluidity, for example, solder is formed in a screen printing process, and the process proceeds to a reflow process of the next process. The reflow process will be described with reference to FIGS. The conductive terminal 9 is in a fluidized state by performing a high-temperature treatment in a reflow process described below. This is performed to process the conductive terminal 9 into a spherical shape using the surface tension of the conductive terminal 9.

  As shown in FIGS. 6A and 6B, a stage 20 is prepared, and a plurality of pins 21 are erected on the stage 20. The semiconductor wafer 1a is mounted on the tips of the pins 21 so that the front surfaces thereof are in contact with each other. Each of these pins 21 has the same length, and supports the semiconductor wafer 1a along its edge. FIG. 6A is a perspective view showing the state, and FIG. 6B is a front view. Thereby, the semiconductor wafer 1a is separated from the stage 20 by the length of the pins 21, and the heat generated from the stage 20 is prevented from being directly applied to the semiconductor wafer 1a. The length of the pin 21 is suitably about 1 mm.

  Next, as shown in FIG. 7A, the stage 20 on which the semiconductor wafer 1a shown in FIGS. 6A and 6B is mounted is transported into the reflow processing box 40 of the reflow apparatus 30. Here, a rotating belt 31 is provided below the reflow processing box 40, and a pair of pulleys (belt wheels) 32 are provided to rotate the rotating belt 31. The stage 20 on which the semiconductor wafer 1a is mounted is placed on the belt 31. Then, by driving the pulley 32, the stage 20 on which the semiconductor wafer 1 a is mounted is transported by the rotating belt 31 into the reflow processing box 40.

  The flow processing box 40 includes a heating zone 41 and a cooling zone 42. On the ceiling of the heating zone 41, a plurality of IR heaters (infrared heaters) 45 are arranged. A plurality of hot plates 46 are arranged below the belt 31. FIG. 7B is a side view of FIG. 7A viewed from the arrow X side, and is an enlarged view of the inside of the reflow processing box 40.

  As shown in FIG. 7B, a plurality of side heaters 47 are arranged on both side surfaces of the reflow processing box 40. The side heater 47 faces the side surface of the semiconductor wafer 1a. The cooling zone 42 is a zone for cooling the semiconductor wafer 1a heated in the heating zone 41, and does not include the IR heater 45, the hot plate 46, and the side heater 47.

  Here, an example has been disclosed in which the semiconductor wafer 1a is transferred integrally with the plurality of pins 21. However, the pins 21 may be provided in the heating zone 41. In this case, when the semiconductor wafer 1a is conveyed from the outside of the reflow processing box 40 and comes to a position on the pins 21, the pins 21 rise and lift the semiconductor wafer 1a. Then, the semiconductor wafer 1 a is heated in the heating zone 41 while being lifted on the pins 21. Thereafter, the pins 21 are lowered, and the semiconductor wafer 1 a is separated from the pins 21 and transferred to the cooling zone 42.

  Next, a reflow process using the reflow device 30 will be described. As shown in FIGS. 7A and 7B, the semiconductor wafer 1a mounted on the stage 20 via the pins 21 is mounted on the belt 31 from the direction of the arrow X in the drawing, and the reflow processing box It is transported into 40.

  Thus, the semiconductor wafer 1a is moved in three directions in the heating zone 41 of the reflow processing box 40 by three types of heaters: an IR heater 45 provided on the ceiling, a hot plate 46 provided below the belt 31, and a side heater 47. To be heated. Here, the stage 20 is conveyed on the belt 31 and is heated by a hot plate 46 disposed below the belt 31. The time required for the stage 20 to pass through the heating zone 41 is about one minute, and the heating temperature is about 220 ° C.

  After passing through the heating zone 41, the semiconductor wafer 1 a is cooled by the cooling zone 42. At this time, in the cooling zone 42, a device for actively cooling, for example, an air cooling device may be provided. Thereafter, the semiconductor wafer 1a is carried out of the reflow processing box 40, and is then moved to a dicing process.

  FIG. 8 is an enlarged view of the inside of the broken line circle (the warped end of the semiconductor wafer 1a) in FIG. 7B. The arrows in the figure schematically show a state where the semiconductor wafer 1a is heated by three types of heaters. As shown in FIG. 8, in the heating zone 41, heat radiation rays A, B, C, D, and E are applied to the end of the semiconductor wafer 1a. The heat radiation A is emitted from the IR heater installed above the box 40, the heat radiation B and the heat radiation C are emitted from the side heater 47, and the heat radiation D is emitted from the stage 20 heated by the hot plate 46. Radiated from The heat radiation E is obtained by reflecting the heat radiation emitted from the side heater 47 by the stage 20 and the belt 31.

  In the present embodiment, by providing side heaters 47 on both side surfaces of the reflow processing box 40, the surface of the warped portion of the semiconductor wafer 1a is heated by the heat radiation C (the right side heater 47 in FIG. 7B). You. Similarly, the back surface of the semiconductor wafer 1a is heated by the heat radiation B (the left side heater 47 in FIG. 7B) and the heat radiation D (the lower hot plate 46 in FIG. 7B). Is done.

  The back surface of the warped portion of the semiconductor wafer 1a is heated by the heat radiation E reflected from the stage 20 by the heat radiation B emitted from the left side heater 47 in FIG. Conventionally, it has been difficult to heat this portion in the same manner as the flat portion of the semiconductor wafer 1a, but this can be achieved by using the thermal radiation E.

As described above, in the present embodiment, the semiconductor wafer 1a is separated from the stage 20 so that uniform radiant heat is applied to the entire warped semiconductor wafer 1a. It is heated to become. Thereby, the reflow of the conductive terminals 9 formed over the entire surface of the semiconductor wafer 1a is uniformly performed, and the shape thereof is also uniform.
After the reflow step of the conductive terminals 9, dicing is performed along the boundary line S as shown in FIG. Thus, a BGA type semiconductor device is completed.

  According to the embodiment of the present invention, a plurality of pins 21 are arranged on the stage 20 of the reflow device 30 when the reflow (high heat treatment) process is performed after the conductive terminals 9 are formed by screen printing, and the semiconductor wafer is formed. 1a is heated while being supported by these pins 21.

Thereby, the semiconductor wafer 1a is not directly heated by the hot plate 46 below the stage 20, and the heating state of the semiconductor wafer 1a can be made uniform. Further, by arranging the side heaters 47 on both side surfaces of the reflow processing box 40 of the reflow device 30, the front side and the back side of the warped portion at the end of the semiconductor wafer 1a can be uniformly heated.

FIG. 4 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention. FIG. 4 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention. It is a perspective view and a side view of a reflow device concerning an embodiment of the present invention. It is a side view of a reflow device concerning an embodiment of the present invention. It is a figure showing a heating state by a reflow device concerning an embodiment of the present invention. FIG. 4 is a sectional view of the method for manufacturing a semiconductor device according to the embodiment of the present invention. It is a perspective view which shows the manufacturing method of the conventional semiconductor device. FIG. 11 is a cross-sectional view illustrating a method for manufacturing a conventional semiconductor device. FIG. 11 is a cross-sectional view illustrating a method for manufacturing a conventional semiconductor device. It is sectional drawing which shows the heating state of the reflow apparatus of the conventional semiconductor device. It is an expanded sectional view showing the conventional reflow device of a semiconductor device.

Claims (9)

Prepare a semiconductor wafer having a plurality of conductive terminals formed on one surface,
Supporting the other surface of the semiconductor wafer in a state separated from the heating stage,
A method of manufacturing a semiconductor device, comprising: reflowing a plurality of conductive terminals by heating a semiconductor wafer with a first heater facing one surface of the semiconductor wafer. 2. The method according to claim 1, wherein the heating stage is heated by a heating plate in contact with the heating stage. The method according to claim 1, wherein the semiconductor wafer is heated by a second heater facing a side surface of the semiconductor wafer. Preparing a semiconductor wafer having a pair of first wiring layers formed on its surface,
Attaching a first support substrate to the surface of the semiconductor wafer;
Attaching a second support substrate to the back surface of the semiconductor wafer;
Forming a groove on the back surface of the semiconductor wafer to partially expose the first wiring layer;
Forming a second wiring layer connected to an exposed portion of the first wiring layer and extending on a surface of the second support substrate;
Forming a conductive terminal having heat fluidity on the second wiring layer;
A reflow step of reflowing the conductive terminals by supporting a front surface of the semiconductor wafer with a plurality of pins erected from a heating stage and causing a first heater to face a back surface of the semiconductor wafer. A method for manufacturing a semiconductor device, comprising: The method according to claim 4, wherein in the reflow step, the heating stage is heated by a heating plate contacting a lower surface thereof. 5. The method according to claim 4, wherein in the reflow step, a second heater is opposed to a side surface of the semiconductor wafer, and the semiconductor wafer is heated by the second heater. Preparing a semiconductor wafer having a pair of first wiring layers formed on its surface,
Attaching a support substrate to the surface of the semiconductor wafer,
Forming a groove on the back surface of the semiconductor wafer to partially expose the first wiring layer;
Forming a second wiring layer connected to the exposed portion of the first wiring layer and extending on the back surface of the semiconductor wafer;
Forming a conductive terminal having heat fluidity on the second wiring layer;
A reflow step of reflowing the conductive terminals by supporting a front surface of the semiconductor wafer with a plurality of pins erected from a heating stage and causing a first heater to face a back surface of the semiconductor wafer. A method for manufacturing a semiconductor device, comprising: 8. The method according to claim 7, wherein in the reflow step, the heating stage is heated by a heating plate in contact with a lower surface thereof. 8. The method according to claim 7, wherein in the reflow step, a second heater is opposed to a side surface of the semiconductor wafer, and the semiconductor wafer is heated by the second heater.

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