JP2004200551A - Semiconductor relay - Google Patents

Semiconductor relay Download PDF

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Publication number
JP2004200551A
JP2004200551A JP2002369456A JP2002369456A JP2004200551A JP 2004200551 A JP2004200551 A JP 2004200551A JP 2002369456 A JP2002369456 A JP 2002369456A JP 2002369456 A JP2002369456 A JP 2002369456A JP 2004200551 A JP2004200551 A JP 2004200551A
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Prior art keywords
light
conductive thin
thin film
semiconductor relay
package
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JP2002369456A
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Japanese (ja)
Inventor
Shinsuke Ko
真祐 高
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Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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Priority to JP2002369456A priority Critical patent/JP2004200551A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

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  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Electronic Switches (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor relay which is simplified in structure and which is less susceptible to the influence of electromagnetic waves in the neighborhood. <P>SOLUTION: In this semiconductor relay 1, a light-emitting element 4 connected to the input side, a light-receiving element 5 for generating a photoelectromotive force upon receiving optical signals from the light-emitting element 4, and outputting semiconductor elements 6, 6 with their impedance variables according to the photoelectromotive force received from the light-receiving element 5, are built-in in a package 2, and the output side is closed or opened, according to the signals inputted into the input side. The package 2 is provided with, on the outer surface of the package 2, a conductive thin film 2A covering the region that has the light-emitting element 4 is provided, the light-receiving element 5, and the output semiconductor elements 6, 6 built therein. A ground terminal 31 is provided and is electrically connected to the conductive thin film 2A, and the conductive thin film 2A is connected to the ground via a ground land 71a provided on a printed board 7. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、半導体リレーに関するものである。
【0002】
【従来の技術】
従来、この種の半導体リレーとして、例えば図5に示すようなものがある(例えば、特許文献1参照。)。この半導体リレーは、入力側に入力する入力信号に応じて、出力側が導通・開放するものであって、内部プリント板101と、端子102aを介して内部プリント板101に電気的に接続される出力半導体スイッチング素子102及び複数の電子部品103と、一端が内部プリント板101に電気的及び機械的に接続されると共に他端がプリント板108の回路パターン106に表面実装され得るよう折曲されたリード端子104,105と、出力半導体スイッチング素子102に取り付けられる金属板107と、内部プリント板101等をモールドするハウジング109と、を備えている。
【0003】
かくして、この半導体リレーは、金属板107の一面がハウジング109の表面より露出した状態で取り付けられているので、赤外線リフロー方式によりプリント板108の回路パターン106にはんだ付けする場合に、金属板107が図中矢印A方向からの赤外線を反射してハウジング109の内部に放射熱が及ばないようにされているのである。
【0004】
【特許文献1】
実開平2−8065号公報(第1頁、第1図)
【0005】
【発明が解決しようとする課題】
ところで、図5に示す従来の半導体リレーによれば、周辺で電磁波が発生した場合、電磁波が金属板107を介して出力半導体スイッチング素子102に伝播するので、出力信号にノイズが重畳されることとなる。これにより、極めて微小な信号制御を行なう場合や高周波信号の制御を行なう場合等には、そのノイズによる影響が無視できないものとなり、正確な出力信号制御を行なうことができなくなってしまうという虞れがあった。
【0006】
本発明は、上記事由に鑑みてなしたもので、その目的とするところは、周辺の電磁波の影響を受けにくい構造を備えた半導体リレーを簡易な構成にて提供することにある。
【0007】
【課題を解決するための手段】
請求項1に係る発明の半導体リレーは、入力側に接続する発光素子と、発光素子からの光信号を受けて光起電力を発生する受光素子と、受光素子の光起電力に呼応してインピーダンスが変化する出力用半導体素子と、をパッケージに内蔵し、入力側に入力する入力信号に応じて出力側を導通・開放させる半導体リレーにおいて、前記パッケージは、前記発光素子、前記受光素子、及び前記出力用半導体素子を内蔵する領域を覆う導電性薄膜を設け、導電性薄膜をアースに接続したことを特徴としている。
【0008】
請求項2に係る発明の半導体リレーは、請求項1の構成において、前記導電性薄膜は、前記パッケージの外面に設けたものにしてある。
【0009】
請求項3に係る発明の半導体リレーは、請求項1の構成において、前記発光素子、前記受光素子、及び前記出力用半導体素子を内蔵する領域、及び前記発光素子と前記受光素子との間は、透光性材料にて充填し、導電性薄膜は、この透光性材料の外面に設けたものにしてある。
【0010】
請求項4に係る発明の半導体リレーは、請求項1乃至3の構成において、プリント基板にアース用ランドを設け、前記導電性薄膜は、半導体リレーをプリント基板に実装したときにアース用ランドを介してアースに接続するものにしてある。
【0011】
請求項5に係る発明の半導体リレーは、請求項1乃至4の構成において、前記パッケージから突出するアース用端子を設け、アース用端子と前記導電性薄膜との間を電気的に接続したものにしてある。
【0012】
【発明の実施の形態】
以下、本発明の実施の形態について、図面に基づいて詳細に説明する。
【0013】
(第1の実施の形態)
図1は、本発明に係る半導体リレーの第1の実施の形態を示す斜視図、図2は、半導体リレーの内部構造を示す斜視図である。この半導体リレー1は、入力側に入力する入力信号に応じて、出力側を導通・開放するものであって、パッケージ2と、リードフレーム31乃至36と、発光素子4と、受光素子5と、MOSFET6,6と、を有し、プリント基板7に実装している。
【0014】
パッケージ2は、リードフレーム31乃至36を保持すると共に、発光素子4、受光素子5、及びMOSFET6,6を内蔵するものであって、樹脂材料により、外形、略箱状体に形成し、その内部において発光素子4と受光素子5との間を透光性樹脂材料で充填して両素子間を、所謂、光結合してある。そして、パッケージ2は、後述する端子31b乃至36bが突出していない側面21,22と、上面23、及び底面24に、金属を蒸着して導電性薄膜2Aを形成してある。
【0015】
リードフレーム31乃至36は、金属薄板等を所定形状に打ち抜き、曲げ加工等して形成するものであって、固着部31a乃至36aをパッケージ2に固着し、端子31b乃至36bをパッケージ2から突出させてある。そして、リードフレーム32の固着部32aには発光素子4を、リードフレーム35の固着部35aには受光素子5を、リードフレーム34及び36の固着部34a及び36aにはMOSFET6,6を、ダイボンド等によりそれぞれ固着してある。なお、リードフレーム31は、内蔵素子等と電気的に接続しない、所謂、浮きコムであって、端子31bを後述するプリント基板7の端子ランド71aに半田付け等により固定することによって、半導体リレー1をプリント基板7にバランス良く実装できるようにしてある。
【0016】
発光素子4は、入力信号に応じて発光・消光するLEDであって、裏面をリードフレーム32の固着部32aに固着して電気的及び機械的に接続すると共に、表面の電極(図示せず)とリードフレーム33の固着部33aとの間を金ワイヤ81により電気的に接続してある。受光素子5は、受光すると所定の光起電力を発生させる太陽電池であって、裏面をリードフレーム35の固着部35aに固着し、表面の出力電極(図示せず)とMOSFET6,6のゲート電極(図示せず)との間を金ワイヤ82,83によりそれぞれ電気的に接続してある。そして、前述したとおり、発光素子4と受光素子5との間は、透光性樹脂材料にて充填して両素子間を、所謂、光結合してある。
【0017】
MOSFET6,6は、リレー出力側を構成するものであって、裏面(ドレイン電極)をリードフレーム34,36の固着部34a,36aにそれぞれ固着して電気的及び機械的に接続すると共に、表面のソース電極(図示せず)とリードフレーム35の固着部35aとの間を金ワイヤ84,85によりそれぞれ電気的に接続してある。
【0018】
プリント基板7は、半導体リレー1を実装する基板であって、表面7Aには、導電性材料により形成する端子ランド71a,71b,71c,…を設けると共に、半導体リレー1を実装したときにパッケージ2の側面21,22が位置するところにアース用ランド72,72をそれぞれ設けてある。さらに、アース用ランド72,72は、図外、アースと電気的に接続してある。
【0019】
かくして、上記構成による半導体リレー1は、端子31b乃至36bと端子ランド71a,71b,71c,…との間、及びパッケージ2の底面24乃至側面21,22の導電性薄膜2Aとアース用ランド72,72との間を、はんだ付け等により電気的に接続してプリント基板7に実装し、端子32b,33b間に入力する入力信号に応じて、出力側の端子34b,36b間が導通・開放するのである。
【0020】
したがって、上記構成によれば、半導体リレー1は、プリント基板7に実装すると、パッケージ2の側面21,22、上面23、及び底面24の導電性薄膜2Aが、アース用ランド72,72を介してアースされるので、シールド効果によって内部素子が周辺の電磁波の影響を受けにくいものとなる。その結果、半導体リレー1は、出力信号にノイズが重畳されにくいものとなって、正確な出力信号制御を行なうことができるものとなるのである。
【0021】
なお、プリント基板7の表面7Aにおいて、パッケージ2の底面24と対向する部分にアース用ランド72を延設しても良く、この場合、パッケージ2の底面24に導電性薄膜2Aを形成する必要がないものとなり、かかる構成によっても上述した効果が得られることは言うまでもない。
【0022】
また、パッケージ2の端子31b乃至33b、及び端子34b乃至36bが突出している側面25及び側面26の全面に亙って、端子32b乃至36bの近傍の領域を避けて端子32b乃至36bと導通しないように導電性薄膜を形成することもできる。この構成によれば、側面25及び側面26の導電性薄膜が、側面21,22、上面23、及び底面24の導電性薄膜と相俟って、シールド効果がより一層、高められるので、周辺の電磁波の影響をより一層、受けにくいものとなる。
【0023】
(第2の実施の形態)
図3は、本発明に係る半導体リレーの第2の実施の形態を示す斜視図であり、パッケージ2及びプリント基板7を次のように構成してあることを特徴とするものである。
【0024】
すなわち、この実施の形態において、パッケージ2は、端子31b乃至36bが突出していない側面21,22と、上面23、及び底面24と、端子31b乃至33bが突出している側面25であって端子31bが突出している位置近傍の壁面25aに、金属を蒸着して導電性薄膜2Aを形成し、この導電性薄膜2Aと端子31bとの間を壁面25aにおいて電気的に接続してある。そして、プリント基板7には、アース用ランド72(図1参照)を設けないで、端子ランド71aを、図外、アースと電気的に接続してある。
【0025】
かくして、上記構成による半導体リレー1は、端子31b乃至36bと端子ランド71a,71b,71c,…との間を、はんだ付け等により電気的に接続してプリント基板7に実装すると、導電性薄膜2Aが壁面25aの導電性薄膜、及び端子31b乃至端子ランド71aを介して、図外、アースと電気的に接続するのである。
【0026】
したがって、上記構成によれば、半導体リレー1は、プリント基板7に実装すると、導電性薄膜2Aが端子31b及び端子ランド71aを介してアースされるので、シールド効果によって内部素子が周辺の電磁波の影響を受けにくいものとなり、以って、出力信号にノイズが重畳されにくいものとなるのである。
【0027】
なお、プリント基板7の表面7Aにおいて、パッケージ2の底面24と対向する部分に端子ランド71aを延設しても良く、この場合、パッケージ2の底面24に導電性薄膜2Aを形成する必要がないものとなり、かかる構成によっても上述した効果が得られることは言うまでもない。
【0028】
また、端子32b及び33bの近傍の領域を避けて側面25の全面に亙って、端子32b及び33bと導通しないように導電性薄膜を形成すると共に、端子34b乃至36bの近傍の領域を避けて側面26の全面に亙って、端子34b乃至36bと導通しないように導電性薄膜を形成することもできる。この構成によれば、側面25及び側面26の導電性薄膜が、側面21,22、上面23、及び底面24に形成した導電性薄膜2Aと相俟って、シールド効果がより一層、高められるので、周辺の電磁波の影響をより一層、受けにくいものとなる。
【0029】
なお、上述した第1及び第2の実施の形態において、導電性薄膜は、金属を蒸着して形成しているが、それ以外にも例えば銀ペースト等の導電性ペーストを塗布して形成したり、金属薄板を接着して形成することもでき、かかる構成によっても上述した効果が得られることは言うまでもない。
【0030】
(第3の実施の形態)
図4は、本発明に係る半導体リレーの第3の実施の形態を示す断面図であり、パッケージ2を次のように構成してあることを特徴とするものである。
【0031】
すなわち、この実施の形態において、パッケージ2は、発光素子4、受光素子5、及びMOSFET6,6を内蔵する領域、及び発光素子4と受光素子5との間を透光性樹脂材料で充填して透光性樹脂領域2Bを形成し、金属蒸着又は銀ペースト塗布等により透光性樹脂領域2Bの外面に導電性薄膜2Aを形成し、さらに、最外面には遮光性樹脂材料にて形成する遮光性樹脂領域2Cを設けてある。ここで、導電性薄膜2Aは、パッケージ2内部において、アース端子であるリードフレーム31(図2参照)に接触させてリードフレーム31と電気的に接続してあるが、リードフレーム32乃至36(いずれも図2参照)の近傍の領域を避けてリードフレーム32乃至36とは電気的に絶縁するようにして設けてある。
【0032】
かくして、上記構成による半導体リレー1は、プリント基板7(図3参照)に実装すると、導電性薄膜2Aがリードフレーム31(図2参照)及び端子ランド71a(図3参照)を介してアースされるので、シールド効果によって内部素子が周辺の電磁波の影響を受けにくいものとなり、以って、出力信号にノイズが重畳されにくいものとなるのである。
【0033】
また、上記構成によれば、半導体リレー1は、導電性薄膜2Aが外面に露出していないので、錆び等による劣化を懸念する必要のないものとなり、また、パッケージ2の外面が従来どおり遮光性樹脂領域2Cにて形成されているので、品番等の捺印を従来のものと同じ方法にて行ない得るものとなる。
【0034】
なお、導電性薄膜2Aを形成する領域は、上述した実施の形態に限定されるものではなく、発光素子4、受光素子5、及びMOSFET6,6を内蔵する領域を覆うようにして形成すれば上述した効果が得られることは言うまでもない。
【0035】
【発明の効果】
請求項1に係る発明の半導体リレーは、パッケージには、発光素子、受光素子、及び出力用半導体素子を内蔵する領域を覆う導電性薄膜を設け、導電性薄膜をアースに接続したことを特徴としているので、シールド効果によって内部素子が周辺の電磁波の影響を受けにくいものとなる。その結果、半導体リレーは、出力信号にノイズが重畳されにくいものとなって、正確な出力信号制御を行なうことができるものとなる。
【0036】
請求項2に係る発明の半導体リレーは、請求項1の構成において、導電性薄膜を、パッケージの外面に設けたものしてあるので、周辺の電磁波の影響を受けにくい構造を備えた半導体リレーを簡易な構成にて提供させられるものとなる。
【0037】
請求項3に係る発明の半導体リレーは、請求項1の構成において、発光素子、受光素子、及び出力用半導体素子を内蔵する領域、及び発光素子と受光素子との間は、透光性材料にて充填し、導電性薄膜は、この透光性材料の外面に設けたものにしてあるので、半導体リレーの品番等の捺印を従来のものと同じ方法にて行ない得るものとなる。
【0038】
請求項4に係る発明の半導体リレーは、請求項1乃至3の構成において、プリント基板にアース用ランドを設け、導電性薄膜は、半導体リレーをプリント基板に実装したときにアース用ランドを介してアースに接続するものにしてあるので、導電性薄膜とアースとの間の電気的な接続が確実なものとなる。
【0039】
請求項5に係る発明の半導体リレーは、請求項1乃至4の構成において、パッケージから突出するアース用端子を設け、アース用端子と導電性薄膜との間を電気的に接続したものにしてあるので、接続作業が簡便に行なわれるものとなる。
【図面の簡単な説明】
【図1】本発明に係る半導体リレーの第1の実施の形態を示す斜視図である。
【図2】同上の半導体リレーの内部構造を示す斜視図である。
【図3】本発明に係る半導体リレーの第2の実施の形態を示す斜視図である。
【図4】本発明に係る半導体リレーの第3の実施の形態を示す断面図である。
【図5】従来の半導体リレーを示す断面図である。
【符号の説明】
1 半導体リレー
2 パッケージ
2A 導電性薄膜
2B 透光性材料(透光性樹脂領域)
31b アース用端子
4 発光素子(LED)
5 受光素子(太陽電池)
6 出力用半導体素子(MOSFET)
7 プリント基板
71a 端子ランド(アース用ランド)
72 アース用ランド
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor relay.
[0002]
[Prior art]
Conventionally, as this type of semiconductor relay, for example, there is a relay as shown in FIG. 5 (for example, see Patent Document 1). The semiconductor relay has an output side that conducts and opens in response to an input signal input to the input side, and an internal printed board 101 and an output that is electrically connected to the internal printed board 101 via a terminal 102a. The semiconductor switching element 102 and the plurality of electronic components 103, and a lead bent so that one end is electrically and mechanically connected to the internal printed board 101 and the other end is surface-mounted on the circuit pattern 106 of the printed board 108. The semiconductor device includes terminals 104 and 105, a metal plate 107 attached to the output semiconductor switching element 102, and a housing 109 for molding the internal printed board 101 and the like.
[0003]
Thus, since the semiconductor relay is mounted with one surface of the metal plate 107 exposed from the surface of the housing 109, the metal plate 107 is soldered to the circuit pattern 106 of the printed circuit board 108 by the infrared reflow method. In the figure, infrared rays from the direction of arrow A are reflected so that radiant heat does not reach the inside of the housing 109.
[0004]
[Patent Document 1]
Japanese Utility Model Laid-Open No. 2-8065 (Page 1, FIG. 1)
[0005]
[Problems to be solved by the invention]
By the way, according to the conventional semiconductor relay shown in FIG. 5, when an electromagnetic wave is generated in the periphery, the electromagnetic wave propagates to the output semiconductor switching element 102 via the metal plate 107, so that noise is superimposed on the output signal. Become. As a result, when extremely small signal control or high-frequency signal control is performed, the influence of the noise cannot be ignored, and there is a possibility that accurate output signal control cannot be performed. there were.
[0006]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor relay having a structure that is not easily affected by surrounding electromagnetic waves with a simple configuration.
[0007]
[Means for Solving the Problems]
A semiconductor relay according to the first aspect of the present invention includes a light emitting element connected to an input side, a light receiving element for generating a photovoltaic power by receiving an optical signal from the light emitting element, and an impedance corresponding to the photoelectromotive force of the light receiving element. In a semiconductor relay that incorporates a semiconductor element for output that changes in a package and conducts and opens the output side according to an input signal input to the input side, the package includes the light emitting element, the light receiving element, and the light emitting element. A conductive thin film is provided to cover a region in which the output semiconductor element is incorporated, and the conductive thin film is connected to the ground.
[0008]
According to a second aspect of the present invention, in the semiconductor relay according to the first aspect, the conductive thin film is provided on an outer surface of the package.
[0009]
A semiconductor relay according to a third aspect of the present invention is the semiconductor relay according to the first aspect, wherein the light-emitting element, the light-receiving element, and a region in which the output semiconductor element is embedded, and between the light-emitting element and the light-receiving element, It is filled with a translucent material, and the conductive thin film is provided on the outer surface of the translucent material.
[0010]
A semiconductor relay according to a fourth aspect of the present invention is the semiconductor relay according to the first to third aspects, wherein a grounding land is provided on the printed circuit board, and the conductive thin film is connected to the grounding land when the semiconductor relay is mounted on the printed circuit board. To ground.
[0011]
According to a fifth aspect of the present invention, there is provided the semiconductor relay according to the first to fourth aspects, wherein a ground terminal protruding from the package is provided, and the ground terminal and the conductive thin film are electrically connected. It is.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0013]
(First Embodiment)
FIG. 1 is a perspective view showing a first embodiment of a semiconductor relay according to the present invention, and FIG. 2 is a perspective view showing an internal structure of the semiconductor relay. The semiconductor relay 1 conducts and opens the output side in response to an input signal input to the input side, and includes a package 2, lead frames 31 to 36, a light emitting element 4, a light receiving element 5, And mounted on the printed circuit board 7.
[0014]
The package 2 holds the lead frames 31 to 36 and incorporates the light-emitting element 4, the light-receiving element 5, and the MOSFETs 6 and 6, and is formed of a resin material into an outer shape and a substantially box-like body. In the above, the space between the light emitting element 4 and the light receiving element 5 is filled with a translucent resin material, and the two elements are so-called optically coupled. In the package 2, a conductive thin film 2A is formed by vapor-depositing metal on the side surfaces 21, 22 from which terminals 31b to 36b, which will be described later, do not project, and on the top surface 23 and the bottom surface 24.
[0015]
The lead frames 31 to 36 are formed by punching a thin metal plate or the like into a predetermined shape and bending the fixed shape. The fixing portions 31a to 36a are fixed to the package 2 and the terminals 31b to 36b are projected from the package 2. It is. Then, the light emitting element 4 is fixed to the fixing part 32a of the lead frame 32, the light receiving element 5 is fixed to the fixing part 35a of the lead frame 35, the MOSFETs 6 and 6 are fixed to the fixing parts 34a and 36a of the lead frames 34 and 36, and Respectively. The lead frame 31 is a so-called floating comb that is not electrically connected to a built-in element or the like, and the terminal 31b is fixed to a terminal land 71a of a printed circuit board 7 to be described later by soldering or the like. Can be mounted on the printed circuit board 7 in a well-balanced manner.
[0016]
The light-emitting element 4 is an LED that emits and extinguishes light in response to an input signal. The light-emitting element 4 has a rear surface fixed to a fixing portion 32a of the lead frame 32 to be electrically and mechanically connected, and has an electrode (not shown) on the front surface. And the fixing portion 33 a of the lead frame 33 are electrically connected by a gold wire 81. The light receiving element 5 is a solar cell that generates a predetermined photovoltaic power when receiving light, has a back surface fixed to a fixing portion 35a of a lead frame 35, and has an output electrode (not shown) on the front surface and gate electrodes of MOSFETs 6 and 6. (Not shown) are electrically connected by gold wires 82 and 83, respectively. As described above, the space between the light emitting element 4 and the light receiving element 5 is filled with a translucent resin material, and the two elements are so-called optically coupled.
[0017]
The MOSFETs 6 and 6 constitute a relay output side. The back surfaces (drain electrodes) are fixed to the fixing portions 34a and 36a of the lead frames 34 and 36, respectively, and are electrically and mechanically connected. A source electrode (not shown) and a fixing portion 35a of the lead frame 35 are electrically connected by gold wires 84 and 85, respectively.
[0018]
The printed circuit board 7 is a board on which the semiconductor relay 1 is mounted. The printed circuit board 7 is provided with terminal lands 71a, 71b, 71c,. Earth lands 72, 72 are provided where the side surfaces 21, 22 are located. Further, the earth lands 72, 72 are electrically connected to the earth (not shown).
[0019]
Thus, the semiconductor relay 1 having the above-described configuration includes the conductive thin film 2A between the terminals 31b to 36b and the terminal lands 71a, 71b, 71c,. 72 is electrically connected to the printed circuit board 7 by soldering or the like and mounted on the printed circuit board 7, and the terminals 34b and 36b on the output side are electrically connected and disconnected according to an input signal input between the terminals 32b and 33b. It is.
[0020]
Therefore, according to the above configuration, when the semiconductor relay 1 is mounted on the printed circuit board 7, the conductive thin films 2 A on the side surfaces 21 and 22, the top surface 23, and the bottom surface 24 of the package 2 are connected via the ground lands 72 and 72. Since it is grounded, the internal element is less susceptible to surrounding electromagnetic waves due to the shielding effect. As a result, the semiconductor relay 1 becomes less likely to have noise superimposed on the output signal, and can perform accurate output signal control.
[0021]
In addition, on the surface 7A of the printed circuit board 7, a grounding land 72 may be extended to a portion facing the bottom surface 24 of the package 2. In this case, it is necessary to form the conductive thin film 2A on the bottom surface 24 of the package 2. Needless to say, the above-described effects can be obtained by such a configuration.
[0022]
Further, the entire surface of the side surface 25 and the side surface 26 from which the terminals 31b to 33b and the terminals 34b to 36b of the package 2 protrude, so as not to conduct with the terminals 32b to 36b avoiding a region near the terminals 32b to 36b. In addition, a conductive thin film can be formed. According to this configuration, since the conductive thin films on the side surfaces 25 and 26 are combined with the conductive thin films on the side surfaces 21 and 22, the top surface 23, and the bottom surface 24, the shielding effect is further enhanced. It is much less susceptible to the effects of electromagnetic waves.
[0023]
(Second embodiment)
FIG. 3 is a perspective view showing a second embodiment of the semiconductor relay according to the present invention, wherein the package 2 and the printed circuit board 7 are configured as follows.
[0024]
That is, in this embodiment, the package 2 includes the side surfaces 21 and 22 from which the terminals 31b to 36b do not protrude, the upper surface 23 and the bottom surface 24, and the side surface 25 from which the terminals 31b to 33b protrude. Metal is deposited on the wall surface 25a near the protruding position to form a conductive thin film 2A, and the conductive thin film 2A and the terminal 31b are electrically connected at the wall surface 25a. The terminal land 71a is electrically connected to the ground (not shown) without providing the ground land 72 (see FIG. 1) on the printed circuit board 7.
[0025]
Thus, when the semiconductor relay 1 having the above configuration is mounted on the printed circuit board 7 by electrically connecting the terminals 31b to 36b and the terminal lands 71a, 71b, 71c,. Are electrically connected to ground (not shown) via the conductive thin film on the wall surface 25a and the terminals 31b to the terminal lands 71a.
[0026]
Therefore, according to the above configuration, when the semiconductor relay 1 is mounted on the printed circuit board 7, the conductive thin film 2A is grounded via the terminal 31b and the terminal land 71a. Therefore, noise is less likely to be superimposed on the output signal.
[0027]
The terminal lands 71a may be provided on the surface 7A of the printed circuit board 7 at a portion facing the bottom surface 24 of the package 2. In this case, it is not necessary to form the conductive thin film 2A on the bottom surface 24 of the package 2. It is needless to say that the above-described effects can be obtained by such a configuration.
[0028]
In addition, a conductive thin film is formed over the entire side surface 25 so as not to conduct with the terminals 32b and 33b, avoiding the region near the terminals 32b and 33b, and avoiding the region near the terminals 34b to 36b. A conductive thin film may be formed over the entire side surface 26 so as not to be electrically connected to the terminals 34b to 36b. According to this configuration, the shielding effect is further enhanced because the conductive thin films on the side surfaces 25 and 26 are combined with the conductive thin films 2A formed on the side surfaces 21 and 22, the upper surface 23, and the bottom surface 24. Therefore, it is more difficult to be affected by the surrounding electromagnetic waves.
[0029]
In the first and second embodiments described above, the conductive thin film is formed by evaporating a metal, but may be formed by applying a conductive paste such as a silver paste. It is needless to say that the above-described effects can also be obtained with such a configuration.
[0030]
(Third embodiment)
FIG. 4 is a sectional view showing a third embodiment of the semiconductor relay according to the present invention, wherein the package 2 is configured as follows.
[0031]
That is, in this embodiment, the package 2 is filled with a light-transmitting resin material in a region in which the light emitting element 4, the light receiving element 5, and the MOSFETs 6 and 6 are built, and between the light emitting element 4 and the light receiving element 5. A light-transmitting resin region 2B is formed, a conductive thin film 2A is formed on the outer surface of the light-transmitting resin region 2B by metal vapor deposition, silver paste application, or the like. The conductive resin region 2C is provided. Here, the conductive thin film 2 </ b> A is in contact with the lead frame 31 (see FIG. 2) serving as a ground terminal inside the package 2 to be electrically connected to the lead frame 31. (See also FIG. 2) so as to be electrically insulated from the lead frames 32 to 36 while avoiding a region in the vicinity.
[0032]
Thus, when the semiconductor relay 1 having the above configuration is mounted on the printed circuit board 7 (see FIG. 3), the conductive thin film 2A is grounded via the lead frame 31 (see FIG. 2) and the terminal land 71a (see FIG. 3). Therefore, the internal element is less likely to be affected by the surrounding electromagnetic waves due to the shielding effect, and therefore, noise is less likely to be superimposed on the output signal.
[0033]
Further, according to the above configuration, since the conductive thin film 2A is not exposed on the outer surface of the semiconductor relay 1, there is no need to worry about deterioration due to rust or the like. Since it is formed in the resin region 2C, it is possible to stamp the product number and the like by the same method as the conventional one.
[0034]
Note that the region where the conductive thin film 2A is formed is not limited to the above-described embodiment, and if the region is formed so as to cover the region in which the light emitting element 4, the light receiving element 5, and the MOSFETs 6 and 6 are incorporated. Needless to say, the same effect can be obtained.
[0035]
【The invention's effect】
The semiconductor relay according to the first aspect of the present invention is characterized in that the package includes a conductive thin film that covers an area in which the light emitting element, the light receiving element, and the output semiconductor element are built, and the conductive thin film is connected to the ground. Therefore, the internal effect becomes less susceptible to surrounding electromagnetic waves due to the shielding effect. As a result, the semiconductor relay is less likely to have noise superimposed on the output signal, and can perform accurate output signal control.
[0036]
According to a second aspect of the present invention, in the semiconductor relay according to the first aspect, the conductive thin film is provided on the outer surface of the package. It will be provided with a simple configuration.
[0037]
A semiconductor relay according to a third aspect of the present invention is the semiconductor relay according to the first aspect, wherein the light-emitting element, the light-receiving element, and the area in which the output semiconductor element is built, and the light-emitting element and the light-receiving element are formed of a translucent material. Since the conductive thin film is provided on the outer surface of the light-transmitting material, it is possible to perform the marking of the product number of the semiconductor relay in the same manner as the conventional one.
[0038]
A semiconductor relay according to a fourth aspect of the present invention is the semiconductor relay according to the first to third aspects, wherein a grounding land is provided on the printed circuit board, and the conductive thin film is provided via the grounding land when the semiconductor relay is mounted on the printed circuit board. Since the connection is made to the ground, the electrical connection between the conductive thin film and the ground is ensured.
[0039]
According to a fifth aspect of the present invention, there is provided a semiconductor relay according to the first to fourth aspects, wherein a ground terminal protruding from the package is provided, and the ground terminal and the conductive thin film are electrically connected. Therefore, the connection work can be easily performed.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a first embodiment of a semiconductor relay according to the present invention.
FIG. 2 is a perspective view showing an internal structure of the semiconductor relay according to the first embodiment;
FIG. 3 is a perspective view showing a second embodiment of the semiconductor relay according to the present invention.
FIG. 4 is a sectional view showing a third embodiment of the semiconductor relay according to the present invention.
FIG. 5 is a sectional view showing a conventional semiconductor relay.
[Explanation of symbols]
Reference Signs List 1 semiconductor relay 2 package 2A conductive thin film 2B translucent material (translucent resin region)
31b Grounding terminal 4 Light emitting element (LED)
5 Light receiving element (solar cell)
6. Output semiconductor device (MOSFET)
7 Printed circuit board 71a Terminal land (land for earth)
72 Land for Earth

Claims (5)

入力側に接続する発光素子と、発光素子からの光信号を受けて光起電力を発生する受光素子と、受光素子の光起電力に呼応してインピーダンスが変化する出力用半導体素子と、をパッケージに内蔵し、入力側に入力する入力信号に応じて出力側を導通・開放させる半導体リレーにおいて、
前記パッケージは、前記発光素子、前記受光素子、及び前記出力用半導体素子を内蔵する領域を覆う導電性薄膜を設け、導電性薄膜をアースに接続したことを特徴とする半導体リレー。
Package consisting of a light-emitting element connected to the input side, a light-receiving element that generates photovoltaic power by receiving an optical signal from the light-emitting element, and an output semiconductor element whose impedance changes in response to the photovoltaic power of the light-receiving element In a semiconductor relay that is built in and that conducts and opens the output side according to the input signal input to the input side,
A semiconductor relay, wherein the package is provided with a conductive thin film that covers a region in which the light emitting element, the light receiving element, and the output semiconductor element are built, and the conductive thin film is connected to a ground.
前記導電性薄膜は、前記パッケージの外面に設けたものである請求項1記載の半導体リレー。The semiconductor relay according to claim 1, wherein the conductive thin film is provided on an outer surface of the package. 前記発光素子、前記受光素子、及び前記出力用半導体素子を内蔵する領域、及び前記発光素子と前記受光素子との間は、透光性材料にて充填し、導電性薄膜は、この透光性材料の外面に設けたものである請求項1記載の半導体リレー。A region in which the light emitting element, the light receiving element, and the output semiconductor element are built, and a space between the light emitting element and the light receiving element are filled with a light transmitting material. The semiconductor relay according to claim 1, wherein the semiconductor relay is provided on an outer surface of a material. プリント基板にアース用ランドを設け、前記導電性薄膜は、半導体リレーをプリント基板に実装したときにアース用ランドを介してアースに接続するものである請求項1乃至3のいずれかに記載の半導体リレー。The semiconductor according to any one of claims 1 to 3, wherein a ground land is provided on the printed board, and the conductive thin film is connected to the ground via the ground land when the semiconductor relay is mounted on the printed board. relay. 前記パッケージから突出するアース用端子を設け、アース用端子と前記導電性薄膜との間を電気的に接続したものである請求項1乃至4のいずれかに記載の半導体リレー。The semiconductor relay according to any one of claims 1 to 4, wherein a ground terminal protruding from the package is provided, and the ground terminal and the conductive thin film are electrically connected.
JP2002369456A 2002-12-20 2002-12-20 Semiconductor relay Pending JP2004200551A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008205351A (en) * 2007-02-22 2008-09-04 Matsushita Electric Works Ltd Optical linked semiconductor relay
WO2009091000A1 (en) * 2008-01-18 2009-07-23 Panasonic Electric Works Co., Ltd. Semiconductor relay

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008205351A (en) * 2007-02-22 2008-09-04 Matsushita Electric Works Ltd Optical linked semiconductor relay
WO2009091000A1 (en) * 2008-01-18 2009-07-23 Panasonic Electric Works Co., Ltd. Semiconductor relay
JP2009171468A (en) * 2008-01-18 2009-07-30 Panasonic Electric Works Co Ltd Semiconductor relay module
US8729740B2 (en) 2008-01-18 2014-05-20 Panasonic Corporation Semiconductor relay

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