JP2004180007A - Current mirror circuit and semiconductor laser drive circuit using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a current mirror circuit that can widen the range of its output voltage, in which the constant-current property of its output current is maintained and, at the same time, can make its output current follow the changes in the input current, at a high speed. <P>SOLUTION: The serial circuit of PMOS transistors P10 and P11 and the serial circuit of PMOS transistors P20 and P21 are connected in parallel with each other, between a power-supply voltage VDD and an input terminal IN, and the serial circuit of PMOS transistors P30 and P31 is connected between the voltage VDD and an output terminal OUT. The gates of the PMOS transistors P10 and P30 are respectively connected to ground voltages, and the connections among the gates of the PMOS transistors P11, P21, and P31 are respectively connected to the drains of the transistors P11 and P21. In addition, the gate of the PMOS transistor P20 is connected to the drain of the PMOS transistor P31. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a current mirror circuit that generates and outputs a current having a fixed ratio with respect to an input current, and in particular, can change an output current at a high speed, and further requires a constant current property in an output current. For example, the present invention relates to a current mirror circuit used in a laser diode drive circuit for reading and writing optical disks.
[0002]
[Prior art]
Conventionally used current mirror circuits include a current mirror circuit having a basic circuit configuration (hereinafter, referred to as a basic current mirror circuit), a cascode-type current mirror circuit, a Wilson-type current mirror circuit, and a low-voltage cascode-type current mirror. There was a circuit.
[0003]
[Problems to be solved by the invention]
FIG. 9 is a circuit diagram showing an example of a basic current mirror circuit.
In FIG. 9, the drain and the gate of the PMOS transistor 101 are connected, and when a current Iin flows from the drain, a current Iout substantially proportional to the transistor size ratio of the PMOS transistor 101 and the PMOS transistor 102 is output from the drain of the PMOS transistor 102. Is done. However, in such a basic current mirror circuit, due to the channel length modulation effect of the MOS transistor, the output current Iout changes as shown in FIG. 10 depending on the voltage Vout of the output terminal OUT to which the drain of the PMOS transistor 102 is connected. There was a disadvantage.
[0004]
In the circuit of FIG. 9, the voltage Vout of the output terminal OUT at which the constant current of the output current Iout is maintained falls within the range of the following equation (1).
Vout ≦ VDD− (Vgs−Vth) (1)
In the above equation (1), VDD is a power supply voltage, Vgs is a gate-source voltage of the PMOS transistor 102, and Vth is a threshold voltage of the PMOS transistor 102.
[0005]
Assuming that the drain-source voltage Vds at the point where the PMOS transistor 102 switches from the linear region to the saturation region is Veff, Veff is represented by the following equation (2).
Veff = Vgs-Vth (2)
From the expression (2), the expression (1) can be expressed as the following expression (3).
Vout ≦ VDD−Veff (3)
[0006]
Next, FIG. 11 is a circuit diagram showing an example of a cascode type current mirror circuit.
FIG. 11 shows a configuration in which the current mirror circuit is stacked in two stages, and the drain voltage of the PMOS transistor 112 which determines the output current Iout is hardly affected by the voltage Vout of the output terminal OUT. As shown in FIG. 12, the cascode-type current mirror circuit of FIG. 11 is excellent in the constant current property of the output current Iout. In FIG. 12, the characteristic shown in FIG. 12A shows the case of the cascode type current mirror circuit shown in FIG. 11, and the characteristic shown in FIG. 12B shows the case of the basic current mirror circuit shown in FIG. ing.
[0007]
In the circuit of FIG. 11, the voltage Vout of the output terminal OUT at which the constant current of the output current Iout is maintained falls within the range of the following equation (4).
Vout ≦ VDD− (Vds112−Vgs113−Vth) = VDD− (2 ×× Vgs−Vth) (4)
In the above equation (4), Vds112 indicates a drain-source voltage of the PMOS transistor 112, Vgs113 indicates a gate-source voltage of the PMOS transistor 113, respectively, and each gate-source voltage Vgs of the PMOS transistors 112, 113 Are the same.
[0008]
Also, assuming that the threshold voltages Vth of the PMOS transistors 110 to 113 in FIG. 11 are also the same, and if Veff = Vgs−Vth, the above equation (4) can be expressed by the following equation (5).
Vout ≦ VDD− (2 · Veff + Vth) (5)
Comparing Equation (5) and Equation (3), it can be seen that Equation (5) has a narrower output voltage range in which the constant current operation can be performed by (Veff + Vth).
[0009]
As described above, the cascode type current mirror circuit has a disadvantage that the range of the output voltage Vout in which the constant current of the output current Iout is maintained is more limited than the basic current mirror circuit. The same applies to a Wilson-type current mirror circuit (not shown). In addition, the cascode type current mirror circuit basically has a speed at which the output current Iout follows the change in the input current Iin when the input current Iin changes at a high speed or when the input current Iin is input or stopped. There was a disadvantage that it was slower than the current mirror circuit.
[0010]
Next, FIG. 13 is a circuit diagram showing an example of a low voltage cascode type current mirror circuit. In FIG. 13, the same or similar components as those in FIG. 11 are denoted by the same reference numerals.
The low-voltage cascode-type current mirror circuit improves the problem that the voltage range of the output voltage Vout in the cascode-type current mirror circuit, in which the output current Iout maintains a constant current, becomes narrow. It can be seen that the voltage range of the output voltage Vout in which the constant current property of Iout is maintained is wider than that of the cascode type current mirror circuit shown in FIG. In FIG. 14, the characteristic shown in FIG. 14A shows the case of the low-voltage cascode type current mirror circuit shown in FIG. 13, and the characteristic shown in FIG. 14B shows the case of the basic current mirror circuit shown in FIG. Is shown.
[0011]
The output voltage Vout is represented by the following equation (6).
Vout ≦ VDD− (2 · Veff) (6)
From the equation (6), the voltage range of the output voltage Vout in which the constant current of the output current Iout is maintained by the threshold voltage Vth, as compared with the equation (5) in the case of the cascode type current mirror circuit. This corresponds to about 0.6 V to 1.0 V in a general CMOS process.
[0012]
However, there is a disadvantage that a circuit for generating the bias voltage Vb for each gate of the PMOS transistor 111 and the PMOS transistor 113 is required separately. Further, when the input current Iin is changed at a high speed, or when the input current Iin is input or stopped, the impedance of the PMOS transistors 111 and 113 must be reduced unless the impedance of the terminal Bin to which the bias voltage Vb is input is sufficiently reduced. There is also a disadvantage that the bias voltage Vb fluctuates due to the coupling of the parasitic capacitance between the drain and the gate, and the output current Iout cannot quickly follow the change in the input current Iin.
[0013]
The present invention has been made in order to solve the above-described problems, and it is possible to widen a voltage range of an output voltage in which a constant current property of an output current is maintained, and to provide an output with respect to a change in an input current. It is an object of the present invention to obtain a current mirror circuit capable of following a current at high speed.
[0014]
[Means for Solving the Problems]
A current mirror circuit according to the present invention is a current mirror circuit that outputs an output current according to an input current flowing through an input terminal from an output terminal.
A first series circuit in which a first transistor and a second transistor are connected in series between a first power supply voltage and the input terminal, and an input current flows through the input terminal;
A third transistor and a fourth transistor are connected in series between a first power supply voltage and the input terminal, are connected in parallel with the first series circuit, and are connected to the input terminal together with the first series circuit. A second series circuit for flowing an input current;
A third series circuit having a fifth transistor and a sixth transistor connected in series between a first power supply voltage and the output terminal, and outputting the output current;
With
The first and fifth transistors are turned on when the control signal input terminals of the respective transistors are connected to a second power supply voltage, respectively, and the second, fourth and sixth transistors are connected to the respective transistors. Are connected to the input terminals, respectively, and the third transistor has a control signal input terminal of the transistor connected to the output terminal.
[0015]
Specifically, the first, third, and fifth transistors are respectively connected to a first power supply voltage side, and the second and fourth transistors each pass an input current to the input terminal. The sixth transistor outputs the output current to an output terminal.
[0016]
Further, the semiconductor laser drive circuit according to the present invention is a semiconductor laser drive circuit including a current mirror circuit that outputs an output current corresponding to an input current flowing through an input terminal from an output terminal to a laser diode.
The current mirror circuit includes:
A first series circuit in which a first transistor and a second transistor are connected in series between a first power supply voltage and the input terminal, and an input current flows through the input terminal;
A third transistor and a fourth transistor are connected in series between a first power supply voltage and the input terminal, are connected in parallel with the first series circuit, and are connected to the input terminal together with the first series circuit. A second series circuit for flowing an input current;
A third series circuit having a fifth transistor and a sixth transistor connected in series between a first power supply voltage and the output terminal, and outputting the output current;
With
The first and fifth transistors are turned on when the control signal input terminals of the respective transistors are connected to a second power supply voltage, respectively, and the second, fourth and sixth transistors are connected to the respective transistors. Are connected to the input terminals, respectively, and the third transistor has a control signal input terminal of the transistor connected to the output terminal.
[0017]
Specifically, the first, third, and fifth transistors are respectively connected to a first power supply voltage side, and the second and fourth transistors each pass an input current to the input terminal. The sixth transistor outputs the output current to an output terminal.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the present invention will be described in detail based on an embodiment shown in the drawings.
First embodiment.
FIG. 1 is a circuit diagram showing an example of a current mirror circuit according to the first embodiment of the present invention.
When an input current i1 flows from an input terminal IN, the current mirror circuit 1 in FIG. 1 outputs an output current i2 corresponding to the input current i1 from an output terminal OUT.
[0019]
In FIG. 1, the current mirror circuit 1 includes PMOS transistors P10, P11, P20, P21, P30, and P31. A series circuit of the PMOS transistors P10 and P11 is provided between the power supply voltage VDD and the input terminal IN. A series circuit of PMOS transistors P20 and P21 is connected in parallel. A series circuit of PMOS transistors P30 and P31 is connected between the voltage VDD and the output terminal OUT.
[0020]
The PMOS transistor P10 is a first transistor, the PMOS transistor P11 is a second transistor, the PMOS transistor P20 is a third transistor, the PMOS transistor P21 is a fourth transistor, and the PMOS transistor P30 is a fifth transistor. And the PMOS transistor P31 forms a sixth transistor. The gate of each MOS transistor forms a control signal input terminal. The power supply voltage VDD forms a first power supply voltage, and the ground voltage forms a second power supply voltage.
[0021]
The gates of the PMOS transistors P10 and P30 are connected to the ground voltage, the gates of the PMOS transistors P11, P21 and P31 are connected to each other, and the connection is connected to the drains of the PMOS transistors P11 and P21. . The gate of the PMOS transistor P20 is connected to the drain of the PMOS transistor P31, that is, to the output terminal OUT. The substrate gates of the PMOS transistors P10, P11, P20, P21, P30, and P31 are connected to the power supply voltage VDD.
[0022]
The PMOS transistors P10, P11, P20, and P21 form a primary side which is an input side of the current mirror circuit, and the PMOS transistors P30 and P31 form a secondary side which is an output side of the current mirror circuit. The PMOS transistors P11 and P21 control the output current i2 output from the output terminal OUT. The ratio of the transistor sizes of the PMOS transistor P11 and the PMOS transistor P21 is arbitrary, but the current mirror ratio is determined by the sum of the transistor sizes of the PMOS transistors P11 and P21 and the ratio of the transistor size of the PMOS transistor P31.
[0023]
Further, the ratio between the transistor sizes of the PMOS transistors P10 and P20 needs to match the ratio between the transistor sizes of the PMOS transistors P11 and P21. Further, the ratio between the sum of the transistor sizes of the PMOS transistors P10 and P20 and the transistor size of the PMOS transistor P30 needs to match the ratio between the sum of the transistor sizes of the PMOS transistors P11 and P21 and the transistor size of the PMOS transistor P31. . The gate lengths L of the PMOS transistors P10, P20, and P30 are the same, and the gate lengths L of the PMOS transistors P11, P21, and P31 need to be the same to ensure pairing.
[0024]
The gate width W of each of the PMOS transistors P10, P11, P20, P21, P30, and P31 depends on the current ratio (i1: i2) between the primary side and the secondary side of the current mirror circuit. The ratio of the sum (W10 + W20) of the gate width W10 of the transistor P10 and the gate width W20 of the PMOS transistor P20 to the gate width W30 of the PMOS transistor P30, and the sum of the gate width W11 of the PMOS transistor P11 and the gate width W21 of the PMOS transistor P21 ( The ratio between W11 + W21) and the gate width W31 of the PMOS transistor P31 is determined. Here, the current ratio between the primary side and the secondary side is set to 1: 1 for ease of explanation. That is, the description will be made on the assumption that the current i1 flowing to the primary side and the current i2 output from the secondary side are substantially the same.
[0025]
The ratio of the gate width of the PMOS transistors P10 and P20 (W10: W20) and the ratio of the gate width of the PMOS transistors P11 and P21 (W11: W21) are important in determining the degree of canceling the channel length modulation effect described later. Although they are parameters, they are set to 1: 1 here for ease of explanation. That is, the gate widths W10 and W20 are each １ ／ of the gate width W30, and the gate widths W11 and W21 are each １ ／ of the gate width W31.
[0026]
Here, the connection between the drain of the PMOS transistor P10 and the source of the PMOS transistor P11 is A, the connection between the drain of the PMOS transistor P20 and the source of the PMOS transistor P21 is B, and the drain of the PMOS transistor P30 and the connection of the PMOS transistor P31. Let C be the connection to the source.
FIG. 2 is a diagram showing a voltage change of the input terminal IN and the connection portions A, B, and C with respect to the voltage Vo of the output terminal OUT, which will be described with reference to FIG. Note that FIG. 2 shows an example in which the power supply voltage VDD is 5V.
[0027]
First, consider the case where the voltage Vo at the output terminal OUT is 0 V (ground voltage). Since the sources, gates, and drains of the PMOS transistors P10, P20, and P30 have the same conditions, the currents i1 and i2 are substantially the same. That is, in the PMOS transistors P10, P20 and P30, each source is connected to the power supply voltage VDD, each gate is connected to the ground voltage, and each drain is a voltage drop from the power supply voltage VDD due to the on-resistance of the transistor and the flowing current. For example, in FIG. 2, the voltages at the connection portions A to C are all 4.9 V, which is the same. Note that the PMOS transistors P10, P20, and P30 operate in a linear region of a perfect MOS transistor, and thus each function simply as a resistor. At this time, half of the input current i1 flows uniformly through the PMOS transistors P10 and P11 and the PMOS transistors P20 and P21.
[0028]
When the output terminal OUT rises from 0 V toward the power supply voltage VDD, the ON resistance of the PMOS transistor P20 increases because the voltage Vo of the output terminal OUT is input to the gate, and as a result, the drain voltage of the PMOS transistor P20 ( The voltage at the connection B) decreases, the gate-source voltage Vgs of the PMOS transistor P21 (the voltage between the connection B and the input terminal IN) decreases, and the current flowing through the PMOS transistors P20 and P21 decreases. . That is, the decrease in the current from the PMOS transistors P20 and P21 is compensated for by the PMOS transistors P10 and P11, and the gate-source voltage Vgs of the PMOS transistor P11 (the voltage between the connection portion A and the input terminal IN). , The voltage Vi of the input terminal IN also decreases.
[0029]
If the gate voltage of the PMOS transistor P31, which is the transistor on the secondary side of the current mirror circuit 1, is fixed, the output current i2 decreases due to the channel length modulation effect of the PMOS transistor P31 as the voltage Vo at the output terminal OUT increases. (Similar to the characteristics of the basic current mirror circuit of FIG. 11). However, as described above, since the voltage Vo at the output terminal OUT increases and the voltage Vi at the input terminal IN, which is the gate voltage of the PMOS transistor P31, decreases, the current decreases due to the channel length modulation effect. I can make up for it.
[0030]
FIG. 3 shows the PMOS transistors P10, P20, and P30 of FIG. 1 represented by resistors.
In FIG. 3, a resistor R20 corresponding to the PMOS transistor P20 can be regarded as a variable resistor whose resistance changes in conjunction with the voltage Vo at the output terminal OUT. That is, the voltage Vo at the output terminal OUT is fed back to the primary circuit of the current mirror circuit 1 to correct the channel length modulation effect.
[0031]
Here, in the PMOS transistor P31, when the respective constants are set so that the increase in the output current i2 due to the increase in the gate-source voltage Vgs and the decrease in the output current i2 due to the decrease in the channel length modulation effect cancel each other, It is possible to improve the deterioration of the constant current property due to the channel length modulation effect, which is a drawback of the current mirror circuit. The amount by which the voltage Vo at the output terminal OUT is fed back to the primary side of the current mirror circuit 1 to compensate for the current decrease due to the channel length modulation effect depends on the on-resistance values of the PMOS transistors P10, P20, and P30 and the currents i1 and i2. Each current value and each variable of the transistor size ratio between the set of the PMOS transistors P10 and P11 and the set of the PMOS transistors P20 and P21 are involved.
[0032]
The on-resistance values of the PMOS transistors P10, P20, and P30 are related to the current values of the currents i1 and i2, and the drain voltages of the PMOS transistors P10, P20, and P30, that is, the connections A to C in FIG. It is necessary to select each voltage to be a voltage value lower than the power supply voltage VDD by a certain appropriate voltage. For example, when the on-resistance of each of the PMOS transistors P10 and P20 is increased, the drain voltage of each of the PMOS transistors P10 and P20 causes a large voltage drop with respect to the input current i1. The drain voltage greatly changes with the change. From this, the change in the gate voltage of each of the PMOS transistors P11, P21, and P31 also greatly changes with the change in the output voltage Vo, so that the effect of the feedback becomes remarkable.
[0033]
However, if the respective drain voltages of the PMOS transistors P10 and P20 are made to drop too much, the operating ranges of the input terminal IN and the output terminal OUT are reduced, and the output current i2 follows a rapid change of the input current i1. Care must be taken as the speed of the settling may be reduced and the settling time may be reduced. The on-resistance of each of the PMOS transistors P10 and P20 is made small, and the current change due to the channel length modulation effect is canceled by the ratio of the transistor size of the PMOS transistors P10 and P11 to the input current i1 described below. It is safer to do so. For example, in FIG. 2, each voltage of the connection parts A to C is set to be a value obtained by dropping the power supply voltage VDD of 5 V by about 100 mV. When the input current i1 is about 220 mA, the resistance value of (R10 + R20) in FIG. 3 is equal to the resistance value of R30 and is 0.45Ω.
[0034]
The voltage drop amount affects a current rising or falling response characteristic to be described later, and sets a pair of PMOS transistors P10 and P11 and a pair of PMOS transistors P20 and P21 in order to flatten the constant current characteristic of the output current i2. Is closely related to the transistor size ratio. Although the current rise and current fall response characteristics will be described later, if the voltage drop amount is too large, the voltage amplitude for charging / discharging the parasitic capacitance existing on the drain side of each of the PMOS transistors P10, P20, and P30 increases, and the settling time increases. Care must be taken in applications where speed is important, as it will be slow.
[0035]
Next, the relationship between the respective voltage drop amounts for flattening the constant current characteristics of the output current i2 and the transistor size ratio of the pair of PMOS transistors P10 and P11 and the pair of PMOS transistors P20 and P21 will be described. .
When the proportion of the transistor size on the side of the PMOS transistors P20 and P21 to which the output voltage Vo is fed back is increased, the effect of feedback increases and the effect of increasing the output current i2 increases. Increase effect decreases.
[0036]
When the transistor size ratio between the set of the PMOS transistors P10 and P11 and the set of the PMOS transistors P20 and P21 is fixed to a certain value, when the amount of voltage drop of the PMOS transistors P10 and P20 is large, the variation in the voltage Vo of the PMOS transistor P20 is reduced. Since the fluctuation of the drain voltage (the voltage of the connection portion B) is large, the current correction effect of the set of the PMOS transistors P20 and P21 to which the feedback of the voltage Vo of the output terminal OUT is applied becomes large, and conversely, the PMOS transistors P10 and P20 Is small, the current correction effect becomes small.
[0037]
On the other hand, the voltage drop amount of the PMOS transistors P10 and P20 is fixed to a certain value, and the ratio of the transistor size of the pair of the PMOS transistors P10 and P11 to the pair of the PMOS transistors P20 and P21 is changed. The current correction effect increases when the proportion of the transistor size of the set of the PMOS transistors P20 and P21 to which feedback is applied increases, and the current correction effect decreases when the proportion of the transistor size of the set of the PMOS transistors P20 and P21 decreases. .
[0038]
That is, the voltage drop amount of the PMOS transistors P10 and P20 and the ratio of the transistor size of the set of the PMOS transistors P10 and P11 to the transistor size of the set of the PMOS transistors P20 and P21 are in a trade-off relationship with each other. For this reason, it is preferable to appropriately select the two parameters so that the characteristics of the output current i2 as shown in FIG. 4 are obtained, so that the channel length modulation effect can be canceled well. That is, in FIG. 4, it can be seen that the constant current property of the output current i2 is greatly improved as compared with the case of the conventional basic current mirror circuit when the voltage Vo at the output terminal OUT is in the range of about 0 to 3.2V. 4 shows an example in which the power supply voltage VDD is 5 V, (a) shows the case of the current mirror circuit 1 in FIG. 1, and (b) shows the case of the conventional basic current mirror circuit. ing.
[0039]
Here, the ratio of the gate width W between the PMOS transistors P10 and P11, which are the non-feedback transistors on the primary side, and the PMOS transistors P20, P21, which are the primary transistors on which feedback is applied, is 3: 1, 2: 2, FIG. 5 shows an example of each characteristic of the output current i2 when the ratio is 1: 3. 5A shows a case where the ratio of the gate width W is 3: 1, FIG. 5B shows a case where the ratio of the gate width W is 2: 2, and FIG. The case of 1: 3 is shown.
In FIG. 5, when the voltage Vo at the output terminal OUT is in the range of 0 to 3 V, the one with the ratio of 1: 3 shown in (c) shows the flattest characteristic. The ratio of the PMOS transistors P20 and P21, which are feedback transistors, is small in the 3: 1 transistor shown in (a) and the 2: 2 transistor shown in (b), and the correction is slightly insufficient.
[0040]
FIG. 6 is a diagram illustrating each characteristic example of the output current i2 when the gate width W of each of the PMOS transistors P10, P20, and P30 in FIG. 5 is halved and the on-resistance is doubled. 6A also shows the case where the ratio of the gate width W is 3: 1, FIG. 6B shows the case where the ratio of the gate width W is 2: 2, and FIG. Are 1: 3 respectively.
[0041]
Since the amount of voltage drop due to the on-resistance of each of the PMOS transistors P10, P20, and P30 is doubled, the correction effect due to feedback is doubled. In FIG. 5, the case of (c) of 1: 3, which is almost flat, is completely overcorrected. In FIG. 5, the flattest characteristic can be obtained in the case of (a) 3: 1 which is the most insufficiently corrected.
As described above, by adjusting both the transistor size ratio of the primary-side feedback / non-feedback transistor and the voltage drop due to the on-resistance of the PMOS transistors P10, P20, and P30, which are the power supply-side transistors, and the flowing current. , The degree of correction by the feedback of the voltage Vo at the output terminal OUT can be changed.
[0042]
Next, FIG. 7 is a diagram illustrating an example of a rising characteristic of the output current i2 output from the output terminal OUT. In FIG. 7, (a) shows the case of the current mirror circuit 1 shown in FIG. 1, (b) shows the case of the conventional basic current mirror circuit, and (c) shows the case of the conventional cascode type current mirror circuit. And (d) shows the case of a conventional low-voltage cascode type current mirror circuit.
As can be seen from FIG. 7, in the case of the current mirror circuit 1 shown in FIG. 7A, the drain voltages of the PMOS transistors P10, P20 and P30, that is, the respective voltage drops at the connection points A to C in FIG. , The steepness of the rising characteristic of the output current i2 is almost the same as that of the conventional basic current mirror circuit having the best characteristics.
[0043]
Since the cascode type current mirror circuit has a configuration in which two transistors are connected in series, there is a delay until the gate voltages of both transistors are stabilized. It has become more gradual. In the case of the low voltage cascode type current mirror circuit, there is a slight delay, and overshooting occurs, so that it takes time for settling.
[0044]
FIG. 8 is a diagram showing an example in which the current mirror circuit 1 of FIG. 1 is used in a laser diode drive circuit. In FIG. 8, the same or similar components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.
8, a laser diode drive circuit 10 includes a current mirror circuit 1, a switch circuit 11, a current source 12, and a laser diode LD. A switch circuit 11 and a current source 12 are connected in series between an input terminal IN of the current mirror circuit 1 and a ground voltage, and an anode of a laser diode LD is connected to an output terminal OUT of the current mirror circuit 1. The cathode of the laser diode LD is connected to the ground voltage.
[0045]
In such a configuration, the current source 12 generates a current flowing to the primary side of the current mirror circuit 1, and when the switch circuit 11 is turned on and becomes conductive, the current generated by the current source 12 is changed to the current mirror circuit 1. The current flows from one input terminal IN, and a current is supplied to the laser diode LD. When the switch circuit 11 is turned off to be in the cutoff state, the current flowing from the input terminal IN of the current mirror circuit 1 is cut off, and the current supply to the laser diode LD stops. It should be noted that, instead of the laser diode LD, it can also be used for supplying current to a light emitting diode or the like.
[0046]
In a laser diode or a light emitting diode, the voltage Vop generated according to the current changes, and the voltage Vop also varies due to individual differences. By using the current mirror circuit 1 as shown in FIG. 1, a change in the output current i2 due to a change or variation in the voltage Vop can be suppressed to a minimum, and high writing quality to the optical disc can be obtained. In addition, when the output current i2 is changed at high speed, the rise and fall times of the output current i2 settle at high speed, so that precise writing to the optical disk can be performed, and higher-speed writing can be performed.
[0047]
As described above, the current mirror circuit according to the first embodiment can significantly improve the constant current property of the output current i2 as compared with the conventional basic current mirror circuit, and can change the primary-side current i1. The rise time characteristics of the output current i2 with respect to the current cascode type current mirror circuit and the low voltage cascode type current mirror circuit can also be improved.
[0048]
In addition, by using the current mirror circuit 1 in the first embodiment for a DVD-RW, a DVD + RW, a CD-R, a CD-RW, or the like that performs recording on an optical disk using a laser diode, the current mirror circuit 1 A high writing quality can be obtained, and precise writing on an optical disk can be performed, thereby enabling higher-speed writing.
[0049]
In the first embodiment, a current mirror circuit having a configuration in which current is discharged by a PMOS transistor has been described as an example. However, the present invention is not limited to this, and each PMOS transistor may be an NMOS transistor. The same effect can be obtained by using a current mirror circuit of a current sink type configuration in which the power supply voltage VDD is changed to the ground voltage and the ground voltage is changed to the power supply voltage VDD.
[0050]
【The invention's effect】
As is apparent from the above description, according to the current mirror circuit of the present invention, the constant current characteristic of the output current can be significantly improved as compared with the conventional basic current mirror circuit, and the output current with respect to the change of the input current can be improved. Of the cascode-type current mirror circuit and the low-voltage cascode-type current mirror circuit.
[0051]
Further, according to the semiconductor laser drive circuit of the present invention, it is possible to obtain high writing quality to an optical disc in DVD-RW, DVD + RW, CD-R, CD-RW, etc., which perform recording on an optical disc using a laser diode. At the same time, precise writing on the optical disk is enabled, and higher-speed writing can be performed.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an example of a current mirror circuit according to a first embodiment of the present invention.
FIG. 2 is a diagram illustrating a change in voltage of an input terminal IN and connections A to C with respect to a voltage Vo.
FIG. 3 is an equivalent circuit in which PMOS transistors P10, P20, and P30 of FIG. 1 are represented by resistors.
FIG. 4 is a diagram showing a characteristic example of an output current i2 in the current mirror circuit 1 of FIG.
FIG. 5 is a diagram showing a characteristic example of the output current i2 when the ratio of the gate width W of the PMOS transistors P10 and P11 and the PMOS transistors P20 and P21 is changed.
6 is a diagram illustrating a characteristic example of an output current i2 when the gate width W of each of the PMOS transistors P10, P20, and P30 in the case of FIG. 5 is halved;
FIG. 7 is a diagram illustrating a rising characteristic example of a current i2 output from an output terminal OUT.
8 is a diagram showing a case where the current mirror circuit 1 of FIG. 1 is used in a laser diode drive circuit.
FIG. 9 is a circuit diagram showing an example of a conventional basic current mirror circuit.
10 is a diagram illustrating a characteristic example of the output current Iout of FIG. 9;
FIG. 11 is a circuit diagram showing an example of a conventional cascode type current mirror circuit.
12 is a diagram illustrating a characteristic example of the output current Iout in FIG. 11;
FIG. 13 is a circuit diagram showing an example of a conventional low-voltage cascode current mirror circuit.
14 is a diagram showing a characteristic example of the output current Iout of FIG.
[Explanation of symbols]
1 Current mirror circuit
P10, P11, P20, P21, P30, P31 PMOS transistors
IN input terminal
OUT output terminal
11 Switch circuit
12 Current source
LD laser diode

Claims (4)

In a current mirror circuit that outputs an output current according to an input current flowing through an input terminal from an output terminal,
A first series circuit in which a first transistor and a second transistor are connected in series between a first power supply voltage and the input terminal, and an input current flows through the input terminal;
A third transistor and a fourth transistor are connected in series between a first power supply voltage and the input terminal, are connected in parallel with the first series circuit, and are connected to the input terminal together with the first series circuit. A second series circuit for flowing an input current;
A third series circuit having a fifth transistor and a sixth transistor connected in series between a first power supply voltage and the output terminal, and outputting the output current;
With
The first and fifth transistors are turned on when the control signal input terminals of the respective transistors are connected to a second power supply voltage, respectively, and the second, fourth and sixth transistors are connected to the respective transistors. A current mirror circuit, wherein a control signal input terminal of the third transistor is connected to the input terminal, and a control signal input terminal of the third transistor is connected to the output terminal. The first, third and fifth transistors are respectively connected to a first power supply voltage side, and the second and fourth transistors respectively flow an input current to the input terminals and the sixth transistor The current mirror circuit according to claim 1, wherein the transistor outputs the output current to an output terminal. In a semiconductor laser drive circuit including a current mirror circuit that outputs an output current corresponding to an input current flowing through an input terminal from an output terminal to a laser diode,
The current mirror circuit includes:
A first series circuit in which a first transistor and a second transistor are connected in series between a first power supply voltage and the input terminal, and an input current flows through the input terminal;
A third transistor and a fourth transistor are connected in series between a first power supply voltage and the input terminal, are connected in parallel with the first series circuit, and are connected to the input terminal together with the first series circuit. A second series circuit for flowing an input current;
A third series circuit having a fifth transistor and a sixth transistor connected in series between a first power supply voltage and the output terminal, and outputting the output current;
With
The first and fifth transistors are turned on when the control signal input terminals of the respective transistors are connected to a second power supply voltage, respectively, and the second, fourth and sixth transistors are connected to the respective transistors. Wherein the control signal input terminal of the third transistor is connected to the input terminal, and the control signal input terminal of the third transistor is connected to the output terminal. The first, third and fifth transistors are respectively connected to a first power supply voltage side, and the second and fourth transistors respectively flow an input current to the input terminals and the sixth transistor 4. The semiconductor laser drive circuit according to claim 3, wherein the transistor outputs the output current to an output terminal.

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