JP2004179473A - Solid-state imaging device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To restrain a dark current and reduce a read voltage by forming a proper shape of a hole storage region including an offset region in a photoelectric conversion region. <P>SOLUTION: In a first ion implantation process, ion implantation with an oblique angle is performed from a read part side to a pixel side to form a first ion implantation region 170 including the offset region 114. At an overlapping portion of transfer electrodes 160A and 160B each other, the width of the offset region 114 is enlarged, causing the dark current large. Therefore, by performing ion implantation using a mask 180 in a second ion implantation process, an impurity ion is implanted into a region including the defective portion where the width of the offset region 114 is enlarged, to form the hole storage region 113 including a protruding region 113A to the transfer electrode 160A, 160B sides. The protruding region 113A is arranged on each region except the read path of the signal electron to prevent the dark current without affecting the read performance. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a CCD solid-state imaging device for reading out signal electrons generated by a plurality of pixels by a charge transfer unit having a CCD structure and a method of manufacturing the same, and more particularly, to a solid-state imaging device capable of performing high-sensitivity, low-noise imaging and a manufacturing method thereof About.
[0002]
[Prior art]
As a conventional CCD solid-state imaging device, a plurality of pixels each provided with a photoelectric conversion region such as a photodiode on a semiconductor substrate are provided in a two-dimensional array, and a plurality of CCDs for reading out signal electrons of each pixel and transferring the signal electrons in a vertical direction. It is known that a vertical transfer register is provided for each pixel column and a CCD horizontal transfer register is provided for receiving signal electrons from each CCD vertical transfer register and transferring the signal electrons to an output unit.
Further, a transfer electrode of a polysilicon electrode film is disposed above the CCD vertical transfer register and the CCD horizontal transfer register via a gate oxide film, and each transfer register is driven to perform a signal electron transfer operation. ing.
[0003]
As a photodiode used for a photoelectric conversion element of such a solid-state imaging device, a photodiode using a so-called HAD (hole-accumulation-diode) structure is provided instead of a conventional PN junction diode. (For example, see Patent Document 1).
In the photodiode having the HAD structure, a signal electron accumulation region formed of a low-concentration N-type impurity region is formed in a photoelectric conversion region of a semiconductor substrate, and a hole accumulation region formed of a high-concentration P-type impurity region is formed on an upper surface thereof. Among the charges converted in the photoelectric conversion region, electrons used as signal electrons are stored in the signal electron storage region and the depletion region, and the dark current generated at the Si-SiO2 interface is suppressed, so that white spot noise due to the dark current, etc. And high-sensitivity photoelectric conversion can be performed.
[0004]
[Patent Document 1]
Japanese Patent No. 3042042 [0005]
FIGS. 9 and 10 are schematic views showing the element structure of such a conventional CCD solid-state imaging device. FIG. 9 shows a light receiving area (photo sensor area) of each pixel, a vertical transfer register, and a transfer electrode for a channel stop area. 10 is a cross-sectional view taken along line AA of FIG. 9. FIG.
In FIG. 9, each pixel has a rectangular light receiving area 10, a vertical transfer register 20 is provided near one side of the light receiving area 10, and a channel stop area 40 is arranged outside the vertical transfer register 20. On the upper surface, two-layer transfer electrodes 50A and 50B are formed via a gate oxide film. In FIG. 9, the lower first transfer electrode 50A is indicated by a solid line, and the upper second transfer electrode 50B is indicated by a broken line.
Each transfer electrode 50A, 50B is formed in a pattern surrounding the periphery of the light receiving region 10, and the transfer electrodes 50A, 50B are arranged in a state where a part of each transfer electrode 50A, 50B overlaps on both sides in the horizontal direction of the light receiving region 10. .
[0006]
The vertical transfer register 20 reads out the signal electrons generated by each light receiving region 10 and transfers the signal electrons in the vertical direction (the direction of the arrow a in the figure) by driving the transfer electrodes 50A and 50B. The operation of reading the signal electrons from the light receiving region 10 to the vertical transfer register 20 is performed by driving the upper transfer electrode 50B.
Further, the channel stop region 40 prevents electron leakage (crosstalk) between adjacent pixels.
[0007]
Further, as shown in FIG. 10, a photodiode having the above-described HAD structure is provided in the light receiving region 10 of each pixel. That is, in the light receiving region 10, a signal electron accumulation region 11 is provided by forming a low-concentration N-type impurity region in a P-type well region 61 formed in a silicon substrate 60, and a high-concentration P-type The hole accumulation region 12 is provided by forming an impurity region. When light is incident on the light receiving region 10, mainly in a depletion layer formed at the boundary between the P-type impurity region (the hole accumulation region 12 and the P-well region 61) and the N-type impurity region (the signal electron accumulation region 11). Photoelectric conversion occurs, and signal electrons generated by the photoelectric conversion are stored in the signal electron accumulation region 11 and the surrounding depletion layer, and holes are attracted to the hole accumulation region 12 side.
[0008]
As a method of forming each of the impurity regions of the signal electron accumulation region 11 and the hole accumulation region 12 of the light receiving region 10, a self-aligned ion implantation process using the transfer electrodes 50 </ b> A and 50 </ b> B as a mask pattern is described. Therefore, a method of implanting each impurity ion is adopted.
[0009]
In FIG. 10, a vertical transfer register 20 and a channel stop region 40 are formed adjacent to the light receiving region 10. A signal charge readout region 62 at a predetermined interval is formed between the light receiving region 10 and the vertical transfer register 20.
Further, transfer electrodes 50A and 50B (only the transfer electrode 50A is visible in FIG. 10) are provided on the silicon substrate 60 with the gate oxide film 30 interposed therebetween. A film 70 is formed.
[0010]
By the way, in the structure of the light receiving region 10 as described above, when the hole accumulation region 12 is completely adhered to the adjacent read region 62, the energy required for reading the signal charge increases, and a large read voltage is required. There's a problem.
Conventionally, as shown in FIG. 11, for example, as shown in FIG. 11, when the hole accumulation region 12 is formed by boron ion implantation, by controlling the injection position, the hole accumulation region 12 faces the readout region 62 of the hole accumulation region 12. An offset region 13 which is set back by a certain amount is provided, and the P-type impurity concentration in this portion is lowered to lower the read voltage.
[0011]
As a specific method for obtaining such an offset region 13, in the ion implantation step when forming the hole accumulation region 12, the ion implantation direction is inclined from the readout region side to the pixel side. In addition, a region into which impurity ions are not implanted is provided by using the thickness of the transfer electrode.
For example, in the example shown in FIG. 11, the offset region 13 having a width of 40 nm is formed by performing ion implantation (arrow b in the drawing) with a tilt of 7 degrees with respect to the transfer electrode film of 300 nm. Can be.
[0012]
[Problems to be solved by the invention]
However, when the offset region 13 of the hole accumulation region 12 is to be provided by self-aligned ion implantation using the mask pattern of the transfer electrodes 50A and 50B as described above, the film is not formed in the overlapping portion of the transfer electrodes 50A and 50B. Since the thickness is increased and a partially raised state is obtained, impurity ions are blocked in this portion, and a region to which no impurity is added is generated.
FIG. 12 is a cross-sectional view showing a state of ion implantation at a portion where the transfer electrodes 50A and 50B overlap when the ion implantation shown in FIG. 11 is performed, and shows a cross section taken along line BB of FIG.
As shown in the figure, in the portion where the two transfer electrodes 50A and 50B overlap, if the insulating film (not shown) between the electrodes is included, the total film thickness is 700 nm and the offset region is 85 nm.
[0013]
FIG. 13 is a plan view showing a pattern shape of the hole accumulation region 12 and the offset region 13 in this case. The offset region 13 is formed in a part of the hole accumulation region 12.
In this description, the non-implanted region of the impurity ions formed in such a state that a part of the hole accumulation region 12 is partially embedded is referred to as an impurity deficient region 12A for convenience.
When such an impurity-deficient region 12A is generated, a dark current is generated in this portion, causing an increase in white spot noise and a problem of deteriorating image quality.
[0014]
Accordingly, an object of the present invention is to provide a solid-state imaging device having a properly shaped offset region and a hole accumulation region, thereby achieving both low noise due to suppression of dark current and low read voltage, and a method of manufacturing the same. It is in.
[0015]
[Means for Solving the Problems]
In order to achieve the above object, the present invention arranges, in an upper layer of a semiconductor substrate, a plurality of pixels including a photoelectric conversion region that generates signal charges according to the amount of incident light, and a pixel row including the plurality of pixels. A transfer unit for reading out the signal charges generated by each pixel and sequentially transferring the signal charges in the pixel column direction, and controlling the transfer of the signal charges read into the transfer unit on the transfer unit of the semiconductor substrate. A method for manufacturing a solid-state imaging device provided with a plurality of transfer electrodes, comprising: forming a signal electron accumulation region in a photoelectric conversion region of the plurality of pixels; and forming a hole accumulation region above the signal electron accumulation region. Forming, the step of forming the hole accumulation region, performing ion implantation inclined from the transfer unit side to the photoelectric conversion region side by self-alignment using the plurality of transfer electrodes, A first ion implantation step of adding impurity ions while leaving an offset region in which ions are not implanted in the charge readout region between the charge conversion region and the transfer unit; and a self-alignment using the plurality of layers of transfer electrodes. When the first ion implantation step is performed, a plurality of layers of transfer electrodes are intercepted by raised portions overlapping with each other to block the ions. A second ion implantation step of reducing at least a part of the defective region by performing ion implantation with a different ion implantation.
[0016]
In addition, the present invention may further include a plurality of pixels provided in an upper layer of the semiconductor substrate and including a photoelectric conversion region that generates signal electrons according to the amount of incident light, and a pixel column formed of the plurality of pixels in the upper layer of the semiconductor substrate. A transfer unit that reads out signal electrons generated by each pixel and sequentially transfers the read out in the pixel column direction, and a signal provided on the transfer unit of the semiconductor substrate in an upper layer of the semiconductor substrate and read into the transfer unit. A plurality of transfer electrodes for controlling electron transfer, wherein a signal electron accumulation region is formed in a photoelectric conversion region of the plurality of pixels, and a hole accumulation region is formed above the signal electron accumulation region. The hole accumulation region performs ion implantation inclined from the transfer unit side to the photoelectric conversion region side by self-alignment using the plurality of layers of transfer electrodes, so that the ion implantation is performed between the photoelectric conversion region and the transfer unit. When a first ion implantation step is performed by self-alignment using a first ion implantation region to which impurity ions are added while leaving an offset region in which ions are not implanted in the load readout region, and the plurality of layers of transfer electrodes. By performing ion implantation by changing the implantation method from the first ion implantation step, a defect region of impurity ions generated by blocking ions at a raised portion where a plurality of transfer electrodes overlap with each other, A second ion implantation region to which impurity ions are added in a state where at least a part of the defect region is reduced.
[0017]
In the method for manufacturing a solid-state imaging device according to the present invention, when forming a hole accumulation region having an offset region in an oblique ion implantation process by self-alignment using a plurality of transfer electrode films, By reducing the resulting defective region of the hole accumulation region by the second ion implantation step, a solid-state imaging device having an appropriately shaped offset region and a hole accumulation region can be manufactured, and noise can be reduced by suppressing dark current. It is possible to provide a solid-state imaging device that can achieve both low reading voltage.
Further, in the solid-state imaging device according to the present invention, the hole accumulation region having the offset region is formed by a first ion implantation region formed by a diagonal ion implantation process by self-alignment using a plurality of transfer electrode films; Since the first ion-implanted region has the second ion-implanted region for reducing a defect region generated therein, a solid-state imaging device having an appropriately shaped offset region and a hole accumulation region can be formed, and low solid-state imaging can be achieved by suppressing dark current. Noise reduction and read voltage reduction can both be achieved.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of a solid-state imaging device and a method of manufacturing the same according to the present invention will be described.
FIG. 1 is a plan view showing a device arrangement of a CCD solid-state imaging device according to an embodiment of the present invention.
This CCD solid-state imaging device includes a plurality of pixels 110 in a two-dimensional array on a semiconductor substrate 100 and a plurality of CCD vertical transfer registers 120 for reading signal electrons from each pixel 110 and transferring the signals in the vertical direction for each pixel column. A CCD horizontal transfer register 130 that receives signal electrons from each CCD vertical transfer register 120 and transfers the signal electrons in the horizontal direction, and an output unit 140 that converts signal electrons into electric signals at the final stage of the CCD horizontal transfer register 130. Have.
Further, a channel stop region 150 is provided between the pixel column of each pixel 110 and the adjacent CCD vertical transfer register 120.
[0019]
FIG. 2 is a plan view showing an arrangement of transfer electrodes with respect to a light receiving area (photo sensor area), a vertical transfer register, and a channel stop area of each pixel of the CCD solid-state imaging device shown in FIG.
2, each pixel 110 has a rectangular light receiving area 111, and a vertical transfer register 120 and a channel stop area 150 are arranged near one side of the light receiving area 10. On the upper surface, two-layer transfer electrodes 160A and 160B are formed via a gate oxide film. In FIG. 2, the lower first transfer electrode 160A is indicated by a solid line, and the upper second transfer electrode 160B is indicated by a broken line.
Each of the transfer electrodes 160A and 160B is formed in a pattern surrounding the light receiving region 111, and the transfer electrodes 160A and 160B are arranged in a state where a part of each of the transfer electrodes 160A and 160B overlaps on both sides in the horizontal direction of the light receiving region 111. .
[0020]
A signal charge readout region 162 is formed between each pixel 110 and the CCD vertical transfer register 120 at a predetermined interval, and the CCD vertical transfer register 120 reads out the signal electrons generated by each light receiving region 110 in the readout region 162. , And transferred in the vertical direction (the direction of arrow a in the figure) by driving by the transfer electrodes 160A and 160B. The operation of reading the signal electrons from the light receiving region 110 to the vertical transfer register 120 is performed by driving the upper transfer electrode 160B.
[0021]
FIG. 3 is a cross-sectional view showing the internal structure of each pixel in the CCD solid-state imaging device shown in FIG. 1, and shows a cross section taken along line AA of FIG.
As shown in the drawing, also in the CCD solid-state imaging device of the present embodiment, the light receiving region 111 of each pixel 110 has the above-mentioned HAD structure, and the low-density region is formed in the P-type well region 101 formed on the silicon substrate 100. The N-type impurity region is formed to provide a signal electron accumulation region 112, and a high-concentration P-type impurity region is formed thereover to provide a hole accumulation region 113. The pattern shape of 113 is different from the conventional example shown in FIGS.
It is to be noted that transfer electrodes 160A and 160B are arranged on a silicon substrate 100 with a gate insulating film 190 interposed therebetween, and a light-shielding film 192 is provided thereon with an insulating film 191 interposed therebetween as in the conventional case.
[0022]
FIG. 4 is a schematic plan view showing the pattern shape of the hole accumulation region 113 in this example.
Also in this example, the offset region 114 into which the impurity (boron) ions are not implanted is provided on the side of the readout region 162 of the hole accumulation region 113, but the overlapped portion of the transfer electrodes 160A and 160B is shown in FIG. There is no deficient region 12A as shown in FIG. 3, and conversely, a protruding region 113A by additional ion implantation is provided.
It is to be noted that such a protruding region 113A is provided in a portion where the transfer electrodes 160A and 160B overlap, and therefore does not affect the read operation of the signal electrons driven by the upper-layer transfer electrode 160B. Does not rise.
[0023]
Next, an ion implantation method for forming such a hole accumulation region 113 will be described.
In the present example, a first ion implantation region having a pattern similar to that of the related art is formed by a first ion implantation process, and a second ion implantation for reducing a defect region generated in the first ion implantation region is performed. The region is formed by the second ion implantation step, and the pattern shape of the hole accumulation region 113 having the offset region 114 and the protruding region 113A shown in FIG. 4 is obtained by combining the two ion implantation regions.
[0024]
First, in the formation of the first ion implantation region by the first ion implantation step, the ion implantation direction was inclined from the readout region side to the pixel side in the same manner as in the method of the conventional example shown in FIGS. This is performed by a boron ion implantation process.
Also in this example, it is assumed that boron ion implantation is performed with the ion implantation direction (arrow b) inclined by 7 degrees from the readout region side to the pixel side.
As a result, as shown in FIG. 5, the single-layer portion of the transfer electrodes 160A and 160B has a width of 40 nm due to the self-alignment of the 300-nm transfer electrode film, and the 700-nm transfer electrode overlaps the transfer electrode 160A and 160B. A first ion implantation region 170 having an offset region 114 having a width of 85 nm is formed by self-alignment of the film. This portion having a width of 85 nm is the impurity-deficient region 170A in the first ion-implanted region 170.
[0025]
Therefore, in order to compensate for the defective region 170A and obtain a better dark current suppressing effect, a second ion implantation region is formed by a second ion implantation process.
FIG. 6 is a plan view showing a photoresist mask used in the second ion implantation step.
The mask 180 has a linear opening pattern 181 in the pixel row direction including the above-described defective region 170A. Such a mask 180 is disposed on the upper surfaces of the transfer electrodes 160A and 160B to implant boron ions. By doing so, a band-like ion implantation region penetrating the upper surface of each light receiving region 111 in the horizontal direction is formed.
[0026]
FIG. 7 is a cross-sectional view showing the second ion implantation step, and shows a cross section taken along line BB of FIG.
As shown in the figure, in the second ion implantation step, a band-shaped second ion implantation region having no offset region is performed by performing ion implantation (arrow c in the figure) in a direction orthogonal to the light receiving region 111. To form
In the example shown in FIG. 7, since the same ion implantation apparatus used in the first ion implantation step is used, the ion implantation direction is also inclined by 7 degrees with respect to the semiconductor substrate (work) in the second ion implantation step. It was done.
Therefore, in the second ion implantation step, the semiconductor substrate is rotated 90 degrees in the horizontal direction, and ion implantation is performed in the ion implantation direction inclined at 7 degrees in the direction of the paper of FIG. Thereby, in the horizontal transfer direction of the solid-state imaging device, it is possible to perform ion implantation orthogonal to the light receiving region 111, and it is possible to implant ions to regions near the transfer electrodes 160A and 160B.
[0027]
Thereafter, by removing the resist mask 180, as shown in FIG. 8, a band-shaped second ion-implanted region 171 penetrating substantially the center of the light-receiving region 111 in the horizontal transfer direction can be formed.
The dose of boron in the second ion implantation step is, for example, in the range of 10% to 100% of the dose in the first ion implantation step. Further, the energy in the second ion implantation step is, for example, 50% to 100% of the energy in the first ion implantation step.
[0028]
Therefore, the hole accumulation region 113 having the protruding region 113A as shown in FIG. 4 can be formed by combining the first ion implantation region 170 shown in FIG. 5 and the second ion implantation region 171 shown in FIG.
This makes it possible to form a solid-state imaging device in which a defective region is filled as shown in FIG. 13 and the effect of suppressing dark current is enhanced.
Note that the first ion-implanted region 170 and the second ion-implanted region 171 have an overlap region, and the concentration of impurity ions in the overlap region is high. However, since there is no problem in characteristics, FIG. This can be handled by a mask 180 having a simple shape as shown in FIG.
[0029]
The embodiments of the present invention have been described above. However, the present invention is not limited to the above-described examples, and various modifications are possible.
First, the above-described first ion implantation step and second ion implantation step are not particularly limited in order, and can be appropriately selected depending on the working environment and the like.
Further, in the above-described example, the case where the transfer electrode has a two-layer structure is described, but the present invention can be similarly applied to the case where the transfer electrode has three or more layers.
It should be noted that, even in a solid-state image sensor actually provided with a transfer electrode having a three-layer structure, a portion adjacent to the light receiving region has a two-layer transfer electrode as described in the embodiment of the present invention. In general, the electrodes are arranged so as to overlap with each other. For such a structure, the method according to the above-described embodiment can be applied almost as it is.
[0030]
Further, in the above-described example, the example has been described in which the second ion-implanted region having the protruding region only in the overlapping portion of the two-layer transfer electrode is formed. A second ion implantation region having a region may be formed.
For example, since signal charges are read out of the two-layer transfer electrodes by driving the second upper transfer electrode, the path of signal electrons read from the pixel to the transfer register is located in the lower region of the second transfer electrode. It is formed.
Therefore, the lower region of the lower first transfer electrode does not affect the readout characteristics of the signal charge. Therefore, even if a high-concentration P-type impurity region is arranged close to the first transfer electrode, the readout voltage of the signal electrons is reduced. Will not be raised. Therefore, by extending the above-described hole accumulation region protruding region to the region close to the first transfer electrode, the effect of suppressing dark current can be improved without lowering the readout characteristics.
[0031]
Further, in the above-described example, the example in which the defect region generated in the first ion implantation step is completely eliminated and the second ion implantation region having the protruding region is further formed, but only a part of the defect region is formed. A second ion implantation for reducing the size may be performed.
The mask used for the second ion implantation is of course not limited to a mask having a linear opening pattern, and may be a mask having a dot opening pattern. Needless to say, it can be appropriately selected according to the conditions. It is also possible to use a mask other than a photoresist mask.
[0032]
【The invention's effect】
As described above, according to the method for manufacturing a solid-state imaging device of the present invention, when forming a hole accumulation region having an offset region in an oblique ion implantation process by self-alignment using a plurality of transfer electrode films, By reducing the defect region of the hole accumulation region caused by the overlapping portion of the transfer electrode by the second ion implantation step, a solid-state imaging device having an appropriately shaped offset region and a hole accumulation region can be manufactured. There is an effect that it is possible to provide a solid-state imaging device that can achieve both low noise and low read voltage by suppressing the noise.
Further, according to the solid-state imaging device of the present invention, a hole accumulation region having an offset region is formed in a self-aligned oblique ion implantation process using a plurality of transfer electrode films; Since the first ion-implanted region has the second ion-implanted region for reducing a defect region generated, a solid-state imaging device having an appropriately shaped offset region and a hole accumulation region can be configured, and dark current can be suppressed. Therefore, there is an effect that both noise reduction and read voltage reduction can be achieved.
[Brief description of the drawings]
FIG. 1 is a plan view showing a device arrangement of a CCD solid-state imaging device according to an embodiment of the present invention.
FIG. 2 is a plan view showing a configuration of a peripheral portion of a pixel in the CCD solid-state imaging device shown in FIG.
3 is a sectional view taken along line AA of FIG. 2, showing an internal structure of a pixel peripheral portion in the CCD solid-state imaging device shown in FIG. 1;
FIG. 4 is a plan view showing a pattern shape of a hole accumulation region in the CCD solid-state imaging device shown in FIG.
FIG. 5 is a schematic sectional view showing a first ion implantation step for forming the hole accumulation region shown in FIG.
FIG. 6 is a plan view showing a photoresist mask used in a second ion implantation step for forming the hole accumulation region shown in FIG.
FIG. 7 is a schematic cross-sectional view showing a second ion implantation step for forming the hole accumulation region shown in FIG.
8 is a plan view showing a pattern shape of a second ion implantation region formed by a second ion implantation step shown in FIG.
FIG. 9 is a plan view showing a configuration of a peripheral portion of a pixel in a conventional CCD solid-state imaging device.
FIG. 10 is a sectional view taken along line AA of FIG. 9;
FIG. 11 is a cross-sectional view taken along the line AA of FIG. 9 illustrating an ion implantation step when an offset region is provided in a hole accumulation region of a light receiving region in a conventional CCD solid-state imaging device.
12 is a cross-sectional view taken along the line AA of FIG. 9 showing a state where the width of an offset region is increased at a portion where transfer electrodes overlap in the ion implantation step shown in FIG. 11;
FIG. 13 is a plan view showing a pattern shape of a hole accumulation region and an offset region formed in the ion implantation step shown in FIGS. 11 and 12.
[Explanation of symbols]
100 semiconductor substrate, 110 pixels, 111 light receiving area, 112 signal electron accumulation area, 113 hole accumulation area, 113A projection area, 114 offset area, 120 CCD vertical transfer register, 130 CCD horizontal transfer register, 140 output section, 150 channel stop area, 160A, 160B transfer electrode, 162 read area, 170 ion implantation area, 171: second ion-implanted region, 180: mask.

Claims (9)

A plurality of pixels including a photoelectric conversion region that generates signal charges according to the amount of incident light, and a plurality of pixels arranged along a pixel column formed of the plurality of pixels in an upper layer of the semiconductor substrate, and a signal charge generated by each pixel And a transfer unit for sequentially reading the signal charges in the pixel column direction, and a plurality of transfer electrodes for controlling the transfer of the signal charges read into the transfer unit on the transfer unit of the semiconductor substrate. A method for manufacturing an element,
Forming a signal electron accumulation region in the photoelectric conversion region of the plurality of pixels, and forming a hole accumulation region in an upper layer of the signal electron accumulation region,
The step of forming the hole accumulation region,
By performing ion implantation inclined from the transfer unit side to the photoelectric conversion region side by self-alignment using the plurality of transfer electrodes, an offset region where ions are not implanted in the charge readout region between the photoelectric conversion region and the transfer unit is set. A first ion implantation step of adding impurity ions while remaining,
When the first ion implantation process is performed by self-alignment using the plurality of transfer electrodes, the plurality of transfer electrodes overlap with each other in the raised portions where the ions are blocked by the overlapping portions. A second ion implantation step of reducing at least a part of the defective region by performing ion implantation with a different implantation method from the first ion implantation step;
A method for manufacturing a solid-state imaging device, comprising: 2. The method according to claim 1, wherein in the second ion implantation step, ion implantation is performed using an implantation angle and a mask different from those in the first ion implantation step. 3. 2. The method according to claim 1, wherein in the second ion implantation step, the ion implantation is performed in a state where the impurity ion region protrudes from a part of the offset region. 3. 4. The method according to claim 3, wherein in the second ion implantation step, the ion implantation is performed in a state where the impurity ion region protrudes from a portion of the offset region adjacent to the defect region. 5. . In the second ion implantation step, the ion implantation is performed in a state where the impurity ion region protrudes into a portion of the transfer electrodes of the plurality of layers in the offset region which is not used for reading out the signal electrons and is close to the transfer electrode. The method for manufacturing a solid-state imaging device according to claim 3, wherein: 3. The solid according to claim 2, wherein in the second ion implantation step, ion implantation is performed using a mask having a linear opening pattern including the defective region along a direction orthogonal to the pixel columns. A method for manufacturing an image sensor. 3. The method for manufacturing a solid-state imaging device according to claim 2, wherein in the second ion implantation step, ion implantation is performed using a mask having a dot-shaped opening pattern corresponding to the defective region for each pixel. . In the step of forming the signal electron accumulation region, a low concentration N-type impurity diffusion region is formed by implanting N-type impurity ions into a P-type well region provided in the semiconductor substrate, and the hole accumulation region is formed. In this step, a high-concentration P-type impurity diffusion region is formed by implanting P-type impurity ions into the upper layer of the signal electron accumulation region of the semiconductor substrate by the first ion implantation step and the second ion implantation step. 2. The method for manufacturing a solid-state imaging device according to claim 1, wherein: A plurality of pixels including a photoelectric conversion region that is provided in an upper layer of the semiconductor substrate and generates signal electrons according to the amount of incident light,
A transfer unit that is arranged along a pixel column composed of the plurality of pixels in the upper layer of the semiconductor substrate, reads out signal electrons generated by each pixel, and sequentially transfers the signal electrons in a pixel column direction,
A plurality of transfer electrodes provided on the transfer portion of the semiconductor substrate in an upper layer of the semiconductor substrate and controlling transfer of signal electrons read into the transfer portion,
A signal electron accumulation region is formed in the photoelectric conversion region of the plurality of pixels, and a hole accumulation region is formed above the signal electron accumulation region,
The hole accumulation region,
By performing ion implantation inclined from the transfer unit side to the photoelectric conversion region side by self-alignment using the plurality of transfer electrodes, an offset region where ions are not implanted in the charge readout region between the photoelectric conversion region and the transfer unit is set. A first ion-implanted region to which impurity ions are added in a state where it is left;
When the first ion implantation process is performed by self-alignment using the plurality of transfer electrodes, the plurality of transfer electrodes overlap with each other in the raised portions where the ions are blocked by the overlapping portions. A second ion implantation region to which impurity ions are added in a state where at least a part of the defective region is reduced by performing ion implantation with a different implantation method from the first ion implantation step;
A solid-state imaging device comprising:

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